Re: [PATCH 3/3] MATCH: Replace all uses of ssa_name_has_boolean_range with zero_one_valued_p

[Jeff Law via Gcc-patches]

On 9/2/23 09:09, Andrew Pinski via Gcc-patches wrote:

This replaces all uses of ssa_name_has_boolean_range with zero_one_valued_p
except for the one in the definition of zero_one_valued_p. This simplifies
the code in general and makes only one way of saying we have a range of [0,1].

Note this depends on the patch that adds ssa_name_has_boolean_range usage
to zero_one_valued_p.

OK? Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* match.pd: Move zero_one_valued_p and truth_valued_p
towards the begnining of the file.
(X / bool_range_Y): Use zero_one_valued_p instead
of ssa_name_has_boolean_range. Move after all other
`X / Y` patterns. Add check to make sure bool_range_Y
is not the literal 0.
(1 - a): Use zero_one_valued_p instead
of ssa_name_has_boolean_range
(-(type)!A): Likewise.

OK.
jeff

Re: [PATCH] ssa_name_has_boolean_range vs signed-boolean:31 types

[Jeff Law via Gcc-patches]

On 9/1/23 20:32, Andrew Pinski via Gcc-patches wrote:

This turns out to be a latent bug in ssa_name_has_boolean_range
where it would return true for all boolean types but all of the
uses of ssa_name_has_boolean_range was expecting 0/1 as the range
rather than [-1,0].
So when I fixed vector lower to do all comparisons in boolean_type
rather than still in the signed-boolean:31 type (to fix a different issue),
the pattern in match for `-(type)!A -> (type)A - 1.` would assume A (which
was signed-boolean:31) had a range of [0,1] which broke down and sometimes
gave us -1/-2 as values rather than what we were expecting of -1/0.

This was the simpliest patch I found while testing.

We have another way of matching [0,1] range which we could use instead
of ssa_name_has_boolean_range except that uses only the global ranges
rather than the local range (during VRP).
I tried to clean this up slightly by using gimple_match_zero_one_valuedp
inside ssa_name_has_boolean_range but that failed because due to using
only the global ranges. I then tried to change get_nonzero_bits to use
the local ranges at the optimization time but that failed also because
we would remove branches to __builtin_unreachable during evrp and lose
information as we don't set the global ranges during evrp.

OK? Bootstrapped and tested on x86_64-linux-gnu.

PR 110817

gcc/ChangeLog:

* tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
check for boolean type as they don't have "[0,1]" range.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/pr110817-1.c: New test.
* gcc.c-torture/execute/pr110817-2.c: New test.
* gcc.c-torture/execute/pr110817-3.c: New test.
I'm a bit surprised this didn't trigger any regressions.  Though maybe 
all the existing testcases were capturing cases where non-boolean types 
were known to have a 0/1 value.



OK.
jeff

Re: [PATCH 2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler

[Andrew Pinski via Gcc-patches]

On Mon, Sep 4, 2023 at 11:06 PM Jeff Law via Gcc-patches
 wrote:
>
>
>
> On 9/1/23 11:30, Andrew Pinski via Gcc-patches wrote:
> > So it turns out there was a simplier way of starting to
> > improve VRP to start to fix PR 110131, PR 108360, and PR 108397.
> > That was rewrite test_for_singularity to use range_op_handler
> > and Value_Range.
> >
> > This patch implements that and
> >
> > OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
> >
> > gcc/ChangeLog:
> >
> >   * vr-values.cc (test_for_singularity): Add edge argument
> >   and rewrite using range_op_handler.
> >   (simplify_compare_using_range_pairs): Use Value_Range
> >   instead of value_range and update test_for_singularity call.
> >
> > gcc/testsuite/ChangeLog:
> >
> >   * gcc.dg/tree-ssa/vrp124.c: New test.
> >   * gcc.dg/tree-ssa/vrp125.c: New test.
> > ---
>
> > diff --git a/gcc/vr-values.cc b/gcc/vr-values.cc
> > index 52ab4fe6109..2474e57ee90 100644
> > --- a/gcc/vr-values.cc
> > +++ b/gcc/vr-values.cc
> > @@ -904,69 +904,33 @@ simplify_using_ranges::simplify_bit_ops_using_ranges
> >   }
> >
> >   /* We are comparing trees OP1 and OP2 using COND_CODE.  OP1 has
> > -   a known value range VR.
> > +   a known value range OP1_RANGE.
> >
> >  If there is one and only one value which will satisfy the
> > -   conditional, then return that value.  Else return NULL.
> > -
> > -   If signed overflow must be undefined for the value to satisfy
> > -   the conditional, then set *STRICT_OVERFLOW_P to true.  */
> > +   conditional on the EDGE, then return that value.
> > +   Else return NULL.  */
> >
> >   static tree
> >   test_for_singularity (enum tree_code cond_code, tree op1,
> > -   tree op2, const value_range *vr)
> > +   tree op2, const int_range_max &op1_range, bool edge)
> >   {
> > -  tree min = NULL;
> > -  tree max = NULL;
> > -
> > -  /* Extract minimum/maximum values which satisfy the conditional as it was
> > - written.  */
> > -  if (cond_code == LE_EXPR || cond_code == LT_EXPR)
> > +  /* This is already a singularity.  */
> > +  if (cond_code == NE_EXPR || cond_code == EQ_EXPR)
> > +return NULL;
> I don't think this is necessarily the right thing to do for NE.
>
> Consider if op1 has the range [0,1] and op2 has the value 1.  If the
> code is NE, then we should be able to return a singularity of 0 since
> that's the only value for x where x ne 1 is true given the range for x.

The "false" edge singularity is already known when NE is supplied. I
don't think changing it to the "true" edge singularity will be helpful
all of the time; preferring the value of 0 is a different story.
But that is a different patch and for a different location rather than
inside VRP; it should be in either isel or expand (more likely isel).

Thanks,
Andrew

>
>
>
> I like what you're trying to do, it just needs a bit of refinement I think.
>
> jeff

Re: [PATCH] MATCH: Transform `(1 >> X) !=/== 0` into `X ==/!= 0`

[Jeff Law via Gcc-patches]

On 9/3/23 10:25, Andrew Pinski via Gcc-patches wrote:

We currently have a pattern for handling `(C >> X) & D == 0`
but if C is 1 and D is 1, the `& 1` might have been removed.

gcc/ChangeLog:

PR tree-optimization/105832
* match.pd (`(1 >> X) != 0`): New pattern

OK
jeff

Re: [PATCH] MATCH: Add `~MAX(~X, Y)` pattern: [PR96694]

[Jeff Law via Gcc-patches]

On 9/3/23 18:21, Andrew Pinski via Gcc-patches wrote:

This adds `~MAX(~X, Y)` and `~MIN(~X, Y)` patterns
that are like the `~(~a & b)` and `~(~a | b)` patterns
and allows to reduce the number of ~ by 1.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/96694

gcc/ChangeLog:

* match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/minmax-24.c: New test.

OK.
jeff

[PATCH 16/12] _BitInt profile fixes [PR102989]

[Jakub Jelinek via Gcc-patches]

On Thu, Aug 24, 2023 at 03:14:32PM +0200, Jan Hubicka via Gcc-patches wrote:
> this patch extends verifier to check that all probabilities and counts are
> initialized if profile is supposed to be present.  This is a bit complicated
> by the posibility that we inline !flag_guess_branch_probability function
> into function with profile defined and in this case we need to stop
> verification.  For this reason I added flag to cfg structure tracking this.

This patch broke a couple of _BitInt tests (in the admittedly still
uncommitted series - still waiting for review of the C FE bits).

Here is a minimal patch to make it work again, though I'm not sure
if in the if_then_else and if_then_if_then_else cases I shouldn't scale
count of the other bbs as well.  if_then method creates
if (COND) new_bb1;
in a middle of some pre-existing bb (with PROB that COND is true), if_then_else
if (COND) new_bb1; else new_bb2;
and if_then_if_then_else
if (COND1) { if (COND2) new_bb2; else new_bb1; }
with PROB1 and PROB2 probabilities that COND1 and COND2 are true.
The lowering happens shortly after IPA.

Ok for trunk with rest of the series?

2023-09-05  Jakub Jelinek  

PR c/102989
* gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
rather than make_edge, initialize bb->count.

--- gcc/gimple-lower-bitint.cc.jj   2023-09-04 09:45:37.357004452 +0200
+++ gcc/gimple-lower-bitint.cc  2023-09-04 22:53:30.343756938 +0200
@@ -683,9 +683,10 @@ bitint_large_huge::if_then_else (gimple
   e1->flags = EDGE_FALSE_VALUE;
   e3->probability = prob;
   e1->probability = prob.invert ();
+  bb->count = e1->src->count.apply_probability (prob);
   set_immediate_dominator (CDI_DOMINATORS, bb, e1->src);
   set_immediate_dominator (CDI_DOMINATORS, e2->dest, e1->src);
-  edge_true = make_edge (bb, e2->dest, EDGE_FALLTHRU);
+  edge_true = make_single_succ_edge (bb, e2->dest, EDGE_FALLTHRU);
   edge_false = e2;
   m_gsi = gsi_after_labels (bb);
 }
@@ -741,7 +742,8 @@ bitint_large_huge::if_then_if_then_else
   e4->probability = prob2;
   e2->flags = EDGE_FALSE_VALUE;
   e2->probability = prob2.invert ();
-  e4 = make_edge (bb, e3->dest, EDGE_FALLTHRU);
+  bb->count = e2->src->count.apply_probability (prob2);
+  e4 = make_single_succ_edge (bb, e3->dest, EDGE_FALLTHRU);
   e2 = find_edge (e2->dest, e3->dest);
   edge_true_true = e4;
   edge_true_false = e2;


Jakub

Re: [PATCH] RISC-V: Emit .note.GNU-stack for non-linux target as well

[Jeff Law via Gcc-patches]

On 8/31/23 03:05, Kito Cheng wrote:

We only emit that on linux target before, that not problem before,
however Qemu has fix a bug to make qemu user mode honor PT_GNU_STACK[1],
that will cause problem when we test baremetal with qemu.

So the straightforward is enable that as well for non-linux toolchian,
the price is that will increase few bytes for each binary.

[1] https://github.com/qemu/qemu/commit/872f3d046f2381e3f416519e82df96bd60818311

gcc/ChangeLog:

* config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
* config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.

OK.
jeff

Re: [PATCH] MATCH: Add pattern for `(x | y) & (x & z)`

[Jeff Law via Gcc-patches]

On 9/3/23 14:49, Andrew Pinski via Gcc-patches wrote:

Like the pattern already there for `(x | y) & x`,
this adds a simple pattern to optimize `(x | y) & (x & z)`
to just `x & z`.

OK? Bootstrapped and tested on x86-64-linux-gnu with no regressions.

gcc/ChangeLog:

PR tree-optimization/103536
* match.pd (`(x | y) & (x & z)`,
`(x & y) | (x | z)`): New patterns.

gcc/testsuite/ChangeLog:

PR tree-optimization/103536
* gcc.dg/tree-ssa/andor-6.c: New test.
* gcc.dg/tree-ssa/andor-bool-1.c: New test.

OK.
jeff

Re: [PATCH] MATCH: Add `(x | c) & ~(y | c)` and `x & ~(y | x)` patterns [PR98710]

[Jeff Law via Gcc-patches]

On 9/3/23 19:25, Andrew Pinski via Gcc-patches wrote:

Adding some more simple bit_and/bit_ior patterns.
How often these show up, I have no idea.

This was tested on top of
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629174.html .

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

PR tree-optimization/98710
* match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
(`x & ~(y | x)`, `x | ~(y & x)`): New patterns.

gcc/testsuite/ChangeLog:

PR tree-optimization/98710
* gcc.dg/tree-ssa/andor-7.c: New test.
* gcc.dg/tree-ssa/andor-8.c: New test.

OK
jeff

Re: [PATCH] MATCH: `(nop_convert)-(convert)a` into -(convert)a if we are converting from something smaller

[Jeff Law via Gcc-patches]

On 9/2/23 01:00, Andrew Pinski via Gcc-patches wrote:

This allows removal of one conversion and in the case of booleans, might be 
able to remove
the negate and the other conversion later on.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/107137

gcc/ChangeLog:

* match.pd (`(nop_convert)-(convert)a`): New pattern.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/neg-cast-2.c: New test.
* gcc.dg/tree-ssa/neg-cast-3.c: New test.

OK.
jeff

[PATCH 17/12] _BitInt a ? ~b : b match.pd fix [PR102989]

[Jakub Jelinek via Gcc-patches]

On Wed, Aug 09, 2023 at 12:19:54PM -0700, Andrew Pinski via Gcc-patches wrote:
>   PR tree-optimization/110937
>   PR tree-optimization/100798
> --- a/gcc/match.pd
> +++ b/gcc/match.pd
> @@ -6460,6 +6460,20 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
>(if (cmp == NE_EXPR)
> { constant_boolean_node (true, type); })))
>  
> +#if GIMPLE
> +/* a?~t:t -> (-(a))^t */
> +(simplify
> + (cond @0 @1 @2)
> + (if (INTEGRAL_TYPE_P (type)
> +  && bitwise_inverted_equal_p (@1, @2))
> +  (with {
> +auto prec = TYPE_PRECISION (type);
> +auto unsign = TYPE_UNSIGNED (type);
> +tree inttype = build_nonstandard_integer_type (prec, unsign);
> +   }
> +   (convert (bit_xor (negate (convert:inttype @0)) (convert:inttype @2))
> +#endif

This broke one bitint test - bitint-42.c for -O1 and -Os (in admittedly not yet
committed series).
Using build_nonstandard_integer_type this way doesn't work well for larger
precision BITINT_TYPEs, because it always creates an INTEGER_TYPE and
say 467-bit INTEGER_TYPE doesn't work very well.  To get a BITINT_TYPE, one
needs to use build_bitint_type instead (but similarly to
build_nonstandard_integer_type one should first make sure such a type
actually can be created).

I admit it isn't really clear to me what do you want to achieve by the
above build_nonstandard_integer_type.  Is it because of BOOLEAN_TYPE
or perhaps ENUMERAL_TYPE as well?

If type is INTEGER_TYPE or BITINT_TYPE, one doesn't really need to create a
new type, type already is an integral type with that precision and
signedness.  In other places using unsigned_type_for or signed_type_for
might be better than using build_nonstandard_integer_type if that is what
one wants to achieve, those functions handle BITINT_TYPE.

Or shall we instead test for == BOOLEAN_TYPE (or if ENUMERAL_TYPE for
some reason needs the same treatment also || == ENUMERAL_TYPE)?

2023-09-05  Jakub Jelinek  

PR c/102989
* match.pd (a ? ~b : b): Don't use build_nonstandard_integer_type
for INTEGER_TYPE or BITINT_TYPE.

--- gcc/match.pd.jj 2023-09-04 09:45:33.553058301 +0200
+++ gcc/match.pd2023-09-05 08:45:53.258078971 +0200
@@ -6631,7 +6631,9 @@ (define_operator_list SYNC_FETCH_AND_AND
(with {
  auto prec = TYPE_PRECISION (type);
  auto unsign = TYPE_UNSIGNED (type);
- tree inttype = build_nonstandard_integer_type (prec, unsign);
+ tree inttype = type;
+ if (TREE_CODE (type) != INTEGER_TYPE && TREE_CODE (type) != BITINT_TYPE)
+   inttype = build_nonstandard_integer_type (prec, unsign);
 }
 (convert (bit_xor (negate (convert:inttype @0)) (convert:inttype @2)))
 #endif


Jakub

[PATCH 18/12] Handle BITINT_TYPE in build_{, minus_}one_cst [PR102989]

[Jakub Jelinek via Gcc-patches]

Hi!

Recent match.pd changes trigger ICE in build_minus_one_cst, apparently
I forgot to handle BITINT_TYPE in these (while I've handled it in
build_zero_cst).

Will commit as obvious together with the rest of the series when the last
patches are approved.

2023-09-05  Jakub Jelinek  

PR c/102989
* tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
like INTEGER_TYPE.

--- gcc/tree.cc.jj  2023-09-04 09:45:33.444059843 +0200
+++ gcc/tree.cc 2023-09-05 08:57:31.420059962 +0200
@@ -2546,7 +2546,7 @@ build_one_cst (tree type)
 {
 case INTEGER_TYPE: case ENUMERAL_TYPE: case BOOLEAN_TYPE:
 case POINTER_TYPE: case REFERENCE_TYPE:
-case OFFSET_TYPE:
+case OFFSET_TYPE: case BITINT_TYPE:
   return build_int_cst (type, 1);
 
 case REAL_TYPE:
@@ -2599,7 +2599,7 @@ build_minus_one_cst (tree type)
 {
 case INTEGER_TYPE: case ENUMERAL_TYPE: case BOOLEAN_TYPE:
 case POINTER_TYPE: case REFERENCE_TYPE:
-case OFFSET_TYPE:
+case OFFSET_TYPE: case BITINT_TYPE:
   return build_int_cst (type, -1);
 
 case REAL_TYPE:

Jakub

[committed] tree-ssa-tail-merge: Fix a comment typo

[Jakub Jelinek via Gcc-patches]

Hi!

I've noticed a typo in a comment, fixed thusly.
Committed to trunk as obvious.

2023-09-05  Jakub Jelinek  

* tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
avreage -> average.

--- gcc/tree-ssa-tail-merge.cc.jj   2023-07-11 13:40:40.253431941 +0200
+++ gcc/tree-ssa-tail-merge.cc  2023-09-04 22:46:50.035269079 +0200
@@ -1605,7 +1605,7 @@ replace_block_by (basic_block bb1, basic
 
/* If probabilities are same, we are done.
   If counts are nonzero we can distribute accordingly. In remaining
-  cases just avreage the values and hope for the best.  */
+  cases just average the values and hope for the best.  */
e2->probability = e1->probability.combine_with_count
 (bb1->count, e2->probability, bb2->count);
   }

Jakub

[PATCH V5 0/3] RISC-V: Add an experimental vector calling convention

[Lehua Ding]

V5 change: Rebase and fix vsetvl testcase fail by change
`(unspec [...] UNSPEC_CALLEE_CC)` to `(use (unspec [...] UNSPEC_CALLEE_CC))`.
This change makes single_set function re-think call_insn as a
single set pattern.

Hi RISC-V folks,

This patch implement the proposal of RISC-V vector calling convention[1] and
this feature can be enabled by `--param=riscv-vector-abi` option. Currently,
all vector type arguments and return values are pass by reference. With this
patch, these arguments and return values can pass through vector registers.
Currently only vector types defined in the RISC-V Vector Extension Intrinsic 
Document[2]
are supported. GNU-ext vector types are unsupported for now since the
corresponding proposal was not presented.

The proposal introduce a new calling convention variant, functions which follow
this variant need follow the bellow vector register convention.

| Name| ABI Mnemonic | Meaning  | Preserved across 
calls?
=
| v0  |  | Argument register| No
| v1-v7   |  | Callee-saved registers   | Yes
| v8-v23  |  | Argument registers   | No
| v24-v31 |  | Callee-saved registers   | Yes

If a functions follow this vector calling convention, then the function symbole
must be annotated with .variant_cc directive[3] (used to indicate that it is a
calling convention variant).

This implementation split into three parts, each part corresponds to a 
sub-patch.

- Part-1: Select suitable vector regsiters for vector type arguments and return
  values according to the proposal.
- Part-2: Allocate frame area for callee-saved vector registers and save/restore
  them in prologue and epilogue.
- Part-3: Generate .variant_cc directive for vector function in assembly code.

[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/389
[2] 
https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#type-system
[3] 
https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#pseudo-ops

Best,
Lehua

Lehua Ding (3):
  RISC-V: Part-1: Select suitable vector registers for vector type args
and returns
  RISC-V: Part-2: Save/Restore vector registers which need to be
preversed
  RISC-V: Part-3: Output .variant_cc directive for vector function

 gcc/config/riscv/riscv-protos.h   |   4 +
 gcc/config/riscv/riscv-sr.cc  |   8 +-
 gcc/config/riscv/riscv-vector-builtins.cc |  10 +
 gcc/config/riscv/riscv.cc | 484 --
 gcc/config/riscv/riscv.h  |  43 ++
 gcc/config/riscv/riscv.md |  51 +-
 gcc/config/riscv/riscv.opt|   5 +
 .../riscv/rvv/base/abi-call-args-1-run.c  | 127 +
 .../riscv/rvv/base/abi-call-args-1.c  | 197 +++
 .../riscv/rvv/base/abi-call-args-2-run.c  |  34 ++
 .../riscv/rvv/base/abi-call-args-2.c  |  27 +
 .../riscv/rvv/base/abi-call-args-3-run.c  | 260 ++
 .../riscv/rvv/base/abi-call-args-3.c  | 116 +
 .../riscv/rvv/base/abi-call-args-4-run.c  | 145 ++
 .../riscv/rvv/base/abi-call-args-4.c  | 111 
 .../riscv/rvv/base/abi-call-error-1.c |  11 +
 .../riscv/rvv/base/abi-call-return-run.c  | 127 +
 .../riscv/rvv/base/abi-call-return.c  | 197 +++
 .../riscv/rvv/base/abi-call-variant_cc.c  |  39 ++
 .../rvv/base/abi-callee-saved-1-fixed-1.c |  86 
 .../rvv/base/abi-callee-saved-1-fixed-2.c |  86 
 .../base/abi-callee-saved-1-save-restore.c|  85 +++
 .../riscv/rvv/base/abi-callee-saved-1-zcmp.c  |  85 +++
 .../riscv/rvv/base/abi-callee-saved-1.c   |  88 
 .../base/abi-callee-saved-2-save-restore.c| 108 
 .../riscv/rvv/base/abi-callee-saved-2-zcmp.c  | 107 
 .../riscv/rvv/base/abi-callee-saved-2.c   | 117 +
 27 files changed, 2709 insertions(+), 49 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-1-run.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-2-run.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-3-run.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-3.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-error-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-return-run.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-return.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-variant_cc

[PATCH V5 2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed

[Lehua Ding]

Because functions which follow vector calling convention variant has
callee-saved vector reigsters but functions which follow standard calling
convention don't have. We need to distinguish which function callee is so that
we can tell GCC exactly which vector registers callee will clobber. So I encode
the callee's calling convention information into the calls rtx pattern like
AArch64. The old operand 2 and 3 of call pattern which copy from MIPS target are
useless and removed according to my analysis.

gcc/ChangeLog:

* config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): 
Pass riscv_cc.
* config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
(riscv_frame_info::reset): Reset new fileds.
(riscv_call_tls_get_addr): Pass riscv_cc.
(riscv_function_arg): Return riscv_cc for call patterm.
(get_riscv_cc): New function return riscv_cc from rtl call_insn.
(riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
(riscv_save_reg_p): Add vector callee-saved check.
(riscv_stack_align): Add vector save area comment.
(riscv_compute_frame_info): Ditto.
(riscv_restore_reg): Update for type change.
(riscv_for_each_saved_v_reg): New function save vector registers.
(riscv_first_stack_step): Handle funciton with vector callee-saved 
registers.
(riscv_expand_prologue): Ditto.
(riscv_expand_epilogue): Ditto.
(riscv_output_mi_thunk): Pass riscv_cc.
(TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
* config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
* config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-1.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: New test.
* gcc.target/riscv/rvv/base/abi-callee-saved-2.c: New test.

---
 gcc/config/riscv/riscv-sr.cc  |   8 +-
 gcc/config/riscv/riscv.cc | 202 --
 gcc/config/riscv/riscv.h  |   3 +
 gcc/config/riscv/riscv.md |  51 +++--
 .../rvv/base/abi-callee-saved-1-fixed-1.c |  86 
 .../rvv/base/abi-callee-saved-1-fixed-2.c |  86 
 .../base/abi-callee-saved-1-save-restore.c|  85 
 .../riscv/rvv/base/abi-callee-saved-1-zcmp.c  |  85 
 .../riscv/rvv/base/abi-callee-saved-1.c   |  88 
 .../base/abi-callee-saved-2-save-restore.c| 108 ++
 .../riscv/rvv/base/abi-callee-saved-2-zcmp.c  | 107 ++
 .../riscv/rvv/base/abi-callee-saved-2.c   | 117 ++
 12 files changed, 994 insertions(+), 32 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c

diff --git a/gcc/config/riscv/riscv-sr.cc b/gcc/config/riscv/riscv-sr.cc
index 7248f04d68f..0f5893f527c 100644
--- a/gcc/config/riscv/riscv-sr.cc
+++ b/gcc/config/riscv/riscv-sr.cc
@@ -447,12 +447,14 @@ riscv_remove_unneeded_save_restore_calls (void)
   && !SIBCALL_REG_P (REGNO (target)))
 return;
 
+  riscv_cc cc = get_riscv_cc (XVECEXP (callpat, 0, 1));
   rtx sibcall = NULL;
   if (set_target != NULL)
-sibcall
-  = gen_sibcall_value_internal (set_target, target, const0_rtx);
+sibcall = gen_sibcall_value_internal (set_target, target, const0_rtx,
+ gen_int_mode (cc, SImode));
   else
-sibcall = gen_sibcall_internal (target, const0_rtx);
+sibcall
+  = gen_sibcall_internal (target, const0_rtx, gen_int_mode (cc, SImode));
 
   rtx_insn *before_call = PREV_INSN (call);
   remove_insn (call);
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index acfb8a11fc1..41c9941de65 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -110,6 +110,9 @@ struct GTY(())  riscv_frame_info {
   /* Likewise FPR X.  */
   unsigned int fmask;
 

[PATCH V5 1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns

[Lehua Ding]

I post the vector register calling convention rules from in the proposal[1]
directly here:

v0 is used to pass the first vector mask argument to a function, and to return
vector mask result from a function. v8-v23 are used to pass vector data
arguments, vector tuple arguments and the rest vector mask arguments to a
function, and to return vector data and vector tuple results from a function.

Each vector data type and vector tuple type has an LMUL attribute that
indicates a vector register group. The value of LMUL indicates the number of
vector registers in the vector register group and requires the first vector
register number in the vector register group must be a multiple of it. For
example, the LMUL of `vint64m8_t` is 8, so v8-v15 vector register group can be
allocated to this type, but v9-v16 can not because the v9 register number is
not a multiple of 8. If LMUL is less than 1, it is treated as 1. If it is a
vector mask type, its LMUL is 1.

Each vector tuple type also has an NFIELDS attribute that indicates how many
vector register groups the type contains. Thus a vector tuple type needs to
take up LMUL×NFIELDS registers.

The rules for passing vector arguments are as follows:

1. For the first vector mask argument, use v0 to pass it. The argument has now
been allocated.

2. For vector data arguments or rest vector mask arguments, starting from the
v8 register, if a vector register group between v8-v23 that has not been
allocated can be found and the first register number is a multiple of LMUL,
then allocate this vector register group to the argument and mark these
registers as allocated. Otherwise, pass it by reference. The argument has now
been allocated.

3. For vector tuple arguments, starting from the v8 register, if NFIELDS
consecutive vector register groups between v8-v23 that have not been allocated
can be found and the first register number is a multiple of LMUL, then allocate
these vector register groups to the argument and mark these registers as
allocated. Otherwise, pass it by reference. The argument has now been allocated.

NOTE: It should be stressed that the search for the appropriate vector register
groups starts at v8 each time and does not start at the next register after the
registers are allocated for the previous vector argument. Therefore, it is
possible that the vector register number allocated to a vector argument can be
less than the vector register number allocated to previous vector arguments.
For example, for the function
`void foo (vint32m1_t a, vint32m2_t b, vint32m1_t c)`, according to the rules
of allocation, v8 will be allocated to `a`, v10-v11 will be allocated to `b`
and v9 will be allocated to `c`. This approach allows more vector registers to
be allocated to arguments in some cases.

Vector values are returned in the same manner as the first named argument of
the same type would be passed.

[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/389

gcc/ChangeLog:

* config/riscv/riscv-protos.h (builtin_type_p): New function for 
checking vector type.
* config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
* config/riscv/riscv.cc (struct riscv_arg_info): New fields.
(riscv_init_cumulative_args): Setup variant_cc field.
(riscv_vector_type_p): New function for checking vector type.
(riscv_hard_regno_nregs): Hoist declare.
(riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
(riscv_get_arg_info): Support vector cc.
(riscv_function_arg_advance): Update cum.
(riscv_pass_by_reference): Handle vector args.
(riscv_v_abi): New function return vector abi.
(riscv_return_value_is_vector_type_p): New function for check vector 
arguments.
(riscv_arguments_is_vector_type_p): New function for check vector 
returns.
(riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
(TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
* config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
(MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
(MAX_ARGS_IN_MASK_REGISTERS): Ditto.
(V_ARG_FIRST): Ditto.
(V_ARG_LAST): Ditto.
(enum riscv_cc): Define all RISCV_CC variants.
* config/riscv/riscv.opt: Add --param=riscv-vector-abi.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/abi-call-args-1-run.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-1.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-2-run.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-2.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-3-run.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-3.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-4-run.c: New test.
* gcc.target/riscv/rvv/base/abi-call-args-4.c: New test.
* gcc.target/riscv/rvv/base/abi-call-error-1.c: New test.
* gcc.target/riscv/rvv/base/abi-call-return-run.c: New test.

[PATCH V5 3/3] RISC-V: Part-3: Output .variant_cc directive for vector function

[Lehua Ding]

Functions which follow vector calling convention variant need be annotated by
.variant_cc directive according the RISC-V Assembly Programmer's Manual[1] and
RISC-V ELF Specification[2].

[1] 
https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#pseudo-ops
[2] 
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#dynamic-linking

gcc/ChangeLog:

* config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
(riscv_asm_output_alias): Ditto.
(riscv_asm_output_external): Ditto.
* config/riscv/riscv.cc (riscv_asm_output_variant_cc):
Output .variant_cc directive for vector function.
(riscv_declare_function_name): Ditto.
(riscv_asm_output_alias): Ditto.
(riscv_asm_output_external): Ditto.
* config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
Implement ASM_DECLARE_FUNCTION_NAME.
(ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
(ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/abi-call-variant_cc.c: New test.
---
 gcc/config/riscv/riscv-protos.h   |  3 ++
 gcc/config/riscv/riscv.cc | 48 +++
 gcc/config/riscv/riscv.h  | 15 ++
 .../riscv/rvv/base/abi-call-variant_cc.c  | 39 +++
 4 files changed, 105 insertions(+)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-variant_cc.c

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 970d5a899f6..5885ef78218 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -102,6 +102,9 @@ extern bool riscv_split_64bit_move_p (rtx, rtx);
 extern void riscv_split_doubleword_move (rtx, rtx);
 extern const char *riscv_output_move (rtx, rtx);
 extern const char *riscv_output_return ();
+extern void riscv_declare_function_name (FILE *, const char *, tree);
+extern void riscv_asm_output_alias (FILE *, const tree, const tree);
+extern void riscv_asm_output_external (FILE *, const tree, const char *);
 extern bool
 riscv_zcmp_valid_stack_adj_bytes_p (HOST_WIDE_INT, int);
 
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 41c9941de65..dabb341a571 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -7718,6 +7718,54 @@ riscv_emit_attribute ()
riscv_stack_boundary / 8);
 }
 
+/* Output .variant_cc for function symbol which follows vector calling
+   convention.  */
+
+static void
+riscv_asm_output_variant_cc (FILE *stream, const tree decl, const char *name)
+{
+  if (TREE_CODE (decl) == FUNCTION_DECL)
+{
+  riscv_cc cc = (riscv_cc) fndecl_abi (decl).id ();
+  if (cc == RISCV_CC_V)
+   {
+ fprintf (stream, "\t.variant_cc\t");
+ assemble_name (stream, name);
+ fprintf (stream, "\n");
+   }
+}
+}
+
+/* Implement ASM_DECLARE_FUNCTION_NAME.  */
+
+void
+riscv_declare_function_name (FILE *stream, const char *name, tree fndecl)
+{
+  riscv_asm_output_variant_cc (stream, fndecl, name);
+  ASM_OUTPUT_TYPE_DIRECTIVE (stream, name, "function");
+  ASM_OUTPUT_LABEL (stream, name);
+}
+
+/* Implement ASM_OUTPUT_DEF_FROM_DECLS.  */
+
+void
+riscv_asm_output_alias (FILE *stream, const tree decl, const tree target)
+{
+  const char *name = XSTR (XEXP (DECL_RTL (decl), 0), 0);
+  const char *value = IDENTIFIER_POINTER (target);
+  riscv_asm_output_variant_cc (stream, decl, name);
+  ASM_OUTPUT_DEF (stream, name, value);
+}
+
+/* Implement ASM_OUTPUT_EXTERNAL.  */
+
+void
+riscv_asm_output_external (FILE *stream, tree decl, const char *name)
+{
+  default_elf_asm_output_external (stream, decl, name);
+  riscv_asm_output_variant_cc (stream, decl, name);
+}
+
 /* Implement TARGET_ASM_FILE_START.  */
 
 static void
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 68be4f37b9d..7ac78847b3a 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -1049,6 +1049,21 @@ while (0)
 
 #define ASM_COMMENT_START "#"
 
+/* Add output .variant_cc directive for specific function definition.  */
+#undef ASM_DECLARE_FUNCTION_NAME
+#define ASM_DECLARE_FUNCTION_NAME(STR, NAME, DECL) 
\
+  riscv_declare_function_name (STR, NAME, DECL)
+
+/* Add output .variant_cc directive for specific alias definition.  */
+#undef ASM_OUTPUT_DEF_FROM_DECLS
+#define ASM_OUTPUT_DEF_FROM_DECLS(STR, DECL, TARGET)   
\
+  riscv_asm_output_alias (STR, DECL, TARGET)
+
+/* Add output .variant_cc directive for specific extern function.  */
+#undef ASM_OUTPUT_EXTERNAL
+#define ASM_OUTPUT_EXTERNAL(STR, DECL, NAME)   
\
+  riscv_asm_output_external (STR, DECL, NAME)
+
 #undef SIZE_TYPE
 #define SIZE_TYPE (POINTER_SIZE == 64 ? "long unsigned int" : "unsigned int")
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-variant_cc.c 

Re: [PATCH] ssa_name_has_boolean_range vs signed-boolean:31 types

[Andrew Pinski via Gcc-patches]

On Tue, Sep 5, 2023 at 12:09 AM Jeff Law via Gcc-patches
 wrote:
>
>
>
> On 9/1/23 20:32, Andrew Pinski via Gcc-patches wrote:
> > This turns out to be a latent bug in ssa_name_has_boolean_range
> > where it would return true for all boolean types but all of the
> > uses of ssa_name_has_boolean_range was expecting 0/1 as the range
> > rather than [-1,0].
> > So when I fixed vector lower to do all comparisons in boolean_type
> > rather than still in the signed-boolean:31 type (to fix a different issue),
> > the pattern in match for `-(type)!A -> (type)A - 1.` would assume A (which
> > was signed-boolean:31) had a range of [0,1] which broke down and sometimes
> > gave us -1/-2 as values rather than what we were expecting of -1/0.
> >
> > This was the simpliest patch I found while testing.
> >
> > We have another way of matching [0,1] range which we could use instead
> > of ssa_name_has_boolean_range except that uses only the global ranges
> > rather than the local range (during VRP).
> > I tried to clean this up slightly by using gimple_match_zero_one_valuedp
> > inside ssa_name_has_boolean_range but that failed because due to using
> > only the global ranges. I then tried to change get_nonzero_bits to use
> > the local ranges at the optimization time but that failed also because
> > we would remove branches to __builtin_unreachable during evrp and lose
> > information as we don't set the global ranges during evrp.
> >
> > OK? Bootstrapped and tested on x86_64-linux-gnu.
> >
> >   PR 110817
> >
> > gcc/ChangeLog:
> >
> >   * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
> >   check for boolean type as they don't have "[0,1]" range.
> >
> > gcc/testsuite/ChangeLog:
> >
> >   * gcc.c-torture/execute/pr110817-1.c: New test.
> >   * gcc.c-torture/execute/pr110817-2.c: New test.
> >   * gcc.c-torture/execute/pr110817-3.c: New test.
> I'm a bit surprised this didn't trigger any regressions.  Though maybe
> all the existing testcases were capturing cases where non-boolean types
> were known to have a 0/1 value.

Well except ssa_name_has_boolean_range will return true for `An
[unsigned] integral type with a single bit of precision` which the
normal boolean type for C is. So the only case where this makes a
difference is signed booleans. Vectors and Ada are the only 2 places I
know of which use signed booleans even.

This came up before too;
https://inbox.sourceware.org/gcc-patches/cafiyyc23zmevy6i9g1wpmpp7purcuzatg1qpwf2d_8n6f22...@mail.gmail.com/
.
Anyways the 3 uses of ssa_name_has_boolean_range in match.pd are:
 /* X / bool_range_Y is X.  */
which is not true for signed booleans; though division for boolean
types is not well defined
/* 1 - a is a ^ 1 if a had a bool range. */
Which is broken for signed booleans; though it might not show up in IR
for non 1-bit boolean types.
/* -(type)!A -> (type)A - 1.  */
 This one 100 % requires `A` and `A == 0` to be [0,1] range.

The other uses of ssa_name_has_boolean_range are in DOM.
The first 2 uses of ssa_name_has_boolean_range use
build_one_cst/build_one_cst which is definitely wrong there. should
have been constant_boolean_node for N-bit signed boolean types.
The use `A COND_EXPR may create equivalences too.` actually does the
correct thing and uses constant_boolean_node.

Now maybe we miss some optimizations with Ada code with this change; I
am not 100% sure. Maybe the change should just add && TYPE_UNSIGNED
(type) to the check of boolean type and that will fix the issue too.

>
>
> OK.
> jeff

GNU Tools Cauldron 2023

[Thomas Schwinge]

Hi!

On 2023-06-05T14:59:05+0100, Richard Earnshaw via Gcc  wrote:
> We are pleased to invite you all to the next GNU Tools Cauldron,
> taking place in Cambridge, UK, on September 22-24, 2023.
>
> As for the previous instances, we have setup a wiki page for
> details:
>
>https://gcc.gnu.org/wiki/cauldron2023

Pushed to wwwdocs commit 24127b05c065c0fd24c996f5b27829bfa37de485
"GNU Tools Cauldron 2023", see attached.


See you in less than three weeks!

Grüße
 Thomas


-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955
>From 24127b05c065c0fd24c996f5b27829bfa37de485 Mon Sep 17 00:00:00 2001
From: Thomas Schwinge 
Date: Tue, 5 Sep 2023 10:05:29 +0200
Subject: [PATCH] GNU Tools Cauldron 2023

---
 htdocs/index.html | 4 
 1 file changed, 4 insertions(+)

diff --git a/htdocs/index.html b/htdocs/index.html
index 36777a51..8ea96689 100644
--- a/htdocs/index.html
+++ b/htdocs/index.html
@@ -55,6 +55,10 @@ mission statement.
 News
 
 
+https://gcc.gnu.org/wiki/cauldron2023";>GNU Tools Cauldron 2023
+[2023-09-05]
+Cambridge, United Kingdom, September 22-24 2023
+
 GCC 13.2 released
 [2023-07-27]
 
-- 
2.40.1

Re: [PATCH V5 0/3] RISC-V: Add an experimental vector calling convention

[Kito Cheng via Gcc-patches]

Thanks for fixing the issue! I guess I could find time tonight to do
the final round review and test :P then we could land this patch this
week.

On Tue, Sep 5, 2023 at 3:45 PM Lehua Ding  wrote:
>
> V5 change: Rebase and fix vsetvl testcase fail by change
> `(unspec [...] UNSPEC_CALLEE_CC)` to `(use (unspec [...] UNSPEC_CALLEE_CC))`.
> This change makes single_set function re-think call_insn as a
> single set pattern.
>
> Hi RISC-V folks,
>
> This patch implement the proposal of RISC-V vector calling convention[1] and
> this feature can be enabled by `--param=riscv-vector-abi` option. Currently,
> all vector type arguments and return values are pass by reference. With this
> patch, these arguments and return values can pass through vector registers.
> Currently only vector types defined in the RISC-V Vector Extension Intrinsic 
> Document[2]
> are supported. GNU-ext vector types are unsupported for now since the
> corresponding proposal was not presented.
>
> The proposal introduce a new calling convention variant, functions which 
> follow
> this variant need follow the bellow vector register convention.
>
> | Name| ABI Mnemonic | Meaning  | Preserved across 
> calls?
> =
> | v0  |  | Argument register| No
> | v1-v7   |  | Callee-saved registers   | Yes
> | v8-v23  |  | Argument registers   | No
> | v24-v31 |  | Callee-saved registers   | Yes
>
> If a functions follow this vector calling convention, then the function 
> symbole
> must be annotated with .variant_cc directive[3] (used to indicate that it is a
> calling convention variant).
>
> This implementation split into three parts, each part corresponds to a 
> sub-patch.
>
> - Part-1: Select suitable vector regsiters for vector type arguments and 
> return
>   values according to the proposal.
> - Part-2: Allocate frame area for callee-saved vector registers and 
> save/restore
>   them in prologue and epilogue.
> - Part-3: Generate .variant_cc directive for vector function in assembly code.
>
> [1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/389
> [2] 
> https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#type-system
> [3] 
> https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#pseudo-ops
>
> Best,
> Lehua
>
> Lehua Ding (3):
>   RISC-V: Part-1: Select suitable vector registers for vector type args
> and returns
>   RISC-V: Part-2: Save/Restore vector registers which need to be
> preversed
>   RISC-V: Part-3: Output .variant_cc directive for vector function
>
>  gcc/config/riscv/riscv-protos.h   |   4 +
>  gcc/config/riscv/riscv-sr.cc  |   8 +-
>  gcc/config/riscv/riscv-vector-builtins.cc |  10 +
>  gcc/config/riscv/riscv.cc | 484 --
>  gcc/config/riscv/riscv.h  |  43 ++
>  gcc/config/riscv/riscv.md |  51 +-
>  gcc/config/riscv/riscv.opt|   5 +
>  .../riscv/rvv/base/abi-call-args-1-run.c  | 127 +
>  .../riscv/rvv/base/abi-call-args-1.c  | 197 +++
>  .../riscv/rvv/base/abi-call-args-2-run.c  |  34 ++
>  .../riscv/rvv/base/abi-call-args-2.c  |  27 +
>  .../riscv/rvv/base/abi-call-args-3-run.c  | 260 ++
>  .../riscv/rvv/base/abi-call-args-3.c  | 116 +
>  .../riscv/rvv/base/abi-call-args-4-run.c  | 145 ++
>  .../riscv/rvv/base/abi-call-args-4.c  | 111 
>  .../riscv/rvv/base/abi-call-error-1.c |  11 +
>  .../riscv/rvv/base/abi-call-return-run.c  | 127 +
>  .../riscv/rvv/base/abi-call-return.c  | 197 +++
>  .../riscv/rvv/base/abi-call-variant_cc.c  |  39 ++
>  .../rvv/base/abi-callee-saved-1-fixed-1.c |  86 
>  .../rvv/base/abi-callee-saved-1-fixed-2.c |  86 
>  .../base/abi-callee-saved-1-save-restore.c|  85 +++
>  .../riscv/rvv/base/abi-callee-saved-1-zcmp.c  |  85 +++
>  .../riscv/rvv/base/abi-callee-saved-1.c   |  88 
>  .../base/abi-callee-saved-2-save-restore.c| 108 
>  .../riscv/rvv/base/abi-callee-saved-2-zcmp.c  | 107 
>  .../riscv/rvv/base/abi-callee-saved-2.c   | 117 +
>  27 files changed, 2709 insertions(+), 49 deletions(-)
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-1-run.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-1.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-2-run.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-2.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-3-run.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-3.c
>  create mode 100644 
> gcc/testsuite/gcc.target/riscv/rvv/base/abi-call-args-4-run.c
>  create

Re: [PATCH] fwprop: Allow UNARY_P and check register pressure.

[Richard Sandiford via Gcc-patches]

Robin Dapp  writes:
>> So I don't think I have a good feel for the advantages and disadvantages
>> of doing this.  Robin's analysis of the aarch64 changes was nice and
>> detailed though.  I think the one that worries me most is the addressing
>> mode one.  fwprop is probably the first chance we get to propagate adds
>> into addresses, and virtual register elimination means that some of
>> those opportunities won't show up in gimple.
>> 
>> There again, virtual register elimination wouldn't be the reason for
>> the ld4_s8.c failure.  Perhaps there's something missing in expand.
>> 
>> Other than that, I think my main question is: why just unary operations?
>> Is the underlying assumption that we only want to propagate a maximum of
>> one register?  If so, then I think we should check for that directly, by
>> iterating over subrtxes.
>
> The main reason for stopping at unary operations was to limit the scope
> and change as little as possible (not restricting the change to one
> register).  I'm currently testing a v2 that iterates over subrtxs.

Thanks.  Definitely no problem with doing things in small steps, but IMO
it's better if each choice of step can still be justified in its own terms.

>> Perhaps we should allow the optimisation without register-pressure
>> information if (a) the source register and destination register are
>> in the same pressure class and (b) all uses of the destination are
>> being replaced.  (FWIW, rtl-ssa should make it easier to try to
>> replace all definitions at once, with an all-or-nothing choice,
>> if we ever wanted to do that.)
>
> I presume you're referring to replacing one register (dest) in all using
> insns?  Source and destination are somewhat overloaded in fwprop context
> because I'm thinking of the "to be replaced" register as dest when it's
> actually the replacement register.

Yeah.

> AFAICT fwprop currently iterates over insns, going through all their uses
> and trying if an individual use can be substituted.  Do you suggest to
> change this general iteration order to iterate over the defs of an insn
> and then try to replace all the uses at once (e.g. using ssa->change_insns)?

No, I was just noting in passing that we could try do that if we wanted to.
The current code is a fairly mechanical conversion of the original DF-based
code, but there's no reason why it has to continue to work the way it
does now.

> When keeping the current order, wouldn't we need to store all potential
> changes instead of committing them and later apply them in bulk, e.g.
> grouped by use?  This order would also help to pick the propagation
> with the most number of uses (i.e. propagation potential) but maybe
> I'm misunderstanding?

I imagine doing it in reverse postorder would still make sense.

But my point was that, for the current fwprop limitation of substituting
into exactly one use of a register, we can check whether that use is
the *only* use of register.

I.e. if we substitute:

  A: (set (reg R1) (foo (reg R2)))

into:

  B: (set ... (reg R1) ...)

if R1 and R2 are likely to be in the same register class, and if B
is the only user of R2, then we don't need to calculate register
pressure.  The change is either neutral (if R2 died in A) or an
improvement (if R2 doesn't die in A, and so R1 and R2 were previously
live at the same time).

Thanks,
Richard

[committed 1/2] arc: Remove obsolete mbbit-peephole option and unused patterns.

[Claudiu Zissulescu via Gcc-patches]

gcc/

* common/config/arc/arc-common.cc (arc_option_optimization_table):
Remove mbbit_peephole.
* config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
(store_direct): Likewise.
(BBIT peephole2): Likewise.
* config/arc/arc.opt (mbbit-peephole): Ignore option.
* doc/invoke.texi (mbbit-peephole): Update document.

Signed-off-by: Claudiu Zissulescu 
---
 gcc/common/config/arc/arc-common.cc |  1 -
 gcc/config/arc/arc.md   | 31 -
 gcc/config/arc/arc.opt  |  4 ++--
 gcc/doc/invoke.texi |  2 +-
 4 files changed, 3 insertions(+), 35 deletions(-)

diff --git a/gcc/common/config/arc/arc-common.cc 
b/gcc/common/config/arc/arc-common.cc
index 95f5dd61201..3fd66e1f6b5 100644
--- a/gcc/common/config/arc/arc-common.cc
+++ b/gcc/common/config/arc/arc-common.cc
@@ -46,7 +46,6 @@ static const struct default_options 
arc_option_optimization_table[] =
   {
 { OPT_LEVELS_ALL, OPT_msize_level_, NULL, 1 },
 { OPT_LEVELS_ALL, OPT_mearly_cbranchsi, NULL, 1 },
-{ OPT_LEVELS_ALL, OPT_mbbit_peephole, NULL, 1 },
 { OPT_LEVELS_SIZE, OPT_ftree_loop_optimize, NULL, 0},
 { OPT_LEVELS_SIZE, OPT_fmove_loop_invariants, NULL, 0},
 { OPT_LEVELS_SIZE, OPT_fbranch_count_reg, NULL, 0},
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index a4e77a207bf..d401e600f42 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -3589,37 +3589,6 @@ (define_insn "*btst"
(set_attr "type" "compare")
(set_attr "length" "*,4")])
 
-; combine suffers from 'simplifications' that replace a one-bit zero
-; extract with a shift if it can prove that the upper bits are zero.
-; arc_reorg sees the code after sched2, which can have caused our
-; inputs to be clobbered even if they were not clobbered before.
-; Therefore, add a third way to convert btst / b{eq,ne} to bbit{0,1}
-; OTOH, this is somewhat marginal, and can leat to out-of-range
-; bbit (i.e. bad scheduling) and missed conditional execution,
-; so make this an option.
-(define_peephole2
-  [(set (reg:CC_ZN CC_REG)
-   (compare:CC_ZN
- (zero_extract:SI (match_operand:SI 0 "register_operand" "")
-  (const_int 1)
-  (match_operand:SI 1 "nonmemory_operand" ""))
- (const_int 0)))
-   (set (pc)
-   (if_then_else (match_operator 3 "equality_comparison_operator"
- [(reg:CC_ZN CC_REG) (const_int 0)])
- (label_ref (match_operand 2 "" ""))
- (pc)))]
-  "TARGET_BBIT_PEEPHOLE && peep2_regno_dead_p (2, CC_REG)"
-  [(parallel [(set (pc)
-  (if_then_else
-(match_op_dup 3
-  [(zero_extract:SI (match_dup 0)
-(const_int 1) (match_dup 1))
-   (const_int 0)])
-(label_ref (match_dup 2))
-(pc)))
- (clobber (reg:CC_ZN CC_REG))])])
-
 (define_insn "*cmpsi_cc_z_insn"
   [(set (reg:CC_Z CC_REG)
(compare:CC_Z (match_operand:SI 0 "register_operand"  "q,c")
diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt
index 273667c9b58..4af901f2619 100644
--- a/gcc/config/arc/arc.opt
+++ b/gcc/config/arc/arc.opt
@@ -322,8 +322,8 @@ Target Var(TARGET_EARLY_CBRANCHSI)
 Enable pre-reload use of cbranchsi pattern.
 
 mbbit-peephole
-Target Var(TARGET_BBIT_PEEPHOLE)
-Enable bbit peephole2.
+Target Ignore
+Does nothing.  Preserved for backward compatibility.
 
 mcase-vector-pcrel
 Target Var(TARGET_CASE_VECTOR_PC_RELATIVE)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 435fb2fba99..33befee7d6b 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21603,7 +21603,7 @@ Enable the use of pre/post modify with register 
displacement.
 
 @opindex mbbit-peephole
 @item -mbbit-peephole
-Enable bbit peephole2.
+Does nothing.  Preserved for backward compatibility.
 
 @opindex mno-brcc
 @item -mno-brcc
-- 
2.30.2

[committed 2/2] arc: Cleanup addsi3 instruction pattern

[Claudiu Zissulescu via Gcc-patches]

This patch repurposes the code letter 's' to 'x', and 'S' to 'J'.
Also it introduces new CODE letters 'x', 's', 'S', and 'N'.

gcc/ChangeLog:

* config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
(split_addsi): Likewise.
* config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
'N', 'x', and 'J' code letters.
(arc_output_addsi): Make it static.
(split_addsi): Remove it.
* config/arc/arc.h (UNSIGNED_INT*): New defines.
(SINNED_INT*): Likewise.
* config/arc/arc.md (type): Add add, sub, bxor types.
(tst_movb): Change code letter from 's' to 'x'.
(andsi3_i): Likewise.
(addsi3_mixed): Refurbish the pattern.
(call_i): Change code letter from 'S' to 'J'.
* config/arc/arc700.md: Add newly introduced types.
* config/arc/arcHS.md: Likewsie.
* config/arc/arcHS4x.md: Likewise.
* config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
(CM4): Update description.
(CP4, C6u, C6n, CIs, C4p): New constraint.

Signed-off-by: Claudiu Zissulescu 
---
 gcc/config/arc/arc-protos.h   |  2 -
 gcc/config/arc/arc.cc | 94 +++
 gcc/config/arc/arc.h  | 58 +++--
 gcc/config/arc/arc.md | 81 +++---
 gcc/config/arc/arc700.md  |  2 +-
 gcc/config/arc/arcHS.md   |  2 +-
 gcc/config/arc/arcHS4x.md |  2 +-
 gcc/config/arc/constraints.md | 71 +-
 8 files changed, 184 insertions(+), 128 deletions(-)

diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
index d47b4756ad4..4f2db7ffb59 100644
--- a/gcc/config/arc/arc-protos.h
+++ b/gcc/config/arc/arc-protos.h
@@ -32,7 +32,6 @@ extern void arc_print_operand (FILE *, rtx, int);
 extern void arc_print_operand_address (FILE *, rtx);
 extern void arc_final_prescan_insn (rtx_insn *, rtx *, int);
 extern const char *arc_output_libcall (const char *);
-extern int arc_output_addsi (rtx *operands, bool, bool);
 extern int arc_output_commutative_cond_exec (rtx *operands, bool);
 extern bool arc_expand_cpymem (rtx *operands);
 extern bool prepare_move_operands (rtx *operands, machine_mode mode);
@@ -86,7 +85,6 @@ extern void arc_init_expanders (void);
 extern int arc_check_millicode (rtx op, int offset, int load_p);
 extern void arc_clear_unalign (void);
 extern void arc_toggle_unalign (void);
-extern void split_addsi (rtx *);
 extern void split_subsi (rtx *);
 extern void arc_split_move (rtx *);
 extern const char *arc_short_long (rtx_insn *insn, const char *, const char *);
diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc
index 8ee7387286e..f8c9bf17e2c 100644
--- a/gcc/config/arc/arc.cc
+++ b/gcc/config/arc/arc.cc
@@ -4501,8 +4501,8 @@ static int output_sdata = 0;
 
 /* Print operand X (an rtx) in assembler syntax to file FILE.
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
-   For `%' followed by punctuation, CODE is the punctuation and X is null.  */
-/* In final.cc:output_asm_insn:
+   For `%' followed by punctuation, CODE is the punctuation and X is null.
+   In final.cc:output_asm_insn:
 'l' : label
 'a' : address
 'c' : constant address if CONSTANT_ADDRESS_P
@@ -4512,7 +4512,10 @@ static int output_sdata = 0;
 'z': log2
 'M': log2(~x)
 'p': bit Position of lsb
-'s': size of bit field
+'s': scalled immediate
+'S': Scalled immediate, to be used in pair with 's'.
+'N': Negative immediate, to be used in pair with 's'.
+'x': size of bit field
 '#': condbranch delay slot suffix
 '*': jump delay slot suffix
 '?' : nonjump-insn suffix for conditional execution or short instruction
@@ -4521,7 +4524,7 @@ static int output_sdata = 0;
 'd'
 'D'
 'R': Second word
-'S': JLI instruction
+'J': JLI instruction
 'j': used by mov instruction to properly emit jli related labels.
 'B': Branch comparison operand - suppress sda reference
 'H': Most significant word
@@ -4538,6 +4541,10 @@ static int output_sdata = 0;
 void
 arc_print_operand (FILE *file, rtx x, int code)
 {
+  HOST_WIDE_INT ival;
+  unsigned scalled = 0;
+  int sign = 1;
+
   switch (code)
 {
 case 'Z':
@@ -4580,6 +4587,56 @@ arc_print_operand (FILE *file, rtx x, int code)
   return;
 
 case 's':
+  if (REG_P (x))
+   return;
+  if (!CONST_INT_P (x))
+   {
+ output_operand_lossage ("invalid operand for %%s code");
+ return;
+   }
+  ival = INTVAL (x);
+  if ((ival & 0x07) == 0)
+ scalled = 3;
+  else if ((ival & 0x03) == 0)
+ scalled = 2;
+  else if ((ival & 0x01) == 0)
+ scalled = 1;
+
+  if (scalled)
+   asm_fprintf (file, "%d", scalled);
+  return;
+
+case 'N':
+  if (REG_P (x))
+   {
+ output_operand_lossage ("invalid operand for %%N code");
+ return;
+   }
+  sign = -1;
+  

Re: [PATCH] fwprop: Allow UNARY_P and check register pressure.

[Robin Dapp via Gcc-patches]

> I imagine doing it in reverse postorder would still make sense.
> 
> But my point was that, for the current fwprop limitation of substituting
> into exactly one use of a register, we can check whether that use is
> the *only* use of register.
> 
> I.e. if we substitute:
> 
>   A: (set (reg R1) (foo (reg R2)))
> 
> into:
> 
>   B: (set ... (reg R1) ...)
> 
> if R1 and R2 are likely to be in the same register class, and if B
> is the only user of R2, then we don't need to calculate register
> pressure.  The change is either neutral (if R2 died in A) or an
> improvement (if R2 doesn't die in A, and so R1 and R2 were previously
> live at the same time).

Ah, understood, thanks.  Sure, that one I can include.

Regards
 Robin

[PATCH] RISC-V: Export functions as global extern preparing for dynamic LMUL patch use

[Juzhe-Zhong]

Notice those functions need to be use by COST model for dynamic LMUL use.
Extract as a single patch and committed.

gcc/ChangeLog:

* config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export 
global.
(get_all_predecessors): New function.
(get_all_successors): Ditto.
* config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
(get_all_successors): Ditto.
* config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export 
global.
* config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.

---
 gcc/config/riscv/riscv-protos.h   |  3 ++
 gcc/config/riscv/riscv-v.cc   | 48 +++
 gcc/config/riscv/riscv-vector-builtins.cc |  2 +-
 gcc/config/riscv/riscv-vsetvl.cc  | 25 
 4 files changed, 52 insertions(+), 26 deletions(-)

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index dd7aa360ec5..0b4dd45380d 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -365,6 +365,7 @@ enum avl_type
 /* Routines implemented in riscv-vector-builtins.cc.  */
 void init_builtins (void);
 const char *mangle_builtin_type (const_tree);
+tree lookup_vector_type_attribute (const_tree);
 #ifdef GCC_TARGET_H
 bool verify_type_context (location_t, type_context_kind, const_tree, bool);
 bool expand_vec_perm_const (machine_mode, machine_mode, rtx, rtx, rtx,
@@ -493,6 +494,8 @@ enum floating_point_rounding_mode get_frm_mode (rtx);
 opt_machine_mode vectorize_related_mode (machine_mode, scalar_mode,
 poly_uint64);
 unsigned int autovectorize_vector_modes (vec *, bool);
+hash_set get_all_predecessors (basic_block);
+hash_set get_all_successors (basic_block);
 }
 
 /* We classify builtin types into two classes:
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 63945487006..1ca3f1dc8df 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -3387,4 +3387,52 @@ expand_fold_extract_last (rtx *ops)
   emit_label (end_label);
 }
 
+hash_set
+get_all_predecessors (basic_block bb)
+{
+  hash_set blocks;
+  auto_vec work_list;
+  hash_set visited_list;
+  work_list.safe_push (bb);
+
+  while (!work_list.is_empty ())
+{
+  basic_block new_bb = work_list.pop ();
+  visited_list.add (new_bb);
+  edge e;
+  edge_iterator ei;
+  FOR_EACH_EDGE (e, ei, new_bb->preds)
+   {
+ if (!visited_list.contains (e->src))
+   work_list.safe_push (e->src);
+ blocks.add (e->src);
+   }
+}
+  return blocks;
+}
+
+hash_set
+get_all_successors (basic_block bb)
+{
+  hash_set blocks;
+  auto_vec work_list;
+  hash_set visited_list;
+  work_list.safe_push (bb);
+
+  while (!work_list.is_empty ())
+{
+  basic_block new_bb = work_list.pop ();
+  visited_list.add (new_bb);
+  edge e;
+  edge_iterator ei;
+  FOR_EACH_EDGE (e, ei, new_bb->succs)
+   {
+ if (!visited_list.contains (e->dest))
+   work_list.safe_push (e->dest);
+ blocks.add (e->dest);
+   }
+}
+  return blocks;
+}
+
 } // namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins.cc 
b/gcc/config/riscv/riscv-vector-builtins.cc
index 4a7eb47972e..01a8d714db8 100644
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -2671,7 +2671,7 @@ sizeless_type_p (const_tree type)
 
 /* If TYPE is an ABI-defined RVV type, return its attribute descriptor,
otherwise return null.  */
-static tree
+tree
 lookup_vector_type_attribute (const_tree type)
 {
   if (type == error_mark_node)
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index a81bb53a521..e7e5c14617e 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -521,31 +521,6 @@ get_same_bb_set (hash_set &sets, const 
basic_block cfg_bb)
   return nullptr;
 }
 
-/* Recursively find all predecessor blocks for cfg_bb. */
-static hash_set
-get_all_predecessors (basic_block cfg_bb)
-{
-  hash_set blocks;
-  auto_vec work_list;
-  hash_set visited_list;
-  work_list.safe_push (cfg_bb);
-
-  while (!work_list.is_empty ())
-{
-  basic_block new_cfg_bb = work_list.pop ();
-  visited_list.add (new_cfg_bb);
-  edge e;
-  edge_iterator ei;
-  FOR_EACH_EDGE (e, ei, new_cfg_bb->preds)
-   {
- if (!visited_list.contains (e->src))
-   work_list.safe_push (e->src);
- blocks.add (e->src);
-   }
-}
-  return blocks;
-}
-
 /* Helper function to get SEW operand. We always have SEW value for
all RVV instructions that have VTYPE OP.  */
 static uint8_t
-- 
2.36.3

[PATCH V2] RISC-V: Support Dynamic LMUL Cost model

[Juzhe-Zhong]

This patch support dynamic LMUL cost modeling with 
--param=riscv-autovec-lmul=dynamic.

Consider this following case:
void
foo (int32_t *__restrict a, int32_t *__restrict b,int32_t *__restrict c,
  int32_t *__restrict a2, int32_t *__restrict b2, int32_t *__restrict c2,
  int32_t *__restrict a3, int32_t *__restrict b3, int32_t *__restrict c3,
  int32_t *__restrict a4, int32_t *__restrict b4, int32_t *__restrict c4,
  int32_t *__restrict a5, int32_t *__restrict b5, int32_t *__restrict c5,
  int32_t *__restrict d,
  int32_t *__restrict d2,
  int32_t *__restrict d3,
  int32_t *__restrict d4,
  int32_t *__restrict d5,
  int n)
{
  for (int i = 0; i < n; i++)
{
  a[i] = b[i] + c[i];
  b5[i] = b[i] + c[i];
  a2[i] = b2[i] + c2[i];
  a3[i] = b3[i] + c3[i];
  a4[i] = b4[i] + c4[i];
  a5[i] = a[i] + a4[i];
  d2[i] = a2[i] + c2[i];
  d3[i] = a3[i] + c3[i];
  d4[i] = a4[i] + c4[i];
  d5[i] = a[i] + a4[i];
  a[i] = a5[i] + b5[i] + a[i];

  c2[i] = a[i] + c[i];
  c3[i] = b5[i] * a5[i];
  c4[i] = a2[i] * a3[i];
  c5[i] = b5[i] * a2[i];
  c[i] = a[i] + c3[i];
  c2[i] = a[i] + c4[i];
  a5[i] = a[i] + a4[i];
  a[i] = a[i] + b5[i] + a[i] * a2[i] * a3[i] * a4[i]
  * a5[i] * c[i] * c2[i] * c3[i] * c4[i] * c5[i]
  * d[i] * d2[i] * d3[i] * d4[i] * d5[i];
}
}

Demo: https://godbolt.org/z/x1acoMxGT

You can see it will produce register spilling if you specify LMUL >= 4

Now, with --param=riscv-autovec-lmul=dynamic.

GCC is able to pick LMUL = 2 to optimized this case.

This feature is supported by linear scan based local live ranges analysis and
compute maximum live V_REGS in specific program point of the function to 
determine the VF/LMUL.

Note that this patch can well handle both SLP and non-SLP loop.

Currenty approach didn't consider the later instruction scheduler which may 
improve the register pressure.
In this case, we are conservatively applying smaller VF/LMUL. (Not sure whether 
we should support live range shrink for such corner case since we don't known 
whether it can improve performance a lot.)

gcc/ChangeLog:

* config/riscv/riscv-vector-costs.cc (get_last_live_range): New 
function.
(compute_nregs_for_mode): Ditto.
(live_range_conflict_p): Ditto.
(max_number_of_live_regs): Ditto.
(compute_lmul): Ditto.
(costs::prefer_new_lmul_p): Ditto.
(costs::better_main_loop_than_p): Ditto.
* config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
(struct var_live_range): Ditto.
(struct autovec_info): Ditto.
* config/riscv/t-riscv: Update makefile for COST model.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul-mixed-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-7.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-8.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-1.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-10.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-2.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-3.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-4.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-5.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-6.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-7.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-8.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-9.c: New test.
* gcc.dg/vect/costmodel/riscv/rvv/rvv-costmodel-vect.exp: New test.

---
 gcc/config/riscv/riscv-vector-c

Re: [PATCH] riscv: xtheadcondmov: Don't run tests with -Oz

[Philipp Tomsich]

Applied to master. Thanks!
Philipp.

On Tue, 5 Sept 2023 at 08:22, Jeff Law  wrote:

>
>
> On 9/1/23 04:20, Christoph Muellner wrote:
> > From: Christoph Müllner 
> >
> > Recently, these xtheadcondmov tests regressed with -Oz:
> > * FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c
> > * FAIL: gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c
> > * FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c
> > * FAIL: gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c
> >
> > As -Oz stands for "Optimize aggressively for size rather than speed.",
> > we need to inspect the generated code, which looks like this:
> >
> >-Oz
> > :
> >   0:   e199bneza1,6 <.L2>
> >   2:   40100513li  a0,1025
> >0006 <.L2>:
> >   6:   8082ret
> >
> >-O2:
> > :
> >   0:   40100793li  a5,1025
> >   4:   40b7950bth.mveqza0,a5,a1
> >   8:   8082ret
> >
> > As the generated code with -Oz consumes less size, there is nothing
> > wrong in the code generation. Instead, let's not run the xtheadcondmov
> > tests with -Oz.
> >
> > Signed-off-by: Christoph Müllner 
> >
> > gcc/testsuite/ChangeLog:
> >
> >   * gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c: Disable for -Oz.
> >   * gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c: Likewise.
> >   * gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c: Likewise.
> >   * gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c: Likewise.
> >   * gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c: Likewise.
> >   * gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c: Likewise.
> >   * gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c: Likewise.
> >   * gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c: Likewise.
> OK
> jeff
>

Re: [PATCH v2 1/2] strlen: fold strstr() even if the length isn't previously known [PR96601]

[Jakub Jelinek via Gcc-patches]

On Mon, Sep 04, 2023 at 11:14:41PM -0600, Jeff Law wrote:
> 
> 
> On 9/4/23 14:58, Hamza Mahfooz wrote:
> > Currently, we give up in fold_strstr_to_strncmp() if the length of the
> > the second argument to strstr() isn't known to us by the time we hit
> > that function. However, we can instead insert a strlen() in ourselves
> > and continue trying to fold strstr() into strlen()+strncmp().
> > 
> > PR tree-optimization/96601
> > 
> > gcc/ChangeLog:
> > 
> > * tree-ssa-strlen.cc (fold_strstr_to_strncmp): If arg1_len == NULL,
> > insert a strlen() for strstr()'s arg1 and use it as arg1_len.
> > 
> > gcc/testsuite/ChangeLog:
> > 
> > * gcc.dg/strlenopt-30.c: Modify test.
> I'm not sure it's necessarily a win to convert to strncmp as aggressively as
> this patch would do.  Essentially when you have large needles that are
> partially matched repeatedly, performance can significantly suffer.

For -Os/-Oz I think this is never a desirable optimization, turning one call
into 2 with all the argument setup etc. (unless we have the length constant
or already computed).

Otherwise, consider say 2GB long needle, it will take quite long to even
compute strlen of that.
Now, looking at current glibc strstr implementation, it starts with
  /* Handle short needle special cases first.  */
  if (ne[0] == '\0')
return (char *)hs;
  hs = (const unsigned char *)strchr ((const char*)hs, ne[0]);
  if (hs == NULL || ne[1] == '\0')
return (char*)hs;
  if (ne[2] == '\0')
return strstr2 (hs, ne);
  if (ne[3] == '\0')
return strstr3 (hs, ne);

  /* Ensure haystack length is at least as long as needle length.
 Since a match may occur early on in a huge haystack, use strnlen
 and read ahead a few cachelines for improved performance.  */
  size_t ne_len = strlen ((const char*)ne);
  size_t hs_len = __strnlen ((const char*)hs, ne_len | 512);
So, if needle is very long but first character of the needle doesn't
appear in haystack at all and haystack is shorter than needle, this will also
not be desirable optimization, because strstr would just return NULL after
walking haystack, while with the optimization you need to compute the
length.  Otherwise I think the optimization is desirable, because typically
haystack is longer than needle and walking it completely using strchr will
be already more expensive than strlen on needle and otherwise strstr
computes the strlen anyway later.  But perhaps if strlen isn't known it
might be better to guard the strlen + strncmp on inline comparison of the
first character, so that one rules out the above mentioned special case,
so that we won't compute the strlen unnecessarily at least in that case.
Still strstr (32b_string, 2147483647b_string) == 32b_string will be
serious slowdown if 32b_string[0] == 2147483647b_string[0], but perhaps the
common case is more important.

Or do we want to add to the C library some kind of asymetric strcmp,
which will be equivalent to strncmp (p1, p2, strlen (p2)) but will actually
not compute the strlen but only compare the characters and just handle the
case where p2 has as the first different character '\0' as return 0 rather
than difference?

Jakub

[PATCH] xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX

[Takayuki 'January June' Suwa via Gcc-patches]

This patch optimizes the boolean evaluation for equality to 0 in SImode
using the MINU (Minimum Value Unsigned) machine instruction available
when TARGET_MINMAX is configured, for example, (x != 0) to MINU(x, 1)
and (x == 0) to (MINU(x, 1) ^ 1).

/* example */
int test0(int x) {
  return x == 0;
}
int test1(int x) {
  return x != 0;
}

;; before
test0:
mov.n   a10, a2
movi.n  a9, 1
movi.n  a2, 0
moveqz  a2, a9, a10
ret.n
test1:
mov.n   a10, a2
movi.n  a9, 1
movi.n  a2, 0
movnez  a2, a9, a10
ret.n

;; after (prereq. TARGET_MINMAX)
test0:
movi.n  a9, 1
minua2, a2, a9
xor a2, a2, a9
ret.n
test1:
movi.n  a9, 1
minua2, a2, a9
ret.n

gcc/ChangeLog:

* config/xtensa/xtensa.cc (xtensa_expand_scc):
Add code for particular constants (only 0 and INT_MIN for now)
for EQ/NE boolean evaluation in SImode.
* config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
implementation has been integrated into the above.
---
 gcc/config/xtensa/xtensa.cc | 43 +++--
 gcc/config/xtensa/xtensa.md | 34 -
 2 files changed, 37 insertions(+), 40 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index af71e2179d0..1afaa1cc94e 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -994,15 +994,46 @@ xtensa_expand_scc (rtx operands[4], machine_mode cmp_mode)
   rtx cmp;
   rtx one_tmp, zero_tmp;
   rtx (*gen_fn) (rtx, rtx, rtx, rtx, rtx);
+  enum rtx_code code = GET_CODE (operands[1]);
 
-  if (!(cmp = gen_conditional_move (GET_CODE (operands[1]), cmp_mode,
-   operands[2], operands[3])))
+  if (cmp_mode == SImode && CONST_INT_P (operands[3])
+  && (code == EQ || code == NE))
+switch (INTVAL (operands[3]))
+  {
+  case 0:
+   if (TARGET_MINMAX)
+ {
+   one_tmp = force_reg (SImode, const1_rtx);
+   emit_insn (gen_uminsi3 (dest, operands[2], one_tmp));
+   if (code == EQ)
+ emit_insn (gen_xorsi3 (dest, dest, one_tmp));
+   return 1;
+ }
+   break;
+  case -2147483648:
+   if (TARGET_ABS)
+ {
+   emit_insn (gen_abssi2 (dest, operands[2]));
+   if (code == EQ)
+ emit_insn (gen_lshrsi3 (dest, dest, GEN_INT (31)));
+   else
+ {
+   emit_insn (gen_ashrsi3 (dest, dest, GEN_INT (31)));
+   emit_insn (gen_addsi3 (dest, dest, const1_rtx));
+ }
+   return 1;
+ }
+   break;
+  default:
+   break;
+  }
+
+  if (! (cmp = gen_conditional_move (code, cmp_mode,
+operands[2], operands[3])))
 return 0;
 
-  one_tmp = gen_reg_rtx (SImode);
-  zero_tmp = gen_reg_rtx (SImode);
-  emit_insn (gen_movsi (one_tmp, const_true_rtx));
-  emit_insn (gen_movsi (zero_tmp, const0_rtx));
+  one_tmp = force_reg (SImode, const1_rtx);
+  zero_tmp = force_reg (SImode, const0_rtx);
 
   gen_fn = (cmp_mode == SImode
? gen_movsicc_internal0
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 5386e45b51d..d6505e7eb70 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -3188,40 +3188,6 @@
  (const_int 5)
  (const_int 6)))])
 
-
-(define_insn_and_split "*eqne_INT_MIN"
-  [(set (match_operand:SI 0 "register_operand" "=a")
-   (match_operator:SI 2 "boolean_operator"
-   [(match_operand:SI 1 "register_operand" "r")
-(const_int -2147483648)]))]
-  "TARGET_ABS"
-  "#"
-  "&& 1"
-  [(set (match_dup 0)
-   (abs:SI (match_dup 1)))
-   (set (match_dup 0)
-   (match_op_dup:SI 2
-   [(match_dup 0)
-(const_int 31)]))
-   (match_dup 3)]
-{
-  enum rtx_code code = GET_CODE (operands[2]);
-  operands[2] = gen_rtx_fmt_ee ((code == EQ) ? LSHIFTRT : ASHIFTRT,
-   SImode, XEXP (operands[2], 0),
-   XEXP (operands[2], 1));
-  operands[3] = (code != EQ) ? gen_addsi3 (operands[0],
-  operands[0], const1_rtx)
-: const0_rtx;
-}
-  [(set_attr "type""move")
-   (set_attr "mode""SI")
-   (set (attr "length")
-   (if_then_else (match_test "GET_CODE (operands[2]) == EQ")
- (const_int 3)
- (if_then_else (match_test "TARGET_DENSITY")
-   (const_int 5)
-   (const_int 6])
-
 (define_peephole2
   [(set (match_operand:SI 0 "register_operand")
(match_operand:SI 6 "reload_operand"))
-- 
2.30.2

[PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

[Pan Li via Gcc-patches]

From: Pan Li 

This patch would like to allow the VLS mode autovec for the
floating-point binary operation MAX/MIN.

Given below code example:

void test(float * restrict out, float * restrict in1, float * restrict in2)
{
  for (int i = 0; i < 128; i++)
out[i] = __builtin_copysignf (in1[i], in2[i]);
}

Before this patch:
test:
  csrra4,vlenb
  sllia4,a4,1
  li  a5,128
  bleua5,a4,.L2
  mv  a5,a4
.L2:
  vsetvli zero,a5,e32,m8,ta,ma
  vle32.v v8,0(a1)
  vle32.v v16,0(a2)
  vsetvli a4,zero,e32,m8,ta,ma
  vfsgnj.vv   v8,v8,v16
  vsetvli zero,a5,e32,m8,ta,ma
  vse32.v v8,0(a0)
  ret

After this patch:
test:
  li  a5,128
  vsetvli zero,a5,e32,m1,ta,ma
  vle32.v v1,0(a1)
  vle32.v v2,0(a2)
  vfsgnj.vv   v1,v1,v2
  vse32.v v1,0(a0)
  ret

Signed-off-by: Pan Li 

gcc/ChangeLog:

* config/riscv/autovec-vls.md (copysign3): New pattern.
* config/riscv/vector.md: Extend iterator for VLS.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: New macro.
* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c: New test.
---
 gcc/config/riscv/autovec-vls.md   | 22 ++
 gcc/config/riscv/vector.md| 24 +--
 .../gcc.target/riscv/rvv/autovec/vls/def.h|  8 
 .../rvv/autovec/vls/floating-point-sgnj-1.c   | 43 +++
 .../rvv/autovec/vls/floating-point-sgnj-2.c   | 43 +++
 5 files changed, 128 insertions(+), 12 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c

diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md
index 7ef29637e33..31b6c4ae714 100644
--- a/gcc/config/riscv/autovec-vls.md
+++ b/gcc/config/riscv/autovec-vls.md
@@ -255,6 +255,28 @@ (define_insn_and_split "3"
 [(set_attr "type" "vector")]
 )
 
+;; -
+;; Includes:
+;; - vfsgnj.vv
+;; - vfsgnj.vf
+;; -
+(define_insn_and_split "copysign3"
+  [(set (match_operand:VLSF 0 "register_operand")
+(unspec:VLSF
+  [(match_operand:VLSF  1 "register_operand")
+   (match_operand:VLSF  2 "register_operand")] UNSPEC_VCOPYSIGN))]
+  "TARGET_VECTOR && can_create_pseudo_p ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+  {
+riscv_vector::emit_vlmax_insn (code_for_pred (UNSPEC_VCOPYSIGN, 
mode),
+  riscv_vector::BINARY_OP, operands);
+DONE;
+  }
+  [(set_attr "type" "vector")]
+)
+
 ;; 
---
 ;;  [INT] Unary operations
 ;; 
---
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 9d7b4bbe1d4..fc985ff6a01 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -6166,8 +6166,8 @@ (define_insn "@pred__reverse_scalar"
(symbol_ref "riscv_vector::get_frm_mode (operands[9])"))])
 
 (define_insn "@pred_"
-  [(set (match_operand:VF 0 "register_operand"   "=vd, vd, vr, vr")
-   (if_then_else:VF
+  [(set (match_operand:V_VLSF 0 "register_operand"   "=vd, vd, vr, vr")
+   (if_then_else:V_VLSF
  (unspec:
[(match_operand: 1 "vector_mask_operand" " vm, vm,Wc1,Wc1")
 (match_operand 5 "vector_length_operand"" rK, rK, rK, rK")
@@ -6176,10 +6176,10 @@ (define_insn "@pred_"
 (match_operand 8 "const_int_operand""  i,  i,  i,  i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
- (unspec:VF
-   [(match_operand:VF 3 "register_operand"   " vr, vr, vr, vr")
-(match_operand:VF 4 "register_operand"   " vr, vr, vr, vr")] 
VCOPYSIGNS)
- (match_operand:VF 2 "vector_merge_operand" " vu,  0, vu,  0")))]
+ (unspec:V_VLSF
+   [(match_operand:V_VLSF 3 "register_operand"  " vr, vr, vr, vr")
+(match_operand:V_VLSF 4 "register_operand"  " vr, vr, vr, vr")] 
VCOPYSIGNS)
+ (match_operand:V_VLSF 2 "vector_merge_operand" " vu,  0, vu,  0")))]
   "TARGET_VECTOR"
   "vfsgnj.vv\t%0,%3,%4%p1"
   [(set_attr "type" "vfsgnj")
@@ -6207,8 +6207,8 @@ (define_insn "@pred_ncopysign"
(set_attr "mode" "")])
 
 (define_insn "@pred__scalar"
-  [(set (match_operand:VF 0 "register_operand"   "=vd, vd, vr, vr")
-   (if_then_else:VF
+  [(set (match_operand:V_VLSF 0 "register_operand"   "=vd, vd, vr, vr")
+   (if_then_else:V_VLSF
  (unspec:
[(match_operand: 1 "vector_mask_operand" " vm, vm,Wc1,Wc1")
 (match_operand 5 "vector_length_operand"" rK, rK, rK, rK")
@@ -6217,11 +6217,11 @@ (define_insn "@

Re: [PATCH v3][RFC] c-family: Implement __has_feature and __has_extension [PR60512]

[Alex Coplan via Gcc-patches]

On 17/08/2023 10:39, Alex Coplan via Gcc-patches wrote:
> I'd like to ping this for review from C and C++ maintainers:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-August/626178.html

Ping^2

> 
> I probably should have dropped the RFC tag this time round as I think
> the patch is nearly ready, I suppose we just need agreement on the
> issues below: is there any GCC configuration where __thread can get
> rejected (I don't know of one), and should cxx_binary_literals report as
> a feature with -std=c2x?
> 
> Thanks,
> Alex

[COMMITTED] Revert "Adjust one Ada test"

[Marc Poulhiès via Gcc-patches]

This reverts commit d8dc61bb5ab99c3239ea93a37097f9419bee0211.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/testsuite/gnat.dg/unroll3.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gnat.dg/unroll3.adb 
b/gcc/testsuite/gnat.dg/unroll3.adb
index 86193d64681..3bd06e7de76 100644
--- a/gcc/testsuite/gnat.dg/unroll3.adb
+++ b/gcc/testsuite/gnat.dg/unroll3.adb
@@ -23,4 +23,4 @@ package body Unroll3 is
 
 end Unroll3;
 
--- { dg-final { scan-tree-dump-times "loop with 2 iterations completely 
unrolled" 2 "cunroll" } }
+-- { dg-final { scan-tree-dump-times "loop with 3 iterations completely 
unrolled" 2 "cunroll" } }
-- 
2.40.0

[COMMITTED] ada: Enforce subtype conformance of interface primitives

[Marc Poulhiès via Gcc-patches]

From: Javier Miranda 

gcc/ada/

* sem_ch3.adb (Add_Internal_Interface_Entities): Add missing
subtype-conformance check on primitives implementing interface
primitives.
(Error_Posted_In_Formals): New subprogram.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch3.adb | 105 
 1 file changed, 105 insertions(+)

diff --git a/gcc/ada/sem_ch3.adb b/gcc/ada/sem_ch3.adb
index 042ace01724..3262236dd14 100644
--- a/gcc/ada/sem_ch3.adb
+++ b/gcc/ada/sem_ch3.adb
@@ -1688,6 +1688,31 @@ package body Sem_Ch3 is
-
 
procedure Add_Internal_Interface_Entities (Tagged_Type : Entity_Id) is
+
+  function Error_Posted_In_Formals (Subp : Entity_Id) return Boolean;
+  --  Determine if an error has been posted in some formal of Subp.
+
+  -
+  -- Error_Posted_In_Formals --
+  -
+
+  function Error_Posted_In_Formals (Subp : Entity_Id) return Boolean is
+ Formal : Entity_Id := First_Formal (Subp);
+
+  begin
+ while Present (Formal) loop
+if Error_Posted (Formal) then
+   return True;
+end if;
+
+Next_Formal (Formal);
+ end loop;
+
+ return False;
+  end Error_Posted_In_Formals;
+
+  --  Local variables
+
   Elmt  : Elmt_Id;
   Iface : Entity_Id;
   Iface_Elmt: Elmt_Id;
@@ -1741,6 +1766,86 @@ package body Sem_Ch3 is
 
pragma Assert (Present (Prim));
 
+   --  Check subtype conformance; we skip this check if errors have
+   --  been reported in the primitive (or in the formals of the
+   --  primitive) because Find_Primitive_Covering_Interface relies
+   --  on the subprogram Type_Conformant to locate the primitive,
+   --  and reports errors if the formals don't match.
+
+   if not Error_Posted (Prim)
+ and then not Error_Posted_In_Formals (Prim)
+   then
+  declare
+ Alias_Prim : Entity_Id;
+ Alias_Typ  : Entity_Id;
+ Err_Loc: Node_Id := Empty;
+ Ret_Type   : Entity_Id;
+
+  begin
+ --  For inherited primitives, in case of reporting an
+ --  error, the error must be reported on this primitive
+ --  (i.e. in the name of its type declaration); otherwise
+ --  the error would be reported in the formal of the
+ --  alias primitive defined on its parent type.
+
+ if Nkind (Parent (Prim)) = N_Full_Type_Declaration then
+Err_Loc := Prim;
+ end if;
+
+ --  Check subtype conformance of procedures, functions
+ --  with matching return type, or functions not returning
+ --  interface types.
+
+ if Ekind (Prim) = E_Procedure
+   or else Etype (Iface_Prim) = Etype (Prim)
+   or else not Is_Interface (Etype (Iface_Prim))
+ then
+Check_Subtype_Conformant
+  (New_Id  => Prim,
+   Old_Id  => Iface_Prim,
+   Err_Loc => Err_Loc,
+   Skip_Controlling_Formals => True);
+
+ --  Check subtype conformance of functions returning an
+ --  interface type; temporarily force both entities to
+ --  return the same type. Required because subprogram
+ --  Subtype_Conformant does not handle this case.
+
+ else
+Ret_Type := Etype (Iface_Prim);
+Set_Etype (Iface_Prim, Etype (Prim));
+
+Check_Subtype_Conformant
+  (New_Id  => Prim,
+   Old_Id  => Iface_Prim,
+   Err_Loc => Err_Loc,
+   Skip_Controlling_Formals => True);
+
+Set_Etype (Iface_Prim, Ret_Type);
+ end if;
+
+ --  Complete the error when reported on inherited
+ --  primitives.
+
+ if Nkind (Parent (Prim)) = N_Full_Type_Declaration
+   and then (Error_Posted (Prim)
+   or else Error_Posted_In_Formals (Prim))
+   and then Present (Alias (Prim))
+ then
+Alias_Prim := Ultimate_Alias (Prim);
+Alias_Typ  := Find_Dispatching_Type (Alias_Prim);
+
+if Alias_Typ /= Tagged_Type
+  and

[COMMITTED] ada: Remove GNATcheck violations

[Marc Poulhiès via Gcc-patches]

From: Sheri Bernstein 

Use pragma Annotate to exempt GNATcheck violations that are related
to proof code. Specifically, exempt rules "Metrics_LSLOC" and
"Metrics_Cyclomatic_Complexity" whose limits are exceeded due to
proof code, and exempt rule "Discriminated_Records" for a variant record
that is only used in proof code.

gcc/ada/

* libgnat/s-aridou.adb: Add pragma to exempt Metrics_LSLOC.
(Double_Divide): Add pragma to exempt
Metrics_Cyclomatic_Complexity.
(Scaled_Divide): Likewise.
* libgnat/s-vauspe.ads (Uns_Option): Add pragma to exempt
Discriminated_Records.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/s-aridou.adb | 11 +++
 gcc/ada/libgnat/s-vauspe.ads |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/gcc/ada/libgnat/s-aridou.adb b/gcc/ada/libgnat/s-aridou.adb
index beb56bfabe1..6bcce59cfeb 100644
--- a/gcc/ada/libgnat/s-aridou.adb
+++ b/gcc/ada/libgnat/s-aridou.adb
@@ -29,6 +29,9 @@
 --  --
 --
 
+pragma Annotate (Gnatcheck, Exempt_On, "Metrics_LSLOC",
+ "limit exceeded due to proof code");
+
 with Ada.Unchecked_Conversion;
 with System.SPARK.Cut_Operations; use System.SPARK.Cut_Operations;
 
@@ -814,6 +817,8 @@ is
-- Double_Divide --
---
 
+   pragma Annotate (Gnatcheck, Exempt_On, "Metrics_Cyclomatic_Complexity",
+"limit exceeded due to proof code");
procedure Double_Divide
  (X, Y, Z : Double_Int;
   Q, R: out Double_Int;
@@ -1221,6 +1226,7 @@ is
 
   Prove_Signs;
end Double_Divide;
+   pragma Annotate (Gnatcheck, Exempt_Off, "Metrics_Cyclomatic_Complexity");
 
-
-- Le3 --
@@ -1899,6 +1905,8 @@ is
-- Scaled_Divide --
---
 
+   pragma Annotate (Gnatcheck, Exempt_On, "Metrics_Cyclomatic_Complexity",
+"limit exceeded due to proof code");
procedure Scaled_Divide
  (X, Y, Z : Double_Int;
   Q, R: out Double_Int;
@@ -3317,6 +3325,7 @@ is
   Prove_Sign_R;
   Prove_Signs;
end Scaled_Divide;
+   pragma Annotate (Gnatcheck, Exempt_Off, "Metrics_Cyclomatic_Complexity");
 
--
-- Sub3 --
@@ -3658,3 +3667,5 @@ is
 
pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
 end System.Arith_Double;
+
+pragma Annotate (Gnatcheck, Exempt_Off, "Metrics_LSLOC");
diff --git a/gcc/ada/libgnat/s-vauspe.ads b/gcc/ada/libgnat/s-vauspe.ads
index a6f81d715c4..b276eed5105 100644
--- a/gcc/ada/libgnat/s-vauspe.ads
+++ b/gcc/ada/libgnat/s-vauspe.ads
@@ -68,6 +68,8 @@ is
 when others => raise Program_Error)
with Ghost;
 
+   pragma Annotate (Gnatcheck, Exempt_On, "Discriminated_Records",
+"variant record only used in proof code");
type Uns_Option (Overflow : Boolean := False) is record
   case Overflow is
  when True =>
@@ -76,6 +78,7 @@ is
 Value : Uns := 0;
   end case;
end record;
+   pragma Annotate (Gnatcheck, Exempt_Off, "Discriminated_Records");
 
function Wrap_Option (Value : Uns) return Uns_Option is
  (Overflow => False, Value => Value);
-- 
2.40.0

[COMMITTED] ada: Add missing units to Makefile.rtl

[Marc Poulhiès via Gcc-patches]

From: Ronan Desplanques 

A previous change accidently removed a-cohama and a-cohase from
`Makefile.rtl`. This patch adds these units back

gcc/ada/

* Makefile.rtl: Add missing units.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/Makefile.rtl | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
index be81b9d47f8..e404d43f0ff 100644
--- a/gcc/ada/Makefile.rtl
+++ b/gcc/ada/Makefile.rtl
@@ -137,6 +137,8 @@ GNATRTL_NONTASKING_OBJS= \
   a-coboho$(objext) \
   a-cobove$(objext) \
   a-cogeso$(objext) \
+  a-cohama$(objext) \
+  a-cohase$(objext) \
   a-cohata$(objext) \
   a-coinho$(objext) \
   a-coinve$(objext) \
-- 
2.40.0

[COMMITTED] ada: Fix assertion failure on very peculiar enumeration type

[Marc Poulhiès via Gcc-patches]

From: Eric Botcazou 

The compiler currently does not support the combination of a representation
clause on an enumeration type with a size clause whose value is greater than
the size of the largest machine scalar supported by the target.

Given that such a type would have little practical value, this change causes
the compiler to give a proper error message instead of aborting.

gcc/ada/

* freeze.adb (Freeze_Enumeration_Type): Give an error on a type with
both representation clause and too large size.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/freeze.adb | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
index 38aeb2456ff..0fc33a420c2 100644
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -8023,6 +8023,20 @@ package body Freeze is
 
  Adjust_Esize_For_Alignment (Typ);
   end if;
+
+  --  Reject a very large size on a type with a non-standard representation
+  --  because Expand_Freeze_Enumeration_Type cannot deal with it.
+
+  if Has_Non_Standard_Rep (Typ)
+and then Known_Esize (Typ)
+and then Esize (Typ) > System_Max_Integer_Size
+  then
+ Error_Msg_N
+   ("enumeration type with representation clause too large", Typ);
+ Error_Msg_Uint_1 := UI_From_Int (System_Max_Integer_Size);
+ Error_Msg_N
+   ("\the size of such a type cannot exceed ^ bits", Typ);
+  end if;
end Freeze_Enumeration_Type;
 
---
-- 
2.40.0

[COMMITTED] ada: Tweak comment about tasking corner case

[Marc Poulhiès via Gcc-patches]

From: Ronan Desplanques 

This patch adjusts a comment that could have misleadingly suggested
that a corner case related to tasks could not exist in Ada 2012 or
Ada 2022.

gcc/ada/

* libgnarl/s-tassta.adb: Tweak comment.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnarl/s-tassta.adb | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/libgnarl/s-tassta.adb b/gcc/ada/libgnarl/s-tassta.adb
index 53633c9f3dc..5be6253a978 100644
--- a/gcc/ada/libgnarl/s-tassta.adb
+++ b/gcc/ada/libgnarl/s-tassta.adb
@@ -1615,8 +1615,8 @@ package body System.Tasking.Stages is
 
 --  Usually, C.Common.Activator = Self_ID implies C.Master_Of_Task
 --  = CM. The only case where C is pending activation by this
---  task, but the master of C is not CM is in Ada 2005, when C is
---  part of a return object of a build-in-place function.
+--  task, but the master of C is not CM is when C is part of a
+--  return object of a build-in-place function.
 
 pragma Assert (C.Common.State = Unactivated);
 
-- 
2.40.0

[COMMITTED] ada: Compiler hangs on invalid postcondition

[Marc Poulhiès via Gcc-patches]

From: Steve Baird 

In some cases involving an illegal reference to F'Result in
the postcondition for a function not named F, the compiler would
hang instead of correctly diagnosing the error.

gcc/ada/

* sem_attr.adb (Denote_Same_Function): Handle the case where
Has_Homonym (Pref_Id) returns True but Homonym (Pref_Id) returns
an empty result.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_attr.adb | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
index e00addd0152..d03761b1e30 100644
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -5921,7 +5921,9 @@ package body Sem_Attr is
 --  When a qualified name is used for the prefix, homonyms may come
 --  before the current function in the homonym chain.
 
-elsif Has_Homonym (Pref_Id) then
+elsif Has_Homonym (Pref_Id)
+  and then Present (Homonym (Pref_Id))
+then
return Denote_Same_Function (Homonym (Pref_Id), Spec_Id);
 end if;
 
-- 
2.40.0

[COMMITTED] ada: Crash on function returning empty Ada 2022 aggregate

[Marc Poulhiès via Gcc-patches]

From: Javier Miranda 

The compiler crashes processing a function that returns an empty
aggregate when its returned type is a record type which defined
its container aggregate aspects.

gcc/ada/

* exp_aggr.adb (Expand_Container_Aggregate): Report warning on
infinite recursion if an empty container aggregate appears in the
return statement of its Empty function. Fix typo in comment.
* sem_aggr.adb (Resolve_Aggregate): Resolve Ada 2022 empty
aggregate that initializes a record type that has defined its
container aggregate aspects.
(Resolve_Iterated_Association): Protect access to attribute Etype.
* sem_ch13.adb (Resolve_Aspect_Aggregate): Fix typo in comment.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_aggr.adb | 23 ++-
 gcc/ada/sem_aggr.adb | 14 ++
 gcc/ada/sem_ch13.adb |  2 +-
 3 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index cd5cc0b7669..cdca24b7d5d 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -6917,6 +6917,10 @@ package body Exp_Aggr is
 
   Siz := Aggregate_Size;
 
+  -
+  --  Empty function --
+  -
+
   if Ekind (Entity (Empty_Subp)) = E_Function
 and then Present (First_Formal (Entity (Empty_Subp)))
   then
@@ -6984,7 +6988,7 @@ package body Exp_Aggr is
 
  Append (Init_Stat, Aggr_Code);
 
- --  Size is dynamic: Create declaration for object, and intitialize
+ --  Size is dynamic: Create declaration for object, and initialize
  --  with a call to the null container, or an assignment to it.
 
   else
@@ -7013,6 +7017,23 @@ package body Exp_Aggr is
  Append (Init_Stat, Aggr_Code);
   end if;
 
+  --  Report warning on infinite recursion if an empty container aggregate
+  --  appears in the return statement of its Empty function.
+
+  if Ekind (Entity (Empty_Subp)) = E_Function
+and then Nkind (Parent (N)) = N_Simple_Return_Statement
+and then Is_Empty_List (Expressions (N))
+and then Is_Empty_List (Component_Associations (N))
+and then Entity (Empty_Subp) = Current_Scope
+  then
+ Error_Msg_Warn := SPARK_Mode /= On;
+ Error_Msg_N
+   ("!empty aggregate returned by the empty function of a container"
+& " aggregate<<<", Parent (N));
+ Error_Msg_N
+   ("\this will result in infinite recursion??", Parent (N));
+  end if;
+
   ---
   --  Positional aggregate --
   ---
diff --git a/gcc/ada/sem_aggr.adb b/gcc/ada/sem_aggr.adb
index 364217d03db..e929fea3bb6 100644
--- a/gcc/ada/sem_aggr.adb
+++ b/gcc/ada/sem_aggr.adb
@@ -1065,6 +1065,19 @@ package body Sem_Aggr is
 
  Resolve_Container_Aggregate (N, Typ);
 
+  --  Check Ada 2022 empty aggregate [] initializing a record type that has
+  --  aspect aggregate; the empty aggregate will be expanded into a call to
+  --  the empty function specified in the aspect aggregate.
+
+  elsif Has_Aspect (Typ, Aspect_Aggregate)
+and then Ekind (Typ) = E_Record_Type
+and then Is_Homogeneous_Aggregate (N)
+and then Is_Empty_List (Expressions (N))
+and then Is_Empty_List (Component_Associations (N))
+and then Ada_Version >= Ada_2022
+  then
+ Resolve_Container_Aggregate (N, Typ);
+
   elsif Is_Record_Type (Typ) then
  Resolve_Record_Aggregate (N, Typ);
 
@@ -3328,6 +3341,7 @@ package body Sem_Aggr is
 
   if Present (Add_Unnamed_Subp)
 and then No (New_Indexed_Subp)
+and then Present (Etype (Add_Unnamed_Subp))
 and then Etype (Add_Unnamed_Subp) /= Any_Type
   then
  declare
diff --git a/gcc/ada/sem_ch13.adb b/gcc/ada/sem_ch13.adb
index 7cd0800a56c..f89135983cf 100644
--- a/gcc/ada/sem_ch13.adb
+++ b/gcc/ada/sem_ch13.adb
@@ -16470,7 +16470,7 @@ package body Sem_Ch13 is
  Op_Name := Chars (First (Choices (Assoc)));
 
  --  When verifying the consistency of aspects between the freeze point
- --  and the end of declarqtions, we use a copy which is not analyzed
+ --  and the end of declarations, we use a copy which is not analyzed
  --  yet, so do it now.
 
  Subp_Id := Expression (Assoc);
-- 
2.40.0

[COMMITTED] ada: Spurious warning about negative modular literal

[Marc Poulhiès via Gcc-patches]

From: Steve Baird 

If -gnatw.m is enabled, the compiler generates a warning if a unary
minus operator of a modular type is applied to an integer literal.
This warning was being incorrectly generated in some cases where no integer
literal is present in the source code.

gcc/ada/

* sem_res.adb (Resolve_Unary_Op): In deciding whether to emit a
warning about a modular type's unary minus operator being applied
to an integer literal, ignore integer literals for which
Comes_From_Source is False.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_res.adb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index 9755e4d14a6..c708d04fc32 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -12671,6 +12671,7 @@ package body Sem_Res is
   if Warn_On_Suspicious_Modulus_Value
 and then Nkind (N) = N_Op_Minus
 and then Nkind (R) = N_Integer_Literal
+and then Comes_From_Source (R)
 and then Is_Modular_Integer_Type (B_Typ)
 and then Nkind (Parent (N)) not in N_Qualified_Expression
  | N_Type_Conversion
-- 
2.40.0

[COMMITTED] ada: Fix crash on selected component lookup in generic instance

[Marc Poulhiès via Gcc-patches]

From: Bob Duff 

This patch fixes a compiler crash on selected component lookup in an instance
of a generic unit when the relevant type is an itype.

gcc/ada/

* sem_ch4.adb (Find_Component_In_Instance): Check that
Declaration_Node (Par) is not Empty, as it is for itypes.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch4.adb | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/sem_ch4.adb b/gcc/ada/sem_ch4.adb
index 8543f0d578b..50ba6c9c847 100644
--- a/gcc/ada/sem_ch4.adb
+++ b/gcc/ada/sem_ch4.adb
@@ -5212,10 +5212,14 @@ package body Sem_Ch4 is
 end if;
  end loop;
 
- if Present (Par) and then Is_Generic_Actual_Type (Par) then
-
---  Now look for component in ancestor types
+ --  If Par is a generic actual, look for component in ancestor types.
+ --  Skip this if we have no Declaration_Node, as is the case for
+ --  itypes.
 
+ if Present (Par)
+   and then Is_Generic_Actual_Type (Par)
+   and then Present (Declaration_Node (Par))
+ then
 Par := Generic_Parent_Type (Declaration_Node (Par));
 loop
Find_Component_In_Instance (Par);
-- 
2.40.0

[COMMITTED] ada: Pass -msmp when linking for ppc-vx6 --RTS=rtp-smp

[Marc Poulhiès via Gcc-patches]

From: Alexandre Oliva 

gprbuild and gnatmake won't pass --RTS=rtp-smp to the compiler driver
for linking.  The flag was not used during linking: the .spec files
named as linker options were all we passed for the linker to get the
-L flags for lib_smp and lib.

There was a problem, though: although /lib_smp/ and /lib/ were to be
searched in this order, and the specs files did that correctly, the
compiler would search /lib/ first regardless, because
STARTFILE_PREFIX_SPEC said so, and specs files cannot override that.

With this patch, we make sure the rtp-smp runtime causes -msmp to be
added to the command line passed to the compiler driver for linking,
and a corresponding patch for the ppc-vxworks configuration makes the
GCC compiler driver use this flag to select /lib_smp/ rather than
/lib/.

gcc/ada/

* libgnat/system-vxworks-ppc-rtp-smp.ads: Add -msmp to
Linker_Options pragma.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/system-vxworks-ppc-rtp-smp.ads | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ada/libgnat/system-vxworks-ppc-rtp-smp.ads 
b/gcc/ada/libgnat/system-vxworks-ppc-rtp-smp.ads
index d8c498fac7f..e4b80a8415e 100644
--- a/gcc/ada/libgnat/system-vxworks-ppc-rtp-smp.ads
+++ b/gcc/ada/libgnat/system-vxworks-ppc-rtp-smp.ads
@@ -120,6 +120,7 @@ package System is
 
 private
 
+   pragma Linker_Options ("-msmp");
pragma Linker_Options ("--specs=vxworks-smp-ppc-link.spec");
pragma Linker_Options ("--specs=vxworks-ppc-link.spec");
--  Setup proper set of -L's for this configuration
-- 
2.40.0

[COMMITTED] ada: Handle GNATcheck violations

[Marc Poulhiès via Gcc-patches]

From: Sheri Bernstein 

For the GNATcheck rule "Improper_Returns", either use pragma Annotate
to exempt the violation with the rationale "early returns for performance",
or refactor the code by replacing multiple returns by a single return
statement with a conditional expression; this is more readable and
maintainable, and also conformant with a Highly Recommended design principle
of ISO 26262-6.  For the GNATcheck rule "Discriminated_Records", use pragma
Annotate to exempt the violation with the rationale "only variant records
are disallowed".

gcc/ada/

* libgnarl/a-reatim.adb (Time_Of): Add pragma to exempt
Discriminated_Records.
* libgnat/s-imguti.adb (Round, Set_Decimal_Digits): Likewise.
* libgnat/s-multip.adb (Number_Of_CPUs): Likewise.
* libgnarl/s-tpopsp__posix-foreign.adb (Self): Refactor multiple
returns.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnarl/a-reatim.adb|  5 +
 gcc/ada/libgnarl/s-tpopsp__posix-foreign.adb | 10 --
 gcc/ada/libgnat/s-imguti.adb | 10 ++
 gcc/ada/libgnat/s-multip.adb |  5 +
 4 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/libgnarl/a-reatim.adb b/gcc/ada/libgnarl/a-reatim.adb
index 56a84789729..24a77311f9d 100644
--- a/gcc/ada/libgnarl/a-reatim.adb
+++ b/gcc/ada/libgnarl/a-reatim.adb
@@ -307,6 +307,9 @@ is
--  Start of processing for Time_Of
 
begin
+  pragma Annotate (Gnatcheck, Exempt_On, "Improper_Returns",
+   "early returns for performance");
+
   --  If SC is so far out of range that there is no possibility of the
   --  addition of TS getting it back in range, raise an exception right
   --  away. That way we don't have to worry about SC values overflowing.
@@ -356,6 +359,8 @@ is
 Out_Of_Range;
  end if;
   end if;
+
+  pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
end Time_Of;
 
-
diff --git a/gcc/ada/libgnarl/s-tpopsp__posix-foreign.adb 
b/gcc/ada/libgnarl/s-tpopsp__posix-foreign.adb
index 4b3e200150d..ebf0f622db0 100644
--- a/gcc/ada/libgnarl/s-tpopsp__posix-foreign.adb
+++ b/gcc/ada/libgnarl/s-tpopsp__posix-foreign.adb
@@ -95,12 +95,10 @@ package body Specific is
   Result := pthread_getspecific (ATCB_Key);
 
   --  If the key value is Null then it is a non-Ada task
-
-  if Result /= System.Null_Address then
- return To_Task_Id (Result);
-  else
- return Register_Foreign_Thread;
-  end if;
+  return
+ (if Result /= System.Null_Address then To_Task_Id (Result)
+  else Register_Foreign_Thread
+ );
end Self;
 
 end Specific;
diff --git a/gcc/ada/libgnat/s-imguti.adb b/gcc/ada/libgnat/s-imguti.adb
index 4c8cf5f3295..2e69e630c8a 100644
--- a/gcc/ada/libgnat/s-imguti.adb
+++ b/gcc/ada/libgnat/s-imguti.adb
@@ -119,6 +119,9 @@ package body System.Img_Util is
  pragma Assert (Digs'First < Digs'Last);
 
   begin
+ pragma Annotate (Gnatcheck, Exempt_On, "Improper_Returns",
+   "early returns for performance");
+
  --  Nothing to do if rounding past the last digit we have
 
  if N >= LD then
@@ -178,6 +181,8 @@ package body System.Img_Util is
Digits_Before_Point := Digits_Before_Point + 1;
 end if;
  end if;
+
+ pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
   end Round;
 
   -
@@ -246,6 +251,9 @@ package body System.Img_Util is
--  Start of processing for Set_Decimal_Digits
 
begin
+  pragma Annotate (Gnatcheck, Exempt_On, "Improper_Returns",
+"early returns for performance");
+
   --  Case of exponent given
 
   if Exp > 0 then
@@ -398,6 +406,8 @@ package body System.Img_Util is
 end if;
  end if;
   end if;
+
+  pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
end Set_Decimal_Digits;
 

diff --git a/gcc/ada/libgnat/s-multip.adb b/gcc/ada/libgnat/s-multip.adb
index 372f1407dbf..96177f9fc41 100644
--- a/gcc/ada/libgnat/s-multip.adb
+++ b/gcc/ada/libgnat/s-multip.adb
@@ -36,6 +36,9 @@ package body System.Multiprocessors is
 
function Number_Of_CPUs return CPU is
begin
+  pragma Annotate (Gnatcheck, Exempt_On, "Improper_Returns",
+   "early returns for performance");
+
   if CPU'Last = 1 then
  return 1;
   else
@@ -46,6 +49,8 @@ package body System.Multiprocessors is
 return CPU (Gnat_Number_Of_CPUs);
  end;
   end if;
+
+  pragma Annotate (Gnatcheck, Exempt_Off, "Improper_Returns");
end Number_Of_CPUs;
 
 end System.Multiprocessors;
-- 
2.40.0

[COMMITTED] ada: Crash on creation of extra formals on type extension

[Marc Poulhiès via Gcc-patches]

From: Javier Miranda 

The compiler blows up processing an overriding dispatching function
of a derived tagged type that returns a private tagged type that
has an access type discriminant.

gcc/ada/

* accessibility.ads (Needs_Result_Accessibility_Extra_Formal): New
subprogram.
* accessibility.adb (Needs_Result_Accessibility_Level_Param): New
subprogram.
(Needs_Result_Accessibility_Extra_Formal): New subprogram,
temporarily keep the previous behavior of the frontend.
* sem_ch6.adb (Create_Extra_Formals): Replace occurrences of
function Needs_Result_Accessibility_Level_Param by calls to
function Needs_Result_Accessibility_Extra_Formal.
(Extra_Formals_OK): Ditto.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/accessibility.adb | 54 +--
 gcc/ada/accessibility.ads | 12 -
 gcc/ada/sem_ch6.adb   |  8 +++---
 3 files changed, 67 insertions(+), 7 deletions(-)

diff --git a/gcc/ada/accessibility.adb b/gcc/ada/accessibility.adb
index bc897d1ef18..6b4ec5b9d24 100644
--- a/gcc/ada/accessibility.adb
+++ b/gcc/ada/accessibility.adb
@@ -56,6 +56,16 @@ with Tbuild; use Tbuild;
 
 package body Accessibility is
 
+   function Needs_Result_Accessibility_Level_Param
+ (Func_Id  : Entity_Id;
+  Func_Typ : Entity_Id) return Boolean;
+   --  Subsidiary of functions Needs_Result_Accessibility_Extra_Formal and
+   --  Needs_Result_Accessibility_Level_Param. Return True if the function
+   --  needs an implicit parameter to identify the accessibility level of
+   --  the function result "determined by the point of call". Func_Typ is
+   --  the function return type; this function returns False if Func_Typ is
+   --  Empty.
+
---
-- Accessibility_Message --
---
@@ -1892,6 +1902,34 @@ package body Accessibility is
and then Is_Explicitly_Aliased (Entity (Prefix (Exp)));
end Is_Special_Aliased_Formal_Access;
 
+   -
+   -- Needs_Result_Accessibility_Extra_Formal --
+   -
+
+   function Needs_Result_Accessibility_Extra_Formal
+ (Func_Id : Entity_Id) return Boolean
+   is
+  Func_Typ : Entity_Id;
+
+   begin
+  if Present (Underlying_Type (Etype (Func_Id))) then
+ Func_Typ := Underlying_Type (Etype (Func_Id));
+
+  --  Case of a function returning a private type which is not completed
+  --  yet. The support for this case is required because this function is
+  --  called to create the extra formals of dispatching primitives, and
+  --  they may be frozen before we see the full-view of their returned
+  --  private type.
+
+  else
+ --  Temporarily restore previous behavior
+ --  Func_Typ := Etype (Func_Id);
+ Func_Typ := Empty;
+  end if;
+
+  return Needs_Result_Accessibility_Level_Param (Func_Id, Func_Typ);
+   end Needs_Result_Accessibility_Extra_Formal;
+
--
-- Needs_Result_Accessibility_Level --
--
@@ -1901,6 +1939,18 @@ package body Accessibility is
is
   Func_Typ : constant Entity_Id := Underlying_Type (Etype (Func_Id));
 
+   begin
+  return Needs_Result_Accessibility_Level_Param (Func_Id, Func_Typ);
+   end Needs_Result_Accessibility_Level;
+
+   
+   -- Needs_Result_Accessibility_Level_Param --
+   
+
+   function Needs_Result_Accessibility_Level_Param
+ (Func_Id  : Entity_Id;
+  Func_Typ : Entity_Id) return Boolean
+   is
   function Has_Unconstrained_Access_Discriminant_Component
 (Comp_Typ : Entity_Id) return Boolean;
   --  Returns True if any component of the type has an unconstrained access
@@ -1952,7 +2002,7 @@ package body Accessibility is
   --  Flag used to temporarily disable a "True" result for tagged types.
   --  See comments further below for details.
 
-   --  Start of processing for Needs_Result_Accessibility_Level
+   --  Start of processing for Needs_Result_Accessibility_Level_Param
 
begin
   --  False if completion unavailable, which can happen when we are
@@ -2028,7 +2078,7 @@ package body Accessibility is
   else
  return False;
   end if;
-   end Needs_Result_Accessibility_Level;
+   end Needs_Result_Accessibility_Level_Param;
 
--
-- Prefix_With_Safe_Accessibility_Level --
diff --git a/gcc/ada/accessibility.ads b/gcc/ada/accessibility.ads
index e30c90ab6a7..731fea125f4 100644
--- a/gcc/ada/accessibility.ads
+++ b/gcc/ada/accessibility.ads
@@ -197,11 +197,21 @@ package Accessibility is
--  prefix is an aliased formal of Scop and that Scop returns an anonymous
--  access type. See RM 3.10.2 for more details.
 
+  

[COMMITTED] ada: Remove redundant guard against an empty list of interfaces

[Marc Poulhiès via Gcc-patches]

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* sem_type.adb (Iface_Present_In_Ancestor): Remove guard for empty list
of interfaces; the following loop will work just fine without it.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_type.adb | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/gcc/ada/sem_type.adb b/gcc/ada/sem_type.adb
index 00a64152df1..bbdcd5f24b8 100644
--- a/gcc/ada/sem_type.adb
+++ b/gcc/ada/sem_type.adb
@@ -2578,9 +2578,7 @@ package body Sem_Type is
  end if;
 
  loop
-if Present (Interfaces (E))
-  and then not Is_Empty_Elmt_List (Interfaces (E))
-then
+if Present (Interfaces (E)) then
Elmt := First_Elmt (Interfaces (E));
while Present (Elmt) loop
   AI := Node (Elmt);
-- 
2.40.0

[COMMITTED] ada: Fix internal error on instantiation with private component type

[Marc Poulhiès via Gcc-patches]

From: Eric Botcazou 

First, this fixes an internal error on the instantiation of a nested generic
package taking an array type whose component type is a private type declared
in the parent package as formal type parameter. In the body of the instance,
the full view of the private type is visible and must be restored by means
of the Check_Generic_Actuals mechanism.

Second, this fixes the same internal error in the case where the component
type itself is an array type whose component type is a private type declared
in the parent package, i.e. when the formal type parameter is an array of
array type, by naturally extending the Has_Secondary_Private_View mechanism
to the array of array case.

gcc/ada/

* sem_ch12.adb (Component_Type_For_Private_View): New function.
(Check_Generic_Actuals): For an actual type parameter, also check
its component type if it is an array type.
(Check_Private_View): Use Component_Type_For_Private_View in the
case of an array type.
(Instantiate_Type): Likewise.
(Save_Global_References.Set_Global_Type): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch12.adb | 54 +++-
 1 file changed, 48 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/sem_ch12.adb b/gcc/ada/sem_ch12.adb
index 61e0ec47392..c264f2a8283 100644
--- a/gcc/ada/sem_ch12.adb
+++ b/gcc/ada/sem_ch12.adb
@@ -582,6 +582,13 @@ package body Sem_Ch12 is
--  Recurse on an actual that is a formal package whose declaration has
--  a box.
 
+   function Component_Type_For_Private_View (T : Entity_Id) return Entity_Id;
+   --  Return the component type of array type T, with the following addition:
+   --  if this component type itself is an array type which has not been first
+   --  declared as private, then recurse on it. This makes it possible to deal
+   --  with arrays of arrays the same way as multi-dimensional arrays in the
+   --  mechanism handling private views.
+
function Contains_Instance_Of
  (Inner : Entity_Id;
   Outer : Entity_Id;
@@ -7084,10 +7091,27 @@ package body Sem_Ch12 is
and then Scope (Etype (E)) /= Instance
and then Is_Entity_Name (Subtype_Indication (Parent (E)))
  then
---  Restore the proper view of the actual from the information
---  saved earlier by Instantiate_Type.
+declare
+   Indic : constant Node_Id := Subtype_Indication (Parent (E));
+
+begin
+   --  Restore the proper view of the actual from the information
+   --  saved earlier by Instantiate_Type.
+
+   Check_Private_View (Indic);
 
-Check_Private_View (Subtype_Indication (Parent (E)));
+   --  If this view is an array type, check its component type.
+   --  This handles the case of an array type whose component
+   --  type is private, used as the actual in an instantiation
+   --  of a generic construct declared in the same package as
+   --  the component type and taking an array type with this
+   --  component type as formal type parameter.
+
+   if Is_Array_Type (Etype (Indic)) then
+  Check_Actual_Type
+(Component_Type_For_Private_View (Etype (Indic)));
+   end if;
+end;
 
 --  If the actual is itself the formal of a parent instance,
 --  then also restore the proper view of its actual and so on.
@@ -7759,7 +7783,8 @@ package body Sem_Ch12 is
 
 elsif Is_Array_Type (Typ) then
Check_Private_Type
- (Component_Type (Typ), Has_Secondary_Private_View (N));
+ (Component_Type_For_Private_View (Typ),
+  Has_Secondary_Private_View (N));
 
 elsif (Is_Record_Type (Typ) or else Is_Concurrent_Type (Typ))
   and then Has_Discriminants (Typ)
@@ -7821,6 +7846,21 @@ package body Sem_Ch12 is
   return Result;
end Check_Hidden_Primitives;
 
+   -
+   -- Component_Type_For_Private_View --
+   -
+
+   function Component_Type_For_Private_View (T : Entity_Id) return Entity_Id is
+  Typ : constant Entity_Id := Component_Type (T);
+
+   begin
+  if Is_Array_Type (Typ) and then not Has_Private_Declaration (Typ) then
+ return Component_Type_For_Private_View (Typ);
+  else
+ return Typ;
+  end if;
+   end Component_Type_For_Private_View;
+
--
-- Contains_Instance_Of --
--
@@ -14373,7 +14413,8 @@ package body Sem_Ch12 is
   elsif (Is_Access_Type (Act_T)
   and then Is_Private_Type (Designated_Type (Act_T)))
 or else (Is_Array_Type (Act_T)
-  and then Is_Private_Type (Component_Type (Act_T)))
+   

[COMMITTED] ada: Remove TBC comment, no more needed

[Marc Poulhiès via Gcc-patches]

From: Liaiss Merzougue 

gcc/ada/

* libgnat/s-imguti.adb: Remove comment.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/s-imguti.adb | 1 -
 1 file changed, 1 deletion(-)

diff --git a/gcc/ada/libgnat/s-imguti.adb b/gcc/ada/libgnat/s-imguti.adb
index 2e69e630c8a..4b9e27a7d8f 100644
--- a/gcc/ada/libgnat/s-imguti.adb
+++ b/gcc/ada/libgnat/s-imguti.adb
@@ -231,7 +231,6 @@ package body System.Img_Util is
   begin
  pragma Assert (S >= Digs'First and E <= Digs'Last);
  --  S and E should be in the Digs array range
- --  TBC: Analysis should be completed
  for J in S .. E loop
 Set (Digs (J));
  end loop;
-- 
2.40.0

[COMMITTED] ada: Fix DWARF for certain arrays

[Marc Poulhiès via Gcc-patches]

From: Tom Tromey 

An array whose index type is a nonstandard enum will be marked as
"packed", but should not emit DW_AT_bit_stride unless it is also
bit-packed.

gcc/ada/

* gcc-interface/decl.cc (gnat_to_gnu_entity): Set bit-packed for
constrained and unconstrained array types.
* gcc-interface/misc.cc (gnat_get_array_descr_info): Examine
BIT_PACKED_ARRAY_TYPE_P.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/gcc-interface/decl.cc |  8 +++-
 gcc/ada/gcc-interface/misc.cc | 14 +++---
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/gcc/ada/gcc-interface/decl.cc b/gcc/ada/gcc-interface/decl.cc
index ae756b35fdb..0cf7d3cee60 100644
--- a/gcc/ada/gcc-interface/decl.cc
+++ b/gcc/ada/gcc-interface/decl.cc
@@ -2388,6 +2388,11 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree 
gnu_expr, bool definition)
  = (Is_Packed (gnat_entity)
 || Is_Packed_Array_Impl_Type (gnat_entity));
 
+   TYPE_BIT_PACKED_ARRAY_TYPE_P (tem)
+ = (Is_Packed_Array_Impl_Type (gnat_entity)
+? Is_Bit_Packed_Array (Original_Array_Type (gnat_entity))
+: Is_Bit_Packed_Array (gnat_entity));
+
if (Treat_As_Volatile (gnat_entity))
  tem = change_qualified_type (tem, TYPE_QUAL_VOLATILE);
 
@@ -2815,7 +2820,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, 
bool definition)
 
  TYPE_BIT_PACKED_ARRAY_TYPE_P (gnu_type)
= (Is_Packed_Array_Impl_Type (gnat_entity)
-  && Is_Bit_Packed_Array (Original_Array_Type (gnat_entity)));
+  ? Is_Bit_Packed_Array (Original_Array_Type (gnat_entity))
+  : Is_Bit_Packed_Array (gnat_entity));
 
  /* If the maximum size doesn't overflow, use it.  */
  if (gnu_max_size
diff --git a/gcc/ada/gcc-interface/misc.cc b/gcc/ada/gcc-interface/misc.cc
index 30319ae58b1..3b21bf5b43a 100644
--- a/gcc/ada/gcc-interface/misc.cc
+++ b/gcc/ada/gcc-interface/misc.cc
@@ -774,7 +774,7 @@ gnat_get_array_descr_info (const_tree const_type,
 {
   tree type = const_cast (const_type);
   tree first_dimen, dimen;
-  bool is_packed_array, is_array;
+  bool is_bit_packed_array, is_array;
   int i;
 
   /* Temporaries created in the first pass and used in the second one for thin
@@ -784,15 +784,15 @@ gnat_get_array_descr_info (const_tree const_type,
   tree thinptr_template_expr = NULL_TREE;
   tree thinptr_bound_field = NULL_TREE;
 
-  /* If we have an implementation type for a packed array, get the orignial
+  /* If we have an implementation type for a packed array, get the original
  array type.  */
   if (TYPE_IMPL_PACKED_ARRAY_P (type) && TYPE_ORIGINAL_PACKED_ARRAY (type))
 {
+  is_bit_packed_array = BIT_PACKED_ARRAY_TYPE_P (type);
   type = TYPE_ORIGINAL_PACKED_ARRAY (type);
-  is_packed_array = true;
 }
   else
-is_packed_array = false;
+is_bit_packed_array = false;
 
   /* First pass: gather all information about this array except everything
  related to dimensions.  */
@@ -850,8 +850,8 @@ gnat_get_array_descr_info (const_tree const_type,
  order, so our view here has reversed dimensions.  */
   const bool convention_fortran_p = TYPE_CONVENTION_FORTRAN_P (first_dimen);
 
-  if (TYPE_PACKED (first_dimen))
-is_packed_array = true;
+  if (BIT_PACKED_ARRAY_TYPE_P (first_dimen))
+is_bit_packed_array = true;
 
   /* ??? For row major ordering, we probably want to emit nothing and
  instead specify it as the default in Dw_TAG_compile_unit.  */
@@ -975,7 +975,7 @@ gnat_get_array_descr_info (const_tree const_type,
   /* We need to specify a bit stride when it does not correspond to the
 natural size of the contained elements.  ??? Note that we do not
 support packed records and nested packed arrays.  */
-  else if (is_packed_array)
+  else if (is_bit_packed_array)
{
  info->stride = get_array_bit_stride (info->element_type);
  info->stride_in_bits = true;
-- 
2.40.0

[COMMITTED] ada: Add guard before querying the type for its interfaces

[Marc Poulhiès via Gcc-patches]

From: Piotr Trojanek 

Fix crash on illegal code, when routine Iface_Present_In_Ancestor is
called on the predefined String type and attempts to examine the list of
interfaces.

gcc/ada/

* sem_type.adb (Iface_Present_In_Ancestor): Only look at the list of
interfaces for types that allow it. The guard is a high-level equivalent
of the entity kinds listed in the preconditon of the Interfaces query.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_type.adb | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/sem_type.adb b/gcc/ada/sem_type.adb
index bbdcd5f24b8..8579130cdac 100644
--- a/gcc/ada/sem_type.adb
+++ b/gcc/ada/sem_type.adb
@@ -2578,7 +2578,9 @@ package body Sem_Type is
  end if;
 
  loop
-if Present (Interfaces (E)) then
+if Is_Record_Type (E)
+  and then Present (Interfaces (E))
+then
Elmt := First_Elmt (Interfaces (E));
while Present (Elmt) loop
   AI := Node (Elmt);
-- 
2.40.0

[COMMITTED] ada: Preserve capability validity in address arithmetic

[Marc Poulhiès via Gcc-patches]

From: Daniel King 

On CHERI targets where System.Address is a capability, arithmetic on
addresses should avoid converting to integers and instead use the
operations defined in System.Storage_Elements to perform the arithmetic
directly on the System.Address object. This preserves the capability's
validity throughout the calculation, ensuring that the resulting capability
can be dereferenced.

gcc/ada/

* libgnat/s-carsi8.adb: Use operations from
System.Storage_Elements for address arithmetic.
* libgnat/s-carun8.adb: Likewise
* libgnat/s-casi128.adb: Likewise
* libgnat/s-casi16.adb: Likewise
* libgnat/s-casi32.adb: Likewise
* libgnat/s-casi64.adb: Likewise
* libgnat/s-caun128.adb: Likewise
* libgnat/s-caun16.adb: Likewise
* libgnat/s-caun32.adb: Likewise
* libgnat/s-caun64.adb: Likewise
* libgnat/s-geveop.adb: Likewise

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/s-carsi8.adb  |  9 
 gcc/ada/libgnat/s-carun8.adb  |  9 
 gcc/ada/libgnat/s-casi128.adb |  9 
 gcc/ada/libgnat/s-casi16.adb  | 13 ++-
 gcc/ada/libgnat/s-casi32.adb  |  9 
 gcc/ada/libgnat/s-casi64.adb  |  9 
 gcc/ada/libgnat/s-caun128.adb |  9 
 gcc/ada/libgnat/s-caun16.adb  | 13 ++-
 gcc/ada/libgnat/s-caun32.adb  |  9 
 gcc/ada/libgnat/s-caun64.adb  |  9 
 gcc/ada/libgnat/s-geveop.adb  | 43 ++-
 11 files changed, 76 insertions(+), 65 deletions(-)

diff --git a/gcc/ada/libgnat/s-carsi8.adb b/gcc/ada/libgnat/s-carsi8.adb
index 839f157a2ee..3946d474dd9 100644
--- a/gcc/ada/libgnat/s-carsi8.adb
+++ b/gcc/ada/libgnat/s-carsi8.adb
@@ -30,6 +30,7 @@
 --
 
 with System.Address_Operations; use System.Address_Operations;
+with System.Storage_Elements;   use System.Storage_Elements;
 
 with Ada.Unchecked_Conversion;
 
@@ -94,8 +95,8 @@ package body System.Compare_Array_Signed_8 is
  for J in 0 .. Words_To_Compare - 1 loop
 if LeftP (J) /= RightP (J) then
return Compare_Array_S8_Unaligned
-(AddA (Left,  Address (4 * J)),
- AddA (Right, Address (4 * J)),
+(Left  + Storage_Offset (4 * J),
+ Right + Storage_Offset (4 * J),
  4, 4);
 end if;
  end loop;
@@ -108,8 +109,8 @@ package body System.Compare_Array_Signed_8 is
  --* Words_To_Compare = Compare_Len / 4
  --* Bytes_Compared_As_Words = Words_To_Compare * 4
  return Compare_Array_S8_Unaligned
-  (AddA (Left,  Address (Bytes_Compared_As_Words)),
-   AddA (Right, Address (Bytes_Compared_As_Words)),
+(Left  + Storage_Offset (Bytes_Compared_As_Words),
+ Right + Storage_Offset (Bytes_Compared_As_Words),
Left_Len  - Bytes_Compared_As_Words,
Right_Len - Bytes_Compared_As_Words);
   end;
diff --git a/gcc/ada/libgnat/s-carun8.adb b/gcc/ada/libgnat/s-carun8.adb
index b20e4e1b922..e6938def56a 100644
--- a/gcc/ada/libgnat/s-carun8.adb
+++ b/gcc/ada/libgnat/s-carun8.adb
@@ -30,6 +30,7 @@
 --
 
 with System.Address_Operations; use System.Address_Operations;
+with System.Storage_Elements;   use System.Storage_Elements;
 
 with Ada.Unchecked_Conversion;
 
@@ -93,8 +94,8 @@ package body System.Compare_Array_Unsigned_8 is
  for J in 0 .. Words_To_Compare - 1 loop
 if LeftP (J) /= RightP (J) then
return Compare_Array_U8_Unaligned
-(AddA (Left,  Address (4 * J)),
- AddA (Right, Address (4 * J)),
+(Left  + Storage_Offset (4 * J),
+ Right + Storage_Offset (4 * J),
  4, 4);
 end if;
  end loop;
@@ -107,8 +108,8 @@ package body System.Compare_Array_Unsigned_8 is
  --* Words_To_Compare = Compare_Len / 4
  --* Bytes_Compared_As_Words = Words_To_Compare * 4
  return Compare_Array_U8_Unaligned
-  (AddA (Left,  Address (Bytes_Compared_As_Words)),
-   AddA (Right, Address (Bytes_Compared_As_Words)),
+  (Left  + Storage_Offset (Bytes_Compared_As_Words),
+   Right + Storage_Offset (Bytes_Compared_As_Words),
Left_Len  - Bytes_Compared_As_Words,
Right_Len - Bytes_Compared_As_Words);
   end;
diff --git a/gcc/ada/libgnat/s-casi128.adb b/gcc/ada/libgnat/s-casi128.adb
index 2b0caac75b2..91569e1091d 100644
--- a/gcc/ada/libgnat/s-casi128.adb
+++ b/gcc/ada/libgnat/s-casi128.adb
@@ -30,6 +30,7 @@
 ---

[COMMITTED] ada: Fix problematic secondary stack management in protected entry

[Marc Poulhiès via Gcc-patches]

From: Eric Botcazou 

The secondary stack mark goes formally out of scope before the finalizer
reads it to reclaim the storage.

gcc/ada/

* exp_ch9.adb (Build_Protected_Entry): Move the At_End procedure
from the entry body to the inner block statement.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch9.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index b0e3632b8c8..5dcd890c33c 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -3457,6 +3457,7 @@ package body Exp_Ch9 is
   Set_Uses_Sec_Stack (Block_Id, Uses_Sec_Stack (Corresponding_Spec (N)));
 
   Reset_Scopes_To (First (Bod_Stmts), Block_Id);
+  Set_At_End_Proc (First (Bod_Stmts), At_End_Proc (N));
 
   case Corresponding_Runtime_Package (Pid) is
  when System_Tasking_Protected_Objects_Entries =>
@@ -3553,7 +3554,6 @@ package body Exp_Ch9 is
  --  Establish link between subprogram body and source entry body
 
  Set_Corresponding_Entry_Body (Proc_Body, N);
- Set_At_End_Proc (Proc_Body, At_End_Proc (N));
 
  Reset_Scopes_To (Proc_Body, Protected_Body_Subprogram (Ent));
  return Proc_Body;
-- 
2.40.0

[COMMITTED] ada: Remove redundant protection against empty list

[Marc Poulhiès via Gcc-patches]

From: Piotr Trojanek 

Calls to First on No_List intentionally return Empty, so explicit guards
against No_List are unnecessary. Code cleanup; semantics is unaffected.

gcc/ada/

* sem_type.adb (Interface_Present_In_Ancestor): Remove guard against no
list of interfaces; fix style in comments (trailing dots).

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_type.adb | 40 +++-
 1 file changed, 19 insertions(+), 21 deletions(-)

diff --git a/gcc/ada/sem_type.adb b/gcc/ada/sem_type.adb
index 8579130cdac..40de2951e20 100644
--- a/gcc/ada/sem_type.adb
+++ b/gcc/ada/sem_type.adb
@@ -2649,34 +2649,32 @@ package body Sem_Type is
   --  In case of concurrent types we can't use the Corresponding Record_Typ
   --  to look for the interface because it is built by the expander (and
   --  hence it is not always available). For this reason we traverse the
-  --  list of interfaces (available in the parent of the concurrent type)
+  --  list of interfaces (available in the parent of the concurrent type).
 
   if Is_Concurrent_Type (Target_Typ) then
- if Present (Interface_List (Parent (Target_Typ))) then
-declare
-   AI : Node_Id;
+ declare
+AI : Node_Id;
 
-begin
-   AI := First (Interface_List (Parent (Target_Typ)));
+ begin
+AI := First (Interface_List (Parent (Target_Typ)));
 
-   --  The progenitor itself may be a subtype of an interface type.
+--  The progenitor itself may be a subtype of an interface type
 
-   while Present (AI) loop
-  if Etype (AI) = Iface_Typ
-or else Base_Type (Etype (AI)) = Iface_Typ
-  then
- return True;
+while Present (AI) loop
+   if Etype (AI) = Iface_Typ
+ or else Base_Type (Etype (AI)) = Iface_Typ
+   then
+  return True;
 
-  elsif Present (Interfaces (Etype (AI)))
-and then Iface_Present_In_Ancestor (Etype (AI))
-  then
- return True;
-  end if;
+   elsif Present (Interfaces (Etype (AI)))
+ and then Iface_Present_In_Ancestor (Etype (AI))
+   then
+  return True;
+   end if;
 
-  Next (AI);
-   end loop;
-end;
- end if;
+   Next (AI);
+end loop;
+ end;
 
  return False;
   end if;
-- 
2.40.0

[COMMITTED] ada: building_executable_programs_with_gnat.rst: fix -gnatw.x index

[Marc Poulhiès via Gcc-patches]

From: Ghjuvan Lacambre 

The index for this paragraph was wrong.

gcc/ada/

* doc/gnat_ugn/building_executable_programs_with_gnat.rst: Fix
index.
* gnat_ugn.texi: Regenerate.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 .../doc/gnat_ugn/building_executable_programs_with_gnat.rst   | 2 +-
 gcc/ada/gnat_ugn.texi | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst 
b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
index 8e479679ec1..6c0d2b34a92 100644
--- a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
+++ b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
@@ -4095,7 +4095,7 @@ of the pragma in the :title:`GNAT_Reference_manual`).
   should not complain at you.
 
 
-.. index:: -gnatwm  (gcc)
+.. index:: -gnatw.x  (gcc)
 
 :switch:`-gnatw.x`
   *Activate warnings for No_Exception_Propagation mode.*
diff --git a/gcc/ada/gnat_ugn.texi b/gcc/ada/gnat_ugn.texi
index 78f9b87a82e..7c5926eba64 100644
--- a/gcc/ada/gnat_ugn.texi
+++ b/gcc/ada/gnat_ugn.texi
@@ -19,7 +19,7 @@
 
 @copying
 @quotation
-GNAT User's Guide for Native Platforms , Jul 17, 2023
+GNAT User's Guide for Native Platforms , Aug 31, 2023
 
 AdaCore
 
@@ -12578,7 +12578,7 @@ you know what you are doing in writing the pragma, and 
it
 should not complain at you.
 @end table
 
-@geindex -gnatwm (gcc)
+@geindex -gnatw.x (gcc)
 
 
 @table @asis
-- 
2.40.0

[COMMITTED] ada: Support setting task affinity on QNX

[Marc Poulhiès via Gcc-patches]

From: Johannes Kliemann 

QNX does not support setting the thread affinity via a POSIX API.
This implementation uses QNX's native Thread_Ctl API to set the
thread affinity for Ada tasks.

gcc/ada/

* libgnarl/s-taprop__qnx.adb: Implement Set_Task_Affinity.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnarl/s-taprop__qnx.adb | 45 ++
 1 file changed, 40 insertions(+), 5 deletions(-)

diff --git a/gcc/ada/libgnarl/s-taprop__qnx.adb 
b/gcc/ada/libgnarl/s-taprop__qnx.adb
index 13335ef4acd..423229854a8 100644
--- a/gcc/ada/libgnarl/s-taprop__qnx.adb
+++ b/gcc/ada/libgnarl/s-taprop__qnx.adb
@@ -49,6 +49,7 @@ with System.Interrupt_Management;
 with System.OS_Constants;
 with System.OS_Primitives;
 with System.Task_Info;
+with System.Multiprocessors;
 
 with System.Soft_Links;
 --  We use System.Soft_Links instead of System.Tasking.Initialization
@@ -1317,12 +1318,46 @@ package body System.Task_Primitives.Operations is
---
 
procedure Set_Task_Affinity (T : ST.Task_Id) is
-  pragma Unreferenced (T);
-
+  use type Multiprocessors.CPU_Range;
+
+  function Thread_Ctl_Ext
+(Pid : pid_t;
+ Tid : Thread_Id;
+ Command : Interfaces.C.unsigned;
+ Runmask : Interfaces.C.size_t) return Interfaces.C.int
+  with
+Import, Convention => C, External_Name => "ThreadCtlExt";
+  --  Thread_Ctl_Ext is a generic thread control function in QNX.
+  --  It is defined locally because in the C API its second
+  --  argument is a void pointer that takes different actual
+  --  pointer types or values depending on the command. This
+  --  particular instance of this function only accepts the
+  --  NTO_TCTL_RUNMASK command. The void * pointer in the C
+  --  interface is interpreted as bitmask for this command.
+  --  In the binding size_t is used as an integer type that
+  --  always has the same size as a pointer.
+
+  NTO_TCTL_RUNMASK : constant := 4;
+  --  Command for Thread_Ctl. Using this command in Thread_Ctl
+  --  allows the caller to pass a bitmask that describes on
+  --  which CPU the current thread is allowed to run on.
+
+  Pid : constant pid_t := getpid;
+  Result  : Interfaces.C.int;
+  Runmask : Interfaces.C.size_t;
+  --  Each set bit in runmask represents a processor that the thread
+  --  can run on. If all bits are set to one the thread can run on any CPU.
begin
-  --  Setting task affinity is not supported by the underlying system
-
-  null;
+  if T.Common.Base_CPU = Multiprocessors.Not_A_Specific_CPU then
+ Runmask := Interfaces.C.size_t'Last;
+  else
+ Runmask :=
+   Interfaces.C.size_t
+ (2 ** Natural (T.Common.Base_CPU - Multiprocessors.CPU'First));
+  end if;
+  Result :=
+ Thread_Ctl_Ext (Pid, Get_Thread_Id (T), NTO_TCTL_RUNMASK, Runmask);
+  pragma Assert (Result = 0);
end Set_Task_Affinity;
 
 end System.Task_Primitives.Operations;
-- 
2.40.0

Re: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

[juzhe.zh...@rivai.ai]

LGTM



juzhe.zh...@rivai.ai
 
From: pan2.li
Date: 2023-09-05 18:32
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode
From: Pan Li 
 
This patch would like to allow the VLS mode autovec for the
floating-point binary operation MAX/MIN.
 
Given below code example:
 
void test(float * restrict out, float * restrict in1, float * restrict in2)
{
  for (int i = 0; i < 128; i++)
out[i] = __builtin_copysignf (in1[i], in2[i]);
}
 
Before this patch:
test:
  csrra4,vlenb
  sllia4,a4,1
  li  a5,128
  bleua5,a4,.L2
  mv  a5,a4
.L2:
  vsetvli zero,a5,e32,m8,ta,ma
  vle32.v v8,0(a1)
  vle32.v v16,0(a2)
  vsetvli a4,zero,e32,m8,ta,ma
  vfsgnj.vv   v8,v8,v16
  vsetvli zero,a5,e32,m8,ta,ma
  vse32.v v8,0(a0)
  ret
 
After this patch:
test:
  li  a5,128
  vsetvli zero,a5,e32,m1,ta,ma
  vle32.v v1,0(a1)
  vle32.v v2,0(a2)
  vfsgnj.vv   v1,v1,v2
  vse32.v v1,0(a0)
  ret
 
Signed-off-by: Pan Li 
 
gcc/ChangeLog:
 
* config/riscv/autovec-vls.md (copysign3): New pattern.
* config/riscv/vector.md: Extend iterator for VLS.
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/rvv/autovec/vls/def.h: New macro.
* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c: New test.
---
gcc/config/riscv/autovec-vls.md   | 22 ++
gcc/config/riscv/vector.md| 24 +--
.../gcc.target/riscv/rvv/autovec/vls/def.h|  8 
.../rvv/autovec/vls/floating-point-sgnj-1.c   | 43 +++
.../rvv/autovec/vls/floating-point-sgnj-2.c   | 43 +++
5 files changed, 128 insertions(+), 12 deletions(-)
create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c
create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c
 
diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md
index 7ef29637e33..31b6c4ae714 100644
--- a/gcc/config/riscv/autovec-vls.md
+++ b/gcc/config/riscv/autovec-vls.md
@@ -255,6 +255,28 @@ (define_insn_and_split "3"
[(set_attr "type" "vector")]
)
+;; -
+;; Includes:
+;; - vfsgnj.vv
+;; - vfsgnj.vf
+;; -
+(define_insn_and_split "copysign3"
+  [(set (match_operand:VLSF 0 "register_operand")
+(unspec:VLSF
+  [(match_operand:VLSF  1 "register_operand")
+   (match_operand:VLSF  2 "register_operand")] UNSPEC_VCOPYSIGN))]
+  "TARGET_VECTOR && can_create_pseudo_p ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+  {
+riscv_vector::emit_vlmax_insn (code_for_pred (UNSPEC_VCOPYSIGN, 
mode),
+riscv_vector::BINARY_OP, operands);
+DONE;
+  }
+  [(set_attr "type" "vector")]
+)
+
;; 
---
;;  [INT] Unary operations
;; 
---
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 9d7b4bbe1d4..fc985ff6a01 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -6166,8 +6166,8 @@ (define_insn "@pred__reverse_scalar"
(symbol_ref "riscv_vector::get_frm_mode (operands[9])"))])
(define_insn "@pred_"
-  [(set (match_operand:VF 0 "register_operand"   "=vd, vd, vr, vr")
- (if_then_else:VF
+  [(set (match_operand:V_VLSF 0 "register_operand"   "=vd, vd, vr, vr")
+ (if_then_else:V_VLSF
  (unspec:
[(match_operand: 1 "vector_mask_operand" " vm, vm,Wc1,Wc1")
 (match_operand 5 "vector_length_operand"" rK, rK, rK, rK")
@@ -6176,10 +6176,10 @@ (define_insn "@pred_"
 (match_operand 8 "const_int_operand""  i,  i,  i,  i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
-   (unspec:VF
- [(match_operand:VF 3 "register_operand"   " vr, vr, vr, vr")
-  (match_operand:VF 4 "register_operand"   " vr, vr, vr, vr")] 
VCOPYSIGNS)
-   (match_operand:VF 2 "vector_merge_operand" " vu,  0, vu,  0")))]
+   (unspec:V_VLSF
+ [(match_operand:V_VLSF 3 "register_operand"  " vr, vr, vr, vr")
+  (match_operand:V_VLSF 4 "register_operand"  " vr, vr, vr, vr")] 
VCOPYSIGNS)
+   (match_operand:V_VLSF 2 "vector_merge_operand" " vu,  0, vu,  0")))]
   "TARGET_VECTOR"
   "vfsgnj.vv\t%0,%3,%4%p1"
   [(set_attr "type" "vfsgnj")
@@ -6207,8 +6207,8 @@ (define_insn "@pred_ncopysign"
(set_attr "mode" "")])
(define_insn "@pred__scalar"
-  [(set (match_operand:VF 0 "register_operand"   "=vd, vd, vr, vr")
- (if_then_else:VF
+  [(set (match_operand:V_VLSF 0 "register_operand"   "=vd, vd, vr, vr")
+ (if_then_else:V_VLSF
  (unspec:
[(match_operand: 1 "vector_mask_operand" " vm, vm,Wc1,Wc1")
 (match_operand 5 "vector_length_operand"" rK, rK, rK, rK")
@@ -6217,11 +6217,11 @@ (define_insn "@pred__scalar"
 (match_opera

[COMMITTED] ada: Fix spurious warning emissions

[Marc Poulhiès via Gcc-patches]

From: Ronan Desplanques 

Before this patch, warnings handled by `Sem_Warn.Check_References` were
erroneously emitted in some cases. Here is an example of a program that,
when compiled with the `-gnatwu` switch, triggered the bug:

procedure Main is
   package T is
  A : Integer;
   end T;
begin
   T.A := 7;
end Main;

The following message was emitted:

   main.adb:3:07: warning: variable "A" is never read and never assigned 
[-gnatwu]

This patch mitigates the issue by restricting the cases in which
`Sem_Warn.Check_References` is called for package specifications.

Note that the recursive calls in `Sem_Warn.Check_References` can be used
to convince oneself that this patch does not remove legitimate warnings
for non-library-level package specifications.

gcc/ada/

* sem_ch7.adb (Analyze_Package_Declaration): Restrict calls to
`Sem_Warn.Check_References` and adjust comment accordingly.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch7.adb | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/sem_ch7.adb b/gcc/ada/sem_ch7.adb
index ecb4bbe3e56..1a49a53ad63 100644
--- a/gcc/ada/sem_ch7.adb
+++ b/gcc/ada/sem_ch7.adb
@@ -1267,12 +1267,17 @@ package body Sem_Ch7 is
Is_Main_Unit => Parent (N) = Cunit (Main_Unit));
  end if;
 
- --  Warn about references to unset objects, which is straightforward
- --  for packages with no bodies. For packages with bodies this is more
- --  complicated, because some of the objects might be set between spec
- --  and body elaboration, in nested or child packages, etc.
-
- Check_References (Id);
+ --  For package declarations at the library level, warn about
+ --  references to unset objects, which is straightforward for packages
+ --  with no bodies. For packages with bodies this is more complicated,
+ --  because some of the objects might be set between spec and body
+ --  elaboration, in nested or child packages, etc. Note that the
+ --  recursive calls in Check_References will handle nested package
+ --  specifications.
+
+ if Is_Library_Level_Entity (Id) then
+Check_References (Id);
+ end if;
   end if;
 
   --  Set Body_Required indication on the compilation unit node
-- 
2.40.0

[COMMITTED] ada: Elide the copy in extended returns for nonlimited by-reference types

[Marc Poulhiès via Gcc-patches]

From: Eric Botcazou 

gcc/ada/

* gcc-interface/trans.cc (gnat_to_gnu): Really test Storage_Pool on
the simple return statement.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/gcc-interface/trans.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/gcc-interface/trans.cc b/gcc/ada/gcc-interface/trans.cc
index 5d93060c6d8..e99fbb4eb5e 100644
--- a/gcc/ada/gcc-interface/trans.cc
+++ b/gcc/ada/gcc-interface/trans.cc
@@ -8519,7 +8519,7 @@ gnat_to_gnu (Node_Id gnat_node)
   && ((Nkind (Parent (gnat_node)) == N_Attribute_Reference
&& lvalue_required_for_attribute_p (Parent (gnat_node)))
   || (Nkind (Parent (gnat_node)) == N_Simple_Return_Statement
-  && No (Storage_Pool (gnat_node)
+  && No (Storage_Pool (Parent (gnat_node))
 ;
 
   else if (TREE_TYPE (gnu_result) != gnu_result_type)
-- 
2.40.0

Re: [PING][PATCH] LoongArch: initial ada support on linux

[Marc Poulhiès via Gcc-patches]

Yujie Yang  writes:
> Hi Marc,
>
> Thank you for the review!
>
> We added -gnatea and -gnatez to CC1_SPECS for correct multilib handling,
> and I believe this is currently specific to LoongArch.
>
> LoongArch relies on the GCC driver (via self_specs rules) to generate a
> canonicalized tuple of parameters that identifies the current target (ISA/ABI)
> configuration, including the "-mabi=" option that corresponds to the selected
> multilib variant.  Even if "-mabi=" itself is not given explicitly to gcc, it
> may be fed to the compiler propers with values other than the default ABI.
>
> For GNAT on LoongArch, it is necessary that -mabi= generated by driver
> self-specs gets stored in the .ali file, otherwise the linker might
> hit the wrong multilib variant by assuming the default ABI.  Using
> -gnatea/-gnatez can mark the driver-generated "-mabi=" as "explicit",
> so it is sure to be found in "A"-records of the generated *.ali file.

Hello Yujie,

Thanks for the explanation!

Marc

Re:[pushed] [PATCH v6 0/4] Add Loongson SX/ASX instruction support to LoongArch target.

[chenglulu]

Pushed to r14-3700.

在 2023/8/31 下午5:08, Chenghui Pan 写道:

This is an update of:
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628303.html

Changes since last version of patch set:
- "dg-skip-if"-related Changes of the g++.dg/torture/vshuf* testcases are 
reverted.
   (Replaced by __builtin_shuffle fix)
- Add fix of __builtin_shuffle() for Loongson SX/ASX (Implemeted by adding
   vand/xvand insn in front of shuffle operation). There's no significant 
performance
   impact in current state.
- Rebased on the top of Yang Yujie's latest target configuration interface 
patch set
   (https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628772.html).

Brief history of patch set:
v1 -> v2:
- Reduce usage of "unspec" in RTL template.
- Append Support of ADDR_REG_REG in LSX and LASX.
- Constraint docs are appended in gcc/doc/md.texi and ccomment block.
- Codes related to vecarg are removed.
- Testsuite of LSX and LASX is added in v2. (Because of the size limitation of
   mail list, these patches are not shown)
- Adjust the loongarch_expand_vector_init() function to reduce instruction
output amount.
- Some minor implementation changes of RTL templates.

v2 -> v3:
- Revert vabsd/xvabsd RTL templates to unspec impl.
- Resolve warning in gcc/config/loongarch/loongarch.cc when bootstrapping
   with BOOT_CFLAGS="-O2 -ftree-vectorize -fno-vect-cost-model -mlasx".
- Remove redundant definitions in lasxintrin.h.
- Refine commit info.

v3 -> v4:
- Code simplification.
- Testsuite patches are splited from this patch set again and will be
   submitted independently in the future.

v4 -> v5:
- Regression test fix (pr54346.c)
- Combine vilvh/xvilvh insn's RTL template impl.
- Add dg-skip-if for loongarch*-*-* in vshuf test inside g++.dg/torture
   (reverted in this version)

Lulu Cheng (4):
   LoongArch: Add Loongson SX base instruction support.
   LoongArch: Add Loongson SX directive builtin function support.
   LoongArch: Add Loongson ASX base instruction support.
   LoongArch: Add Loongson ASX directive builtin function support.

  gcc/config.gcc|2 +-
  gcc/config/loongarch/constraints.md   |  131 +-
  gcc/config/loongarch/genopts/loongarch.opt.in |4 +
  gcc/config/loongarch/lasx.md  | 5104 
  gcc/config/loongarch/lasxintrin.h | 5338 +
  gcc/config/loongarch/loongarch-builtins.cc| 2686 -
  gcc/config/loongarch/loongarch-ftypes.def |  666 +-
  gcc/config/loongarch/loongarch-modes.def  |   39 +
  gcc/config/loongarch/loongarch-protos.h   |   35 +
  gcc/config/loongarch/loongarch.cc | 4751 ++-
  gcc/config/loongarch/loongarch.h  |  117 +-
  gcc/config/loongarch/loongarch.md |   56 +-
  gcc/config/loongarch/loongarch.opt|4 +
  gcc/config/loongarch/lsx.md   | 4467 ++
  gcc/config/loongarch/lsxintrin.h  | 5181 
  gcc/config/loongarch/predicates.md|  333 +-
  gcc/doc/md.texi   |   11 +
  17 files changed, 28645 insertions(+), 280 deletions(-)
  create mode 100644 gcc/config/loongarch/lasx.md
  create mode 100644 gcc/config/loongarch/lasxintrin.h
  create mode 100644 gcc/config/loongarch/lsx.md
  create mode 100644 gcc/config/loongarch/lsxintrin.h

Re: [PATCH v2] RISC-V: Optimize the MASK opt generation

[Kito Cheng via Gcc-patches]

Hi Feng:

Thanks for the simplification, that reduces the effort of adding a new
extension!
Functional part looks good, but I think we may document that new
syntax at gcc/gcc/doc/options.texi

On Thu, Aug 31, 2023 at 11:32 AM Feng Wang  wrote:
>
> This patch rebases the change of "[PATCH] RISC-V: Optimize the MASK opt
> generation". Please check the detail info on the
> "https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg302295.html";
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-opts.h (MASK_ZICSR):
> (MASK_ZIFENCEI): Delete;
> (MASK_ZIHINTNTL):Ditto;
> (MASK_ZIHINTPAUSE):  Ditto;
> (TARGET_ZICSR):  Ditto;
> (TARGET_ZIFENCEI):   Ditto;
> (TARGET_ZIHINTNTL):  Ditto;
> (TARGET_ZIHINTPAUSE):Ditto;
> (MASK_ZAWRS):Ditto;
> (TARGET_ZAWRS):  Ditto;
> (MASK_ZBA):  Ditto;
> (MASK_ZBB):  Ditto;
> (MASK_ZBC):  Ditto;
> (MASK_ZBS):  Ditto;
> (TARGET_ZBA):Ditto;
> (TARGET_ZBB):Ditto;
> (TARGET_ZBC):Ditto;
> (TARGET_ZBS):Ditto;
> (MASK_ZFINX):Ditto;
> (MASK_ZDINX):Ditto;
> (MASK_ZHINX):Ditto;
> (MASK_ZHINXMIN): Ditto;
> (TARGET_ZFINX):  Ditto;
> (TARGET_ZDINX):  Ditto;
> (TARGET_ZHINX):  Ditto;
> (TARGET_ZHINXMIN):   Ditto;
> (MASK_ZBKB): Ditto;
> (MASK_ZBKC): Ditto;
> (MASK_ZBKX): Ditto;
> (MASK_ZKNE): Ditto;
> (MASK_ZKND): Ditto;
> (MASK_ZKNH): Ditto;
> (MASK_ZKR):  Ditto;
> (MASK_ZKSED):Ditto;
> (MASK_ZKSH): Ditto;
> (MASK_ZKT):  Ditto;
> (TARGET_ZBKB):   Ditto;
> (TARGET_ZBKC):   Ditto;
> (TARGET_ZBKX):   Ditto;
> (TARGET_ZKNE):   Ditto;
> (TARGET_ZKND):   Ditto;
> (TARGET_ZKNH):   Ditto;
> (TARGET_ZKR):Ditto;
> (TARGET_ZKSED):  Ditto;
> (TARGET_ZKSH):   Ditto;
> (TARGET_ZKT):Ditto;
> (MASK_ZTSO): Ditto;
> (TARGET_ZTSO):   Ditto;
> (MASK_VECTOR_ELEN_32):   Ditto;
> (MASK_VECTOR_ELEN_64):   Ditto;
> (MASK_VECTOR_ELEN_FP_32):Ditto;
> (MASK_VECTOR_ELEN_FP_64):Ditto;
> (MASK_VECTOR_ELEN_FP_16):Ditto;
> (TARGET_VECTOR_ELEN_32): Ditto;
> (TARGET_VECTOR_ELEN_64): Ditto;
> (TARGET_VECTOR_ELEN_FP_32):Ditto;
> (TARGET_VECTOR_ELEN_FP_64):Ditto;
> (TARGET_VECTOR_ELEN_FP_16):Ditto;
>  (MASK_ZVBB):   Ditto;
> (MASK_ZVBC):   Ditto;
> (TARGET_ZVBB): Ditto;
> (TARGET_ZVBC): Ditto;
> (MASK_ZVKG):   Ditto;
> (MASK_ZVKNED): Ditto;
> (MASK_ZVKNHA): Ditto;
> (MASK_ZVKNHB): Ditto;
> (MASK_ZVKSED): Ditto;
> (MASK_ZVKSH):  Ditto;
> (MASK_ZVKN):   Ditto;
> (MASK_ZVKNC):  Ditto;
> (MASK_ZVKNG):  Ditto;
> (MASK_ZVKS):   Ditto;
> (MASK_ZVKSC):  Ditto;
> (MASK_ZVKSG):  Ditto;
> (MASK_ZVKT):   Ditto;
> (TARGET_ZVKG): Ditto;
> (TARGET_ZVKNED):   Ditto;
> (TARGET_ZVKNHA):   Ditto;
> (TARGET_ZVKNHB):   Ditto;
> (TARGET_ZVKSED):   Ditto;
> (TARGET_ZVKSH):Ditto;
> (TARGET_ZVKN): Ditto;
> (TARGET_ZVKNC):Ditto;
> (TARGET_ZVKNG):Ditto;
> (TARGET_ZVKS): Ditto;
> (TARGET_ZVKSC):Ditto;
> (TARGET_ZVKSG):Ditto;
> (TARGET_ZVKT): Ditto;
> (MASK_ZVL32B): Ditto;
> (MASK_ZVL64B): Ditto;
> (MASK_ZVL128B):Ditto;
> (MASK_ZVL256B):Ditto;
> (MASK_ZVL512B):Ditto;
> (MASK_ZVL1024B):   Ditto;
> (MASK_ZVL2048B):   Ditto;
> (MASK_ZVL4096B):   Ditto;
> (MASK_ZVL8192B):   Ditto;
> (MASK_ZVL16384B):  Ditto;
> (MASK_ZVL32768B):  Ditto;
> (MASK_ZVL65536B):  Ditto;
> (TARGET_ZVL32B):   Ditto;
> (TARGET_ZVL64B):   Ditto;
> (TARGET_ZVL128B):  Ditto;
> (TARGET_ZVL256B):  Ditto;
> (TARGET_ZVL512B):  Ditto;
> (TARGET_ZVL1024B): Ditto;
> (TARGET_ZVL2048B): Ditto;
> (TARGET_ZVL4096B): Ditto;
> (TARGET_ZVL8192B): Ditto;
> (TARGET_ZVL16384B):Ditto;
> (TARGET_ZVL32768B):Ditto;
> (TARGET_ZVL65536B):Ditto;
> (MASK_ZICBOZ): Ditto;
> (MASK_ZICBOM): Ditto;
> (MASK_ZICBOP):

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Xi Ruoyao via Gcc-patches]

On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:
>  /* Note: optimize_size may vary across functions,
>     while -m[no]-memcpy imposes a global constraint.  */
>  #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P 
> loongarch_do_optimize_block_move_p()
>  
> -#ifndef HAVE_AS_EXPLICIT_RELOCS
> -#define HAVE_AS_EXPLICIT_RELOCS 0
> -#endif
> -

This causes a build failure with older assembler:

options.cc:3040:3: error: 'HAVE_AS_EXPLICIT_RELOCS' was not declared in this 
scope; did you mean 'TARGET_EXPLICIT_RELOCS'?
 3040 |   HAVE_AS_EXPLICIT_RELOCS, /* TARGET_EXPLICIT_RELOCS */
  |   ^~~
  |   TARGET_EXPLICIT_RELOCS

Why this is removed?  If this is an unintentionally change I'll add it
back.

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University

Re: [PATCH] analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [PR96395]

[David Malcolm via Gcc-patches]

On Mon, 2023-09-04 at 20:00 +0200, priour...@gmail.com wrote:


> Hi,
> 
> The second patch of this serie.
> Regstrapped on x86_64-linux-gnu off trunk 
> a7d052b3200c7928d903a0242b8cfd75d131e374.

Thanks for the patch.

Overall, looks like great work, but there are a few nitpicks to be
fixed, see below...

[...snip...]
 
> Second batch of moving tests from under gcc.dg/analyzer into
> c-c++-common/analyzer.
> 
> Prior to this patch the analyzer was not unwrapping ordering
> binop_svalue, such as LT_EXPR, when evaluating conditions.
> 
> Therefore when an ordering conditional was stored, the analyzer
> was missing out on some constraints, which led to false positives.
> 
> Signed-off-by: benjamin priour 

[...snip...]

>   * gcc.dg/analyzer/inlining-7.c: Moved to...
>   * c-c++-common/analyzer/inlining-7.c: ...here.
>   * c-c++-common/analyzer/compound-assignment-1.c: New test.

All of these "new" tests (apart from the "-noexcept" ones) look like
they're meant to be existing tests that were moved, but where the copy
of the test in gcc.dg/analyzer didn't get deleted, so they show up as a
duplicate.  See the details below.

>   * c-c++-common/analyzer/file-pr58237-noexcept.c: New test.

When duplicating a test like this, the test isn't entirely "new", so
please say something like this in the ChangeLog entry, to make it clear
where it came from:

* c-c++-common/analyzer/file-pr58237-noexcept.c: New test,
based on gcc.dg/analyzer/file-pr58237.c.

>   * c-c++-common/analyzer/fopen-2.c: New test.

Looks fopen-2.c is a move of the parts of gcc.dg/analyzer/fopen-1.c
that can also be C++, so please state that in the ChangeLog.

>   * c-c++-common/analyzer/infinite-recursion.c: New test.
>   * c-c++-common/analyzer/malloc-paths-9-noexcept.c: New test.

Likewise, please say where the -noexcept.c test came from.


>   * c-c++-common/analyzer/pr109577-noexcept.c: New test.

Likewise for this -noexcept test.

>   * c-c++-common/analyzer/pr93355-localealias-feasibility-noexcept.c: New 
> test.

Likewise for this -noexcept test.

>   * c-c++-common/analyzer/pr94362-1.c: New test.
>   * c-c++-common/analyzer/pr99193-1-noexcept.c: New test.

Likewise for this -noexcept test.

>   * c-c++-common/analyzer/scope-1.c: New test.
>   * c-c++-common/analyzer/setjmp-2.c: New test.
>   * c-c++-common/analyzer/setjmp-5.c: New test.
>   * c-c++-common/analyzer/setjmp-9.c: New test.
>   * c-c++-common/analyzer/signal-4a.c: New test.
>   * c-c++-common/analyzer/signal-4b.c: New test.

[...snip...]

> diff --git a/gcc/analyzer/region-model.cc b/gcc/analyzer/region-model.cc
> index 82bc3b2c382..43b4bc1cc5b 100644
> --- a/gcc/analyzer/region-model.cc
> +++ b/gcc/analyzer/region-model.cc
> @@ -4486,6 +4486,14 @@ region_model::add_constraints_from_binop (const svalue 
> *outer_lhs,
> return true;
>   }
>return false;
> +case GE_EXPR:
> +case GT_EXPR:
> +case LE_EXPR:
> +case LT_EXPR:
> +  if (!is_true)
> + inner_op = invert_tree_comparison (inner_op, false /* honor_nans */);
> +  *out = add_constraint (inner_lhs, inner_op, inner_rhs, ctxt);
> +  return true;
>  }
>  }
>  

Nice - thanks.

Can this be combined with the EQ_EXPR and NE_EXPR cases? (possibly
updating the comment)  The code looks identical to me, but I might be
misreading it.

[...snip...]

> diff --git a/gcc/testsuite/c-c++-common/analyzer/compound-assignment-1.c 
> b/gcc/testsuite/c-c++-common/analyzer/compound-assignment-1.c
> new file mode 100644
> index 000..b208f58f09f
> --- /dev/null
> +++ b/gcc/testsuite/c-c++-common/analyzer/compound-assignment-1.c
> @@ -0,0 +1,72 @@
> +#include 
> +
> +struct ptr_wrapper
> +{
> +  int *ptr;
> +};
> +
> +struct ptr_wrapper
> +test_1 (void)
> +{
> +  struct ptr_wrapper r;
> +  r.ptr = (int *) malloc (sizeof (int));
> +  return r;
> +}

This looks the same as gcc.dg/analyzer/compound-assignment-1.c

Should this be a move, rather than a new file?  i.e. is the patch
missing a deletion of the file in the old location?

[...snip...]

> diff --git a/gcc/testsuite/c-c++-common/analyzer/infinite-recursion.c 
> b/gcc/testsuite/c-c++-common/analyzer/infinite-recursion.c
> new file mode 100644
> index 000..6b7d25cfabe
> --- /dev/null
> +++ b/gcc/testsuite/c-c++-common/analyzer/infinite-recursion.c

Likewise here for infinite-recursion.c.

[...snip...]

> diff --git 
> a/gcc/testsuite/gcc.dg/analyzer/loop-0-up-to-n-by-1-with-iter-obj.c 
> b/gcc/testsuite/c-c++-common/analyzer/loop-0-up-to-n-by-1-with-iter-obj.c
> similarity index 97%
> rename from gcc/testsuite/gcc.dg/analyzer/loop-0-up-to-n-by-1-with-iter-obj.c
> rename to 
> gcc/testsuite/c-c++-common/analyzer/loop-0-up-to-n-by-1-with-iter-obj.c
> index 0172c9b324c..1b657697ef4 100644
> --- a/gcc/testsuite/gcc.dg/analyzer/loop-0-up-to-n-by-1-with-iter-obj.c
> +++ b/gcc/testsuite/c-c++-common/analyzer/loop-0-up-to-n-by-1-with-iter-obj.c
> @@ -1,6 

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[chenglulu]

在 2023/9/5 下午7:51, Xi Ruoyao 写道:

On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:

  /* Note: optimize_size may vary across functions,
     while -m[no]-memcpy imposes a global constraint.  */
  #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P
loongarch_do_optimize_block_move_p()
  
-#ifndef HAVE_AS_EXPLICIT_RELOCS

-#define HAVE_AS_EXPLICIT_RELOCS 0
-#endif
-

This causes a build failure with older assembler:

options.cc:3040:3: error: 'HAVE_AS_EXPLICIT_RELOCS' was not declared in this 
scope; did you mean 'TARGET_EXPLICIT_RELOCS'?
  3040 |   HAVE_AS_EXPLICIT_RELOCS, /* TARGET_EXPLICIT_RELOCS */
   |   ^~~
   |   TARGET_EXPLICIT_RELOCS

Why this is removed?  If this is an unintentionally change I'll add it
back.


Sorry, this was deleted accidentally.

Thanks!

Re: [PATCH 2/2] [RISC-V] Enalble zcmp for -Os

[Kito Cheng via Gcc-patches]

> @@ -5569,7 +5571,9 @@ riscv_avoid_multi_push (const struct riscv_frame_info 
> *frame)
>  {
>if (!TARGET_ZCMP || crtl->calls_eh_return || frame_pointer_needed
>|| cfun->machine->interrupt_handler_p || cfun->machine->varargs_size 
> != 0
> -  || crtl->args.pretend_args_size != 0 || flag_shrink_wrap_separate
> +  || crtl->args.pretend_args_size != 0
> +  || (use_shrink_wrapping_separate ()
> + && !riscv_avoid_shrink_wrapping_separate ())

I think we should also check "!optimize_function_for_size_p (cfun)"
here, otherwise that does not really match what we claim in the commit
message.

e.g. it still will enable with -O2 -fno-shrink-wrap-separate

>|| (frame->mask & ~MULTI_PUSH_GPR_MASK))
>  return true;
>

[PATCH v2] RISC-V: Fix Zicond ICE on large constants

[Tsukasa OI via Gcc-patches]

From: Tsukasa OI 

Large constant cons and/or alt will trigger ICEs building GCC target
libraries (libgomp and libatomic) when the 'Zicond' extension is enabled.

For instance, zicond-ice-2.c (new test case in this commit) will cause
an ICE when SOME_NUMBER is 0x1000 or larger.  While opposite numbers
corresponding cons/alt (two temp2 variables) are checked, cons/alt
themselves are not checked and causing 2 ICEs building
GCC target libraries as of this writing:

1.  gcc/libatomic/config/posix/lock.c
2.  gcc/libgomp/fortran.c

Coercing a large value into a register will fix the issue.

It also coerce a large cons into a register on "imm, imm" case (the author
could not reproduce but possible to cause an ICE).

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_expand_conditional_move): Force
large constant cons/alt into a register.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/zicond-ice-2.c: New test.  This is based on
an ICE at libat_lock_n func on gcc/libatomic/config/posix/lock.c
but heavily minimized.
---
 gcc/config/riscv/riscv.cc | 21 +--
 gcc/testsuite/gcc.target/riscv/zicond-ice-2.c | 11 ++
 2 files changed, 26 insertions(+), 6 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/zicond-ice-2.c

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 8d8f7b4f16ed..e306d57814be 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3917,6 +3917,11 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx 
cons, rtx alt)
  gen_rtx_IF_THEN_ELSE (mode, cond,
CONST0_RTX (mode),
alt)));
+ /* CONS might not fit into a signed 12 bit immediate suitable
+for an addi instruction.  If that's the case, force it
+into a register.  */
+ if (!SMALL_OPERAND (INTVAL (cons)))
+   cons = force_reg (mode, cons);
  riscv_emit_binary (PLUS, dest, dest, cons);
  return true;
}
@@ -3940,11 +3945,13 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx 
cons, rtx alt)
  rtx temp1 = gen_reg_rtx (mode);
  rtx temp2 = gen_int_mode (-1 * INTVAL (cons), mode);
 
- /* TEMP2 might not fit into a signed 12 bit immediate suitable
-for an addi instruction.  If that's the case, force it into
-a register.  */
+ /* TEMP2 and/or CONS might not fit into a signed 12 bit immediate
+suitable for an addi instruction.  If that's the case, force it
+into a register.  */
  if (!SMALL_OPERAND (INTVAL (temp2)))
temp2 = force_reg (mode, temp2);
+ if (!SMALL_OPERAND (INTVAL (cons)))
+   cons = force_reg (mode, cons);
 
  riscv_emit_binary (PLUS, temp1, alt, temp2);
  emit_insn (gen_rtx_SET (dest,
@@ -3986,11 +3993,13 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx 
cons, rtx alt)
  rtx temp1 = gen_reg_rtx (mode);
  rtx temp2 = gen_int_mode (-1 * INTVAL (alt), mode);
 
- /* TEMP2 might not fit into a signed 12 bit immediate suitable
-for an addi instruction.  If that's the case, force it into
-a register.  */
+ /* TEMP2 and/or ALT might not fit into a signed 12 bit immediate
+suitable for an addi instruction.  If that's the case, force it
+into a register.  */
  if (!SMALL_OPERAND (INTVAL (temp2)))
temp2 = force_reg (mode, temp2);
+ if (!SMALL_OPERAND (INTVAL (alt)))
+   alt = force_reg (mode, alt);
 
  riscv_emit_binary (PLUS, temp1, cons, temp2);
  emit_insn (gen_rtx_SET (dest,
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-ice-2.c 
b/gcc/testsuite/gcc.target/riscv/zicond-ice-2.c
new file mode 100644
index ..ffd8dcb5814e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zicond-ice-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zicond -mabi=lp64d" { target { rv64 } } } */
+/* { dg-options "-march=rv32gc_zicond -mabi=ilp32d" { target { rv32 } } } */
+
+#define SOME_NUMBER 0x1000
+
+unsigned long
+d (unsigned long n)
+{
+  return n > SOME_NUMBER ? SOME_NUMBER : n;
+}

base-commit: 72b639760a891c406725854bfb08132c83f0761a
-- 
2.42.0

[PATCH v3 0/1] RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support

[Tsukasa OI via Gcc-patches]

PATCH v1:

PATCH v2:


Changes: v1 -> v2
*   Removed bogus opt2 pattern as pointed out in:

note that this is not in the ChangeLog expecting the patch above
applies first.

Changes: v2 -> v3
*   Instead of removing opt2 pattern, fix opt2 pattern:





Tsukasa OI (1):
  RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support

 gcc/common/config/riscv/riscv-common.cc   |  2 +
 gcc/config/riscv/riscv-opts.h |  6 +++
 gcc/config/riscv/riscv.cc |  4 +-
 gcc/config/riscv/riscv.md |  2 +-
 gcc/config/riscv/riscv.opt|  3 ++
 gcc/config/riscv/zicond.md| 51 +++
 .../xventanacondops-primitiveSemantics-rv32.c | 45 
 .../xventanacondops-primitiveSemantics.c  | 48 +
 .../gcc.target/riscv/xventanacondops-xor-01.c | 14 +
 9 files changed, 162 insertions(+), 13 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics-rv32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/xventanacondops-xor-01.c


base-commit: 72b639760a891c406725854bfb08132c83f0761a
-- 
2.42.0

[PATCH v3 1/1] RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support

[Tsukasa OI via Gcc-patches]

From: Tsukasa OI 

'XVentanaCondOps' is a vendor extension from Ventana Micro Systems
containing two instructions for conditional move and will be supported on
their Veyron V1 CPU.

And most notably (for historical reasons), 'XVentanaCondOps' and the
standard 'Zicond' extension are functionally equivalent (only encodings and
instruction names are different).

*   czero.eqz == vt.maskc
*   czero.nez == vt.maskcn

This commit adds support for the 'XVentanaCondOps' extension by extending
'Zicond' extension support.  With this, we can now reuse the optimization
using the 'Zicond' extension for the 'XVentanaCondOps' extension.

The specification for the 'XVentanaCondOps' extension is based on:


gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
Parse 'XVentanaCondOps' extension.
* config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
(TARGET_XVENTANACONDOPS): Ditto.
(TARGET_ZICOND_LIKE): New to represent targets with conditional
moves like 'Zicond'.  It includes RV64 + 'XVentanaCondOps'.
* config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
with TARGET_ZICOND_LIKE.
(riscv_expand_conditional_move): Ditto.
* config/riscv/riscv.md (movcc): Replace TARGET_ZICOND with
TARGET_ZICOND_LIKE.
* config/riscv/riscv.opt: Add new riscv_xventana_subext.
* config/riscv/zicond.md: Modify description.
(eqz_ventana): New to match corresponding czero instructions.
(nez_ventana): Ditto.
(*czero..): Emit a 'XVentanaCondOps' instruction if
'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
(*czero..): Ditto.
(*czero.eqz..opt1): Ditto.
(*czero.nez..opt2): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/xventanacondops-primitiveSemantics.c: New test,
modified from zicond-primitiveSemantics.c.
* gcc.target/riscv/xventanacondops-primitiveSemantics-rv32.c: New
test to make sure that XVentanaCondOps instructions are disabled
on RV32.
* gcc.target/riscv/xventanacondops-xor-01.c: New test, modified
from zicond-xor-01.c.
---
 gcc/common/config/riscv/riscv-common.cc   |  2 +
 gcc/config/riscv/riscv-opts.h |  6 +++
 gcc/config/riscv/riscv.cc |  4 +-
 gcc/config/riscv/riscv.md |  2 +-
 gcc/config/riscv/riscv.opt|  3 ++
 gcc/config/riscv/zicond.md| 51 +++
 .../xventanacondops-primitiveSemantics-rv32.c | 45 
 .../xventanacondops-primitiveSemantics.c  | 48 +
 .../gcc.target/riscv/xventanacondops-xor-01.c | 14 +
 9 files changed, 162 insertions(+), 13 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics-rv32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/xventanacondops-xor-01.c

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index f142212f2edc..9a0a68fe5db3 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -1493,6 +1493,8 @@ static const riscv_ext_flag_table_t 
riscv_ext_flag_table[] =
   {"xtheadmempair", &gcc_options::x_riscv_xthead_subext, MASK_XTHEADMEMPAIR},
   {"xtheadsync",&gcc_options::x_riscv_xthead_subext, MASK_XTHEADSYNC},
 
+  {"xventanacondops", &gcc_options::x_riscv_xventana_subext, 
MASK_XVENTANACONDOPS},
+
   {NULL, NULL, 0}
 };
 
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index b6b5907e111b..a525f679683c 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -321,6 +321,12 @@ enum riscv_entity
 #define TARGET_XTHEADMEMPAIR ((riscv_xthead_subext & MASK_XTHEADMEMPAIR) != 0)
 #define TARGET_XTHEADSYNC((riscv_xthead_subext & MASK_XTHEADSYNC) != 0)
 
+#define MASK_XVENTANACONDOPS  (1 << 0)
+
+#define TARGET_XVENTANACONDOPS ((riscv_xventana_subext & MASK_XVENTANACONDOPS) 
!= 0)
+
+#define TARGET_ZICOND_LIKE (TARGET_ZICOND || (TARGET_XVENTANACONDOPS && 
TARGET_64BIT))
+
 /* We only enable VLS modes for VLA vectorization since fixed length VLMAX mode
is the highest priority choice and should not conflict with VLS modes.  */
 #define TARGET_VECTOR_VLS  
\
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 8d8f7b4f16ed..eb10f4a3323f 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2745,7 +2745,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno ATTRIBUTE_UN
  *total = COSTS_N_INSNS (1);
  return true;
}
-  else if (TARGET_ZICOND
+  else if (TARGET

RE: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

[Li, Pan2 via Gcc-patches]

Committed, thanks Juzhe.

Pan

From: juzhe.zh...@rivai.ai 
Sent: Tuesday, September 5, 2023 7:14 PM
To: Li, Pan2 ; gcc-patches 
Cc: Li, Pan2 ; Wang, Yanzhang ; 
kito.cheng 
Subject: Re: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode

LGTM


juzhe.zh...@rivai.ai

From: pan2.li
Date: 2023-09-05 18:32
To: gcc-patches
CC: juzhe.zhong; 
pan2.li; 
yanzhang.wang; 
kito.cheng
Subject: [PATCH v1] RISC-V: Support FP SGNJ autovec for VLS mode
From: Pan Li mailto:pan2...@intel.com>>

This patch would like to allow the VLS mode autovec for the
floating-point binary operation MAX/MIN.

Given below code example:

void test(float * restrict out, float * restrict in1, float * restrict in2)
{
  for (int i = 0; i < 128; i++)
out[i] = __builtin_copysignf (in1[i], in2[i]);
}

Before this patch:
test:
  csrra4,vlenb
  sllia4,a4,1
  li  a5,128
  bleua5,a4,.L2
  mv  a5,a4
.L2:
  vsetvli zero,a5,e32,m8,ta,ma
  vle32.v v8,0(a1)
  vle32.v v16,0(a2)
  vsetvli a4,zero,e32,m8,ta,ma
  vfsgnj.vv   v8,v8,v16
  vsetvli zero,a5,e32,m8,ta,ma
  vse32.v v8,0(a0)
  ret

After this patch:
test:
  li  a5,128
  vsetvli zero,a5,e32,m1,ta,ma
  vle32.v v1,0(a1)
  vle32.v v2,0(a2)
  vfsgnj.vv   v1,v1,v2
  vse32.v v1,0(a0)
  ret

Signed-off-by: Pan Li mailto:pan2...@intel.com>>

gcc/ChangeLog:

* config/riscv/autovec-vls.md (copysign3): New pattern.
* config/riscv/vector.md: Extend iterator for VLS.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: New macro.
* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c: New test.
---
gcc/config/riscv/autovec-vls.md   | 22 ++
gcc/config/riscv/vector.md| 24 +--
.../gcc.target/riscv/rvv/autovec/vls/def.h|  8 
.../rvv/autovec/vls/floating-point-sgnj-1.c   | 43 +++
.../rvv/autovec/vls/floating-point-sgnj-2.c   | 43 +++
5 files changed, 128 insertions(+), 12 deletions(-)
create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-1.c
create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnj-2.c

diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md
index 7ef29637e33..31b6c4ae714 100644
--- a/gcc/config/riscv/autovec-vls.md
+++ b/gcc/config/riscv/autovec-vls.md
@@ -255,6 +255,28 @@ (define_insn_and_split "3"
[(set_attr "type" "vector")]
)
+;; -
+;; Includes:
+;; - vfsgnj.vv
+;; - vfsgnj.vf
+;; -
+(define_insn_and_split "copysign3"
+  [(set (match_operand:VLSF 0 "register_operand")
+(unspec:VLSF
+  [(match_operand:VLSF  1 "register_operand")
+   (match_operand:VLSF  2 "register_operand")] UNSPEC_VCOPYSIGN))]
+  "TARGET_VECTOR && can_create_pseudo_p ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+  {
+riscv_vector::emit_vlmax_insn (code_for_pred (UNSPEC_VCOPYSIGN, 
mode),
+riscv_vector::BINARY_OP, operands);
+DONE;
+  }
+  [(set_attr "type" "vector")]
+)
+
;; 
---
;;  [INT] Unary operations
;; 
---
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 9d7b4bbe1d4..fc985ff6a01 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -6166,8 +6166,8 @@ (define_insn "@pred__reverse_scalar"
(symbol_ref "riscv_vector::get_frm_mode (operands[9])"))])
(define_insn "@pred_"
-  [(set (match_operand:VF 0 "register_operand"   "=vd, vd, vr, vr")
- (if_then_else:VF
+  [(set (match_operand:V_VLSF 0 "register_operand"   "=vd, vd, vr, vr")
+ (if_then_else:V_VLSF
  (unspec:
[(match_operand: 1 "vector_mask_operand" " vm, vm,Wc1,Wc1")
 (match_operand 5 "vector_length_operand"" rK, rK, rK, rK")
@@ -6176,10 +6176,10 @@ (define_insn "@pred_"
 (match_operand 8 "const_int_operand""  i,  i,  i,  i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
-   (unspec:VF
- [(match_operand:VF 3 "register_operand"   " vr, vr, vr, vr")
-  (match_operand:VF 4 "register_operand"   " vr, vr, vr, vr")] 
VCOPYSIGNS)
-   (match_operand:VF 2 "vector_merge_operand" " vu,  0, vu,  0")))]
+   (unspec:V_VLSF
+ [(match_operand:V_VLSF 3 "register_operand"  " vr, vr, vr, vr")
+  (match_operand:V_VLSF 4 "register_operand"  " vr, vr, vr, vr")] 
VCOPYSIGNS)
+   (match_operand:V_VLSF 2 "vector_merge_operand" " vu,  0, vu,  0")))]
   "TARGET_VECTOR"
   "vfsgnj.vv\t%0,%3,%4%p1"
   [(set_attr "type" "vfsgnj"

Re: [PATCH] RISC-V: Emit .note.GNU-stack for non-linux target as well

[Kito Cheng via Gcc-patches]

committed, thanks :)

On Tue, Sep 5, 2023 at 3:18 PM Jeff Law via Gcc-patches
 wrote:
>
>
>
> On 8/31/23 03:05, Kito Cheng wrote:
> > We only emit that on linux target before, that not problem before,
> > however Qemu has fix a bug to make qemu user mode honor PT_GNU_STACK[1],
> > that will cause problem when we test baremetal with qemu.
> >
> > So the straightforward is enable that as well for non-linux toolchian,
> > the price is that will increase few bytes for each binary.
> >
> > [1] 
> > https://github.com/qemu/qemu/commit/872f3d046f2381e3f416519e82df96bd60818311
> >
> > gcc/ChangeLog:
> >
> >   * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
> >   * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
> OK.
> jeff

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Xi Ruoyao via Gcc-patches]

On Tue, 2023-09-05 at 20:01 +0800, chenglulu wrote:
> 
> 在 2023/9/5 下午7:51, Xi Ruoyao 写道:
> > On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:
> > >   /* Note: optimize_size may vary across functions,
> > >  while -m[no]-memcpy imposes a global constraint.  */
> > >   #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P
> > > loongarch_do_optimize_block_move_p()
> > >   
> > > -#ifndef HAVE_AS_EXPLICIT_RELOCS
> > > -#define HAVE_AS_EXPLICIT_RELOCS 0
> > > -#endif
> > > -
> > This causes a build failure with older assembler:
> > 
> > options.cc:3040:3: error: 'HAVE_AS_EXPLICIT_RELOCS' was not declared in 
> > this scope; did you mean 'TARGET_EXPLICIT_RELOCS'?
> >   3040 |   HAVE_AS_EXPLICIT_RELOCS, /* TARGET_EXPLICIT_RELOCS */
> >    |   ^~~
> >    |   TARGET_EXPLICIT_RELOCS
> > 
> > Why this is removed?  If this is an unintentionally change I'll add it
> > back.
> > 
> Sorry, this was deleted accidentally.
> 
> Thanks!

Added the 3 lines back at r14-3706.

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University

testsuite: Port 'check-function-bodies' to nvptx (was: Add dg test for matching function bodies)

[Thomas Schwinge]

Hi!

On 2023-09-04T23:05:05+0200, I wrote:
> On 2019-07-16T15:04:49+0100, Richard Sandiford  
> wrote:
>> This patch therefore adds a new check-function-bodies dg-final test

>> The regexps in parse_function_bodies are fairly general, but might
>> still need to be extended in future for targets like Darwin or AIX.
>
> ..., or nvptx.  [...]

> number of TODO items.
>
> In particular how to parameterize regular expressions for the different
> syntax used by nvptx: for example, parameterize via global variables,
> initialized accordingly (where?)?  Thinking about it, maybe simply
> conditionalizing the current local initializations by
> 'if { [istarget nvptx-*-*] } { [...] } else { [...] }' will do, simple
> enough!

Indeed that works fine.

> Regarding whitespace prefixed, I think I'll go with the current
> 'append function_regexp "\t" $line "\n"', that is, prefix expected output
> lines with '\t' (as done in 'gcc.target/nvptx/abort.c'), and also for
> nvptx handle labels as "fluff" (until we solve that issue generally).

I changed my mind about that: instead of '\t', use '\t*' for nvptx, which
means that both instructions emitted with additional whitespace prefixed
and labels in column zero work nicely.

> --- a/gcc/testsuite/lib/scanasm.exp
> +++ b/gcc/testsuite/lib/scanasm.exp

> @@ -907,7 +911,8 @@ proc check-function-bodies { args } {
>
>  set count 0
>  set function_regexp ""
> -set label {^(\S+):$}
> +#TODO
> +set label {^// BEGIN GLOBAL FUNCTION DEF: ([a-zA-Z_]\S+)$}

There's actually no reason that the expected output syntax (this one) has
to match the assembly -- so I restored that, to use the same syntax for
nvptx here, too.

Any comments before I push the attached
"testsuite: Port 'check-function-bodies' to nvptx"?


Grüße
 Thomas


-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955
>From bdaf7572d9d4c1988274405840de4071ded3733f Mon Sep 17 00:00:00 2001
From: Thomas Schwinge 
Date: Mon, 4 Sep 2023 22:28:12 +0200
Subject: [PATCH] testsuite: Port 'check-function-bodies' to nvptx

This extends commit 4d706ff86ea86868615558e92407674a4f4b4af9
"Add dg test for matching function bodies" for nvptx.

	gcc/testsuite/
	* lib/scanasm.exp (configure_check-function-bodies): New proc.
	(parse_function_bodies, check-function-bodies): Use it.
	* gcc.target/nvptx/abort.c: Use 'check-function-bodies'.
	gcc/
	* doc/sourcebuild.texi (check-function-bodies): Update.
---
 gcc/doc/sourcebuild.texi   |  9 ++-
 gcc/testsuite/gcc.target/nvptx/abort.c | 19 ++-
 gcc/testsuite/lib/scanasm.exp  | 76 --
 3 files changed, 83 insertions(+), 21 deletions(-)

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 1a78b3c1abb..8aec6b6592c 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -3327,9 +3327,12 @@ The first line of the expected output for a function @var{fn} has the form:
 Subsequent lines of the expected output also start with @var{prefix}.
 In both cases, whitespace after @var{prefix} is not significant.
 
-The test discards assembly directives such as @code{.cfi_startproc}
-and local label definitions such as @code{.LFB0} from the compiler's
-assembly output.  It then matches the result against the expected
+Depending on the configuration (see
+@code{gcc/testsuite/lib/scanasm.exp:configure_check-function-bodies}),
+the test may discard from the compiler's assembly output
+directives such as @code{.cfi_startproc},
+local label definitions such as @code{.LFB0}, and more.
+It then matches the result against the expected
 output for a function as a single regular expression.  This means that
 later lines can use backslashes to refer back to @samp{(@dots{})}
 captures on earlier lines.  For example:
diff --git a/gcc/testsuite/gcc.target/nvptx/abort.c b/gcc/testsuite/gcc.target/nvptx/abort.c
index d3220687400..ae9dbf45a9b 100644
--- a/gcc/testsuite/gcc.target/nvptx/abort.c
+++ b/gcc/testsuite/gcc.target/nvptx/abort.c
@@ -1,4 +1,6 @@
 /* { dg-do compile} */
+/* { dg-final { check-function-bodies {**} {} } } */
+
 /* Annotate no return functions with a trailing 'trap'.  */
 
 extern void abort ();
@@ -9,5 +11,18 @@ int main (int argc, char **argv)
 abort ();
   return 0;
 }
-
-/* { dg-final { scan-assembler "call abort;\[\r\n\t \]+trap;" } } */
+/*
+** main:
+**	...
+**	\.reg\.pred (%r[0-9]+);
+**	...
+**	@\1	bra	(\$L[0-9]+);
+**	{
+**		call abort;
+**		trap; // \(noreturn\)
+**		exit; // \(noreturn\)
+**	}
+**	\2:
+**	\tmov\.u32	%r[0-9]+, 0;
+**	...
+*/
diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp
index 0685de1d641..5df80325dff 100644
--- a/gcc/testsuite/lib/scanasm.exp
+++ b/gcc/testsuite/lib/scanasm.exp
@@ -777,33 +777,73 @@ proc scan-lto-assembler { args } {
 dg-scan "scan-l

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[chenglulu]

在 2023/9/5 下午8:17, Xi Ruoyao 写道:

On Tue, 2023-09-05 at 20:01 +0800, chenglulu wrote:

在 2023/9/5 下午7:51, Xi Ruoyao 写道:

On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:

   /* Note: optimize_size may vary across functions,
  while -m[no]-memcpy imposes a global constraint.  */
   #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P
loongarch_do_optimize_block_move_p()
   
-#ifndef HAVE_AS_EXPLICIT_RELOCS

-#define HAVE_AS_EXPLICIT_RELOCS 0
-#endif
-

This causes a build failure with older assembler:

options.cc:3040:3: error: 'HAVE_AS_EXPLICIT_RELOCS' was not declared in this 
scope; did you mean 'TARGET_EXPLICIT_RELOCS'?
   3040 |   HAVE_AS_EXPLICIT_RELOCS, /* TARGET_EXPLICIT_RELOCS */
    |   ^~~
    |   TARGET_EXPLICIT_RELOCS

Why this is removed?  If this is an unintentionally change I'll add it
back.


Sorry, this was deleted accidentally.

Thanks!

Added the 3 lines back at r14-3706.


Ok. Thanks!

Re: [PATCH V2] Emit funcall external declarations only if actually used.

[Jose E. Marchesi via Gcc-patches]

ping^

> ping
>
>> [Differences from V1:
>> - Prototype for call_from_call_insn moved before comment block.
>> - Reuse the `call' flag for SYMBOL_REF_LIBCALL.
>> - Fallback to check REG_CALL_DECL in non-direct calls.
>> - New test to check correct behavior for non-direct calls.]
>>
>> There are many places in GCC where alternative local sequences are
>> tried in order to determine what is the cheapest or best alternative
>> to use in the current target.  When any of these sequences involve a
>> libcall, the current implementation of emit_library_call_value_1
>> introduce a side-effect consisting on emitting an external declaration
>> for the funcall (such as __divdi3) which is thus emitted even if the
>> sequence that does the libcall is not retained.
>>
>> This is problematic in targets such as BPF, because the kernel loader
>> chokes on the spurious symbol __divdi3 and makes the resulting BPF
>> object unloadable.  Note that BPF objects are not linked before being
>> loaded.
>>
>> This patch changes emit_library_call_value_1 to mark the target
>> SYMBOL_REF as a libcall.  Then, the emission of the external
>> declaration is done in the first loop of final.cc:shorten_branches.
>> This happens only if the corresponding sequence has been kept.
>>
>> Regtested in x86_64-linux-gnu.
>> Tested with host x86_64-linux-gnu with target bpf-unknown-none.
>>
>> gcc/ChangeLog
>>
>>  * rtl.h (SYMBOL_REF_LIBCALL): Define.
>>  * calls.cc (emit_library_call_value_1): Do not emit external
>>  libcall declaration here.
>>  * final.cc (shorten_branches): Do it here.
>>
>> gcc/testsuite/ChangeLog
>>
>>  * gcc.target/bpf/divmod-libcall-1.c: New test.
>>  * gcc.target/bpf/divmod-libcall-2.c: Likewise.
>>  * gcc.c-torture/compile/libcall-2.c: Likewise.
>> ---
>>  gcc/calls.cc  |  9 +++---
>>  gcc/final.cc  | 30 +++
>>  gcc/rtl.h |  5 
>>  .../gcc.c-torture/compile/libcall-2.c |  8 +
>>  .../gcc.target/bpf/divmod-libcall-1.c | 19 
>>  .../gcc.target/bpf/divmod-libcall-2.c | 16 ++
>>  6 files changed, 83 insertions(+), 4 deletions(-)
>>  create mode 100644 gcc/testsuite/gcc.c-torture/compile/libcall-2.c
>>  create mode 100644 gcc/testsuite/gcc.target/bpf/divmod-libcall-1.c
>>  create mode 100644 gcc/testsuite/gcc.target/bpf/divmod-libcall-2.c
>>
>> diff --git a/gcc/calls.cc b/gcc/calls.cc
>> index 1f3a6d5c450..219ea599b16 100644
>> --- a/gcc/calls.cc
>> +++ b/gcc/calls.cc
>> @@ -4388,9 +4388,10 @@ emit_library_call_value_1 (int retval, rtx orgfun, 
>> rtx value,
>>  || argvec[i].partial != 0)
>>update_stack_alignment_for_call (&argvec[i].locate);
>>  
>> -  /* If this machine requires an external definition for library
>> - functions, write one out.  */
>> -  assemble_external_libcall (fun);
>> +  /* Mark the emitted target as a libcall.  This will be used by final
>> + in order to emit an external symbol declaration if the libcall is
>> + ever used.  */
>> +  SYMBOL_REF_LIBCALL (fun) = 1;
>>  
>>original_args_size = args_size;
>>args_size.constant = (aligned_upper_bound (args_size.constant
>> @@ -4735,7 +4736,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx 
>> value,
>> valreg,
>> old_inhibit_defer_pop + 1, call_fusage, flags, args_so_far);
>>  
>> -  if (flag_ipa_ra)
>> +  if (flag_ipa_ra || SYMBOL_REF_LIBCALL (orgfun))
>>  {
>>rtx datum = orgfun;
>>gcc_assert (GET_CODE (datum) == SYMBOL_REF);
>> diff --git a/gcc/final.cc b/gcc/final.cc
>> index dd3e22547ac..2041e43fdd1 100644
>> --- a/gcc/final.cc
>> +++ b/gcc/final.cc
>> @@ -804,6 +804,8 @@ make_pass_compute_alignments (gcc::context *ctxt)
>>  }
>>  
>>  
>> +static rtx call_from_call_insn (rtx_call_insn *insn);
>> +
>>  /* Make a pass over all insns and compute their actual lengths by shortening
>> any branches of variable length if possible.  */
>>  
>> @@ -850,6 +852,34 @@ shorten_branches (rtx_insn *first)
>>for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
>>  {
>>INSN_SHUID (insn) = i++;
>> +
>> +  /* If this is a `call' instruction implementing a libcall, and
>> + this machine requires an external definition for library
>> + functions, write one out.  */
>> +  if (CALL_P (insn))
>> +{
>> +  rtx x;
>> +
>> +  if ((x = call_from_call_insn (dyn_cast  (insn)))
>> +  && (x = XEXP (x, 0))
>> +  && MEM_P (x)
>> +  && (x = XEXP (x, 0))
>> +  && SYMBOL_REF_P (x)
>> +  && SYMBOL_REF_LIBCALL (x))
>> +{
>> +  /* Direct call.  */
>> +  assemble_external_libcall (x);
>> +}
>> +  else if ((x = find_reg_note (insn, REG_CALL_DECL, NULL_RTX))
>> +   && (x = XEXP (x, 0)))
>> +{
>> +   

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Xi Ruoyao via Gcc-patches]

On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:
> * Support options for LoongArch SIMD extensions:
>   new configure options --with-simd={none,lsx,lasx};
>   new compiler option -msimd={none,lsx,lasx};
>   new driver options -m[no]-l[a]sx.

Hmm... In my build (a cross compiler configured with ../gcc/configure --
target=loongarch64-linux-gnu --with-system-zlib) I have:

$ cat lasx.c
int x __attribute__((vector_size(32)));
int y __attribute__((vector_size(32)));
void test(void) { x += y; }
$ gcc/cc1 lasx.c -msimd=lasx -o- -nostdinc -mexplicit-relocs -O2

... ...

pcalau12i   $r12,%pc_hi20(.LANCHOR0)
addi.d  $r12,$r12,%pc_lo12(.LANCHOR0)
xvld$xr0,$r12,0
xvld$xr1,$r12,32
xvadd.w $xr0,$xr0,$xr1
xvst$xr0,$r12,0
jr  $r1

... ...

This seems perfectly fine.  But:

$ gcc/xgcc -B gcc lasx.c -mlasx -o- -nostdinc -mexplicit-relocs -O2 -S

... ...

test:
.LFB0 = .
pcalau12i   $r12,%pc_hi20(.LANCHOR0)
addi.d  $r12,$r12,%pc_lo12(.LANCHOR0)
addi.d  $r3,$r3,-16
.LCFI0 = .
st.d$r23,$r3,8
.LCFI1 = .
ldptr.w $r7,$r12,0
ldptr.w $r23,$r12,32
ldptr.w $r6,$r12,8

... ... (no SIMD instructions)

Is this a bug in the driver or I missed something?

-- 
Xi Ruoyao 
School of Aerospace Science and Technology, Xidian University

[PATCH] c: Don't pedwarn on _FloatN{,x} or {f,F}N{,x} suffixes for C2X

[Jakub Jelinek via Gcc-patches]

Hi!

Now that _Float{16,32,64,128,32x,64x,128x} and
{f,F}{16,32,64,128,32x,64x,128x} literal suffixes are in C23 standard,
I think it is undesirable to pedwarn about these for -std=c2x, so this
patch uses pedwarn_c11 instead.  In c-family/, we don't have that function
and am not sure it would be very clean to define dummy pedwarn_c11 in the
C++ FE, so the patch just does what pedwarn_c11 does using pedwarn/warning.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2023-09-05  Jakub Jelinek  

gcc/c-family/
* c-lex.cc (interpret_float): For C diagnostics on FN and FNx suffixes
append " before C2X" to diagnostics text and follow behavior of
pedwarn_c11.
gcc/c/
* c-decl.cc (declspecs_add_type): Use pedwarn_c11 rather than pedwarn
for _FloatN{,x} diagnostics and append " before C2X" to the diagnostic
text.
gcc/testsuite/
* gcc.dg/c11-floatn-1.c: New test.
* gcc.dg/c11-floatn-2.c: New test.
* gcc.dg/c11-floatn-3.c: New test.
* gcc.dg/c11-floatn-4.c: New test.
* gcc.dg/c11-floatn-5.c: New test.
* gcc.dg/c11-floatn-6.c: New test.
* gcc.dg/c11-floatn-7.c: New test.
* gcc.dg/c11-floatn-8.c: New test.
* gcc.dg/c2x-floatn-1.c: New test.
* gcc.dg/c2x-floatn-2.c: New test.
* gcc.dg/c2x-floatn-3.c: New test.
* gcc.dg/c2x-floatn-4.c: New test.
* gcc.dg/c2x-floatn-5.c: New test.
* gcc.dg/c2x-floatn-6.c: New test.
* gcc.dg/c2x-floatn-7.c: New test.
* gcc.dg/c2x-floatn-8.c: New test.

--- gcc/c-family/c-lex.cc.jj2023-09-04 09:45:44.528902928 +0200
+++ gcc/c-family/c-lex.cc   2023-09-05 09:54:29.060725832 +0200
@@ -1185,7 +1185,25 @@ interpret_float (const cpp_token *token,
error ("unsupported non-standard suffix on floating constant");
return error_mark_node;
  }
-   else if (c_dialect_cxx () && !extended)
+   else if (!c_dialect_cxx ())
+ {
+   if (warn_c11_c2x_compat > 0)
+ {
+   if (pedantic && !flag_isoc2x)
+ pedwarn (input_location, OPT_Wc11_c2x_compat,
+  "non-standard suffix on floating constant "
+  "before C2X");
+   else
+ warning (OPT_Wc11_c2x_compat,
+  "non-standard suffix on floating constant "
+  "before C2X");
+ }
+   else if (warn_c11_c2x_compat != 0 && pedantic && !flag_isoc2x)
+ pedwarn (input_location, OPT_Wpedantic,
+  "non-standard suffix on floating constant "
+  "before C2X");
+ }
+   else if (!extended)
  {
if (cxx_dialect < cxx23)
  pedwarn (input_location, OPT_Wpedantic,
--- gcc/c/c-decl.cc.jj  2023-09-04 09:45:47.998853807 +0200
+++ gcc/c/c-decl.cc 2023-09-05 09:43:28.384918043 +0200
@@ -12140,12 +12140,13 @@ declspecs_add_type (location_t loc, stru
CASE_RID_FLOATN_NX:
  specs->u.floatn_nx_idx = i - RID_FLOATN_NX_FIRST;
  if (!in_system_header_at (input_location))
-   pedwarn (loc, OPT_Wpedantic,
-"ISO C does not support the %<_Float%d%s%> type",
-floatn_nx_types[specs->u.floatn_nx_idx].n,
-(floatn_nx_types[specs->u.floatn_nx_idx].extended
- ? "x"
- : ""));
+   pedwarn_c11 (loc, OPT_Wpedantic,
+"ISO C does not support the %<_Float%d%s%> type"
+" before C2X",
+floatn_nx_types[specs->u.floatn_nx_idx].n,
+(floatn_nx_types[specs->u.floatn_nx_idx].extended
+ ? "x"
+ : ""));
 
  if (specs->long_p)
error_at (loc,
--- gcc/testsuite/gcc.dg/c11-floatn-1.c.jj  2023-09-05 10:07:09.062110156 
+0200
+++ gcc/testsuite/gcc.dg/c11-floatn-1.c 2023-09-05 10:10:57.288912286 +0200
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-std=c11 -pedantic-errors" } */
+/* { dg-add-options float32 } */
+/* { dg-add-options float64 } */
+/* { dg-add-options float32x } */
+/* { dg-require-effective-target float32 } */
+/* { dg-require-effective-target float32x } */
+/* { dg-require-effective-target float64 } */
+
+_Float32 a /* { dg-error "ISO C does not support the '_Float32' 
type before C2X" } */
+  = 1.0F32;/* { dg-error "non-standard suffix on floating constant 
before C2X" } */
+_Float64 b /* { dg-error "ISO C does not support the '_Float64' 
type before C2X" } */
+  = 1.0F64;/* { dg-error "non-standard suffix on floating constant 
before C2X" } */
+_Float32x c/* { dg-error "ISO C does not support the '_Float32x' 
type before C2X" } */
+  = 1.0F

Re: [PATCH] c++, v2: Diagnose [basic.scope.block]/2 violations even for block externs [PR52953]

[Jason Merrill via Gcc-patches]

On 9/1/23 09:34, Jakub Jelinek wrote:

On Thu, Aug 31, 2023 at 05:46:28PM -0400, Jason Merrill wrote:

I've suggested this to Core.


Thanks.


So, I'm not really sure what to do.  Intuitively the patch seems right
because even block externs redeclare stuff and change meaning of the
identifiers and void foo () { int i; extern int i (int); } is rejected
by all compilers.


I think this direction makes sense, though we might pedwarn on these rather
than error to reduce possible breakage.


It wasn't clear to me whether you want to make those pedwarns just for the
DECL_EXTERNAL cases, ones that actually changed, or all others as well
(which were errors or permerrors depending on the case).
I've implemented the former, kept existing behavior of !DECL_EXTERNAL.


2023-08-31  Jakub Jelinek  

PR c++/52953
* name-lookup.cc (check_local_shadow): Defer punting on
DECL_EXTERNAL (decl) from the start of function to right before
the -Wshadow* checks.


Don't we want to consider externs for the -Wshadow* checks as well?


I think that is a good idea (though dunno how much it will trigger in
real-world), but there is one case I've excluded, the global variable
shadowing case, because warning that
int z;
void foo () { extern int z; z = 1; }
shadows the global var would be incorrect, it is the same var.
It is true that
int y; namespace N { void bar () { extern int y; y = 1; } }
shadows ::y but it is unclear how to differentiate those two cases with
the information we have at check_local_shadow time.

I've also found one spot which wasn't using auto_diagnostic_group d;
on a pair of error_at/inform.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?


OK.


2023-09-01  Jakub Jelinek  

PR c++/52953
* name-lookup.cc (check_local_shadow): Don't punt early for
DECL_EXTERNAL decls, instead just disable the shadowing of namespace
decls check for those and emit a pedwarn rather than error_at for
those.  Add missing auto_diagnostic_group.  Formatting fix.

* g++.dg/diagnostic/redeclaration-4.C: New test.
* g++.dg/diagnostic/redeclaration-5.C: New test.
* g++.dg/warn/Wshadow-19.C: New test.

--- gcc/cp/name-lookup.cc.jj2023-09-01 10:21:03.658118594 +0200
+++ gcc/cp/name-lookup.cc   2023-09-01 11:30:10.868516494 +0200
@@ -3096,10 +3096,6 @@ check_local_shadow (tree decl)
if (TREE_CODE (decl) == PARM_DECL && !DECL_CONTEXT (decl))
  return;
  
-  /* External decls are something else.  */

-  if (DECL_EXTERNAL (decl))
-return;
-
tree old = NULL_TREE;
cp_binding_level *old_scope = NULL;
if (cxx_binding *binding = outer_binding (DECL_NAME (decl), NULL, true))
@@ -3130,11 +3126,9 @@ check_local_shadow (tree decl)
  && DECL_CONTEXT (old) == lambda_function (current_lambda_expr ())
  && TREE_CODE (old) == PARM_DECL
  && DECL_NAME (decl) != this_identifier)
-   {
- error_at (DECL_SOURCE_LOCATION (old),
-   "lambda parameter %qD "
-   "previously declared as a capture", old);
-   }
+   error_at (DECL_SOURCE_LOCATION (old),
+ "lambda parameter %qD "
+ "previously declared as a capture", old);
  return;
}
/* Don't complain if it's from an enclosing function.  */
@@ -3156,10 +3150,18 @@ check_local_shadow (tree decl)
 in the outermost block of the function definition.  */
  if (b->kind == sk_function_parms)
{
- error_at (DECL_SOURCE_LOCATION (decl),
-   "declaration of %q#D shadows a parameter", decl);
- inform (DECL_SOURCE_LOCATION (old),
- "%q#D previously declared here", old);
+ auto_diagnostic_group d;
+ bool emit = true;
+ if (DECL_EXTERNAL (decl))
+   emit = pedwarn (DECL_SOURCE_LOCATION (decl), OPT_Wpedantic,
+   "declaration of %q#D shadows a parameter",
+   decl);
+ else
+   error_at (DECL_SOURCE_LOCATION (decl),
+ "declaration of %q#D shadows a parameter", decl);
+ if (emit)
+   inform (DECL_SOURCE_LOCATION (old),
+   "%q#D previously declared here", old);
  return;
}
}
@@ -3185,10 +3187,16 @@ check_local_shadow (tree decl)
   && (old_scope->kind == sk_cond || old_scope->kind == sk_for))
{
  auto_diagnostic_group d;
- error_at (DECL_SOURCE_LOCATION (decl),
-   "redeclaration of %q#D", decl);
- inform (DECL_SOURCE_LOCATION (old),
- "%q#D previously declared here", old);
+ bool emit = true;
+ if (DECL_EXTERNAL (decl))
+   emit = pedwarn (DECL_SOURCE_LOCATION (decl), OPT_Wpedantic,
+  

Re: [PATCH] c++, v2: Diagnose [basic.scope.block]/2 violations even in compound-stmt of function-try-block [PR52953]

[Jason Merrill via Gcc-patches]

On 9/1/23 09:24, Jakub Jelinek wrote:

On Thu, Aug 31, 2023 at 03:52:22PM -0400, Jason Merrill wrote:

On 8/31/23 03:20, Jakub Jelinek wrote:

As the following testcase shows, while check_local_shadow diagnoses most of
the [basic.scope.block]/2 violations, it doesn't diagnose when parameter's
name is redeclared inside of the compound-stmt of a function-try-block.

There is in that case an extra scope (sk_try with parent artificial
sk_block with for FUNCTION_NEEDS_BODY_BLOCK another sk_block and only then
sk_function_param).

The following patch fixes that.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2023-08-31  Jakub Jelinek  

PR c++/52953
* cp-tree.h (struct language_function): Add x_in_function_try_block
member.


How about adding a flag to cp_binding_level instead?  Maybe to mark the
artificial sk_block level as such, which we could use for both this case and
the FUNCTION_NEEDS_BODY_BLOCK cases.


So like this?

It actually changes behaviour on the
void foo (int x) try {} catch (int x) {} case, where previously
this triggered the
|| (TREE_CODE (old) == PARM_DECL
&& (current_binding_level->kind == sk_catch
|| current_binding_level->level_chain->kind == sk_catch)
&& in_function_try_handler))
 {
   auto_diagnostic_group d;
   if (permerror (DECL_SOURCE_LOCATION (decl),
  "redeclaration of %q#D", decl))
 inform (DECL_SOURCE_LOCATION (old),
 "%q#D previously declared here", old);
diagnostics (note, just the current_binding_level->kind == sk_catch
case), while now it triggers already the earlier
   if (b->kind == sk_function_parms)
 {
   error_at (DECL_SOURCE_LOCATION (decl),
 "declaration of %q#D shadows a parameter", decl);
   inform (DECL_SOURCE_LOCATION (old),
   "%q#D previously declared here", old);
error.  If you think it is important to differentiate that,
I guess I could guard the while (b->artificial) loop with say
+ if (!in_function_try_handler
+ || current_binding_level->kind != sk_catch)
while (b->artificial)
  b = b->level_chain;
and adjust the 2 testcases.


I don't mind the change of diagnostic.  Can we remove the 
in_function_try_handler test, then, if it's no longer reachable?  OK 
with that change.



Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk
or with modification?

2023-09-01  Jakub Jelinek  

PR c++/52953
* name-lookup.h (struct cp_binding_level): Add artificial bit-field.
Formatting fixes.
* name-lookup.cc (check_local_shadow): Skip artificial bindings when
checking if parameter scope is parent scope.  Don't special case
FUNCTION_NEEDS_BODY_BLOCK.
* decl.cc (begin_function_body): Set
current_binding_level->artificial.
* semantics.cc (begin_function_try_block): Likewise.

* g++.dg/diagnostic/redeclaration-3.C: New test.
* g++.dg/parse/pr31952-3.C: Expect different diagnostic wording.

--- gcc/cp/name-lookup.h.jj 2023-08-21 11:57:33.105460770 +0200
+++ gcc/cp/name-lookup.h2023-09-01 10:15:20.137943395 +0200
@@ -292,11 +292,11 @@ struct GTY(()) cp_binding_level {
only valid if KIND == SK_TEMPLATE_PARMS.  */
BOOL_BITFIELD explicit_spec_p : 1;
  
-  /* true means make a BLOCK for this level regardless of all else.  */

+  /* True means make a BLOCK for this level regardless of all else.  */
unsigned keep : 1;
  
/* Nonzero if this level can safely have additional

-  cleanup-needing variables added to it.  */
+ cleanup-needing variables added to it.  */
unsigned more_cleanups_ok : 1;
unsigned have_cleanups : 1;
  
@@ -308,9 +308,13 @@ struct GTY(()) cp_binding_level {

unsigned defining_class_p : 1;
  
/* True for SK_FUNCTION_PARMS of a requires-expression.  */

-  unsigned requires_expression: 1;
+  unsigned requires_expression : 1;
  
-  /* 22 bits left to fill a 32-bit word.  */

+  /* True for artificial blocks which should be ignored when finding
+ parent scope.  */
+  unsigned artificial : 1;
+
+  /* 21 bits left to fill a 32-bit word.  */
  };
  
  /* The binding level currently in effect.  */

--- gcc/cp/name-lookup.cc.jj2023-08-31 14:31:06.055762306 +0200
+++ gcc/cp/name-lookup.cc   2023-09-01 10:21:03.658118594 +0200
@@ -3146,8 +3146,10 @@ check_local_shadow (tree decl)
 them there.  */
  cp_binding_level *b = current_binding_level->level_chain;
  
-	  if (FUNCTION_NEEDS_BODY_BLOCK (current_function_decl))

-   /* Skip the ctor/dtor cleanup level.  */
+ /* Skip artificially added scopes which aren't present
+in the C++ standard, e.g. for function-try-block or
+ctor/dtor cleanups.  */
+ while (b->arti

Re: testsuite: Port 'check-function-bodies' to nvptx

[Richard Sandiford via Gcc-patches]

Thomas Schwinge  writes:
> Hi!
>
> On 2023-09-04T23:05:05+0200, I wrote:
>> On 2019-07-16T15:04:49+0100, Richard Sandiford  
>> wrote:
>>> This patch therefore adds a new check-function-bodies dg-final test
>
>>> The regexps in parse_function_bodies are fairly general, but might
>>> still need to be extended in future for targets like Darwin or AIX.
>>
>> ..., or nvptx.  [...]
>
>> number of TODO items.
>>
>> In particular how to parameterize regular expressions for the different
>> syntax used by nvptx: for example, parameterize via global variables,
>> initialized accordingly (where?)?  Thinking about it, maybe simply
>> conditionalizing the current local initializations by
>> 'if { [istarget nvptx-*-*] } { [...] } else { [...] }' will do, simple
>> enough!
>
> Indeed that works fine.
>
>> Regarding whitespace prefixed, I think I'll go with the current
>> 'append function_regexp "\t" $line "\n"', that is, prefix expected output
>> lines with '\t' (as done in 'gcc.target/nvptx/abort.c'), and also for
>> nvptx handle labels as "fluff" (until we solve that issue generally).
>
> I changed my mind about that: instead of '\t', use '\t*' for nvptx, which
> means that both instructions emitted with additional whitespace prefixed
> and labels in column zero work nicely.
>
>> --- a/gcc/testsuite/lib/scanasm.exp
>> +++ b/gcc/testsuite/lib/scanasm.exp
>
>> @@ -907,7 +911,8 @@ proc check-function-bodies { args } {
>>
>>  set count 0
>>  set function_regexp ""
>> -set label {^(\S+):$}
>> +#TODO
>> +set label {^// BEGIN GLOBAL FUNCTION DEF: ([a-zA-Z_]\S+)$}
>
> There's actually no reason that the expected output syntax (this one) has
> to match the assembly -- so I restored that, to use the same syntax for
> nvptx here, too.
>
> Any comments before I push the attached
> "testsuite: Port 'check-function-bodies' to nvptx"?
>
>
> Grüße
>  Thomas
>
>
> -
> Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
> München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
> Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
> München, HRB 106955
>
> From bdaf7572d9d4c1988274405840de4071ded3733f Mon Sep 17 00:00:00 2001
> From: Thomas Schwinge 
> Date: Mon, 4 Sep 2023 22:28:12 +0200
> Subject: [PATCH] testsuite: Port 'check-function-bodies' to nvptx
>
> This extends commit 4d706ff86ea86868615558e92407674a4f4b4af9
> "Add dg test for matching function bodies" for nvptx.
>
>   gcc/testsuite/
>   * lib/scanasm.exp (configure_check-function-bodies): New proc.
>   (parse_function_bodies, check-function-bodies): Use it.
>   * gcc.target/nvptx/abort.c: Use 'check-function-bodies'.
>   gcc/
>   * doc/sourcebuild.texi (check-function-bodies): Update.

LGTM.  Just a minor comment:

> ---
>  gcc/doc/sourcebuild.texi   |  9 ++-
>  gcc/testsuite/gcc.target/nvptx/abort.c | 19 ++-
>  gcc/testsuite/lib/scanasm.exp  | 76 --
>  3 files changed, 83 insertions(+), 21 deletions(-)
>
> diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
> index 1a78b3c1abb..8aec6b6592c 100644
> --- a/gcc/doc/sourcebuild.texi
> +++ b/gcc/doc/sourcebuild.texi
> @@ -3327,9 +3327,12 @@ The first line of the expected output for a function 
> @var{fn} has the form:
>  Subsequent lines of the expected output also start with @var{prefix}.
>  In both cases, whitespace after @var{prefix} is not significant.
>  
> -The test discards assembly directives such as @code{.cfi_startproc}
> -and local label definitions such as @code{.LFB0} from the compiler's
> -assembly output.  It then matches the result against the expected
> +Depending on the configuration (see
> +@code{gcc/testsuite/lib/scanasm.exp:configure_check-function-bodies}),

I can imagine such a long string wouldn't format well in the output.
How about: @code{configure_check-function-bodies} in
@filename{gcc/testsuite/lib/scanasm.exp}?

OK from my POV with that change.

Thanks,
Richard

> +the test may discard from the compiler's assembly output
> +directives such as @code{.cfi_startproc},
> +local label definitions such as @code{.LFB0}, and more.
> +It then matches the result against the expected
>  output for a function as a single regular expression.  This means that
>  later lines can use backslashes to refer back to @samp{(@dots{})}
>  captures on earlier lines.  For example:
> diff --git a/gcc/testsuite/gcc.target/nvptx/abort.c 
> b/gcc/testsuite/gcc.target/nvptx/abort.c
> index d3220687400..ae9dbf45a9b 100644
> --- a/gcc/testsuite/gcc.target/nvptx/abort.c
> +++ b/gcc/testsuite/gcc.target/nvptx/abort.c
> @@ -1,4 +1,6 @@
>  /* { dg-do compile} */
> +/* { dg-final { check-function-bodies {**} {} } } */
> +
>  /* Annotate no return functions with a trailing 'trap'.  */
>  
>  extern void abort ();
> @@ -9,5 +11,18 @@ int main (int argc, char **argv)
>  abort ();
>return 0;
>  }
> -
> -/* { dg-final { scan-assembler "call abort;\[\

Re: [PATCH 01/11] aarch64: AARCH64_ISA_RCPC was defined twice

[Richard Sandiford via Gcc-patches]

Szabolcs Nagy  writes:
> gcc/ChangeLog:
>
>   * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.

OK, thanks.

Richard

> ---
>  gcc/config/aarch64/aarch64.h | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> index 2b0fc97bb71..c783cb96c48 100644
> --- a/gcc/config/aarch64/aarch64.h
> +++ b/gcc/config/aarch64/aarch64.h
> @@ -222,7 +222,6 @@ enum class aarch64_feature : unsigned char {
>  #define AARCH64_ISA_MOPS(aarch64_isa_flags & AARCH64_FL_MOPS)
>  #define AARCH64_ISA_LS64(aarch64_isa_flags & AARCH64_FL_LS64)
>  #define AARCH64_ISA_CSSC(aarch64_isa_flags & AARCH64_FL_CSSC)
> -#define AARCH64_ISA_RCPC   (aarch64_isa_flags & AARCH64_FL_RCPC)
>  
>  /* Crypto is an optional extension to AdvSIMD.  */
>  #define TARGET_CRYPTO (AARCH64_ISA_CRYPTO)

Re: [PATCH 04/11] aarch64: Do not force a stack frame for EH returns

[Richard Sandiford via Gcc-patches]

Szabolcs Nagy  writes:
> EH returns no longer rely on clobbering the return address on the stack
> so forcing a stack frame is not necessary.
>
> This does not actually change the code gen for the unwinder since there
> are calls before the EH return.
>
> gcc/ChangeLog:
>
>   * config/aarch64/aarch64.cc (aarch64_needs_frame_chain): Do not
>   force frame chain for eh_return.

OK once we've agreed on something for 03/11.

Thanks,
Richard

> ---
>  gcc/config/aarch64/aarch64.cc | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index 36cd172d182..afdbf4213c1 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -8417,8 +8417,7 @@ aarch64_output_probe_sve_stack_clash (rtx base, rtx 
> adjustment,
>  static bool
>  aarch64_needs_frame_chain (void)
>  {
> -  /* Force a frame chain for EH returns so the return address is at FP+8.  */
> -  if (frame_pointer_needed || crtl->calls_eh_return)
> +  if (frame_pointer_needed)
>  return true;
>  
>/* A leaf function cannot have calls or write LR.  */

[Patch] contrib/gcc-changelog: Check whether revert-commit exists

[Tobias Burnus]

That's based on the fail 
https://gcc.gnu.org/pipermail/gccadmin/2023q3/020349.html
and on the discussion on IRC.

The problem in for the cron job was that 
r14-3661-g084a7cf9fb2d9cb98dfbe7d91602c840ec50b002
referenced a commit that did not exist.

This was temporarily fixed by Jakub, but it makes sense to detect this
in the pre-commit hook.


With the patch,
  contrib/gcc-changelog/git_email.py 
0001-Revert-libstdc-Use-GLIBCXX_CHECK_LINKER_FEATURES-for.patch
now prints:
OK
Warnings:
Cannot obtain info about reverted commit 
'46c2e94ca66ed9991c45a6ba6204ed02869efc39'

while
  contrib/gcc-changelog/git_check_commit.py 
084a7cf9fb2d9cb98dfbe7d91602c840ec50b002
now fails with:
  Checking 084a7cf9fb2d9cb98dfbe7d91602c840ec50b002: FAILED
  ERR: Cannot find to-be-reverted commit: 
"46c2e94ca66ed9991c45a6ba6204ed02869efc39"

(check_email.py always shows the warning, git_check_commit.py only with '-v')

Notes:
- I am not sure whether a sensible testcase can be added - and, hence, I have 
not added one.
- I have run "pytest-3' but my python is too old and thus might miss some 
checks which
  newer pytest/flake8 will find. But at least it did pass here.
- I have not tested the cherry-pick + commit does not exist case,
  which now creates a warning as I did not quickly find a testcase.

Comments, remarks, suggestions, approval?

Tobias
-
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contrib/gcc-changelog: Check whether revert-commit exists

contrib/ChangeLog:

	* gcc-changelog/git_commit.py (GitCommit.__init__):
	Handle commit_to_info_hook = None; otherwise, if None,
	regard it as error.
	(to_changelog_entries): Handle commit_to_info_hook = None;
	if info is None, create a warning for it.
	* gcc-changelog/git_email.py (GitEmail.__init__):
	call super() with commit_to_info_hook=None instead
	of a lamda function.

 contrib/gcc-changelog/git_commit.py | 14 +-
 contrib/gcc-changelog/git_email.py  |  3 +--
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/contrib/gcc-changelog/git_commit.py b/contrib/gcc-changelog/git_commit.py
index 4f3131021f2..4d024026f2b 100755
--- a/contrib/gcc-changelog/git_commit.py
+++ b/contrib/gcc-changelog/git_commit.py
@@ -329,11 +329,13 @@ class GitCommit:
 self.revert_commit = m.group('hash')
 break
 if self.revert_commit:
+# The following happens for get_email.py:
+if not self.commit_to_info_hook:
+return
 self.info = self.commit_to_info_hook(self.revert_commit)
-
-# The following happens for get_email.py:
-if not self.info:
-return
+if not self.info:
+self.errors.append(Error('Cannot find to-be-reverted commit', self.revert_commit))
+return
 
 self.check_commit_email()
 
@@ -796,12 +798,14 @@ class GitCommit:
 orig_date = self.original_info.date
 current_timestamp = orig_date.strftime(DATE_FORMAT)
 elif self.cherry_pick_commit:
-info = self.commit_to_info_hook(self.cherry_pick_commit)
+info = (self.commit_to_info_hook
+and self.commit_to_info_hook(self.cherry_pick_commit))
 # it can happen that it is a cherry-pick for a different
 # repository
 if info:
 timestamp = info.date.strftime(DATE_FORMAT)
 else:
+self.warnings.append(f"Cherry-picked commit not found: '{self.cherry_pick_commit}'")
 timestamp = current_timestamp
 elif not timestamp or use_commit_ts:
 timestamp = current_timestamp
diff --git a/contrib/gcc-changelog/git_email.py b/contrib/gcc-changelog/git_email.py
index 49f41f2ec99..93808dfabb6 100755
--- a/contrib/gcc-changelog/git_email.py
+++ b/contrib/gcc-changelog/git_email.py
@@ -89,8 +89,7 @@ class GitEmail(GitCommit):
 t = 'M'
 modified_files.append((target if t != 'D' else source, t))
 git_info = GitInfo(None, date, author, message, modified_files)
-super().__init__(git_info,
- commit_to_info_hook=lambda x: None)
+super().__init__(git_info, commit_to_info_hook=None)
 
 
 def show_help():

Re: [PATCH 05/11] aarch64: Add eh_return compile tests

[Richard Sandiford via Gcc-patches]

Szabolcs Nagy  writes:
> gcc/testsuite/ChangeLog:
>
>   * gcc.target/aarch64/eh_return-2.c: New test.
>   * gcc.target/aarch64/eh_return-3.c: New test.

OK.

I wonder if it's worth using check-function-bodies for -3.c though.
It would then be easy to verify that the autiasp only occurs on the
normal return path.

Just a suggestion -- the current test is fine too.

Thanks,
Richard

> ---
>  gcc/testsuite/gcc.target/aarch64/eh_return-2.c |  9 +
>  gcc/testsuite/gcc.target/aarch64/eh_return-3.c | 14 ++
>  2 files changed, 23 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/eh_return-2.c
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/eh_return-3.c
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/eh_return-2.c 
> b/gcc/testsuite/gcc.target/aarch64/eh_return-2.c
> new file mode 100644
> index 000..4a9d124e891
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/eh_return-2.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-final { scan-assembler "add\tsp, sp, x5" } } */
> +/* { dg-final { scan-assembler "br\tx6" } } */
> +
> +void
> +foo (unsigned long off, void *handler)
> +{
> +  __builtin_eh_return (off, handler);
> +}
> diff --git a/gcc/testsuite/gcc.target/aarch64/eh_return-3.c 
> b/gcc/testsuite/gcc.target/aarch64/eh_return-3.c
> new file mode 100644
> index 000..35989eee806
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/eh_return-3.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mbranch-protection=pac-ret+leaf" } */
> +/* { dg-final { scan-assembler "add\tsp, sp, x5" } } */
> +/* { dg-final { scan-assembler "br\tx6" } } */
> +/* { dg-final { scan-assembler "hint\t25 // paciasp" } } */
> +/* { dg-final { scan-assembler "hint\t29 // autiasp" } } */
> +
> +void
> +foo (unsigned long off, void *handler, int c)
> +{
> +  if (c)
> +return;
> +  __builtin_eh_return (off, handler);
> +}

Re: [Patch] contrib/gcc-changelog: Check whether revert-commit exists

[Tobias Burnus]

Attached an old patch. See attached patch for the current one.

Difference is one line: the warning that is shown in the example output
below.

On 05.09.23 16:37, Tobias Burnus wrote:

That's based on the fail
https://gcc.gnu.org/pipermail/gccadmin/2023q3/020349.html
and on the discussion on IRC.

The problem in for the cron job was that
r14-3661-g084a7cf9fb2d9cb98dfbe7d91602c840ec50b002
referenced a commit that did not exist.

This was temporarily fixed by Jakub, but it makes sense to detect this
in the pre-commit hook.


With the patch,
  contrib/gcc-changelog/git_email.py
0001-Revert-libstdc-Use-GLIBCXX_CHECK_LINKER_FEATURES-for.patch
now prints:
OK
Warnings:
Cannot obtain info about reverted commit
'46c2e94ca66ed9991c45a6ba6204ed02869efc39'

while
  contrib/gcc-changelog/git_check_commit.py
084a7cf9fb2d9cb98dfbe7d91602c840ec50b002
now fails with:
  Checking 084a7cf9fb2d9cb98dfbe7d91602c840ec50b002: FAILED
  ERR: Cannot find to-be-reverted commit:
"46c2e94ca66ed9991c45a6ba6204ed02869efc39"

(check_email.py always shows the warning, git_check_commit.py only
with '-v')

Notes:
- I am not sure whether a sensible testcase can be added - and, hence,
I have not added one.
- I have run "pytest-3' but my python is too old and thus might miss
some checks which
  newer pytest/flake8 will find. But at least it did pass here.
- I have not tested the cherry-pick + commit does not exist case,
  which now creates a warning as I did not quickly find a testcase.

Comments, remarks, suggestions, approval?

Tobias
-
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contrib/gcc-changelog: Check whether revert-commit exists

contrib/ChangeLog:

	* gcc-changelog/git_commit.py (GitCommit.__init__):
	Handle commit_to_info_hook = None; otherwise, if None,
	regard it as error.
	(to_changelog_entries): Handle commit_to_info_hook = None;
	if info is None, create a warning for it.
	* gcc-changelog/git_email.py (GitEmail.__init__):
	call super() with commit_to_info_hook=None instead
	of a lamda function.

 contrib/gcc-changelog/git_commit.py | 14 +-
 contrib/gcc-changelog/git_email.py  |  3 +--
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/contrib/gcc-changelog/git_commit.py b/contrib/gcc-changelog/git_commit.py
index 4f3131021f2..99e40c3c0d4 100755
--- a/contrib/gcc-changelog/git_commit.py
+++ b/contrib/gcc-changelog/git_commit.py
@@ -329,11 +329,14 @@ class GitCommit:
 self.revert_commit = m.group('hash')
 break
 if self.revert_commit:
+# The following happens for get_email.py:
+if not self.commit_to_info_hook:
+self.warnings.append(f"Cannot obtain info about reverted commit '{self.revert_commit}'")
+return
 self.info = self.commit_to_info_hook(self.revert_commit)
-
-# The following happens for get_email.py:
-if not self.info:
-return
+if not self.info:
+self.errors.append(Error('Cannot find to-be-reverted commit', self.revert_commit))
+return
 
 self.check_commit_email()
 
@@ -796,12 +799,14 @@ class GitCommit:
 orig_date = self.original_info.date
 current_timestamp = orig_date.strftime(DATE_FORMAT)
 elif self.cherry_pick_commit:
-info = self.commit_to_info_hook(self.cherry_pick_commit)
+info = (self.commit_to_info_hook
+and self.commit_to_info_hook(self.cherry_pick_commit))
 # it can happen that it is a cherry-pick for a different
 # repository
 if info:
 timestamp = info.date.strftime(DATE_FORMAT)
 else:
+self.warnings.append(f"Cherry-picked commit not found: '{self.cherry_pick_commit}'")
 timestamp = current_timestamp
 elif not timestamp or use_commit_ts:
 timestamp = current_timestamp
diff --git a/contrib/gcc-changelog/git_email.py b/contrib/gcc-changelog/git_email.py
index 49f41f2ec99..93808dfabb6 100755
--- a/contrib/gcc-changelog/git_email.py
+++ b/contrib/gcc-changelog/git_email.py
@@ -89,8 +89,7 @@ class GitEmail(GitCommit):
 t = 'M'
 modified_files.append((target if t != 'D' else source, t))
 git_info = GitInfo(None, date, author, message, modified_files)
-super().__init__(git_info,
- commit_to_info_hook=lambda x: None)
+super().__init__(git_info, commit_to_info_hook=None)
 
 
 def show_help():

Re: [PATCH] c++: Move consteval folding to cp_fold_r

[Jason Merrill via Gcc-patches]

On 9/1/23 13:23, Marek Polacek wrote:

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?

-- >8 --

In the review of P2564:

it turned out that in order to correctly handle an example in the paper,
we should stop doing immediate evaluation in build_over_call and
bot_replace, and instead do it in cp_fold_r.  This patch does that.

Another benefit is that this is a pretty significant simplification, at
least in my opinion.  Also, this fixes the c++/110997 ICE (but the test
doesn't compile yet).

The main drawback seems to be that cp_fold_r doesn't process as much
code as we did before: uninstantiated templates


That's acceptable, it's an optional diagnostic.


and things like "false ? foo () : 1".


This is a problem.  Maybe we want cp_fold_r to recurse into the arms of 
a COND_EXPR before folding them away?  Maybe only if we know we've seen 
an immediate function?



diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index 8bd5c4a47f8..af4f98b1fe1 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -3135,6 +3135,11 @@ cxx_eval_call_expression (const constexpr_ctx *ctx, tree 
t,
  unsigned save_heap_alloc_count = ctx->global->heap_vars.length ();
  unsigned save_heap_dealloc_count = ctx->global->heap_dealloc_count;
  
+	  /* Make sure we fold std::is_constant_evaluated to true in an

+immediate function.  */
+ if (immediate_invocation_p (fun))


I think this should just check DECL_IMMEDIATE_FUNCTION_P, the context 
doesn't matter.



+   call_ctx.manifestly_const_eval = mce_true;
+
diff --git a/gcc/cp/cp-gimplify.cc b/gcc/cp/cp-gimplify.cc
index 206e791fcfd..29132aad158 100644
--- a/gcc/cp/cp-gimplify.cc
+++ b/gcc/cp/cp-gimplify.cc
@@ -1058,9 +1058,21 @@ cp_fold_r (tree *stmt_p, int *walk_subtrees, void *data_)
}
break;
  
+/* Expand immediate invocations.  */

+case CALL_EXPR:
+case AGGR_INIT_EXPR:
+  if (!in_immediate_context ())


As you mentioned in your followup, we shouldn't need to check this 
because we don't call cp_fold_r in immediate context.



+   if (tree fn = cp_get_callee (stmt))
+ if (TREE_CODE (fn) != ADDR_EXPR || ADDR_EXPR_DENOTES_CALL_P (fn))
+   if (tree fndecl = cp_get_fndecl_from_callee (fn, /*fold*/false))
+ if (DECL_IMMEDIATE_FUNCTION_P (fndecl))
+   *stmt_p = stmt = cxx_constant_value (stmt);
+  break;
+
  case ADDR_EXPR:
if (TREE_CODE (TREE_OPERAND (stmt, 0)) == FUNCTION_DECL
- && DECL_IMMEDIATE_FUNCTION_P (TREE_OPERAND (stmt, 0)))
+ && DECL_IMMEDIATE_FUNCTION_P (TREE_OPERAND (stmt, 0))
+ && !in_immediate_context ())


Likewise.


diff --git a/gcc/cp/tree.cc b/gcc/cp/tree.cc
index 799183dc646..7dfb6de2da3 100644
--- a/gcc/cp/tree.cc
+++ b/gcc/cp/tree.cc
@@ -3254,7 +3254,7 @@ bot_manip (tree* tp, int* walk_subtrees, void* data_)
 variables.  */
  
  static tree

-bot_replace (tree* t, int* walk_subtrees, void* data_)
+bot_replace (tree* t, int*, void* data_)


Generally we keep the parameter name as a comment like
int */*walk_subtrees*/


diff --git a/gcc/testsuite/g++.dg/cpp23/consteval-if2.C 
b/gcc/testsuite/g++.dg/cpp23/consteval-if2.C
index d1845da9e58..9fa95295c43 100644
--- a/gcc/testsuite/g++.dg/cpp23/consteval-if2.C
+++ b/gcc/testsuite/g++.dg/cpp23/consteval-if2.C
@@ -65,7 +65,7 @@ qux (int x)
int r = 0;
if not consteval// { dg-warning "'if consteval' only available with" "" 
{ target c++20_only } }
  {
-  r += foo (x);// { dg-error "'x' is not a constant expression" }
+  r += foo (x);// { dg-error "'x' is not a constant expression" "" { 
xfail *-*-* } }


This whole function should have a comment that these errors are not 
required because qux is never instantiated.



diff --git a/gcc/testsuite/g++.dg/cpp2a/consteval11.C 
b/gcc/testsuite/g++.dg/cpp2a/consteval11.C
index 2f68ec0f892..9fd32dcab7b 100644
--- a/gcc/testsuite/g++.dg/cpp2a/consteval11.C
+++ b/gcc/testsuite/g++.dg/cpp2a/consteval11.C
@@ -5,25 +5,25 @@ consteval int bar (int i) { if (i != 1) throw 1; return 0; }  // { 
dg-error "is n
  
  constexpr int a = bar (1);

  constexpr int b = bar (2);// { dg-message "in 'constexpr' expansion 
of" }
-constexpr int c = 0 ? bar (3) : 1; // { dg-message "in 'constexpr' expansion 
of" }
+constexpr int c = 0 ? bar (3) : 1;


As discussed above, we need to keep this diagnostic and the others like it.

Let's also add a test with the

template 
constexpr bool is_not(T t, F f) {
return not f(t);
}

consteval bool is_even(int i) { return i % 2 == 0; }

static_assert(is_not(5, is_even)); // ok

example from the paper.

Jason

[committed] OpenMP: Avoid ICE in c_parser_omp_clause_allocate with invalid expr

[Tobias Burnus]

I encountered an ICE when playing around. As allocate clauses
are a bit separate from the allocate directive, I decided to
fix it separately.

Note: The check also handles alignment expression (no testcases)
and C++ already checked for error_mark_node, i.e. it wasn't affected.

Committed as Rev. r14-3711-g55243898f8f956

Tobias
-
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commit 55243898f8f9560371f258fe0c6ca202ab7b2085
Author: Tobias Burnus 
Date:   Tue Sep 5 14:57:01 2023 +0200

OpenMP: Avoid ICE in c_parser_omp_clause_allocate with invalid expr

gcc/c/ChangeLog:

* c-parser.cc (c_parser_omp_clause_allocate): Handle
error_mark_node.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/allocate-13.c: New test.
---
 gcc/c/c-parser.cc |  4 +++-
 gcc/testsuite/c-c++-common/gomp/allocate-13.c | 28 +++
 2 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/gcc/c/c-parser.cc b/gcc/c/c-parser.cc
index cae10ba9c80..c8d285fbda1 100644
--- a/gcc/c/c-parser.cc
+++ b/gcc/c/c-parser.cc
@@ -16676,7 +16676,9 @@ c_parser_omp_clause_allocate (c_parser *parser, tree list)
 	  location_t expr_loc = c_parser_peek_token (parser)->location;
 	  c_expr expr = c_parser_expr_no_commas (parser, NULL);
 	  expr = convert_lvalue_to_rvalue (expr_loc, expr, false, true);
-	  if (strcmp (p, "allocator") == 0)
+	  if (expr.value == error_mark_node)
+		;
+	  else if (strcmp (p, "allocator") == 0)
 		{
 		  allocator = expr.value;
 		  allocator = c_fully_fold (allocator, false, NULL);
diff --git a/gcc/testsuite/c-c++-common/gomp/allocate-13.c b/gcc/testsuite/c-c++-common/gomp/allocate-13.c
new file mode 100644
index 000..847fe55ea2a
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/allocate-13.c
@@ -0,0 +1,28 @@
+typedef enum omp_allocator_handle_t
+#if __cplusplus >= 201103L
+: __UINTPTR_TYPE__
+#endif
+{
+  omp_null_allocator = 0,
+  omp_default_mem_alloc = 1,
+  omp_large_cap_mem_alloc = 2,
+  omp_const_mem_alloc = 3,
+  omp_high_bw_mem_alloc = 4,
+  omp_low_lat_mem_alloc = 5,
+  omp_cgroup_mem_alloc = 6,
+  omp_pteam_mem_alloc = 7,
+  omp_thread_mem_alloc = 8,
+  __omp_allocator_handle_t_max__ = __UINTPTR_MAX__
+} omp_allocator_handle_t;
+
+void
+f ()
+{
+  int i;
+  #pragma omp parallel firstprivate(i) \
+allocate(allocator(omp_low_latency_mem_alloc): i)
+/* { dg-error "'omp_low_latency_mem_alloc' undeclared \\(first use in this function\\); did you mean 'omp_low_lat_mem_alloc'\\\?" "" { target c } .-1 } */
+/* { dg-error "'omp_low_latency_mem_alloc' was not declared in this scope; did you mean 'omp_low_lat_mem_alloc'\\\?" "" { target c++ } .-2 } */
+/* { dg-note "each undeclared identifier is reported only once for each function it appears in" "" { target c } .-3 } */
+   i = 4;
+}

Re: [PATCH 06/11] aarch64: Fix pac-ret eh_return tests

[Richard Sandiford via Gcc-patches]

Szabolcs Nagy  writes:
> This is needed since eh_return no longer prevents pac-ret in the
> normal return path.
>
> gcc/testsuite/ChangeLog:
>
>   * gcc.target/aarch64/return_address_sign_1.c: Move func4 to ...
>   * gcc.target/aarch64/return_address_sign_2.c: ... here and fix the
>   scan asm check.
>   * gcc.target/aarch64/return_address_sign_b_1.c: Move func4 to ...
>   * gcc.target/aarch64/return_address_sign_b_2.c: ... here and fix the
>   scan asm check.
> ---
>  .../gcc.target/aarch64/return_address_sign_1.c  | 13 +
>  .../gcc.target/aarch64/return_address_sign_2.c  | 17 +++--
>  .../aarch64/return_address_sign_b_1.c   | 11 ---
>  .../aarch64/return_address_sign_b_2.c   | 17 +++--
>  4 files changed, 31 insertions(+), 27 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/return_address_sign_1.c 
> b/gcc/testsuite/gcc.target/aarch64/return_address_sign_1.c
> index 232ba67ade0..114a9dacb3f 100644
> --- a/gcc/testsuite/gcc.target/aarch64/return_address_sign_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/return_address_sign_1.c
> @@ -37,16 +37,5 @@ func3 (int a, int b, int c)
>/* autiasp */
>  }
>  
> -/* eh_return.  */
> -void __attribute__ ((target ("arch=armv8.3-a")))
> -func4 (long offset, void *handler, int *ptr, int imm1, int imm2)
> -{
> -  /* no paciasp */
> -  *ptr = imm1 + foo (imm1) + imm2;
> -  __builtin_eh_return (offset, handler);
> -  /* no autiasp */
> -  return;
> -}
> -
> -/* { dg-final { scan-assembler-times "autiasp" 3 } } */
>  /* { dg-final { scan-assembler-times "paciasp" 3 } } */
> +/* { dg-final { scan-assembler-times "autiasp" 3 } } */

I suppose there is no normal return path here.  I don't know how quickly
we'd realise that though, in the sense that the flag register becomes known-1.
But a quick-and-dirty check would be whether the exit block has a single
predecessor, which in a function that calls eh_return should mean
that the eh_return is unconditional.

But that might not be worth worrying about, given the builtin's limited
use case.  And even if it is worth worrying about, keeping the test in
this file would mix correctness with optimisation, which isn't a good
thing for scan-assembler-times.

So yeah, I agree this is OK.  It should probably be part of 03 though,
so that no individual commit causes a regression.

Thanks,
Richard

> diff --git a/gcc/testsuite/gcc.target/aarch64/return_address_sign_2.c 
> b/gcc/testsuite/gcc.target/aarch64/return_address_sign_2.c
> index a4bc5b45333..d93492c3c43 100644
> --- a/gcc/testsuite/gcc.target/aarch64/return_address_sign_2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/return_address_sign_2.c
> @@ -14,5 +14,18 @@ func1 (int a, int b, int c)
>/* retaa */
>  }
>  
> -/* { dg-final { scan-assembler-times "paciasp" 1 } } */
> -/* { dg-final { scan-assembler-times "retaa" 1 } } */
> +/* eh_return.  */
> +void __attribute__ ((target ("arch=armv8.3-a")))
> +func4 (long offset, void *handler, int *ptr, int imm1, int imm2)
> +{
> +  /* paciasp */
> +  *ptr = imm1 + foo (imm1) + imm2;
> +  if (handler)
> +/* br */
> +__builtin_eh_return (offset, handler);
> +  /* retaa */
> +  return;
> +}
> +
> +/* { dg-final { scan-assembler-times "paciasp" 2 } } */
> +/* { dg-final { scan-assembler-times "retaa" 2 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_1.c 
> b/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_1.c
> index 43e32ab6cb7..697fa30dc5a 100644
> --- a/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_1.c
> @@ -37,16 +37,5 @@ func3 (int a, int b, int c)
>/* autibsp */
>  }
>  
> -/* eh_return.  */
> -void __attribute__ ((target ("arch=armv8.3-a")))
> -func4 (long offset, void *handler, int *ptr, int imm1, int imm2)
> -{
> -  /* no pacibsp */
> -  *ptr = imm1 + foo (imm1) + imm2;
> -  __builtin_eh_return (offset, handler);
> -  /* no autibsp */
> -  return;
> -}
> -
>  /* { dg-final { scan-assembler-times "pacibsp" 3 } } */
>  /* { dg-final { scan-assembler-times "autibsp" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_2.c 
> b/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_2.c
> index 9ed64ce0591..748924c72f3 100644
> --- a/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/return_address_sign_b_2.c
> @@ -14,5 +14,18 @@ func1 (int a, int b, int c)
>/* retab */
>  }
>  
> -/* { dg-final { scan-assembler-times "pacibsp" 1 } } */
> -/* { dg-final { scan-assembler-times "retab" 1 } } */
> +/* eh_return.  */
> +void __attribute__ ((target ("arch=armv8.3-a")))
> +func4 (long offset, void *handler, int *ptr, int imm1, int imm2)
> +{
> +  /* paciasp */
> +  *ptr = imm1 + foo (imm1) + imm2;
> +  if (handler)
> +/* br */
> +__builtin_eh_return (offset, handler);
> +  /* retab */
> +  return;
> +}
> +
> +/* { dg-final { scan-assembler-ti

Re: [PATCH 07/11] aarch64: Disable branch-protection for pcs tests

[Richard Sandiford via Gcc-patches]

Szabolcs Nagy  writes:
> The tests manipulate the return address in abitest-2.h and thus not
> compatible with -mbranch-protection=pac-ret+leaf or
> -mbranch-protection=gcs.
>
> gcc/testsuite/ChangeLog:
>
>   * gcc.target/aarch64/aapcs64/func-ret-1.c: Disable branch-protection.
>   * gcc.target/aarch64/aapcs64/func-ret-2.c: Likewise.
>   * gcc.target/aarch64/aapcs64/func-ret-3.c: Likewise.
>   * gcc.target/aarch64/aapcs64/func-ret-4.c: Likewise.
>   * gcc.target/aarch64/aapcs64/func-ret-64x1_1.c: Likewise.

OK, thanks.

Richard

> ---
>  gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c  | 1 +
>  gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c  | 1 +
>  gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c  | 1 +
>  gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c  | 1 +
>  gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c | 1 +
>  5 files changed, 5 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c 
> b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
> index 5405e1e4920..7bd7757efe6 100644
> --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
> @@ -4,6 +4,7 @@
> AAPCS64 \S 4.1.  */
>  
>  /* { dg-do run { target aarch64*-*-* } } */
> +/* { dg-additional-options "-mbranch-protection=none" } */
>  /* { dg-additional-sources "abitest.S" } */
>  
>  #ifndef IN_FRAMEWORK
> diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c 
> b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c
> index 6b171c46fbb..85a822ace4a 100644
> --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c
> @@ -4,6 +4,7 @@
> Homogeneous floating-point aggregate types are covered in func-ret-3.c.  
> */
>  
>  /* { dg-do run { target aarch64*-*-* } } */
> +/* { dg-additional-options "-mbranch-protection=none" } */
>  /* { dg-additional-sources "abitest.S" } */
>  
>  #ifndef IN_FRAMEWORK
> diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c 
> b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c
> index ad312b675b9..1d35ebf14b4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c
> +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c
> @@ -4,6 +4,7 @@
> in AAPCS64 \S 4.3.5.  */
>  
>  /* { dg-do run { target aarch64-*-* } } */
> +/* { dg-additional-options "-mbranch-protection=none" } */
>  /* { dg-additional-sources "abitest.S" } */
>  /* { dg-require-effective-target aarch64_big_endian } */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c 
> b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c
> index af05fbe9fdf..15e1408c62d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c
> +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c
> @@ -5,6 +5,7 @@
> are treated as general composite types.  */
>  
>  /* { dg-do run { target aarch64*-*-* } } */
> +/* { dg-additional-options "-mbranch-protection=none" } */
>  /* { dg-additional-sources "abitest.S" } */
>  /* { dg-require-effective-target aarch64_big_endian } */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c 
> b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c
> index 05957e2dcae..fe7bbb6a835 100644
> --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-64x1_1.c
> @@ -3,6 +3,7 @@
>Test 64-bit singleton vector types which should be in FP/SIMD registers.  
> */
>  
>  /* { dg-do run { target aarch64*-*-* } } */
> +/* { dg-additional-options "-mbranch-protection=none" } */
>  /* { dg-additional-sources "abitest.S" } */
>  
>  #ifndef IN_FRAMEWORK

Re: [PATCH] c++: improve verify_constant diagnostic [PR91483]

[Jason Merrill via Gcc-patches]

On 9/1/23 20:00, Marek Polacek wrote:

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?

-- >8 --

When verify_constant complains, it's pretty terse.  Consider

   void test ()
   {
 constexpr int i = 42;
 constexpr const int *p = &i;
   }

where it says "'& i' is not a constant expression".  OK, but why?

With this patch, we say:

b.C:5:28: error: '& i' is not a constant expression
 5 |   constexpr const int *p = &i;
   |^~
b.C:5:28: note: pointer to 'i' is not a constant expression
b.C:4:17: note: address of non-static constexpr variable 'i' may differ on each 
invocation of the enclosing function; add 'static' to give it a constant address
 4 |   constexpr int i = 42;
   | ^
   | static

which brings g++ on par with clang++.

gcc/cp/ChangeLog:

* constexpr.cc (verify_constant_explain_r): New.
(verify_constant): Call it.

gcc/testsuite/ChangeLog:

* g++.dg/diagnostic/constexpr3.C: New test.
---
  gcc/cp/constexpr.cc  | 56 +++-
  gcc/testsuite/g++.dg/diagnostic/constexpr3.C | 32 +++
  2 files changed, 87 insertions(+), 1 deletion(-)
  create mode 100644 gcc/testsuite/g++.dg/diagnostic/constexpr3.C

diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index 8bd5c4a47f8..6d5aed82377 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -3381,6 +3381,54 @@ ok:
  }
  }
  
+/* *TP was not deemed constant by reduced_constant_expression_p.  Explain

+   why and suggest what could be done about it.  */
+
+static tree
+verify_constant_explain_r (tree *tp, int *, void *)
+{
+  bool ref_p = false;


I think you'll want something along the lines of

  /* No need to look into types or unevaluated operands.  */
  if (TYPE_P (init) || unevaluated_p (code))
{
  *walk_subtrees = false;
  return NULL_TREE;
}

(from find_uninit_fields_r).

OK with that change.

Jason

Re: [PATCH 10/11] aarch64: Fix branch-protection error message tests

[Richard Sandiford via Gcc-patches]

Szabolcs Nagy  writes:
> Update tests for the new branch-protection parser errors.
>
> gcc/testsuite/ChangeLog:
>
>   * gcc.target/aarch64/branch-protection-attr.c: Update.
>   * gcc.target/aarch64/branch-protection-option.c: Update.

OK, thanks.  (And I agree these are better messages. :))

I think that's the last of the AArch64-specific ones.  The others
will need to be reviewed by Kyrill or Richard.

Richard

> ---
>  gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c   | 6 +++---
>  gcc/testsuite/gcc.target/aarch64/branch-protection-option.c | 2 +-
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c 
> b/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c
> index 272000c2747..dae2a758a56 100644
> --- a/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c
> +++ b/gcc/testsuite/gcc.target/aarch64/branch-protection-attr.c
> @@ -4,19 +4,19 @@ void __attribute__ ((target("branch-protection=leaf")))
>  foo1 ()
>  {
>  }
> -/* { dg-error {invalid protection type 'leaf' in 
> 'target\("branch-protection="\)' pragma or attribute} "" { target *-*-* } 5 } 
> */
> +/* { dg-error {invalid argument 'leaf' for 'target\("branch-protection="\)'} 
> "" { target *-*-* } 5 } */
>  /* { dg-error {pragma or attribute 'target\("branch-protection=leaf"\)' is 
> not valid} "" { target *-*-* } 5 } */
>  
>  void __attribute__ ((target("branch-protection=none+pac-ret")))
>  foo2 ()
>  {
>  }
> -/* { dg-error "unexpected 'pac-ret' after 'none'" "" { target *-*-* } 12 } */
> +/* { dg-error {argument 'none' can only appear alone in 
> 'target\("branch-protection="\)'} "" { target *-*-* } 12 } */
>  /* { dg-error {pragma or attribute 
> 'target\("branch-protection=none\+pac-ret"\)' is not valid} "" { target *-*-* 
> } 12 } */
>  
>  void __attribute__ ((target("branch-protection=")))
>  foo3 ()
>  {
>  }
> -/* { dg-error {missing argument to 'target\("branch-protection="\)' pragma 
> or attribute} "" { target *-*-* } 19 } */
> +/* { dg-error {invalid argument '' for 'target\("branch-protection="\)'} "" 
> { target *-*-* } 19 } */
>  /* { dg-error {pragma or attribute 'target\("branch-protection="\)' is not 
> valid} "" { target *-*-* } 19 } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/branch-protection-option.c 
> b/gcc/testsuite/gcc.target/aarch64/branch-protection-option.c
> index 1b3bf4ee2b8..e2f847a31c4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/branch-protection-option.c
> +++ b/gcc/testsuite/gcc.target/aarch64/branch-protection-option.c
> @@ -1,4 +1,4 @@
>  /* { dg-do "compile" } */
>  /* { dg-options "-mbranch-protection=leaf -mbranch-protection=none+pac-ret" 
> } */
>  
> -/* { dg-error "unexpected 'pac-ret' after 'none'"  "" { target *-*-* } 0 } */
> +/* { dg-error "argument 'none' can only appear alone in 
> '-mbranch-protection='" "" { target *-*-* } 0 } */

[Committed] RISC-V: zicond: Fix opt2 pattern

[Vineet Gupta]

Fixes: 1d5bc3285e8a ("[committed][RISC-V] Fix 20010221-1.c with zicond")

This was tripping up gcc.c-torture/execute/pr60003.c at -O1 since in
failing case, pattern semantics were not matching with asm czero.nez

We start with the following src code snippet:

  if (a == 0)
return 0;
  else
return x;
}

which is equivalent to:  "x = (a != 0) ? x : a" where x is NOT 0.


and matches define_insn "*czero.nez..opt2"

| (insn 41 20 38 3 (set (reg/v:DI 136 [ x ])
|(if_then_else:DI (ne (reg/v:DI 134 [ a ])
|(const_int 0 [0]))
|(reg/v:DI 136 [ x ])
|(reg/v:DI 134 [ a ]))) {*czero.nez.didi.opt2}

The corresponding asm pattern generates
czero.nez x, x, a   ; %0, %2, %1

which implies
"x = (a != 0) ? 0 : a"

clearly not what the pattern wants to do.

Essentially "(a != 0) ? x : a" cannot be expressed with CZERO.nez if X
is not guaranteed to be 0.

However this can be fixed with a small tweak

"x = (a != 0) ? x : a"

   is same as

"x = (a == 0) ? a : x"

and since middle operand is 0 when a == 0, it is equivalent to

"x = (a == 0) ? 0 : x"

which can be expressed with CZERO.eqz

before fix  after fix
-   -
lia5,1  lia5,1
lda4,8(sp)  lda4,8(sp)
czero.nez a0,a4,a5  czero.eqz a0,a4,a5

The issue only happens at -O1 as at higher optimization levels, the
whole conditional move gets optimized away.

This fixes 4 testsuite failues in a zicond build:

FAIL: gcc.c-torture/execute/pr60003.c   -O1  execution test
FAIL: gcc.dg/setjmp-3.c execution test
FAIL: gcc.dg/torture/stackalign/setjmp-3.c   -O1  execution test
FAIL: gcc.dg/torture/stackalign/setjmp-3.c   -O1 -fpic execution test

gcc/ChangeLog:
* config/riscv/zicond.md: Fix op2 pattern.

Signed-off-by: Vineet Gupta 
---
 gcc/config/riscv/zicond.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md
index 4619220ef8ac..1721e1011ea8 100644
--- a/gcc/config/riscv/zicond.md
+++ b/gcc/config/riscv/zicond.md
@@ -60,7 +60,7 @@
   (match_operand:GPR 2 "register_operand" "r")
   (match_operand:GPR 3 "register_operand" "1")))]
   "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])"
-  "czero.nez\t%0,%2,%1"
+  "czero.eqz\t%0,%2,%1"
 )
 
 ;; Combine creates this form in some cases (particularly the coremark
-- 
2.34.1

Re: [Patch] contrib/gcc-changelog: Check whether revert-commit exists

[Arsen Arsenović via Gcc-patches]

Tobias Burnus  writes:

> Attached an old patch. See attached patch for the current one.
>
> Difference is one line: the warning that is shown in the example output
> below.

Python-wise, the changes seem fine.  Unsure if it does the right thing,
though, since I'm not familiar with the full script.
-- 
Arsen Arsenović


signature.asc
Description: PGP signature

[PATCH] riscv: xtheadbb: Enable constant synthesis with th.srri

[Christoph Muellner]

From: Christoph Müllner 

Some constants can be built up using rotate-right instructions.
The code that enables this can be found in riscv_build_integer_1().
However, this functionality is only available for Zbb, which
includes the rori instruction.  This patch enables this also for
XTheadBb, which includes the th.srri instruction.

Signed-off-by: Christoph Müllner 

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
synthesis with rotate-right for XTheadBb.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/xtheadbb-li-rotr.c: New test.
---
 gcc/config/riscv/riscv.cc |  2 +-
 .../gcc.target/riscv/xtheadbb-li-rotr.c   | 34 +++
 2 files changed, 35 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-li-rotr.c

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 2db9c81ac8b..ef63079de8e 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -566,7 +566,7 @@ riscv_build_integer_1 (struct riscv_integer_op 
codes[RISCV_MAX_INTEGER_OPS],
}
 }
 
-  if (cost > 2 && TARGET_64BIT && TARGET_ZBB)
+  if (cost > 2 && TARGET_64BIT && (TARGET_ZBB || TARGET_XTHEADBB))
 {
   int leading_ones = clz_hwi (~value);
   int trailing_ones = ctz_hwi (~value);
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-li-rotr.c 
b/gcc/testsuite/gcc.target/riscv/xtheadbb-li-rotr.c
new file mode 100644
index 000..ecd50448d77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-li-rotr.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_xtheadbb" } */
+
+long
+li_rori (void)
+{
+  return 0x77ffL;
+}
+
+long
+li_rori_2 (void)
+{
+  return 0x77ffL;
+}
+
+long
+li_rori_3 (void)
+{
+  return 0xfffeefffL;
+}
+
+long
+li_rori_4 (void)
+{
+  return 0x5ff5L;
+}
+
+long
+li_rori_5 (void)
+{
+  return 0xaffaL;
+}
+
+/* { dg-final { scan-assembler-times "th.srri\t" 5 } } */
-- 
2.41.0

Re: [PATCH] riscv: xtheadbb: Enable constant synthesis with th.srri

[Jeff Law via Gcc-patches]

On 9/5/23 09:42, Christoph Muellner wrote:

From: Christoph Müllner 

Some constants can be built up using rotate-right instructions.
The code that enables this can be found in riscv_build_integer_1().
However, this functionality is only available for Zbb, which
includes the rori instruction.  This patch enables this also for
XTheadBb, which includes the th.srri instruction.

Signed-off-by: Christoph Müllner 

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
synthesis with rotate-right for XTheadBb.

OK
Jeff

Re: [PATCH] riscv: xtheadbb: Enable constant synthesis with th.srri

[Philipp Tomsich]

Applied to master. Thanks!
Philipp.

On Tue, 5 Sept 2023 at 18:10, Jeff Law  wrote:

>
>
> On 9/5/23 09:42, Christoph Muellner wrote:
> > From: Christoph Müllner 
> >
> > Some constants can be built up using rotate-right instructions.
> > The code that enables this can be found in riscv_build_integer_1().
> > However, this functionality is only available for Zbb, which
> > includes the rori instruction.  This patch enables this also for
> > XTheadBb, which includes the th.srri instruction.
> >
> > Signed-off-by: Christoph Müllner 
> >
> > gcc/ChangeLog:
> >
> >   * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
> >   synthesis with rotate-right for XTheadBb.
> OK
> Jeff
>

Re: [Committed] Add Types to Un-Typed Pic Instructions:

[Edwin Lu]

On 9/1/2023 6:15 AM, Jeff Law wrote:



On 8/31/23 17:01, Edwin Lu wrote:

Related Discussion:
https://inbox.sourceware.org/gcc-patches/12fb5088-3f28-0a69-de1e-f387371a5...@gmail.com/ 



This patch updates the pic instructions to ensure that no insn is left
without a type attribute.

Tested for regressions using rv32/64 multilib with newlib/linux.

gcc/Changelog:

* config/riscv/pic.md: Update types

OK.  THanks.
jeff


Committed!

Edwin

Re: [Committed] RISC-V: Add Types to Un-Typed Risc-v Instructions:

[Edwin Lu]

On 9/1/2023 11:02 AM, Jeff Law wrote:



On 8/31/23 11:32, Edwin Lu wrote:

Related Discussion:
https://inbox.sourceware.org/gcc-patches/12fb5088-3f28-0a69-de1e-f387371a5...@gmail.com/ 



This patch updates the riscv instructions to ensure that no insn is left
without a type attribute. Added new types: "trap" (self explanatory) 
and "cbo"

(for cache related instructions)

Tested for regressions using rv32/64 multilib for linux/newlib. Also 
tested

rv32/64 gcv for linux.

gcc/Changelog:

* config/riscv/riscv.md: Update/Add types

OK.

jeff


Committed!

Edwin

[PATCH 0/8] OpenMP: lvalue parsing and "declare mapper" support

[Julian Brown]

This series implements "lvalue" parsing for C and C++ map/to/from clauses,
and "declare mapper" support for C, C++ and Fortran.  This is the latter
part of the series that was previously posted for mainline here:

  https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609031.html

and is approximately equivalent to the series posted for the og13
branch here:

  https://gcc.gnu.org/pipermail/gcc-patches/2023-June/623352.html

though with several follow-up patches rolled in (as mentioned on the
following patch-specific emails).

This series applies on top of the infrastructural support series posted
here:

  https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627895.html

Tested with offloading to NVPTX and bootstrapped. OK?

Julian Brown (8):
  OpenMP: lvalue parsing for map/to/from clauses (C++)
  OpenMP: lvalue parsing for map/to/from clauses (C)
  OpenMP: C++ "declare mapper" support
  OpenMP: Support OpenMP 5.0 "declare mapper" directives for C
  OpenMP, Fortran: Pass list number to gfc_free_omp_namelist
  OpenMP, Fortran: Per-directive control for gfc_trans_omp_clauses
  OpenMP, Fortran: Split out OMP clause checking
  OpenMP: Fortran "!$omp declare mapper" support

 gcc/c-family/c-common.h   |   11 +-
 gcc/c-family/c-omp.cc |  500 ++-
 gcc/c-family/c-pretty-print.cc|   12 +
 gcc/c/c-decl.cc   |  169 +
 gcc/c/c-objc-common.h |   12 +
 gcc/c/c-parser.cc |  472 ++-
 gcc/c/c-tree.h|9 +
 gcc/c/c-typeck.cc |  124 +-
 gcc/cp/constexpr.cc   |   10 +
 gcc/cp/cp-gimplify.cc |6 +
 gcc/cp/cp-objcp-common.h  |9 +
 gcc/cp/cp-tree.h  |   19 +-
 gcc/cp/decl.cc|   27 +-
 gcc/cp/decl2.cc   |   54 +-
 gcc/cp/error.cc   |   34 +
 gcc/cp/parser.cc  |  514 ++-
 gcc/cp/parser.h   |3 +
 gcc/cp/pt.cc  |   84 +-
 gcc/cp/semantics.cc   |  260 +-
 gcc/cp/typeck.cc  |   50 +
 gcc/fortran/dump-parse-tree.cc|4 +
 gcc/fortran/f95-lang.cc   |7 +
 gcc/fortran/gfortran.h|   76 +-
 gcc/fortran/match.cc  |   14 +-
 gcc/fortran/match.h   |1 +
 gcc/fortran/module.cc |  257 +-
 gcc/fortran/openmp.cc | 2026 +++
 gcc/fortran/parse.cc  |   13 +-
 gcc/fortran/resolve.cc|2 +
 gcc/fortran/st.cc |2 +-
 gcc/fortran/symbol.cc |   16 +
 gcc/fortran/trans-decl.cc |   33 +-
 gcc/fortran/trans-openmp.cc   |  592 ++-
 gcc/fortran/trans-stmt.h  |1 +
 gcc/fortran/trans.h   |3 +
 gcc/gimplify.cc   |  560 ++-
 gcc/langhooks-def.h   |   13 +
 gcc/langhooks.cc  |   35 +
 gcc/langhooks.h   |   16 +
 gcc/omp-general.h |   86 +
 .../c-c++-common/gomp/declare-mapper-12.c |   22 +
 .../c-c++-common/gomp/declare-mapper-15.c |   59 +
 .../c-c++-common/gomp/declare-mapper-16.c |   39 +
 .../c-c++-common/gomp/declare-mapper-3.c  |   30 +
 .../c-c++-common/gomp/declare-mapper-4.c  |   78 +
 .../c-c++-common/gomp/declare-mapper-5.c  |   26 +
 .../c-c++-common/gomp/declare-mapper-6.c  |   23 +
 .../c-c++-common/gomp/declare-mapper-7.c  |   29 +
 .../c-c++-common/gomp/declare-mapper-8.c  |   43 +
 .../c-c++-common/gomp/declare-mapper-9.c  |   34 +
 gcc/testsuite/c-c++-common/gomp/map-6.c   |   14 +-
 gcc/testsuite/g++.dg/gomp/array-section-1.C   |   38 +
 gcc/testsuite/g++.dg/gomp/array-section-2.C   |   63 +
 .../g++.dg/gomp/bad-array-section-1.C |   35 +
 .../g++.dg/gomp/bad-array-section-10.C|   35 +
 .../g++.dg/gomp/bad-array-section-11.C|   36 +
 .../g++.dg/gomp/bad-array-section-2.C |   33 +
 .../g++.dg/gomp/bad-array-section-3.C |   28 +
 .../g++.dg/gomp/bad-array-section-4.C |   50 +
 .../g++.dg/gomp/bad-array-section-5.C |   50 +
 .../g++.dg/gomp/bad-array-section-6.C |   24 +
 .../g++.dg/gomp/bad-array-section-7.C |   36 +
 .../g++.dg/gomp/bad-array-section-8.C |   53 +
 .../g++.dg/gomp/bad-array-section-9.C |   39 +
 gcc/testsuite/g++.dg/gomp/declare-mapper-1.C  |   58 +
 gcc/testsuite/g++.dg/gomp/declare-mapper-2.C  |   30 +
 .../gomp/has_device_addr-non-lvalue-1.C   |   36 +
 gcc/testsuite/g++.

[PATCH 2/8] OpenMP: lvalue parsing for map/to/from clauses (C)

[Julian Brown]

This patch adds support for parsing general lvalues ("locator list item
types") for OpenMP "map", "to" and "from" clauses to the C front-end,
similar to the previously-posted patch for C++.  Such syntax is permitted
for OpenMP 5.0 and above.  It was previously posted for mainline here:

  https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609038.html

and for the og13 branch here:

  https://gcc.gnu.org/pipermail/gcc-patches/2023-June/623355.html

2023-09-05  Julian Brown  

gcc/c/
* c-pretty-print.cc (c_pretty_printer::postfix_expression,
c_pretty_printer::expression): Add OMP_ARRAY_SECTION support.
* c-parser.cc (c_parser_braced_init, c_parser_conditional_expression):
Don't allow OpenMP array section.
(c_parser_postfix_expression): Don't allow array section in statement
expression.
(c_parser_postfix_expression_after_primary): Add support for OpenMP
array section parsing.
(c_parser_expr_list): Don't allow OpenMP array section here.
(c_parser_omp_variable_list): Change ALLOW_DEREF parameter to
MAP_LVALUE.  Support parsing of general lvalues in "map", "to" and
"from" clauses.
(c_parser_omp_var_list_parens): Change ALLOW_DEREF parameter to
MAP_LVALUE.  Update call to c_parser_omp_variable_list.
(c_parser_oacc_data_clause): Update calls to
c_parser_omp_var_list_parens.
(c_parser_omp_clause_reduction): Use OMP_ARRAY_SECTION tree node
instead of TREE_LIST for array sections.
(c_parser_omp_target): Allow GOMP_MAP_ATTACH.
* c-tree.h (c_omp_array_section_p): Add extern declaration.
(build_omp_array_section): Add prototype.
* c-typeck.c (c_omp_array_section_p): Add flag.
(mark_exp_read): Support OMP_ARRAY_SECTION.
(build_omp_array_section): Add function.
(build_external_ref): Tweak error path for OpenMP array sections.
(handle_omp_array_sections_1): Use OMP_ARRAY_SECTION tree code instead
of TREE_LIST.  Handle more kinds of expressions.
(c_oacc_check_attachments): Use OMP_ARRAY_SECTION instead of TREE_LIST
for array sections.
(c_finish_omp_clauses): Use OMP_ARRAY_SECTION instead of TREE_LIST.
Check for supported expression types.

gcc/testsuite/
* gcc.dg/gomp/bad-array-section-c-1.c: New test.
* gcc.dg/gomp/bad-array-section-c-2.c: New test.
* gcc.dg/gomp/bad-array-section-c-3.c: New test.
* gcc.dg/gomp/bad-array-section-c-4.c: New test.
* gcc.dg/gomp/bad-array-section-c-5.c: New test.
* gcc.dg/gomp/bad-array-section-c-6.c: New test.
* gcc.dg/gomp/bad-array-section-c-7.c: New test.
* gcc.dg/gomp/bad-array-section-c-8.c: New test.

libgomp/
* testsuite/libgomp.c-c++-common/ind-base-4.c: New test.
* testsuite/libgomp.c-c++-common/unary-ptr-1.c: New test.
---
 gcc/c-family/c-pretty-print.cc|  12 ++
 gcc/c/c-parser.cc | 181 +++---
 gcc/c/c-tree.h|   2 +
 gcc/c/c-typeck.cc | 109 +--
 .../gcc.dg/gomp/bad-array-section-c-1.c   |  16 ++
 .../gcc.dg/gomp/bad-array-section-c-2.c   |  13 ++
 .../gcc.dg/gomp/bad-array-section-c-3.c   |  24 +++
 .../gcc.dg/gomp/bad-array-section-c-4.c   |  26 +++
 .../gcc.dg/gomp/bad-array-section-c-5.c   |  15 ++
 .../gcc.dg/gomp/bad-array-section-c-6.c   |  16 ++
 .../gcc.dg/gomp/bad-array-section-c-7.c   |  26 +++
 .../gcc.dg/gomp/bad-array-section-c-8.c   |  21 ++
 .../libgomp.c-c++-common/ind-base-4.c |  50 +
 .../libgomp.c-c++-common/unary-ptr-1.c|  16 ++
 14 files changed, 482 insertions(+), 45 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-1.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-2.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-3.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-4.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-5.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-6.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-7.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/bad-array-section-c-8.c
 create mode 100644 libgomp/testsuite/libgomp.c-c++-common/ind-base-4.c
 create mode 100644 libgomp/testsuite/libgomp.c-c++-common/unary-ptr-1.c

diff --git a/gcc/c-family/c-pretty-print.cc b/gcc/c-family/c-pretty-print.cc
index 7536a7c471ff..225ac7ef2851 100644
--- a/gcc/c-family/c-pretty-print.cc
+++ b/gcc/c-family/c-pretty-print.cc
@@ -1615,6 +1615,17 @@ c_pretty_printer::postfix_expression (tree e)
   pp_c_right_bracket (this);
   break;
 
+case OMP_ARRAY_SECTION:
+  postfix_expression (TREE_OPERAND (e, 0));
+  pp_c_left_bracket (this);
+  if (TREE_OPERAND (e, 1))
+   expression (TREE_OPERAND (e, 1));
+  

[PATCH 3/8] OpenMP: C++ "declare mapper" support

[Julian Brown]

This patch adds support for OpenMP 5.0 "declare mapper" functionality
for C++.  This is based on the version of the patch posted for the og13
branch here:

  https://gcc.gnu.org/pipermail/gcc-patches/2023-June/623353.html

The following follow up patches/fixes have also been incorporated into
this version:

"OpenMP: Expand "declare mapper" mappers for target {enter,exit,}
data directives":

  https://gcc.gnu.org/pipermail/gcc-patches/2023-July/623780.html

"OpenMP: Introduce C_ORT_{,OMP_}DECLARE_MAPPER c_omp_region_type types":

  https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627005.html

2023-09-05  Julian Brown  

gcc/c-family/
* c-common.h (c_omp_region_type): Add C_ORT_EXIT_DATA,
C_ORT_DECLARE_MAPPER, C_ORT_OMP_EXIT_DATA, C_ORT_OMP_DECLARE_MAPPER
values.
(omp_mapper_list): Add forward declaration.
(c_omp_find_nested_mappers, c_omp_instantiate_mappers): Add prototypes.
* c-omp.cc (c_omp_find_nested_mappers): New function.
(remap_mapper_decl_info): New struct.
(remap_mapper_decl_1, omp_split_map_kind, omp_join_map_kind,
omp_map_decayed_kind, omp_instantiate_mapper,
c_omp_instantiate_mappers): New functions.

gcc/cp/
* constexpr.cc (reduced_constant_expression_p): Add OMP_DECLARE_MAPPER
case.
(cxx_eval_constant_expression, potential_constant_expression_1):
Likewise.
* cp-gimplify.cc (cxx_omp_finish_mapper_clauses): New function.
* cp-objcp-common.h (LANG_HOOKS_OMP_FINISH_MAPPER_CLAUSES,
LANG_HOOKS_OMP_MAPPER_LOOKUP, LANG_HOOKS_OMP_EXTRACT_MAPPER_DIRECTIVE,
LANG_HOOKS_OMP_MAP_ARRAY_SECTION): Define langhooks.
* cp-tree.h (lang_decl_base): Add omp_declare_mapper_p field.  Recount
spare bits comment.
(DECL_OMP_DECLARE_MAPPER_P): New macro.
(omp_mapper_id, cp_check_omp_declare_mapper, omp_instantiate_mappers,
cxx_omp_finish_mapper_clauses, cxx_omp_mapper_lookup,
cxx_omp_extract_mapper_directive, cxx_omp_map_array_section): Add
prototypes.
* decl.cc (check_initializer): Add OpenMP declare mapper support.
(cp_finish_decl): Set DECL_INITIAL for OpenMP declare mapper var decls
as appropriate.
* decl2.cc (mark_used): Instantiate OpenMP "declare mapper" magic var
decls.
* error.cc (dump_omp_declare_mapper): New function.
(dump_simple_decl): Use above.
* parser.cc (cp_parser_omp_clause_map): Add KIND parameter.  Support
"mapper" modifier.
(cp_parser_omp_all_clauses): Add KIND argument to
cp_parser_omp_clause_map call.
(cp_parser_omp_target): Call omp_instantiate_mappers before
finish_omp_clauses.
(cp_parser_omp_declare_mapper): New function.
(cp_parser_omp_declare): Add "declare mapper" support.
* pt.cc (tsubst_decl): Adjust name of "declare mapper" magic var decls
once we know their type.
(tsubst_omp_clauses): Call omp_instantiate_mappers before
finish_omp_clauses, for target regions.
(tsubst_expr): Support OMP_DECLARE_MAPPER nodes.
(instantiate_decl): Instantiate initialiser (i.e definition) for OpenMP
declare mappers.
* semantics.cc (gimplify.h): Include.
(omp_mapper_id, cxx_omp_mapper_lookup, cxx_omp_extract_mapper_directive,
cxx_omp_map_array_section, cp_check_omp_declare_mapper): New functions.
(finish_omp_clauses): Delete GOMP_MAP_PUSH_MAPPER_NAME and
GOMP_MAP_POP_MAPPER_NAME artificial clauses.
(omp_target_walk_data): Add MAPPERS field.
(finish_omp_target_clauses_r): Scan for uses of struct/union/class type
variables.
(finish_omp_target_clauses): Create artificial mapper binding clauses
for used structs/unions/classes in offload region.

gcc/fortran/
* parse.cc (tree.h, fold-const.h, tree-hash-traits.h): Add includes
(for additions to omp-general.h).

gcc/
* gimplify.cc (gimplify_omp_ctx): Add IMPLICIT_MAPPERS field.
(new_omp_context): Initialise IMPLICIT_MAPPERS hash map.
(delete_omp_context): Delete IMPLICIT_MAPPERS hash map.
(instantiate_mapper_info): New structs.
(remap_mapper_decl_1, omp_mapper_copy_decl, omp_instantiate_mapper,
omp_instantiate_implicit_mappers): New functions.
(gimplify_scan_omp_clauses): Handle MAPPER_BINDING clauses.
(gimplify_adjust_omp_clauses): Instantiate implicit declared mappers.
(gimplify_omp_declare_mapper): New function.
(gimplify_expr): Call above function.
* langhooks-def.h (lhd_omp_finish_mapper_clauses,
lhd_omp_mapper_lookup, lhd_omp_extract_mapper_directive,
lhd_omp_map_array_section): Add prototypes.
(LANG_HOOKS_OMP_FINISH_MAPPER_CLAUSES,
LANG_HOOKS_OMP_MAPPER_LOOKUP, LANG_HOOKS_OMP_EXTRACT_MAPPER_DIRECTIVE,
LANG_HOOKS_OMP_MAP_ARRAY_SECTION): Define macros.
(LANG_H

[PATCH 4/8] OpenMP: Support OpenMP 5.0 "declare mapper" directives for C

[Julian Brown]

This patch adds support for "declare mapper" directives (and the "mapper"
modifier on "map" clauses) for C.  It was previously posted for mainline
here:

  https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609041.html

and for the og13 branch here:

  https://gcc.gnu.org/pipermail/gcc-patches/2023-June/623356.html

This version supports mappers on "target data", "target enter data" and
"target exit data" directives as well as on "target" directives.

2023-09-05  Julian Brown  

gcc/c/
* c-decl.cc (c_omp_mapper_id, c_omp_mapper_decl, c_omp_mapper_lookup,
c_omp_extract_mapper_directive, c_omp_map_array_section,
c_omp_scan_mapper_bindings_r, c_omp_scan_mapper_bindings): New
functions.
* c-objc-common.h (LANG_HOOKS_OMP_FINISH_MAPPER_CLAUSES,
LANG_HOOKS_OMP_MAPPER_LOOKUP, LANG_HOOKS_OMP_EXTRACT_MAPPER_DIRECTIVE,
LANG_HOOKS_OMP_MAP_ARRAY_SECTION): Define langhooks for C.
* c-parser.cc (c_parser_omp_clause_map): Add KIND parameter.  Handle
mapper modifier.
(c_parser_omp_all_clauses): Update call to c_parser_omp_clause_map with
new kind argument.
(c_parser_omp_target_data, c_parser_omp_target_enter_data,
c_parser_omp_target_exit_data): Instantiate explicit mappers.
(c_parser_omp_target): Instantiate explicit mappers and record bindings
for implicit mappers.
(c_parser_omp_declare_mapper): Parse "declare mapper" directives.
(c_parser_omp_declare): Support "declare mapper".
* c-tree.h (c_omp_finish_mapper_clauses, c_omp_mapper_lookup,
c_omp_extract_mapper_directive, c_omp_map_array_section,
c_omp_mapper_id, c_omp_mapper_decl, c_omp_scan_mapper_bindings): Add
prototypes.
* c-typeck.cc (c_finish_omp_clauses): Handle GOMP_MAP_PUSH_MAPPER_NAME
and GOMP_MAP_POP_MAPPER_NAME.
(c_omp_finish_mapper_clauses): New function (langhook).

gcc/testsuite/
* c-c++-common/gomp/declare-mapper-3.c: Enable for C.
* c-c++-common/gomp/declare-mapper-4.c: Likewise.
* c-c++-common/gomp/declare-mapper-5.c: Likewise.
* c-c++-common/gomp/declare-mapper-6.c: Likewise.
* c-c++-common/gomp/declare-mapper-7.c: Likewise.
* c-c++-common/gomp/declare-mapper-8.c: Likewise.
* c-c++-common/gomp/declare-mapper-9.c: Likewise.
* c-c++-common/gomp/declare-mapper-12.c: Likewise.
* c-c++-common/gomp/declare-mapper-15.c: Likewise.
* c-c++-common/gomp/declare-mapper-16.c: Likewise.
* gcc.dg/gomp/declare-mapper-10.c: New test.
* gcc.dg/gomp/declare-mapper-11.c: New test.

libgomp/
* testsuite/libgomp.c-c++-common/declare-mapper-9.c: Enable for C.
* testsuite/libgomp.c-c++-common/declare-mapper-10.c: Likewise.
* testsuite/libgomp.c-c++-common/declare-mapper-11.c: Likewise.
* testsuite/libgomp.c-c++-common/declare-mapper-12.c: Likewise.
* testsuite/libgomp.c-c++-common/declare-mapper-13.c: Likewise.
* testsuite/libgomp.c-c++-common/declare-mapper-14.c: Likewise.
---
 gcc/c/c-decl.cc   | 169 ++
 gcc/c/c-objc-common.h |  12 +
 gcc/c/c-parser.cc | 291 --
 gcc/c/c-tree.h|   7 +
 gcc/c/c-typeck.cc |  15 +
 .../c-c++-common/gomp/declare-mapper-12.c |   2 +-
 .../c-c++-common/gomp/declare-mapper-15.c |   2 +-
 .../c-c++-common/gomp/declare-mapper-16.c |   2 +-
 .../c-c++-common/gomp/declare-mapper-3.c  |   2 +-
 .../c-c++-common/gomp/declare-mapper-4.c  |   2 +-
 .../c-c++-common/gomp/declare-mapper-5.c  |   2 +-
 .../c-c++-common/gomp/declare-mapper-6.c  |   2 +-
 .../c-c++-common/gomp/declare-mapper-7.c  |   2 +-
 .../c-c++-common/gomp/declare-mapper-8.c  |   2 +-
 .../c-c++-common/gomp/declare-mapper-9.c  |   2 +-
 gcc/testsuite/gcc.dg/gomp/declare-mapper-10.c |  61 
 gcc/testsuite/gcc.dg/gomp/declare-mapper-11.c |  33 ++
 .../libgomp.c-c++-common/declare-mapper-10.c  |   2 +-
 .../libgomp.c-c++-common/declare-mapper-11.c  |   2 +-
 .../libgomp.c-c++-common/declare-mapper-12.c  |   2 +-
 .../libgomp.c-c++-common/declare-mapper-13.c  |   2 +-
 .../libgomp.c-c++-common/declare-mapper-14.c  |   2 +-
 .../libgomp.c-c++-common/declare-mapper-9.c   |   2 +-
 23 files changed, 584 insertions(+), 36 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/gomp/declare-mapper-10.c
 create mode 100644 gcc/testsuite/gcc.dg/gomp/declare-mapper-11.c

diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index 1f9eb44dbaa2..ac71092fcad6 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -13144,6 +13144,175 @@ c_check_omp_declare_reduction_r (tree *tp, int *, 
void *data)
   return NULL_TREE;
 }
 
+/* Return identifier to look up for omp declare reduction.  */
+
+tree
+c_omp_mapper_id (tree mapper_id)
+{
+  const char *p = NULL;
+
+  const char prefix