[PATCH][i386] Fix vec_construct cost, remove unused ix86_vec_cost arg

[Richard Biener]

The following fixes vec_construct cost calculation to properly consider
that the inserts will happen to SSE regs thus forgo the multiplication
done in ix86_vec_cost which is passed the wrong mode.  This gets rid of
the only call passing false to ix86_vec_cost (so consider the patch
amended to remove the arg if approved).

Bootstrapped and tested on x86_64-unknown-linux-gnu.

OK for trunk?

I am considering to make the factor we apply in ix86_vec_cost
which currently depends on X86_TUNE_AVX128_OPTIMAL and
X86_TUNE_SSE_SPLIT_REGS part of the actual cost tables since
the reason we apply them are underlying CPU architecture details.
Was the original reason of doing the multiplication based on
those tunings to be able to "share" the same basic cost table
across architectures that differ in this important detail?
I see X86_TUNE_SSE_SPLIT_REGS is only used for m_ATHLON_K8
and X86_TUNE_AVX128_OPTIMAL is used for m_BDVER, m_BTVER2
and m_ZNVER1.  Those all have (multiple) exclusive processor_cost_table
entries.

As a first step I'd like to remove the use of ix86_vec_cost for
the entries that already have entries for multiple modes
(loads and stores) and apply the factor there.  For example
Zen can do two 128bit loads per cycle but only one 128bit store.
With multiplying AVX256 costs by two we seem to cost sth like
# instructions to dispatch * instruction latency which is an
odd thing.  I'd have expected # instructions to dispatch / instruction 
throughput * instruction latency - so a AVX256 add would cost
the same as a AVX128 add, likewise for loads but stores would be
more expensive because of the throughput issue.  This all
ignores resource utilization across multiple insns but that's
how the cost model works ...

Thanks,
Richard.

2018-10-11  Richard Biener  

* config/i386/i386.c (ix86_vec_cost): Remove !parallel path
and argument.
(ix86_builtin_vectorization_cost): For vec_construct properly
cost insertion into SSE regs.
(...): Adjust calls to ix86_vec_cost.

Index: gcc/config/i386/i386.c
===
--- gcc/config/i386/i386.c  (revision 265022)
+++ gcc/config/i386/i386.c  (working copy)
@@ -39846,11 +39846,10 @@ ix86_set_reg_reg_cost (machine_mode mode
 static int
 ix86_vec_cost (machine_mode mode, int cost, bool parallel)
 {
+  gcc_assert (parallel);
   if (!VECTOR_MODE_P (mode))
 return cost;
- 
-  if (!parallel)
-return cost * GET_MODE_NUNITS (mode);
+
   if (GET_MODE_BITSIZE (mode) == 128
   && TARGET_SSE_SPLIT_REGS)
 return cost * 2;
@@ -45190,8 +45189,9 @@ ix86_builtin_vectorization_cost (enum ve
 
   case vec_construct:
{
- /* N element inserts.  */
- int cost = ix86_vec_cost (mode, ix86_cost->sse_op, false);
+ gcc_assert (VECTOR_MODE_P (mode));
+ /* N element inserts into SSE vectors.  */
+ int cost = GET_MODE_NUNITS (mode) * ix86_cost->sse_op;
  /* One vinserti128 for combining two SSE vectors for AVX256.  */
  if (GET_MODE_BITSIZE (mode) == 256)
cost += ix86_vec_cost (mode, ix86_cost->addss, true);

Re: [PATCH][i386] Fix vec_construct cost, remove unused ix86_vec_cost arg

[Richard Biener]

On Thu, 11 Oct 2018, Richard Biener wrote:

> 
> The following fixes vec_construct cost calculation to properly consider
> that the inserts will happen to SSE regs thus forgo the multiplication
> done in ix86_vec_cost which is passed the wrong mode.  This gets rid of
> the only call passing false to ix86_vec_cost (so consider the patch
> amended to remove the arg if approved).
> 
> Bootstrapped and tested on x86_64-unknown-linux-gnu.
> 
> OK for trunk?
> 
> I am considering to make the factor we apply in ix86_vec_cost
> which currently depends on X86_TUNE_AVX128_OPTIMAL and
> X86_TUNE_SSE_SPLIT_REGS part of the actual cost tables since
> the reason we apply them are underlying CPU architecture details.
> Was the original reason of doing the multiplication based on
> those tunings to be able to "share" the same basic cost table
> across architectures that differ in this important detail?
> I see X86_TUNE_SSE_SPLIT_REGS is only used for m_ATHLON_K8
> and X86_TUNE_AVX128_OPTIMAL is used for m_BDVER, m_BTVER2
> and m_ZNVER1.  Those all have (multiple) exclusive processor_cost_table
> entries.
> 
> As a first step I'd like to remove the use of ix86_vec_cost for
> the entries that already have entries for multiple modes
> (loads and stores) and apply the factor there.  For example
> Zen can do two 128bit loads per cycle but only one 128bit store.
> With multiplying AVX256 costs by two we seem to cost sth like
> # instructions to dispatch * instruction latency which is an
> odd thing.  I'd have expected # instructions to dispatch / instruction 
> throughput * instruction latency - so a AVX256 add would cost
> the same as a AVX128 add, likewise for loads but stores would be
> more expensive because of the throughput issue.  This all
> ignores resource utilization across multiple insns but that's
> how the cost model works ...

So like the following which removes the use of ix86_vec_cost
for SSE loads and stores since we have per-mode costs already.
I've applied the relevant factor to the individual cost tables
(noting that for X86_TUNE_SSE_SPLIT_REGS we only apply the
multiplication for size == 128, not size >= 128 ...)

There's a ??? hunk in inline_memory_move_cost where we
failed to apply the scaling thus in that place we'd now have
a behavior change.  Alternatively I could leave the cost
tables unaltered if that costing part is more critical than
the vectorizer one.

I've also spotted, when reviewing ix86_vec_cost uses, a bug
in ix86_rtx_cost which keys on SFmode which doesn't work
for SSE modes, thus use GET_MODE_INNER.

Also I've changed X86_TUNE_AVX128_OPTIMAL to also apply
to BTVER1 - everywhere else we glob BTVER1 and BTVER2 so
this must surely be a omission.

Honza - is a patch like this OK?

Should I split out individual fixes to make bisection possible?

Should I update the cost tables or instead change the vectorizer
costing when considering the inline_memory_move_cost "issue"?

Thanks,
Richard.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 0cf4152acb2..f5392232f61 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -39432,6 +39432,7 @@ inline_memory_move_cost (machine_mode mode, enum 
reg_class regclass,
   int index = sse_store_index (mode);
   if (index == -1)
return 100;
+  /* ??? */
   if (in == 2)
 return MAX (ix86_cost->sse_load [index], ix86_cost->sse_store [index]);
   return in ? ix86_cost->sse_load [index] : ix86_cost->sse_store [index];
@@ -40183,7 +40181,8 @@ ix86_rtx_costs (rtx x, machine_mode mode, int 
outer_code_i, int opno,
 gcc_assert (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F);
 
 *total = ix86_vec_cost (mode,
-   mode == SFmode ? cost->fmass : cost->fmasd,
+   GET_MODE_INNER (mode) == SFmode
+   ? cost->fmass : cost->fmasd,
true);
*total += rtx_cost (XEXP (x, 1), mode, FMA, 1, speed);
 
@@ -45122,18 +45121,14 @@ ix86_builtin_vectorization_cost (enum 
vect_cost_for_stmt type_of_cost,
/* See PR82713 - we may end up being called on non-vector type.  */
if (index < 0)
  index = 2;
-return ix86_vec_cost (mode,
- COSTS_N_INSNS (ix86_cost->sse_load[index]) / 2,
- true);
+return COSTS_N_INSNS (ix86_cost->sse_load[index]) / 2;
 
   case vector_store:
index = sse_store_index (mode);
/* See PR82713 - we may end up being called on non-vector type.  */
if (index < 0)
  index = 2;
-return ix86_vec_cost (mode,
- COSTS_N_INSNS (ix86_cost->sse_store[index]) / 2,
- true);
+return COSTS_N_INSNS (ix86_cost->sse_store[index]) / 2;
 
   case vec_to_scalar:
   case scalar_to_vec:
@@ -45146,20 +45141,14 @@ ix86_builtin_vectorization_cost (enum 
vect_cost_for_stmt type_of_cost,

Re: [patch] new API for value_range

[Richard Biener]

On Thu, Oct 11, 2018 at 10:19 AM Aldy Hernandez  wrote:
>
> Hi Richard.  Thanks for reviewing.
>
> On 10/10/18 6:27 AM, Richard Biener wrote:
> > On Tue, Oct 9, 2018 at 6:23 PM Aldy Hernandez  wrote:
> >>
> >> I'm assuming the silence on the RFC means nobody is viscerally opposed
> >> to it, so here goes the actual implementation ;-).
> >>
> >>  FWI: https://gcc.gnu.org/ml/gcc-patches/2018-10/msg00157.html
> >>
> >> My aim is no change to the current functionality, but there are some
> >> things that changed slightly (with no appreciable change in
> >> bootstrapability or tests).
> >>
> >> 1.  Primarily, we were building value_ranges by modifying them in-flight
> >> with no regards to the validity of the resulting range.  By enforcing
> >> the API, I noticed we periodically built VR_VARYING / VR_UNDEFINED, but
> >> left the equivalence bits uncleared.  This comment in the original
> >> header file indicates that this is invalid behavior:
> >>
> >> /* Set of SSA names whose value ranges are equivalent to this one.
> >>This set is only valid when TYPE is VR_RANGE or VR_ANTI_RANGE.  */
> >>
> >> The API now enforces this upon construction.
> >>
> >> 2. I also saw us setting min/max when VARYING or UNDEFINED was set.
> >> This is invalid.  Although these values were being ignored, the API now
> >> enforces this.
> >>
> >> 3. I saw one case in set_value_range_with_overflow() were we were
> >> building an invalid range with swapped ranges, where we were silently
> >> depending on somebody further up the call chain to swap them for us.
> >> I've fixed this at creation.
> >>
> >> 4. There is one assert in ipcp_vr_lattice which I hope to remove, but
> >> left as proof that the original VR_UNDEFINED set was not necessary, as
> >> it is now done by default on an empty constructor:
> >>
> >> -  void init () { m_vr.type = VR_UNDEFINED; }
> >> +  void init () { gcc_assert (m_vr.undefined_p ()); }
> >>
> >> One last note.  The file tree-vrp.c already has a cripple API of sorts
> >> in the form of functions (set_value_range_to_varying, etc).  I have
> >> tried to keep those functions available, by calling the API under the
> >> covers, but would be okay in removing them altogether as a follow-up.
> >>
> >> Please refer to the RFC wrt the min/max/vrtype accessors, as well as the
> >> new tree type field.
> >>
> >> I am quoting the class declaration below to make it easy to review at a
> >> high level.
> >>
> >> Tested on x86-64 Linux.  All languages, including Ada and Go.
> >>
> >> OK for trunk?
> >
> > Reviewing in patch order.
> >
> >> Aldy
> >>
> >> class GTY((for_user)) value_range
> >> {
> >>public:
> >> value_range ();
> >> value_range (tree type);
> >> value_range (value_range_type, tree type, tree, tree, bitmap = NULL);
> >> bool operator== (const value_range &) const;
> >> bool operator!= (const value_range &) const;
> >> void intersect (const value_range *);
> >> void union_ (const value_range *);
> >
> > with trailing underscore?  seriously?
>
> Hey!  You complained about Union() last year, at which point the
> consensus was that trailing underscores would be ok for symbol names
> that clashed with keywords.

;)

I also thought about union_into / union_with.  As opposed to a hypothetical

  value_range union (const value_range& a, const value_range& b)

function.

> And yes, it was also discussed whether we should overload | and ^ for
> union and intersection, but was denied for readability and what have yous.
>
> >
> >> /* Like operator== but ignore equivalence bitmap.  */
> >> bool ignore_equivs_equal_p (const value_range &) const;
> >> /* Like a operator= but update equivalence bitmap efficiently.  */
> >> void copy_with_equiv_update (const value_range *);
> >>
> >> /* Types of value ranges.  */
> >> bool undefined_p () const;
> >> bool varying_p () const;
> >> bool symbolic_p () const;
> >> bool numeric_p () const;
> >> void set_undefined (tree = NULL);
> >> void set_varying (tree = NULL);
> >
> > I'd appreciate comments on those predicates, esp. as you
> > replace positive tests by negative ones like in
>
> Done.
>
> >
> > /* If we found any usable VR, set the VR to ssa_name and create a
> >PUSH old value in the stack with the old VR.  */
> > -  if (vr.type == VR_RANGE || vr.type == VR_ANTI_RANGE)
> > +  if (!vr.undefined_p () && !vr.varying_p ())
> >   {
> >
> > I'd also spell numeric_p as constant_p or drop it alltogether
> > since !symbolic_p should imply it given varying_p and undefined_p
> > are just some special-cases of "numeric_p" (full and empty range).
>
> Done.
>
> >
> > That said, for the time being I'd use non_symbolic_range_or_anti_range_p
> > instead of numeric_p () (seeing that you maybe want to hide the fact
> > that we have anti-ranges?)
>
> Errr... No.
>
> >
> > -  value_range vr = VR_INITIALIZER;
> > +  value_range vr (TREE_TYPE (name));
> >
> > so you basically forgo with the 

Re: [PATCH 2/6] [ARC] Cleanup TLS implementation.

[Andrew Burgess]

* Claudiu Zissulescu  [2018-10-10 11:00:12 +0300]:

> Cleanup TLS implementation and add a number of tests.
> 
> gcc/
> 2018-07-25  Claudiu Zissulescu  
> 
>   * config/arc/arc.c (arc_get_tp): Remove function.
>   (arc_emit_call_tls_get_addr): Likewise.
>   (arc_call_tls_get_addr): New function.
>   (arc_legitimize_tls_address): Make use of arc_call_tls_get_addr.
>   * config/arc/arc.md (tls_load_tp_soft): Remove.
>   (tls_gd_get_addr): Likewise.
> 
> testsuite/
> 2018-07-25  Claudiu Zissulescu  
> 
>   * gcc.target/arc/tls-gd.c: New file.
>   * gcc.target/arc/tls-ie.c: Likewise.
>   * gcc.target/arc/tls-ld.c: Likewise.
>   * gcc.target/arc/tls-le.c: Likewise.
> ---
>  gcc/config/arc/arc.c  | 95 +++
>  gcc/config/arc/arc.md | 21 --
>  gcc/testsuite/gcc.target/arc/tls-1.c  |  2 +-
>  gcc/testsuite/gcc.target/arc/tls-gd.c | 17 +
>  gcc/testsuite/gcc.target/arc/tls-ie.c | 17 +
>  gcc/testsuite/gcc.target/arc/tls-ld.c | 18 +
>  gcc/testsuite/gcc.target/arc/tls-le.c | 16 +
>  7 files changed, 106 insertions(+), 80 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/arc/tls-gd.c
>  create mode 100644 gcc/testsuite/gcc.target/arc/tls-ie.c
>  create mode 100644 gcc/testsuite/gcc.target/arc/tls-ld.c
>  create mode 100644 gcc/testsuite/gcc.target/arc/tls-le.c
> 
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index de4c7433c1b..56f566795ff 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -5559,51 +5559,30 @@ arc_raw_symbolic_reference_mentioned_p (rtx op, bool 
> skip_local)
>return false;
>  }
>  
> -/* Get the thread pointer.  */
> +/* Emit a call to __tls_get_addr.  TI is the argument to this function.
> +   RET is an RTX for the return value location.  The entire insn sequence
> +   is returned.  */

This comment should be moved down to arc_call_tls_get_addr, and a new
comment should be added explaining what arc_tls_symbol is used for.

Otherwise, this seems fine.

Thanks,
Andrew

> +static GTY(()) rtx arc_tls_symbol;
>  
>  static rtx
> -arc_get_tp (void)
> +arc_call_tls_get_addr (rtx ti)
>  {
> -   /* If arc_tp_regno has been set, we can use that hard register
> -  directly as a base register.  */
> -  if (arc_tp_regno != -1)
> -return gen_rtx_REG (Pmode, arc_tp_regno);
> -
> -  /* Otherwise, call __read_tp.  Copy the result to a pseudo to avoid
> - conflicts with function arguments / results.  */
> -  rtx reg = gen_reg_rtx (Pmode);
> -  emit_insn (gen_tls_load_tp_soft ());
> -  emit_move_insn (reg, gen_rtx_REG (Pmode, R0_REG));
> -  return reg;
> -}
> -
> -/* Helper to be used by TLS Global dynamic model.  */
> -
> -static rtx
> -arc_emit_call_tls_get_addr (rtx sym, int reloc, rtx eqv)
> -{
> -  rtx r0 = gen_rtx_REG (Pmode, R0_REG);
> -  rtx call_fusage = NULL_RTX;
> -
> -  start_sequence ();
> -
> -  rtx x = arc_unspec_offset (sym, reloc);
> -  emit_move_insn (r0, x);
> -  use_reg (&call_fusage, r0);
> +  rtx arg = gen_rtx_REG (Pmode, R0_REG);
> +  rtx ret = gen_rtx_REG (Pmode, R0_REG);
> +  rtx fn;
> +  rtx_insn *insn;
>  
> -  gcc_assert (reloc == UNSPEC_TLS_GD);
> -  rtx call_insn = emit_call_insn (gen_tls_gd_get_addr (sym));
> -  /* Should we set RTL_CONST_CALL_P?  We read memory, but not in a
> - way that the application should care.  */
> -  RTL_PURE_CALL_P (call_insn) = 1;
> -  add_function_usage_to (call_insn, call_fusage);
> +  if (!arc_tls_symbol)
> +arc_tls_symbol = init_one_libfunc ("__tls_get_addr");
>  
> -  rtx_insn *insns = get_insns ();
> -  end_sequence ();
> +  emit_move_insn (arg, ti);
> +  fn = gen_rtx_MEM (SImode, arc_tls_symbol);
> +  insn = emit_call_insn (gen_call_value (ret, fn, const0_rtx));
> +  RTL_CONST_CALL_P (insn) = 1;
> +  use_reg (&CALL_INSN_FUNCTION_USAGE (insn), ret);
> +  use_reg (&CALL_INSN_FUNCTION_USAGE (insn), arg);
>  
> -  rtx dest = gen_reg_rtx (Pmode);
> -  emit_libcall_block (insns, dest, r0, eqv);
> -  return dest;
> +  return ret;
>  }
>  
>  #define DTPOFF_ZERO_SYM ".tdata"
> @@ -5614,16 +5593,26 @@ arc_emit_call_tls_get_addr (rtx sym, int reloc, rtx 
> eqv)
>  static rtx
>  arc_legitimize_tls_address (rtx addr, enum tls_model model)
>  {
> +  rtx tmp;
> +
>if (!flag_pic && model == TLS_MODEL_LOCAL_DYNAMIC)
>  model = TLS_MODEL_LOCAL_EXEC;
>  
> +
> +  /* The TP pointer needs to be set.  */
> +  gcc_assert (arc_tp_regno != -1);
> +
>switch (model)
>  {
> +case TLS_MODEL_GLOBAL_DYNAMIC:
> +  tmp = gen_reg_rtx (Pmode);
> +  emit_move_insn (tmp, arc_unspec_offset (addr, UNSPEC_TLS_GD));
> +  return arc_call_tls_get_addr (tmp);
> +
>  case TLS_MODEL_LOCAL_DYNAMIC:
>rtx base;
>tree decl;
>const char *base_name;
> -  rtvec v;
>  
>decl = SYMBOL_REF_DECL (addr);
>base_name = DTPOFF_ZERO_SYM;
> @@ -5631,31 +5620,21 @@ arc_legitimize_tls_address (rtx addr, enum tls_model 
> model)
>   base_name = ".tbss";
>

Re: [PATCH 1/6] [ARC] Remove non standard funcions calls.

[Andrew Burgess]

* Claudiu Zissulescu  [2018-10-10 11:00:11 +0300]:

> Replace all custom "library" calls with compiler known patterns.
> 
> gcc/
> -xx-xx  Claudiu Zissulescu  
> 
>   * config/arc/arc.md (mulsi3): Remove call to mulsi_600_lib.
>   (mulsi3_600_lib): Remove pattern.
>   (umulsi3_highpart_600_lib_le): Likewise.
>   (umulsi3_highpart): Remove call to umulsi3_highpart_600_lib_le.
>   (umulsidi3): Remove call to umulsidi3_600_lib.
>   (umulsidi3_600_lib): Remove pattern.
>   (peephole2): Remove peephole using the above deprecated patterns.
> 
> testsuite/
> -xx-xx  Claudiu Zissulescu  
> 
>   * gcc.target/arc/mulsi3_highpart-2.c: Update test.
> 
> libgcc/
> -xx-xx  Claudiu Zissulescu  
> 
>   * config/arc/lib1funcs.S (_muldi3): New function.
>   * config/arc/t-arc (LIB1ASMFUNCS): Add _muldi3.

This seems fine.

Thanks,
Andrew

> ---
>  gcc/config/arc/arc.md | 158 ++
>  .../gcc.target/arc/mulsi3_highpart-2.c|   5 +-
>  libgcc/config/arc/lib1funcs.S |  54 ++
>  libgcc/config/arc/t-arc   |   2 +-
>  4 files changed, 67 insertions(+), 152 deletions(-)
> 
> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> index 42ca820b91d..d73289a20c4 100644
> --- a/gcc/config/arc/arc.md
> +++ b/gcc/config/arc/arc.md
> @@ -2076,44 +2076,21 @@ archs4x, archs4xd, archs4xd_slow"
>  ;; SI <- SI * SI
>  
>  (define_expand "mulsi3"
> - [(set (match_operand:SI 0 "nonimmediate_operand""")
> + [(set (match_operand:SI 0 "register_operand""")
>   (mult:SI (match_operand:SI 1 "register_operand"  "")
>(match_operand:SI 2 "nonmemory_operand" "")))]
> -  ""
> +  "TARGET_ANY_MPY"
>  {
> -  if (TARGET_MPY)
> -{
> -  if (!register_operand (operands[0], SImode))
> - {
> -   rtx result = gen_reg_rtx (SImode);
> -
> -   emit_insn (gen_mulsi3 (result, operands[1], operands[2]));
> -   emit_move_insn (operands[0], result);
> -   DONE;
> - }
> -}
> -  else if (TARGET_MUL64_SET)
> +  if (TARGET_MUL64_SET)
>  {
> - rtx tmp = gen_reg_rtx (SImode);
> - emit_insn (gen_mulsi64 (tmp, operands[1], operands[2]));
> - emit_move_insn (operands[0], tmp);
> + emit_insn (gen_mulsi64 (operands[0], operands[1], operands[2]));
>   DONE;
>  }
>else if (TARGET_MULMAC_32BY16_SET)
>  {
> - rtx tmp = gen_reg_rtx (SImode);
> - emit_insn (gen_mulsi32x16 (tmp, operands[1], operands[2]));
> - emit_move_insn (operands[0], tmp);
> + emit_insn (gen_mulsi32x16 (operands[0], operands[1], operands[2]));
>   DONE;
>  }
> -  else
> -{
> -  emit_move_insn (gen_rtx_REG (SImode, R0_REG), operands[1]);
> -  emit_move_insn (gen_rtx_REG (SImode, R1_REG), operands[2]);
> -  emit_insn (gen_mulsi3_600_lib ());
> -  emit_move_insn (operands[0], gen_rtx_REG (SImode, R0_REG));
> -  DONE;
> -}
>  })
>  
>  (define_insn_and_split "mulsi32x16"
> @@ -2229,27 +2206,6 @@ archs4x, archs4xd, archs4xd_slow"
> (set_attr "predicable" "yes,yes,no,yes")
> (set_attr "cond" "canuse,canuse,canuse_limm,canuse")])
>  
> -; If we compile without an mul option enabled, but link with libraries
> -; for a mul option, we'll see clobbers of multiplier output registers.
> -; There is also an implementation using norm that clobbers the loop 
> registers.
> -(define_insn "mulsi3_600_lib"
> -  [(set (reg:SI R0_REG)
> - (mult:SI (reg:SI R0_REG) (reg:SI R1_REG)))
> -   (clobber (reg:SI RETURN_ADDR_REGNUM))
> -   (clobber (reg:SI R1_REG))
> -   (clobber (reg:SI R2_REG))
> -   (clobber (reg:SI R3_REG))
> -   (clobber (reg:DI MUL64_OUT_REG))
> -   (clobber (reg:SI LP_COUNT))
> -   (clobber (reg:SI LP_START))
> -   (clobber (reg:SI LP_END))
> -   (clobber (reg:CC CC_REG))]
> -  "!TARGET_ANY_MPY
> -   && SFUNC_CHECK_PREDICABLE"
> -  "*return arc_output_libcall (\"__mulsi3\");"
> -  [(set_attr "is_sfunc" "yes")
> -   (set_attr "predicable" "yes")])
> -
>  (define_insn_and_split "mulsidi_600"
>[(set (match_operand:DI 0 "register_operand"   
> "=c, c,c,  c")
>   (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand"  
> "%Rcq#q, c,c,  c"))
> @@ -2504,48 +2460,6 @@ archs4x, archs4xd, archs4xd_slow"
> (set_attr "predicable" "yes,no,yes,no")
> (set_attr "cond" "canuse,nocond,canuse,nocond")])
>  
> -; Implementations include additional labels for umulsidi3, so we got all
> -; the same clobbers - plus one for the result low part.  */
> -(define_insn "umulsi3_highpart_600_lib_le"
> -  [(set (reg:SI R1_REG)
> - (truncate:SI
> -  (lshiftrt:DI
> -   (mult:DI (zero_extend:DI (reg:SI R0_REG))
> -(zero_extend:DI (reg:SI R1_REG)))
> -   (const_int 32
> -   (clobber (reg:SI RETURN_ADDR_REGNUM))
> -   (clobber (reg:SI R0_REG))
> -   (clobber (reg:DI R2_REG))
> -   (clobber (reg:SI R12_REG))
> -   (clobber (reg:DI MUL64_OUT_REG))
> -   (clo

[PATCH] Fix pr87156 ICE building libstdc++ for mips64

[Paul Hua]

Hi:

The bug pr87156 make MIPS target bootstrap fail a month ago. The
attached patch that posted under bugzilla by Jan Hubicka fixed the
bug.
Bootstrapped and reg-tested on mips64el-linux-gnu and x86_64-pc-linux-gnu.
Considering that Jan not very active, Is it OK for commits the patch
under Jan Hubicka behalf ?

Thanks

Paul Hua



-
2018-10-11  Jan Hubicka  

PR target/87156
* cgraphclones.c (cgraph_node::create_version_clone_with_body):
Set new_decl virtual flag to zero.
diff --git a/gcc/cgraphclones.c b/gcc/cgraphclones.c
index 2af45bd4fec..189cb31a5dc 100644
--- a/gcc/cgraphclones.c
+++ b/gcc/cgraphclones.c
@@ -968,6 +968,8 @@ cgraph_node::create_version_clone_with_body
   SET_DECL_ASSEMBLER_NAME (new_decl, DECL_NAME (new_decl));
   SET_DECL_RTL (new_decl, NULL);

+  DECL_VIRTUAL_P (new_decl) = 0;
+
   /* When the old decl was a con-/destructor make sure the clone isn't.  */
   DECL_STATIC_CONSTRUCTOR (new_decl) = 0;
   DECL_STATIC_DESTRUCTOR (new_decl) = 0;

Re: introduce --enable-mingw-full32 to default to --large-address-aware

[JonY]

On 10/11/2018 02:57 AM, NightStrike wrote:
> 
> Except that options typically don't get removed, just deprecated.  It
> seems cleaner to me to drop mingw from the name and make it default to
> enabled for cygwin.
> 

It is already enabled for Cygwin, but good point,
--enable-large-address-aware it is, but enabled only for mingw for now,
as such in the original patch.





signature.asc
Description: OpenPGP digital signature

Re: Make std::forward_list iterator operators inline friend

[Jonathan Wakely]

On 10/10/18 22:55 +0200, François Dumont wrote:
Same patch as for std::list iterators. I only additionally move doc on 
those operators.


I also avoid redefining some typedef that are already defined in 
_Fwd_list_base<>.


    * include/bits/forward_list.h
    (_Fwd_list_iterator<>::operator==): Replace member function with inline
    friend.
    (_Fwd_list_iterator<>::operator!=): Likewise.
    (_Fwd_list_const_iterator<>::operator==): Likewise.
    (_Fwd_list_const_iterator<>::operator!=): Likewise.
    (operator==(const _Fwd_list_iterator<>&,
    const _Fwd_list_const_iterator<>&)): Remove.
    (operator!=(const _Fwd_list_iterator<>&,
    const _Fwd_list_const_iterator<>&)): Remove.
    (forward_list<>::_Node): Take typedef from base type.
    (forward_list<>::iterator): Likewise.
    (forward_list<>::const_iterator): Likewise.

Tested under Linux x86_64.

Ok to commit ?


OK, thanks.

[PATCH] Make ext allocators support heterogeneous equality comparison

[Jonathan Wakely]

The Allocator requirements include the ability to compare different
specializations of the same allocator class template. This did not work
for __gnu_cxx::new_allocator and other extension allocators.  This patch
replaces the equality operators for those allocators with inline friends
that support heterogeneous comparisons.  (I'm not changing all ext
allocators because some are bit-rotted already).

Additionally, the equality operators for comparing two std::allocator
objects of the same type are now defined as inline friends. Those
overloads don't need to be declared at namespace scope, because they
aren't specified in the standard (but they're needed in this
implementation to avoid ambiguities caused by the extra overloads
defined for the base allocator type).

* include/bits/allocator.h
(operator==(const allocator<_Tp>&, const allocator<_Tp>))
(operator!=(const allocator<_Tp>&, const allocator<_Tp>)): Replace
with inline friends.
* include/ext/debug_allocator.h (operator==, operator!=): Replace
with inline friend functions that compare to rebound allocators.
* include/ext/malloc_allocator.h (operator==, operator!=): Likewise.
* include/ext/new_allocator.h (operator==, operator!=): Likewise.
* testsuite/ext/debug_allocator/eq.cc: New test.
* testsuite/ext/ext_pointer/alloc_eq.cc: New test.
* testsuite/ext/malloc_allocator/eq.cc: New test.
* testsuite/ext/new_allocator/eq.cc: New test.


Tested x86_64-linux, committed to trunk.


commit 6928679848204dc6637a9d25f2c8e932e62285c6
Author: Jonathan Wakely 
Date:   Wed Oct 10 20:14:50 2018 +0100

Make ext allocators support heterogeneous equality comparison

The Allocator requirements include the ability to compare different
specializations of the same allocator class template. This did not work
for __gnu_cxx::new_allocator and other extension allocators.  This patch
replaces the equality operators for those allocators with inline friends
that support heterogeneous comparisons.  (I'm not changing all ext
allocators because some are bit-rotted already).

Additionally, the equality operators for comparing two std::allocator
objects of the same type are now defined as inline friends. Those
overloads don't need to be declared at namespace scope, because they
aren't specified in the standard (but they're needed in this
implementation to avoid ambiguities caused by the extra overloads
defined for the base allocator type).

* include/bits/allocator.h
(operator==(const allocator<_Tp>&, const allocator<_Tp>))
(operator!=(const allocator<_Tp>&, const allocator<_Tp>)): Replace
with inline friends.
* include/ext/debug_allocator.h (operator==, operator!=): Replace
with inline friend functions that compare to rebound allocators.
* include/ext/malloc_allocator.h (operator==, operator!=): Likewise.
* include/ext/new_allocator.h (operator==, operator!=): Likewise.
* testsuite/ext/debug_allocator/eq.cc: New test.
* testsuite/ext/ext_pointer/alloc_eq.cc: New test.
* testsuite/ext/malloc_allocator/eq.cc: New test.
* testsuite/ext/new_allocator/eq.cc: New test.

diff --git a/libstdc++-v3/include/bits/allocator.h 
b/libstdc++-v3/include/bits/allocator.h
index c4e3a4b9c15..d9d1d26e13a 100644
--- a/libstdc++-v3/include/bits/allocator.h
+++ b/libstdc++-v3/include/bits/allocator.h
@@ -148,6 +148,14 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   ~allocator() _GLIBCXX_NOTHROW { }
 
+  friend bool
+  operator==(const allocator&, const allocator&) _GLIBCXX_NOTHROW
+  { return true; }
+
+  friend bool
+  operator!=(const allocator&, const allocator&) _GLIBCXX_NOTHROW
+  { return false; }
+
   // Inherit everything else.
 };
 
@@ -157,24 +165,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 _GLIBCXX_NOTHROW
 { return true; }
 
-  template
-inline bool
-operator==(const allocator<_Tp>&, const allocator<_Tp>&)
-_GLIBCXX_NOTHROW
-{ return true; }
-
   template
 inline bool
 operator!=(const allocator<_T1>&, const allocator<_T2>&)
 _GLIBCXX_NOTHROW
 { return false; }
 
-  template
-inline bool
-operator!=(const allocator<_Tp>&, const allocator<_Tp>&)
-_GLIBCXX_NOTHROW
-{ return false; }
-
   // Invalid allocator partial specializations.
   // allocator_traits::rebind_alloc can be used to form a valid allocator type.
   template
diff --git a/libstdc++-v3/include/ext/debug_allocator.h 
b/libstdc++-v3/include/ext/debug_allocator.h
index dce224f05ed..3bc750e473b 100644
--- a/libstdc++-v3/include/ext/debug_allocator.h
+++ b/libstdc++-v3/include/ext/debug_allocator.h
@@ -174,16 +174,18 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   max_size() const throw()
   { return _Traits::max_size(_M_allocator) - _M_extra; }
 
-  frien

[PATCH] Simplify comparison of attrs in IPA ICF.

[Martin Liška]

Hi.

This is simplification in ICF where we can use attribute comparison
function from attrs.c instead of implementing our own.

Patch survives tests on x86_64-linux-gnu.
Ready for trunk?
Thanks,
Martin

gcc/ChangeLog:

2018-10-10  Martin Liska  

* ipa-icf.c (sem_item::compare_attributes): Remove.
(sem_item::compare_referenced_symbol_properties): Use
attribute_list_equal instead.
(sem_function::equals_wpa): Likewise.
* ipa-icf.h: Remove compare_attributes.
---
 gcc/ipa-icf.c | 59 ---
 gcc/ipa-icf.h |  3 ---
 2 files changed, 4 insertions(+), 58 deletions(-)


diff --git a/gcc/ipa-icf.c b/gcc/ipa-icf.c
index 3c54f8d4b6d..ff313197f64 100644
--- a/gcc/ipa-icf.c
+++ b/gcc/ipa-icf.c
@@ -305,57 +305,6 @@ sem_function::get_hash (void)
   return m_hash;
 }
 
-/* Return ture if A1 and A2 represent equivalent function attribute lists.
-   Based on comp_type_attributes.  */
-
-bool
-sem_item::compare_attributes (const_tree a1, const_tree a2)
-{
-  const_tree a;
-  if (a1 == a2)
-return true;
-  for (a = a1; a != NULL_TREE; a = TREE_CHAIN (a))
-{
-  const struct attribute_spec *as;
-  const_tree attr;
-
-  as = lookup_attribute_spec (get_attribute_name (a));
-  /* TODO: We can introduce as->affects_decl_identity
-	 and as->affects_decl_reference_identity if attribute mismatch
-	 gets a common reason to give up on merging.  It may not be worth
-	 the effort.
-	 For example returns_nonnull affects only references, while
-	 optimize attribute can be ignored because it is already lowered
-	 into flags representation and compared separately.  */
-  if (!as)
-continue;
-
-  attr = lookup_attribute (as->name, CONST_CAST_TREE (a2));
-  if (!attr || !attribute_value_equal (a, attr))
-break;
-}
-  if (!a)
-{
-  for (a = a2; a != NULL_TREE; a = TREE_CHAIN (a))
-	{
-	  const struct attribute_spec *as;
-
-	  as = lookup_attribute_spec (get_attribute_name (a));
-	  if (!as)
-	continue;
-
-	  if (!lookup_attribute (as->name, CONST_CAST_TREE (a1)))
-	break;
-	  /* We don't need to compare trees again, as we did this
-	 already in first loop.  */
-	}
-  if (!a)
-return true;
-}
-  /* TODO: As in comp_type_attributes we may want to introduce target hook.  */
-  return false;
-}
-
 /* Compare properties of symbols N1 and N2 that does not affect semantics of
symbol itself but affects semantics of its references from USED_BY (which
may be NULL if it is unknown).  If comparsion is false, symbols
@@ -429,8 +378,8 @@ sem_item::compare_referenced_symbol_properties (symtab_node *used_by,
 	 variables just compare attributes for references - the codegen
 	 for constructors is affected only by those attributes that we lower
 	 to explicit representation (such as DECL_ALIGN or DECL_SECTION).  */
-  if (!compare_attributes (DECL_ATTRIBUTES (n1->decl),
-			   DECL_ATTRIBUTES (n2->decl)))
+  if (!attribute_list_equal (DECL_ATTRIBUTES (n1->decl),
+ DECL_ATTRIBUTES (n2->decl)))
 	return return_false_with_msg ("different var decl attributes");
   if (comp_type_attributes (TREE_TYPE (n1->decl),
 TREE_TYPE (n2->decl)) != 1)
@@ -716,8 +665,8 @@ sem_function::equals_wpa (sem_item *item,
   if (comp_type_attributes (TREE_TYPE (decl),
 			TREE_TYPE (item->decl)) != 1)
 return return_false_with_msg ("different type attributes");
-  if (!compare_attributes (DECL_ATTRIBUTES (decl),
-			   DECL_ATTRIBUTES (item->decl)))
+  if (!attribute_list_equal (DECL_ATTRIBUTES (decl),
+			 DECL_ATTRIBUTES (item->decl)))
 return return_false_with_msg ("different decl attributes");
 
   /* The type of THIS pointer type memory location for
diff --git a/gcc/ipa-icf.h b/gcc/ipa-icf.h
index a64b3852efb..0359653d2f8 100644
--- a/gcc/ipa-icf.h
+++ b/gcc/ipa-icf.h
@@ -255,9 +255,6 @@ protected:
 	symtab_node *n2,
 	bool address);
 
-  /* Compare two attribute lists.  */
-  static bool compare_attributes (const_tree list1, const_tree list2);
-
   /* Hash properties compared by compare_referenced_symbol_properties.  */
   void hash_referenced_symbol_properties (symtab_node *ref,
 	  inchash::hash &hstate,

Re: bootstrap with --werror=yes fails

[Thomas Schwinge]

Hi!

On Fri, 07 Sep 2018 13:51:21 +0100, "graham stott via gcc-patches" 
 wrote:
> Heads
> Due too -Wabi empty class std::intergal_constant warning compiling 
> libstdc++/c++/cxx11-shim_facets.cc

Please always quote the exact error message and a bit of context, and
please use GCC Bugzilla to report such issues.

But yes, I've run into this, too, and just filed

"[...]/libstdc++-v3/src/c++11/cxx11-shim_facets.cc:271:28: error: empty
class 'std::integral_constant' parameter passing ABI changes
in -fabi-version=12 (GCC 8) [-Werror=abi]".


Grüße
 Thomas

Re: [PATCH] add simple attribute introspection

[Joseph Myers]

On Thu, 11 Oct 2018, Martin Sebor wrote:

> The attached patch introduces a built-in function called
> __builtin_has_attribute that makes some of this possible.
> See the documentation and tests for details.

I see nothing in the documentation about handling of equivalent forms of 
an attribute - for example, specifying __aligned__ in the attribute but 
aligned in __builtin_has_attribute, or vice versa.  I'd expect that to be 
documented to work (both of those should return true), with associated 
tests.  (And likewise the semantics should allow for a format attribute 
using printf in one place and __printf__ in the other, for example, or the 
same constant argument represented with different expressions.)

What are the semantics of __builtin_has_attribute for attributes that 
can't be tested for?  (E.g. the mode attribute, which ends up resulting in 
some existing type with the required mode being used, so there's nothing 
to indicate the attribute was originally used to declare things.)

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: bootstrap with --werror=yes fails

[Jonathan Wakely]

On Thu, 11 Oct 2018 at 13:03, Thomas Schwinge  wrote:
>
> Hi!
>
> On Fri, 07 Sep 2018 13:51:21 +0100, "graham stott via gcc-patches" 
>  wrote:
> > Heads
> > Due too -Wabi empty class std::intergal_constant warning compiling 
> > libstdc++/c++/cxx11-shim_facets.cc
>
> Please always quote the exact error message and a bit of context, and
> please use GCC Bugzilla to report such issues.

Indeed, the gcc-patches list is not the place for it.

>
> But yes, I've run into this, too, and just filed
> 
> "[...]/libstdc++-v3/src/c++11/cxx11-shim_facets.cc:271:28: error: empty
> class 'std::integral_constant' parameter passing ABI changes
> in -fabi-version=12 (GCC 8) [-Werror=abi]".

Thanks, Thomas. I've been meaning to fix that.

[PATCH] A couple of line map fixes

[Nathan Sidwell]

I discovered a couple of line map bugs when working on streaming macro 
locations on the modules branch:


1) LINEMAPS_MACRO_LOWEST_LOCATION has an off-by-one error.  It is 
returning the lowest macro loc handed out.  MAX_SOURCE_LOCATION is the 
highest location that could be handed out.  If we've not created any 
macros, then we've not handed out MAX_SOURCE_LOCATION, and should return 
one more than that.  (The impact here is that the first macro created 
wouldn't use MAX_SOURCE_LOCATION.)


2) linemap_enter_macro allocates num_tokens * 2 locations, but only 
clears num_tokens locations.  It seems we don't always use all those 
locations, and so can have trailing garbage.


booted & tested on x86_64-linux.

Fixing thusly.

nathan

--
Nathan Sidwell
2018-10-11  Nathan Sidwell  

	* include/line-map.h (LINEMAPS_MACRO_LOWEST_LOCATION): Fix
	off-by-one error.
	* line-map.c (linemap_enter_macro): Use RAII.  Clear all of the
	macro_locations.

Index: include/line-map.h
===
--- include/line-map.h	(revision 265035)
+++ include/line-map.h	(working copy)
@@ -1017,7 +1017,7 @@ LINEMAPS_MACRO_LOWEST_LOCATION (const li
 {
   return LINEMAPS_MACRO_USED (set)
  ? MAP_START_LOCATION (LINEMAPS_LAST_MACRO_MAP (set))
- : MAX_SOURCE_LOCATION;
+ : MAX_SOURCE_LOCATION + 1;
 }
 
 /* Returns the last macro map allocated in the line table SET.  */
Index: line-map.c
===
--- line-map.c	(revision 265035)
+++ line-map.c	(working copy)
@@ -612,30 +612,24 @@ const line_map_macro *
 linemap_enter_macro (struct line_maps *set, struct cpp_hashnode *macro_node,
 		 source_location expansion, unsigned int num_tokens)
 {
-  line_map_macro *map;
-  source_location start_location;
-  /* Cast away extern "C" from the type of xrealloc.  */
-  line_map_realloc reallocator = (set->reallocator
-  ? set->reallocator
-  : (line_map_realloc) xrealloc);
-
-  start_location = LINEMAPS_MACRO_LOWEST_LOCATION (set) - num_tokens;
+  source_location start_location
+= LINEMAPS_MACRO_LOWEST_LOCATION (set) - num_tokens;
 
   if (start_location < LINE_MAP_MAX_LOCATION)
 /* We ran out of macro map space.   */
 return NULL;
 
-  map = linemap_check_macro (new_linemap (set, start_location));
+  line_map_macro *map = linemap_check_macro (new_linemap (set, start_location));
 
   map->macro = macro_node;
   map->n_tokens = num_tokens;
   map->macro_locations
-= (source_location*) reallocator (NULL,
-  2 * num_tokens
-  * sizeof (source_location));
+= (source_location*) set->reallocator (NULL,
+	   2 * num_tokens
+	   * sizeof (source_location));
   map->expansion = expansion;
   memset (MACRO_MAP_LOCATIONS (map), 0,
-	  num_tokens * sizeof (source_location));
+	  2 * num_tokens * sizeof (source_location));
 
   LINEMAPS_MACRO_CACHE (set) = LINEMAPS_MACRO_USED (set) - 1;
 

[C++ PATCH] Fix -Wreturn-local-addr handling of structured bindings (PR c++/87582)

[Jakub Jelinek]

Hi!

Except for std::tuple* structured bindings, the VAR_DECLs we create for the
identifiers aren't actually variables, but placeholders with
DECL_VALUE_EXPR.  If the structured binding is not a reference, it is still
an automatic variable and so -Wreturn-local-addr should warn on those,
but if it is a reference, then it depends if it references an automatic
variable or something else.

The following patch handles it by recursing for references on the
initializer of the structured binding.  Note we don't just emit incorrect
warning without this patch, but the caller replaces return something;
with return (something, 0); if maybe_warn_about_returning_address_of_local
returns true, so it is also invalid at runtime.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk and
release branches?

2018-10-11  Jakub Jelinek  

PR c++/87582
* typeck.c (maybe_warn_about_returning_address_of_local): If
whats_returned is a structured binding identifier and the structured
binding is a reference, recurse on its initializer.

* g++.dg/cpp1z/decomp48.C: New test.

--- gcc/cp/typeck.c.jj  2018-09-13 09:27:31.547765011 +0200
+++ gcc/cp/typeck.c 2018-10-11 10:06:36.820295475 +0200
@@ -9096,6 +9096,22 @@ maybe_warn_about_returning_address_of_lo
   && !(TREE_STATIC (whats_returned)
   || TREE_PUBLIC (whats_returned)))
 {
+  if (VAR_P (whats_returned)
+ && DECL_DECOMPOSITION_P (whats_returned)
+ && DECL_DECOMP_BASE (whats_returned)
+ && DECL_HAS_VALUE_EXPR_P (whats_returned))
+   {
+ /* When returning address of a structured binding, if the structured
+binding is not a reference, continue normally, if it is a
+reference, recurse on the initializer of the structured
+binding.  */
+ tree base = DECL_DECOMP_BASE (whats_returned);
+ if (TYPE_REF_P (TREE_TYPE (base)))
+   {
+ tree init = DECL_INITIAL (base);
+ return maybe_warn_about_returning_address_of_local (init);
+   }
+   }
   bool w = false;
   auto_diagnostic_group d;
   if (TYPE_REF_P (valtype))
--- gcc/testsuite/g++.dg/cpp1z/decomp48.C.jj2018-10-11 10:30:09.255651339 
+0200
+++ gcc/testsuite/g++.dg/cpp1z/decomp48.C   2018-10-11 11:00:23.210283412 
+0200
@@ -0,0 +1,134 @@
+// PR c++/87582
+// { dg-do run { target c++11 } }
+// { dg-options "-Wreturn-local-addr" }
+
+struct S { int s, t; };
+S v {1, 2};
+int a[3] = {1, 2, 3};
+
+int &
+f1 ()
+{
+  auto& [s, t] = v;// { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-bogus "reference to local variable '.' 
returned" }
+}
+
+int &
+f2 ()
+{
+  S v {1, 2};
+  auto& [s, t] = v;// { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-warning "reference to local variable 'v' 
returned" }
+}
+
+int &
+f3 ()
+{
+  auto& [s, t, u] = a; // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-bogus "reference to local variable '.' 
returned" }
+}
+
+int &
+f4 ()
+{
+  int a[3] = {1, 2, 3};
+  auto& [s, t, u] = a; // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-warning "reference to local variable 'a' 
returned" }
+}
+
+int &
+f5 ()
+{
+  auto [s, t] = v; // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-warning "reference to local variable 's' 
returned" }
+}
+
+int &
+f6 ()
+{
+  S v {1, 2};
+  auto [s, t] = v; // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-warning "reference to local variable 's' 
returned" }
+}
+
+int &
+f7 ()
+{
+  auto [s, t, u] = a;  // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-warning "reference to local variable 's' 
returned" }
+}
+
+int &
+f8 ()
+{
+  int a[3] = {1, 2, 3};
+  auto [s, t, u] = a;  // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return s;// { dg-warning "reference to local variable 's' 
returned" }
+}
+
+int *
+f9 ()
+{
+  auto& [s, t] = v;// { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return &s;   // { dg-bogus "address of local variable '.' returned" }
+}
+
+int *
+f10 ()
+{
+  S v {1, 2};
+  auto& [s, t] = v;// { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return &s;   // { dg-warning "address of local variable 'v' 
returned" }
+}
+
+int *
+f11 ()
+{
+  auto& [s, t, u] = a; // { dg-warning "structured bindings only available 
with" "" { target c++14_down } }
+  return &s;   // { dg-bogus "address of local variable '.' returned

[PATCH] Switch conversion: support any ax + b transformation (PR tree-optimization/84436).

[Martin Liška]

Hi.

As seen in the PR, switch conversion can do better when we return equal numbers
based on index value. I implemented more than that, more precisely I support 
all linear
transformation based on index value. It's the same what clang is capable of.

Patch survives testing on x86_64-linux-gnu. I added various tests that should
benefit of the transformation.

Thanks,
Martin

gcc/ChangeLog:

2018-10-11  Martin Liska  

PR tree-optimization/84436
* tree-switch-conversion.c (switch_conversion::contains_same_values_p):
Remove.
(switch_conversion::contains_linear_function_p): New.
(switch_conversion::build_one_array): Support linear
transformation on input.
* tree-switch-conversion.h (struct switch_conversion): Add
contains_linear_function_p declaration.

gcc/testsuite/ChangeLog:

2018-10-11  Martin Liska  

PR tree-optimization/84436
* gcc.dg/tree-ssa/pr84436-1.c: New test.
* gcc.dg/tree-ssa/pr84436-2.c: New test.
* gcc.dg/tree-ssa/pr84436-3.c: New test.
* gcc.dg/tree-ssa/pr84436-4.c: New test.
* gcc.dg/tree-ssa/pr84436-5.c: New test.
---
 gcc/testsuite/gcc.dg/tree-ssa/pr84436-1.c | 36 +
 gcc/testsuite/gcc.dg/tree-ssa/pr84436-2.c | 67 +
 gcc/testsuite/gcc.dg/tree-ssa/pr84436-3.c | 24 ++
 gcc/testsuite/gcc.dg/tree-ssa/pr84436-4.c | 38 ++
 gcc/testsuite/gcc.dg/tree-ssa/pr84436-5.c | 38 ++
 gcc/tree-switch-conversion.c  | 89 +++
 gcc/tree-switch-conversion.h  | 10 ++-
 7 files changed, 283 insertions(+), 19 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr84436-1.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr84436-2.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr84436-3.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr84436-4.c
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr84436-5.c


diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr84436-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr84436-1.c
new file mode 100644
index 000..5e69eb55dab
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr84436-1.c
@@ -0,0 +1,36 @@
+/* PR tree-optimization/84436 */
+/* { dg-options "-O2 -fdump-tree-switchconv -fdump-tree-optimized" } */
+/* { dg-do run } */
+
+int
+__attribute__ ((noinline, noclone))
+foo (int how)
+{
+  switch (how) {
+case 2: how = 205; break; /* how = 100 * index + 5 */
+case 3: how = 305; break;
+case 4: how = 405; break;
+case 5: how = 505; break;
+case 6: how = 605; break;
+  }
+  return how;
+}
+
+int main()
+{
+  if (foo (2) != 205)
+  __builtin_abort ();
+
+  if (foo (6) != 605)
+  __builtin_abort ();
+
+  if (foo (123) != 123)
+  __builtin_abort ();
+
+  return 0;
+}
+
+
+/* { dg-final { scan-tree-dump-times "how.*\\* 100" 1 "switchconv" } } */
+/* { dg-final { scan-tree-dump-times "how.* = .* \\+ 5" 1 "switchconv" } } */
+/* { dg-final { scan-tree-dump-not "switch" "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr84436-2.c b/gcc/testsuite/gcc.dg/tree-ssa/pr84436-2.c
new file mode 100644
index 000..c34027a08b9
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr84436-2.c
@@ -0,0 +1,67 @@
+/* PR tree-optimization/84436 */
+/* { dg-options "-O2 -fdump-tree-switchconv -fdump-tree-optimized" } */
+
+char
+lowerit(char a)
+{
+  switch (a)
+{
+default:
+  return a;
+case 'A':
+  return 'a';
+case 'B':
+  return 'b';
+case 'C':
+  return 'c';
+case 'D':
+  return 'd';
+case 'E':
+  return 'e';
+case 'F':
+  return 'f';
+case 'G':
+  return 'g';
+case 'H':
+  return 'h';
+case 'I':
+  return 'i';
+case 'J':
+  return 'j';
+case 'K':
+  return 'k';
+case 'L':
+  return 'l';
+case 'M':
+  return 'm';
+case 'N':
+  return 'n';
+case 'O':
+  return 'o';
+case 'P':
+  return 'p';
+case 'Q':
+  return 'q';
+case 'R':
+  return 'r';
+case 'S':
+  return 's';
+case 'T':
+  return 't';
+case 'U':
+  return 'u';
+case 'V':
+  return 'v';
+case 'W':
+  return 'w';
+case 'X':
+  return 'x';
+case 'Y':
+  return 'y';
+case 'Z':
+  return 'z';
+}
+}
+
+/* { dg-final { scan-tree-dump-times "a_.*\\+ 32" 1 "switchconv" } } */
+/* { dg-final { scan-tree-dump-not "switch" "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr84436-3.c b/gcc/testsuite/gcc.dg/tree-ssa/pr84436-3.c
new file mode 100644
index 000..261bd39aba6
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr84436-3.c
@@ -0,0 +1,24 @@
+/* PR tree-optimization/84436 */
+/* { dg-options "-O2 -fdump-tree-switchconv -fdump-tree-optimized" } */
+
+enum a { b, c, d };
+int e;
+void h(enum a);
+
+void f() {
+  enum a g;
+  switch (e) {
+  case '1':
+g = b;
+break;
+  case '2':
+g = c;
+break;
+  case '3':
+g = d;
+  }
+  h(g);
+}
+
+/* { dg-

[PATCH][committed][i386] Unify bdver?_cost

[Richard Biener]

They are 1:1 the same.

Bootstrapped on x86_64-unknown-linux-gnu, applied.

Richard.

2018-10-11  Richard Biener  

* config/i386/x86-tune-costs.h (bdver?_memcpy, bdver?_memset,
bdver?_cost): Unify to ...
(bdver_memcpy, bdver_memset, bdver_cost): ... this.
* config/i386/i386.c (processor_cost_table): Adjust.

Index: gcc/config/i386/i386.c
===
--- gcc/config/i386/i386.c  (revision 265035)
+++ gcc/config/i386/i386.c  (working copy)
@@ -861,10 +861,10 @@ static const struct processor_costs *pro
   &athlon_cost,
   &k8_cost,
   &amdfam10_cost,
-  &bdver1_cost,
-  &bdver2_cost,
-  &bdver3_cost,
-  &bdver4_cost,
+  &bdver_cost,
+  &bdver_cost,
+  &bdver_cost,
+  &bdver_cost,
   &btver1_cost,
   &btver2_cost,
   &znver1_cost,
Index: gcc/config/i386/x86-tune-costs.h
===
--- gcc/config/i386/x86-tune-costs.h(revision 265035)
+++ gcc/config/i386/x86-tune-costs.h(working copy)
@@ -1047,21 +1047,21 @@ struct processor_costs amdfam10_cost = {
   "32",/* Func alignment.  */
 };
 
-/*  BDVER1 has optimized REP instruction for medium sized blocks, but for
+/*  BDVER has optimized REP instruction for medium sized blocks, but for
 very small blocks it is better to use loop. For large blocks, libcall
 can do nontemporary accesses and beat inline considerably.  */
-static stringop_algs bdver1_memcpy[2] = {
+static stringop_algs bdver_memcpy[2] = {
   {libcall, {{6, loop, false}, {14, unrolled_loop, false},
  {-1, rep_prefix_4_byte, false}}},
   {libcall, {{16, loop, false}, {8192, rep_prefix_8_byte, false},
  {-1, libcall, false;
-static stringop_algs bdver1_memset[2] = {
+static stringop_algs bdver_memset[2] = {
   {libcall, {{8, loop, false}, {24, unrolled_loop, false},
  {2048, rep_prefix_4_byte, false}, {-1, libcall, false}}},
   {libcall, {{48, unrolled_loop, false}, {8192, rep_prefix_8_byte, false},
  {-1, libcall, false;
 
-const struct processor_costs bdver1_cost = {
+const struct processor_costs bdver_cost = {
   COSTS_N_INSNS (1),   /* cost of an add instruction */
   COSTS_N_INSNS (1),   /* cost of a lea instruction */
   COSTS_N_INSNS (1),   /* variable shift costs */
@@ -1139,314 +1139,8 @@ const struct processor_costs bdver1_cost
   COSTS_N_INSNS (15),  /* cost of SQRTSS instruction.  */
   COSTS_N_INSNS (26),  /* cost of SQRTSD instruction.  */
   1, 2, 1, 1,  /* reassoc int, fp, vec_int, vec_fp.  */
-  bdver1_memcpy,
-  bdver1_memset,
-  COSTS_N_INSNS (4),   /* cond_taken_branch_cost.  */
-  COSTS_N_INSNS (2),   /* cond_not_taken_branch_cost.  */
-  "16:11:8",   /* Loop alignment.  */
-  "16:8:8",/* Jump alignment.  */
-  "0:0:8", /* Label alignment.  */
-  "11",/* Func alignment.  */
-};
-
-/*  BDVER2 has optimized REP instruction for medium sized blocks, but for
-very small blocks it is better to use loop. For large blocks, libcall
-can do nontemporary accesses and beat inline considerably.  */
-
-static stringop_algs bdver2_memcpy[2] = {
-  {libcall, {{6, loop, false}, {14, unrolled_loop, false},
- {-1, rep_prefix_4_byte, false}}},
-  {libcall, {{16, loop, false}, {8192, rep_prefix_8_byte, false},
- {-1, libcall, false;
-static stringop_algs bdver2_memset[2] = {
-  {libcall, {{8, loop, false}, {24, unrolled_loop, false},
- {2048, rep_prefix_4_byte, false}, {-1, libcall, false}}},
-  {libcall, {{48, unrolled_loop, false}, {8192, rep_prefix_8_byte, false},
- {-1, libcall, false;
-
-const struct processor_costs bdver2_cost = {
-  COSTS_N_INSNS (1),   /* cost of an add instruction */
-  COSTS_N_INSNS (1),   /* cost of a lea instruction */
-  COSTS_N_INSNS (1),   /* variable shift costs */
-  COSTS_N_INSNS (1),   /* constant shift costs */
-  {COSTS_N_INSNS (4),  /* cost of starting multiply for QI */
-   COSTS_N_INSNS (4),  /*   HI */
-   COSTS_N_INSNS (4),  /*   SI */
-   COSTS_N_INSNS (6),  /*   DI */
-   COSTS_N_INSNS (6)}, /*other */
-  0,   /* cost of multiply per each bit set */
-  {COSTS_N_INSNS (19), /* cost of a divide/mod for QI */
-   COSTS_N_INSNS (35), /*  HI */
-   COSTS_N_INSNS (51), /*  SI */
-   COSTS_N_INSNS (83),  

Re: [PATCH] Switch conversion: support any ax + b transformation (PR tree-optimization/84436).

[Jakub Jelinek]

On Thu, Oct 11, 2018 at 02:56:14PM +0200, Martin Liška wrote:
> As seen in the PR, switch conversion can do better when we return equal 
> numbers
> based on index value. I implemented more than that, more precisely I support 
> all linear
> transformation based on index value. It's the same what clang is capable of.

Not a review, just a question, do you check for overflows while computing
it?  Or force the arithmetics to be performed in a type with defined
overflow.  It would be bad to introduced UB...

Jakub

Re: [PATCH v3] Change default to -fno-math-errno

[Wilco Dijkstra]

Hi Jeff,

> So I went back and reviewed all the discussion around this.  I'm still
> having trouble getting comfortable with flipping the default -- unless
> we know ahead of time that the target runtime doesn't set errno on any
> of the math routines.  That implies a target hook to describe the
> runtime's handling off errno in math functions.  It also introduces
> target dependencies early in the GIMPLE pipeline which is generally
> counter to design goals around GIMPLE.

The goal of my patch was to inline single-instruction functions, so for
these cases you can be 100% sure errno will never be set. No target
hooks are required for this, and it works exactly as documented.

It turns out -fmath-errno is already quite broken since GCC treats
many math functions as never setting errno when in fact GLIBC does 
set errno in almost all math functions.

> Essentially if we flip the default, we run the risk that user code which
> does check this stuff will silently break.  That's not a good position
> to take IMHO.

-fmath-errno is already broken today for many math functions. That's a
much more serious issue than setting errno when we don't care about
errno anyway.

> That led me to wonder if we could prove that for the majority of FP
> intensive codes that even if the library set errno that nobody could
> possibly be reading it, then we could in large part treat those builtin
> calls as -fno-math-errno (we'd mark them somehow and check the mark at
> GIMPLE->RTL expansion time (and possibly other points) to allow us to
> generate machine instructions rather than library calls).  That would
> get most of the benefit without the possibility to breaking user code.

I don't believe any of this is worth the effort. Errno for math functions has
been dead for several decades. A user who really cares about errno can find
the correct option, like one needs for similar rare cases (eg. -frounding-math
which is not the default).

Wilco

Re: [PATCH] Switch conversion: support any ax + b transformation (PR tree-optimization/84436).

[Alexander Monakov]

On Thu, 11 Oct 2018, Martin Liška wrote:

> Hi.
> 
> As seen in the PR, switch conversion can do better when we return equal 
> numbers
> based on index value. I implemented more than that, more precisely I support 
> all linear
> transformation based on index value. It's the same what clang is capable of.
> 
> Patch survives testing on x86_64-linux-gnu. I added various tests that should
> benefit of the transformation.

Nice!  I'd like to point out that __attribute__((noipa)) might be more
appropriate for the new tests, instead of the "noinline,noclone" combo.

(I was also wondering about overflow behavior that Jakub asked about)

Alexander

[committed] libcpp: show macro definition when used with wrong argument count

[David Malcolm]

Consider:

demo.c: In function 'test':
demo.c:5:40: error: macro "LOG_2" requires 3 arguments, but only 2 given
5 |   LOG_2 ("loading file: %s\n", filename);
  |^

This patch adds a note showing the definition of the macro in
question, giving:

demo.c: In function 'test':
demo.c:5:40: error: macro "LOG_2" requires 3 arguments, but only 2 given
5 |   LOG_2 ("loading file: %s\n", filename);
  |^
In file included from demo.c:1:
logging.h:1: note: macro "LOG_2" defined here
1 | #define LOG_2(FMT, ARG0, ARG1) do { fprintf (stderr, (FMT), (ARG0), 
(ARG1)); }
  | 

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu

Committed to trunk as r265040.

gcc/testsuite/ChangeLog:
* g++.dg/diagnostic/macro-arg-count.C: Move to...
* c-c++-common/cpp/macro-arg-count-1.c: ...here, generalizing
output for C vs C++.  Expect notes showing the definitions of the
macros.
* c-c++-common/cpp/macro-arg-count-2.c: New test, adapted from the
above.

libcpp/ChangeLog:
* macro.c (_cpp_arguments_ok): If the argument count is wrong, add
a note showing the definition of the macro.
---
 gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c | 66 ++
 gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c | 36 
 gcc/testsuite/g++.dg/diagnostic/macro-arg-count.C  | 51 -
 libcpp/macro.c |  4 ++
 4 files changed, 106 insertions(+), 51 deletions(-)
 create mode 100644 gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c
 create mode 100644 gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c
 delete mode 100644 gcc/testsuite/g++.dg/diagnostic/macro-arg-count.C

diff --git a/gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c 
b/gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c
new file mode 100644
index 000..7773c47
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cpp/macro-arg-count-1.c
@@ -0,0 +1,66 @@
+/* { dg-options "-fdiagnostics-show-caret" } */
+
+#define MACRO_1(X,Y) /* { dg-line "def_of_MACRO_1" } */
+void test_1 ()
+{
+  MACRO_1(42); /* { dg-line "use_of_MACRO_1" } */
+  /* { dg-error "macro \"MACRO_1\" requires 2 arguments, but only 1 given" "" 
{ target *-*-* } use_of_MACRO_1 } */
+  /* { dg-begin-multiline-output "" }
+   MACRO_1(42);
+ ^
+ { dg-end-multiline-output "" } */
+  /* { dg-message "-: macro .MACRO_1. defined here" "" { target *-*-* } 
def_of_MACRO_1 }
+  /* { dg-begin-multiline-output "" }
+ #define MACRO_1(X,Y)
+ 
+ { dg-end-multiline-output "" } */
+  /* { dg-error "'MACRO_1' undeclared" "" { target c } use_of_MACRO_1 }
+  /* { dg-error "'MACRO_1' was not declared in this scope" "" { target c++ } 
use_of_MACRO_1 }
+
+  /* { dg-begin-multiline-output "" }
+   MACRO_1(42);
+   ^~~
+ { dg-end-multiline-output "" } */
+  /* { dg-bogus "had not yet been defined" "" { target *-*-* } use_of_MACRO_1 
} */
+}
+
+#define MACRO_2(X,Y) /* { dg-line "def_of_MACRO_2" } */
+void test_2 ()
+{
+  MACRO_2(1, 2, 3); /* { dg-line "use_of_MACRO_2" } */
+  /* { dg-error "macro \"MACRO_2\" passed 3 arguments, but takes just 2" "" { 
target *-*-* } use_of_MACRO_2 } */
+  /* { dg-begin-multiline-output "" }
+   MACRO_2(1, 2, 3);
+  ^
+ { dg-end-multiline-output "" } */
+  /* { dg-message "-: macro .MACRO_2. defined here" "" { target *-*-* } 
def_of_MACRO_2 }
+  /* { dg-begin-multiline-output "" }
+ #define MACRO_2(X,Y)
+ 
+ { dg-end-multiline-output "" } */
+  /* { dg-error "'MACRO_2' undeclared" "" { target c } use_of_MACRO_2 } */
+  /* { dg-error "'MACRO_2' was not declared in this scope" "" { target c++ } 
use_of_MACRO_2 } */
+  /* { dg-begin-multiline-output "" }
+   MACRO_2(1, 2, 3);
+   ^~~
+ { dg-end-multiline-output "" } */
+  /* { dg-bogus "had not yet been defined" "" { target *-*-* } use_of_MACRO_2 
} */
+}
+
+#define MACRO_3
+void test_3 ()
+{
+  MACRO_3 (42);
+}
+
+#define MACRO_4(X,Y)
+void test_4 ()
+{
+  MACRO_4; /* { dg-line "use_of_MACRO_4" } */
+  /* { dg-error "'MACRO_4' undeclared" "" { target c } use_of_MACRO_4 } */
+  /* { dg-error "'MACRO_4' was not declared in this scope" "" { target c++ } 
use_of_MACRO_4 } */
+  /* { dg-begin-multiline-output "" }
+   MACRO_4;
+   ^~~
+ { dg-end-multiline-output "" } */
+}
diff --git a/gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c 
b/gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c
new file mode 100644
index 000..ef64488
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cpp/macro-arg-count-2.c
@@ -0,0 +1,36 @@
+/* { dg-options "-traditional-cpp" } */
+
+#define MACRO_1(X,Y) /* { dg-line "def_of_MACRO_1" } */
+void test_1 ()
+{
+  MACRO_1(42); /* { dg-line "use_of_MACRO_1" } */
+  /* { dg-error "-:macro \"MACRO_1\" requires 2 arguments, but only 1 given" 
"" { target c } use_of_MACRO_1 } */
+  /* { dg-error "macro \"MACRO_1\" requires 2 arguments, but only 1 given" "" 
{ target c++ } us

[PATCH] multiline.exp: complain about mismatched dg-{begin|end}-multiline-output

[David Malcolm]

Mismatched dg-{begin|end}-multiline-output directives are currently
silently ignored, leading to difficult-to-diagnose test failures
involving excess output.

This patch makes multiline.exp complain about them.

Successfully regrtested on x86_64-pc-linux-gnu

OK for trunk?

gcc/testsuite/ChangeLog:
* lib/multiline.exp (dg-begin-multiline-output): Issue an error if
there hasn't been a dg-end-multiline-output since the last
dg-begin-multiline-output.
(dg-end-multiline-output): Issue an error if there hasn't been a
dg-begin-multiline-output.  Reset _multiline_last_beginning_line
as soon possible.  Rename "line" to "last_line".
---
 gcc/testsuite/lib/multiline.exp | 27 +--
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/lib/multiline.exp b/gcc/testsuite/lib/multiline.exp
index 6c7ecdf..6e431d9 100644
--- a/gcc/testsuite/lib/multiline.exp
+++ b/gcc/testsuite/lib/multiline.exp
@@ -72,6 +72,14 @@ proc dg-begin-multiline-output { args } {
 global _multiline_last_beginning_line
 verbose "dg-begin-multiline-output: args: $args" 3
 set line [expr [lindex $args 0] + 1]
+
+# Complain if there hasn't been a dg-end-multiline-output
+# since the last dg-begin-multiline-output
+if { $_multiline_last_beginning_line != -1 } {
+   set last_directive_line [expr $_multiline_last_beginning_line - 1]
+   error "$last_directive_line: unterminated dg-begin-multiline-output"
+}
+
 set _multiline_last_beginning_line $line
 }
 
@@ -84,8 +92,17 @@ proc dg-begin-multiline-output { args } {
 proc dg-end-multiline-output { args } {
 global _multiline_last_beginning_line
 verbose "dg-end-multiline-output: args: $args" 3
-set line [expr [lindex $args 0] - 1]
-verbose "multiline output lines: $_multiline_last_beginning_line-$line" 3
+set first_line $_multiline_last_beginning_line
+
+# Complain if there hasn't been a dg-begin-multiline-output
+if { $first_line == -1 } {
+   error "[lindex $args 0]: dg-end-multiline-output without 
dg-begin-multiline-output"
+   return
+}
+set _multiline_last_beginning_line -1
+
+set last_line [expr [lindex $args 0] - 1]
+verbose "multiline output lines: $first_line-$last_line" 3
 
 if { [llength $args] > 3 } {
error "[lindex $args 0]: too many arguments"
@@ -109,16 +126,14 @@ proc dg-end-multiline-output { args } {
 # "prog" now contains the filename
 # Load it and split it into lines
 
-set lines [_get_lines $prog $_multiline_last_beginning_line $line]
+set lines [_get_lines $prog $first_line $last_line]
 
 verbose "lines: $lines" 3
 # Create an entry of the form:  first-line, last-line, lines, maybe_x
-set entry [list $_multiline_last_beginning_line $line $lines $maybe_x]
+set entry [list $first_line $last_line $lines $maybe_x]
 global multiline_expected_outputs
 lappend multiline_expected_outputs $entry
 verbose "within dg-end-multiline-output: multiline_expected_outputs: 
$multiline_expected_outputs" 3
-
-set _multiline_last_beginning_line -1
 }
 
 # Hook to be called by prune.exp's prune_gcc_output to
-- 
1.8.5.3

[ARM/FDPIC v3 00/21] FDPIC ABI for ARM

[Christophe Lyon]

Hello,

This patch series implements the GCC contribution of the FDPIC ABI for
ARM targets.

This ABI enables to run Linux on ARM MMU-less cores and supports
shared libraries to reduce the memory footprint.

Without MMU, text and data segments relative distances are different
from one process to another, hence the need for a dedicated FDPIC
register holding the start address of the data segment. One of the
side effects is that function pointers require two words to be
represented: the address of the code, and the data segment start
address. These two words are designated as "Function Descriptor",
hence the "FD PIC" name.

On ARM, the FDPIC register is r9 [1], and the target name is
arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another
ABI and the BFLAT file format; it does not support code sharing.
The -mfdpic option is enabled by default, and -mno-fdpic should be
used to build the Linux kernel.

This work was developed some time ago by STMicroelectronics, and was
presented during Linaro Connect SFO15 (September 2015). You can watch
the discussion and read the slides [2].
This presentation was related to the toolchain published on github [3],
which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1
and qemu-2.3.0, and for which pre-built binaries are available [3].

The ABI itself is described in details in [1].

Our Linux kernel patches have been updated and committed by Nicolas
Pitre (Linaro) in July 2017. They are required so that the loader is
able to handle this new file type. Indeed, the ELF files are tagged
with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as
well as the new relocations involved.

The binutils, QEMU and uclibc-ng patch series have been merged
recently. [4][5][6]

This series provides support for ARM v7 architecture and has been
tested on arm-linux-gnueabi without regression, as well as
arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has more
failures than arm-linux-gnueabi, but is quite functional.

Are the GCC patches OK for inclusion in master?

Changes between v2 and v3:
- added doc entry for -mfdpic new option
- took Kyrill's comments into account (use "Armv7" instead of "7",
  code factorization, use preprocessor instead of hard-coding "r9",
  remove leftover code for thumb1 support, fixed comments)
- rebase over recent trunk
- patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9,
  14 (rebase), 19 (rebase)

Changes between v1 and v2:
- fix GNU coding style
- exit with an error for pre-Armv7
- use ACLE __ARM_ARCH and remove dead code for pre-Armv4
- remove unsupported attempts of pre-Armv7/thumb1 support
- add instructions in comments next to opcodes
- merge patches 11 and 13
- fixed protected visibility handling in patch 8
- merged legitimize_tls_address_fdpic and
  legitimize_tls_address_not_fdpic as requested

Thanks,

Christophe.


[1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt
[2] 
http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/
[3] https://github.com/mickael-guene/fdpic_manifest
[4] 
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9
[5] 
https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06
[6] 
https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d

Christophe Lyon (21):
  [ARM] FDPIC: Add -mfdpic option support
  [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
  [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
  [ARM] FDPIC: Add support for FDPIC for arm architecture
  [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
  [ARM] FDPIC: Add support for c++ exceptions
  [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is RO
  [ARM] FDPIC: Ensure local/global binding for function descriptors
  [ARM] FDPIC: Add support for taking address of nested function
  [ARM] FDPIC: Implement TLS support.
  [ARM] FDPIC: Add support to unwind FDPIC signal frame
  [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
  [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
  [ARM][testsuite] FDPIC: Skip unsupported tests
  [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
  [ARM][testsuite] FDPIC: Skip v8-m and v6-m tests that currently
produce an ICE
  [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
  [ARM][testsuite] FDPIC: Handle *-*-uclinux*
  [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
  [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
  [ARM][testsuite] FDPIC: Skip tests using architecture older than v7

 config/futex.m4|   2 +-
 config/tls.m4  |   2 +-
 gcc/config.gcc |  13 +-
 gcc/config/arm/arm-c.c |   2 +
 gcc/config/arm/arm-protos

[ARM/FDPIC v3 01/21] [ARM] FDPIC: Add -mfdpic option support

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné  

gcc/
* config/arm/arm.opt: Add -mfdpic option.
* doc/invoke.texi: Add documentation for -mfdpic.

diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index a1286a4..231c1cb 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -302,3 +302,7 @@ When linking for big-endian targets, generate a legacy BE32 
format image.
 mbranch-cost=
 Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
 Cost to assume for a branch insn.
+
+mfdpic
+Target Report Mask(FDPIC)
+Enable Function Descriptor PIC mode.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 5c95f67..3e33e60 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -684,7 +684,8 @@ Objective-C and Objective-C++ Dialects}.
 -mrestrict-it @gol
 -mverbose-cost-dump @gol
 -mpure-code @gol
--mcmse}
+-mcmse @gol
+-mfdpic}
 
 @emph{AVR Options}
 @gccoptlist{-mmcu=@var{mcu}  -mabsdata  -maccumulate-args @gol
@@ -17059,6 +17060,13 @@ MOVT instruction.
 Generate secure code as per the "ARMv8-M Security Extensions: Requirements on
 Development Tools Engineering Specification", which can be found on
 
@url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}.
+
+@item -mfdpic
+@opindex mfdpic
+Select the FDPIC ABI, which uses function descriptors to represent
+pointers to functions.  Without any PIC/PIE-related options, it
+implies @option{-fPIE}.
+
 @end table
 
 @node AVR Options
-- 
2.6.3

[ARM/FDPIC v3 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts

[Christophe Lyon]

The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order the enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.

In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.

In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.

2018-XX-XX  Christophe Lyon  

config/
* futex.m4: Handle *-uclinux*.
* tls.m4 (GCC_CHECK_TLS): Likewise.

gcc/
* config.gcc: Handle *-*-uclinuxfdpiceabi.

libatomic/
* configure.tgt: Handle arm*-*-uclinux*.
* configure: Regenerate.

libgcc/
* config.host: Handle *-*-uclinuxfdpiceabi.

libitm/
* configure.tgt: Handle *-*-uclinux*.
* configure: Regenerate.

libstdc++-v3/
* acinclude.m4: Handle uclinux*.
* configure: Regenerate.
* configure.host: Handle uclinux*

* libtool.m4: Handle uclinux*.

Change-Id: I6a1fdcd9847d8a82179a214612a3474c1f492916

diff --git a/config/futex.m4 b/config/futex.m4
index e95144d..4dffe15 100644
--- a/config/futex.m4
+++ b/config/futex.m4
@@ -9,7 +9,7 @@ AC_DEFUN([GCC_LINUX_FUTEX],[dnl
 GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call],
   permit yes|no|default)
 case "$target" in
-  *-linux*)
+  *-linux* | *-uclinux*)
 case "$enable_linux_futex" in
   default)
# If headers don't have gettid/futex syscalls definition, then
diff --git a/config/tls.m4 b/config/tls.m4
index 4e170c8..5a8676e 100644
--- a/config/tls.m4
+++ b/config/tls.m4
@@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [
  dnl Shared library options may depend on the host; this check
  dnl is only known to be needed for GNU/Linux.
  case $host in
-   *-*-linux*)
+   *-*-linux* | -*-uclinux*)
  LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
  ;;
  esac
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 0c579d1..793fc69 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -753,7 +753,7 @@ case ${target} in
 *-*-fuchsia*)
   native_system_header_dir=/include
   ;;
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | 
*-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | 
*-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi)
   extra_options="$extra_options gnu-user.opt"
   gas=yes
   gnu_ld=yes
@@ -762,7 +762,7 @@ case ${target} in
   esac
   tmake_file="t-slibgcc"
   case $target in
-*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu)
+*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-kopensolaris*-gnu  | 
*-*-uclinuxfdpiceabi)
   :;;
 *-*-gnu*)
   native_system_header_dir=/include
@@ -782,7 +782,7 @@ case ${target} in
 *-*-*android*)
   tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC"
   ;;
-*-*-*uclibc*)
+*-*-*uclibc* | *-*-uclinuxfdpiceabi)
   tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
   ;;
 *-*-*musl*)
@@ -1134,7 +1134,7 @@ arm*-*-netbsdelf*)
tmake_file="${tmake_file} arm/t-arm"
target_cpu_cname="arm6"
;;
-arm*-*-linux-*)# ARM GNU/Linux with ELF
+arm*-*-linux-* | arm*-*-uclinuxfdpiceabi)  # ARM GNU/Linux 
with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h 
glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
extra_options="${extra_options} linux-android.opt"
case $target in
diff --git a/libatomic/configure b/libatomic/configure
index b902e2c..5b3ef8e 100755
--- a/libatomic/configure
+++ b/libatomic/configure
@@ -5819,7 +5819,7 @@ irix5* | irix6* | nonstopux*)
   ;;
 
 # This must be Linux ELF.
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi)
   lt_cv_deplibs_check_method=pass_all
   ;;
 
@@ -8305,7 +8305,7 @@ $as_echo_n "checking for $compiler option to produce 
PIC... " >&6; }
   lt_prog_compiler_static='-non_shared'
   ;;
 
-linux* | k*bsd*-gnu | kopensolaris*-gnu)
+linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinux*)
   case $cc_basename in
   # old Intel for x86_64 which still supported -KPIC.
   ecc*)
@@ -8900,7 +8900,7 @@ _LT_EOF
   archive_expsym_cmds='sed "s,^,_," $export_symbols 
>$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs 
$compiler_flags ${wl}-h,$soname 
${wl}--retain-symbols-file,$output_objdir/$soname.expsym 
${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib'
   ;;
 
-gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu)
+gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceab

[ARM/FDPIC v3 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided

[Christophe Lyon]

In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.

We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.

At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that even for static
link, we must specify the dynamic linker because the executable still
has to relocate itself at startup.

We also force 'now' binding since lazy binding is not supported.

We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
(CC1_SPEC): Use FDPIC_CC1_SPEC.
* config/arm/uclinuxfdpiceabi.h: New file.

libsanitizer/
* configure.tgt (arm*-*-uclinuxfdpiceabi): Sanitizers are
unsupported in this configuration.

Change-Id: If369e0a10bb916fd72e38f71498d3c640fa85c4c

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 793fc69..a4f4331 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1144,6 +1144,11 @@ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi)
# ARM GNU/Linux with ELF
esac
tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi 
arm/t-linux-eabi"
tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h arm/arm.h"
+   case $target in
+   arm*-*-uclinuxfdpiceabi)
+   tm_file="$tm_file arm/uclinuxfdpiceabi.h"
+   ;;
+   esac
# Generation of floating-point instructions requires at least ARMv5te.
if [ "$with_float" = "hard" -o "$with_float" = "softfp" ] ; then
target_cpu_cname="arm10e"
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index 1e3ecfb..5901154 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -55,6 +55,8 @@
 #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
   "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
 
+#define TARGET_FDPIC_ASM_SPEC  ""
+
 #define BE8_LINK_SPEC  \
   "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}"   \
   "   %{mbig-endian:big}"  \
@@ -64,7 +66,7 @@
 /* Tell the assembler to build BPABI binaries.  */
 #undef  SUBTARGET_EXTRA_ASM_SPEC
 #define SUBTARGET_EXTRA_ASM_SPEC \
-  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC 
TARGET_FDPIC_ASM_SPEC
 
 #ifndef SUBTARGET_EXTRA_LINK_SPEC
 #define SUBTARGET_EXTRA_LINK_SPEC ""
diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
index 8585fde..4cee958 100644
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
@@ -98,11 +98,14 @@
 #undef  ASAN_CC1_SPEC
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
 
+#define FDPIC_CC1_SPEC ""
+
 #undef  CC1_SPEC
 #define CC1_SPEC   \
-  LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \
+  LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "  \
+  FDPIC_CC1_SPEC,  \
   GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " "   \
-  ANDROID_CC1_SPEC)
+  ANDROID_CC1_SPEC "" FDPIC_CC1_SPEC)
 
 #define CC1PLUS_SPEC \
   LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC)
diff --git a/gcc/config/arm/uclinuxfdpiceabi.h 
b/gcc/config/arm/uclinuxfdpiceabi.h
new file mode 100644
index 000..43a17de
--- /dev/null
+++ b/gcc/config/arm/uclinuxfdpiceabi.h
@@ -0,0 +1,53 @@
+/* Configuration file for ARM GNU/Linux FDPIC EABI targets.
+   Copyright (C) 2018 Free Software Foundation, Inc.
+   Contributed by STMicroelectronics.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   .  */
+
+/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default,
+   which also means we produce PIE c

[ARM/FDPIC v3 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture

[Christophe Lyon]

The FDPIC register is hard-coded to r9, as defined in the ABI.

We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.

When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
in FDPIC mode.
* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
new function.
* config/arm/arm.c (arm_option_override): Define pic register to
FDPIC_REGNUM.
(arm_function_ok_for_sibcall) Disable sibcall optimization if we
have no decl or go through PLT.
(arm_load_pic_register): Handle TARGET_FDPIC.
(arm_is_segment_info_known): New function.
(arm_pic_static_addr): Add support for FDPIC.
(arm_load_function_descriptor): New function.
(arm_assemble_integer): Add support for FDPIC.
* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
Define. (FDPIC_REGNUM): New define.
* config/arm/arm.md (call): Add support for FDPIC.
(call_value): Likewise.
(*restore_pic_register_after_call): New pattern.
(untyped_call): Disable if FDPIC.
(untyped_return): Likewise.
* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 4471f79..90733cc 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -202,6 +202,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
   builtin_define ("__ARM_EABI__");
 }
 
+  def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC);
+
   def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
   def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
 
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 0dfb3ac..28cafa8 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -136,6 +136,7 @@ extern int arm_max_const_double_inline_cost (void);
 extern int arm_const_double_inline_cost (rtx);
 extern bool arm_const_double_by_parts (rtx);
 extern bool arm_const_double_by_immediates (rtx);
+extern rtx arm_load_function_descriptor (rtx funcdesc);
 extern void arm_emit_call_insn (rtx, rtx, bool);
 bool detect_cmse_nonsecure_call (tree);
 extern const char *output_call (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8810df5..92ae24b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3470,6 +3470,14 @@ arm_option_override (void)
   if (flag_pic && TARGET_VXWORKS_RTP)
 arm_pic_register = 9;
 
+  /* If in FDPIC mode then force arm_pic_register to be r9.  */
+  if (TARGET_FDPIC)
+{
+  arm_pic_register = FDPIC_REGNUM;
+  if (TARGET_ARM_ARCH < 7)
+   error ("FDPIC mode is not supported on architectures older than Armv7");
+}
+
   if (arm_pic_register_string != NULL)
 {
   int pic_register = decode_reg_name (arm_pic_register_string);
@@ -7251,6 +7259,21 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
   if (cfun->machine->sibcall_blocked)
 return false;
 
+  if (TARGET_FDPIC)
+{
+  /* In FDPIC, never tailcall something for which we have no decl:
+the target function could be in a different module, requiring
+a different FDPIC register value.  */
+  if (decl == NULL)
+   return false;
+
+  /* Don't tailcall if we go through the PLT since the FDPIC
+register is then corrupted and we don't restore it after
+static function calls.  */
+  if (!targetm.binds_local_p (decl))
+   return false;
+}
+
   /* Never tailcall something if we are generating code for Thumb-1.  */
   if (TARGET_THUMB1)
 return false;
@@ -7629,7 +7652,9 @@ arm_load_pic_register (unsigned long saved_regs 
ATTRIBUTE_UNUSED)
 {
   rtx l1, labelno, pic_tmp, pic_rtx, pic_reg;
 
-  if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
+  if (crtl->uses_pic_offset_table == 0
+  || TARGET_SINGLE_PIC_BASE
+  || TARGET_FDPIC)
 return;
 
   gcc_assert (flag_pic);
@@ -7697,28 +7722,140 @@ arm_load_pic_register (unsigned long saved_regs 
ATTRIBUTE_UNUSED)
   emit_use (pic_reg);
 }
 
+/* Try to know if the object will go in text or data segment. This is
+   used in FDPIC mode, to decide which relocations to use when
+   accessing ORIG. IS_READONLY is set to true if ORIG is a read-only
+   location, false otherwise.  */
+static bool
+arm_is_segment_info_known (rtx orig, bool *is_readonly)
+{
+  bool res = false;
+
+  *is_readonly = false;
+
+  if (GET_CODE (orig) == LABEL_REF)
+{
+  res = true;
+  *is_readonly = true;
+}
+  else if (SYMBOL_REF_P (orig))
+{
+  if (CONSTANT_POOL_ADDRESS_P (orig))
+   {
+ res = true;
+ *is_reado

[ARM/FDPIC v3 06/21] [ARM] FDPIC: Add support for c++ exceptions

[Christophe Lyon]

The main difference with existing support is that function addresses
are function descriptor addresses instead. This means that all code
dealing with function pointers now has to cope with function
descriptors instead.

For the same reason, Linux kernel helpers can no longer be called by
dereferencing their address, so we implement the same functionality as
a regular function here.

When restoring a function address, we also have to restore the FDPIC
register value (r9).

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
field.
(FDPIC_REGNUM): New define.

libgcc/
* config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
(__kernel_dmb): Likewise.
(__fdpic_cmpxchg): New function.
(__fdpic_dmb): New function.
* config/arm/unwind-arm.h (gnu_Unwind_Find_got): New function.
(_Unwind_decode_typeinfo_ptr): Add FDPIC support.
* unwindo-arm-common.inc (UCB_PR_GOT): New.
(funcdesc_t): New struct.
(get_eit_entry): Add FDPIC support.
(unwind_phase2): Likewise.
(unwind_phase2_forced): Likewise.
(__gnu_Unwind_RaiseException): Likewise.
(__gnu_Unwind_Resume): Likewise.
(__gnu_Unwind_Backtrace): Likewise.
* unwind-pe.h (read_encoded_value_with_base): Likewise.

libstdc++/
* libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
support.

Change-Id: I517a49ff18fae21c686cd1c6008ea7974515b347

diff --git a/gcc/ginclude/unwind-arm-common.h b/gcc/ginclude/unwind-arm-common.h
index 8a1a919..f663891 100644
--- a/gcc/ginclude/unwind-arm-common.h
+++ b/gcc/ginclude/unwind-arm-common.h
@@ -91,7 +91,7 @@ extern "C" {
  _uw reserved2;  /* Personality routine address */
  _uw reserved3;  /* Saved callsite address */
  _uw reserved4;  /* Forced unwind stop arg */
- _uw reserved5;
+ _uw reserved5;  /* Personality routine GOT value in FDPIC mode.  */
}
   unwinder_cache;
   /* Propagation barrier cache (valid after phase 1): */
@@ -247,4 +247,6 @@ typedef unsigned long _uleb128_t;
 }   /* extern "C" */
 #endif
 
+#define FDPIC_REGNUM 9
+
 #endif /* defined UNWIND_ARM_COMMON_H */
diff --git a/libgcc/config/arm/linux-atomic.c b/libgcc/config/arm/linux-atomic.c
index d334c58..161d1ce 100644
--- a/libgcc/config/arm/linux-atomic.c
+++ b/libgcc/config/arm/linux-atomic.c
@@ -25,11 +25,49 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  
If not, see
 
 /* Kernel helper for compare-and-exchange.  */
 typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr);
+#if __FDPIC__
+/* Non-FDPIC ABIs call __kernel_cmpxchg directly by dereferencing its
+   address, but under FDPIC we would generate a broken call
+   sequence. That's why we have to implement __kernel_cmpxchg and
+   __kernel_dmb here: this way, the FDPIC call sequence works.  */
+#define __kernel_cmpxchg __fdpic_cmpxchg
+#else
 #define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0x0fc0)
+#endif
 
 /* Kernel helper for memory barrier.  */
 typedef void (__kernel_dmb_t) (void);
+#if __FDPIC__
+#define __kernel_dmb __fdpic_dmb
+#else
 #define __kernel_dmb (*(__kernel_dmb_t *) 0x0fa0)
+#endif
+
+#if __FDPIC__
+static int __fdpic_cmpxchg (int oldval, int newval, int *ptr)
+{
+  int result;
+
+  asm volatile ("1: ldrex r3, [%[ptr]]\n\t"
+   "subs  r3, r3, %[oldval]\n\t"
+   "itt eq\n\t"
+   "strexeq r3, %[newval], [%[ptr]]\n\t"
+   "teqeq r3, #1\n\t"
+   "it eq\n\t"
+   "beq 1b\n\t"
+   "rsbs  %[result], r3, #0\n\t"
+   : [result] "=r" (result)
+   : [oldval] "r" (oldval) , [newval] "r" (newval), [ptr] "r" (ptr)
+   : "r3");
+return result;
+}
+
+static void __fdpic_dmb ()
+{
+  asm volatile ("dmb\n\t");
+}
+
+#endif
 
 /* Note: we implement byte, short and int versions of atomic operations using
the above kernel helpers; see linux-atomic-64bit.c for "long long" (64-bit)
diff --git a/libgcc/config/arm/unwind-arm.h b/libgcc/config/arm/unwind-arm.h
index 9f7d3f2..db5dfa2 100644
--- a/libgcc/config/arm/unwind-arm.h
+++ b/libgcc/config/arm/unwind-arm.h
@@ -33,9 +33,31 @@
 /* Use IP as a scratch register within the personality routine.  */
 #define UNWIND_POINTER_REG 12
 
+#define STR(x) #x
+#define XSTR(x) STR(x)
+
 #ifdef __cplusplus
 extern "C" {
 #endif
+_Unwind_Ptr __attribute__((weak)) __gnu_Unwind_Find_got (_Unwind_Ptr);
+
+static inline _Unwind_Ptr gnu_Unwind_Find_got (_Unwind_Ptr ptr)
+{
+_Unwind_Ptr res;
+
+if (__gnu_Unwind_Find_got)
+   res =  __gnu_Unwind_Find_got (ptr);
+else
+  {
+   asm volatile ("mov %[result], r" XSTR(FDPIC_REGNUM)
+ : [result]"=r" (res)
+ :
+ :);
+  }
+
+return res;
+}
+
   /* Decode an R_ARM_TARGET2 reloca

[ARM/FDPIC v3 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation

[Christophe Lyon]

In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

* libgcc/crtstuff.c: Add support for FDPIC.

Change-Id: Iff3aec3815e8ebd87276c0107752f00908a22100

diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c
index d81c527..ad40719 100644
--- a/libgcc/crtstuff.c
+++ b/libgcc/crtstuff.c
@@ -429,9 +429,17 @@ __do_global_dtors_aux (void)
 #ifdef FINI_SECTION_ASM_OP
 CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux)
 #elif defined (FINI_ARRAY_SECTION_ASM_OP)
+#if defined(__FDPIC__)
+__asm__(
+"   .section .fini_array\n"
+"   .word __do_global_dtors_aux\n"
+);
+asm (TEXT_SECTION_ASM_OP);
+#else /* defined(__FDPIC__) */
 static func_ptr __do_global_dtors_aux_fini_array_entry[]
   __attribute__ ((__used__, section(".fini_array"), aligned(sizeof(func_ptr
   = { __do_global_dtors_aux };
+#endif /* defined(__FDPIC__) */
 #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */
 static void __attribute__((used))
 __do_global_dtors_aux_1 (void)
@@ -473,9 +481,17 @@ frame_dummy (void)
 #ifdef __LIBGCC_INIT_SECTION_ASM_OP__
 CRT_CALL_STATIC_FUNCTION (__LIBGCC_INIT_SECTION_ASM_OP__, frame_dummy)
 #else /* defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
+#if defined(__FDPIC__)
+__asm__(
+"   .section .init_array\n"
+"   .word frame_dummy\n"
+);
+asm (TEXT_SECTION_ASM_OP);
+#else /* defined(__FDPIC__) */
 static func_ptr __frame_dummy_init_array_entry[]
   __attribute__ ((__used__, section(".init_array"), aligned(sizeof(func_ptr
   = { frame_dummy };
+#endif /* defined(__FDPIC__) */
 #endif /* !defined(__LIBGCC_INIT_SECTION_ASM_OP__) */
 #endif /* USE_EH_FRAME_REGISTRY || USE_TM_CLONE_REGISTRY */
 
-- 
2.6.3

Re: [C++ PATCH] Fix -Wreturn-local-addr handling of structured bindings (PR c++/87582)

[Jason Merrill]

OK.
On Thu, Oct 11, 2018 at 8:52 AM Jakub Jelinek  wrote:
>
> Hi!
>
> Except for std::tuple* structured bindings, the VAR_DECLs we create for the
> identifiers aren't actually variables, but placeholders with
> DECL_VALUE_EXPR.  If the structured binding is not a reference, it is still
> an automatic variable and so -Wreturn-local-addr should warn on those,
> but if it is a reference, then it depends if it references an automatic
> variable or something else.
>
> The following patch handles it by recursing for references on the
> initializer of the structured binding.  Note we don't just emit incorrect
> warning without this patch, but the caller replaces return something;
> with return (something, 0); if maybe_warn_about_returning_address_of_local
> returns true, so it is also invalid at runtime.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk and
> release branches?
>
> 2018-10-11  Jakub Jelinek  
>
> PR c++/87582
> * typeck.c (maybe_warn_about_returning_address_of_local): If
> whats_returned is a structured binding identifier and the structured
> binding is a reference, recurse on its initializer.
>
> * g++.dg/cpp1z/decomp48.C: New test.
>
> --- gcc/cp/typeck.c.jj  2018-09-13 09:27:31.547765011 +0200
> +++ gcc/cp/typeck.c 2018-10-11 10:06:36.820295475 +0200
> @@ -9096,6 +9096,22 @@ maybe_warn_about_returning_address_of_lo
>&& !(TREE_STATIC (whats_returned)
>|| TREE_PUBLIC (whats_returned)))
>  {
> +  if (VAR_P (whats_returned)
> + && DECL_DECOMPOSITION_P (whats_returned)
> + && DECL_DECOMP_BASE (whats_returned)
> + && DECL_HAS_VALUE_EXPR_P (whats_returned))
> +   {
> + /* When returning address of a structured binding, if the structured
> +binding is not a reference, continue normally, if it is a
> +reference, recurse on the initializer of the structured
> +binding.  */
> + tree base = DECL_DECOMP_BASE (whats_returned);
> + if (TYPE_REF_P (TREE_TYPE (base)))
> +   {
> + tree init = DECL_INITIAL (base);
> + return maybe_warn_about_returning_address_of_local (init);
> +   }
> +   }
>bool w = false;
>auto_diagnostic_group d;
>if (TYPE_REF_P (valtype))
> --- gcc/testsuite/g++.dg/cpp1z/decomp48.C.jj2018-10-11 10:30:09.255651339 
> +0200
> +++ gcc/testsuite/g++.dg/cpp1z/decomp48.C   2018-10-11 11:00:23.210283412 
> +0200
> @@ -0,0 +1,134 @@
> +// PR c++/87582
> +// { dg-do run { target c++11 } }
> +// { dg-options "-Wreturn-local-addr" }
> +
> +struct S { int s, t; };
> +S v {1, 2};
> +int a[3] = {1, 2, 3};
> +
> +int &
> +f1 ()
> +{
> +  auto& [s, t] = v;// { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-bogus "reference to local variable '.' 
> returned" }
> +}
> +
> +int &
> +f2 ()
> +{
> +  S v {1, 2};
> +  auto& [s, t] = v;// { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-warning "reference to local variable 'v' 
> returned" }
> +}
> +
> +int &
> +f3 ()
> +{
> +  auto& [s, t, u] = a; // { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-bogus "reference to local variable '.' 
> returned" }
> +}
> +
> +int &
> +f4 ()
> +{
> +  int a[3] = {1, 2, 3};
> +  auto& [s, t, u] = a; // { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-warning "reference to local variable 'a' 
> returned" }
> +}
> +
> +int &
> +f5 ()
> +{
> +  auto [s, t] = v; // { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-warning "reference to local variable 's' 
> returned" }
> +}
> +
> +int &
> +f6 ()
> +{
> +  S v {1, 2};
> +  auto [s, t] = v; // { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-warning "reference to local variable 's' 
> returned" }
> +}
> +
> +int &
> +f7 ()
> +{
> +  auto [s, t, u] = a;  // { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-warning "reference to local variable 's' 
> returned" }
> +}
> +
> +int &
> +f8 ()
> +{
> +  int a[3] = {1, 2, 3};
> +  auto [s, t, u] = a;  // { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return s;// { dg-warning "reference to local variable 's' 
> returned" }
> +}
> +
> +int *
> +f9 ()
> +{
> +  auto& [s, t] = v;// { dg-warning "structured bindings only available 
> with" "" { target c++14_down } }
> +  return &s;   // { dg-bogus "address of local variable '.' 
> returned" }
> +}
> +
> +int *
> +f10 ()
> +{
> +  S v {1, 2};
> +  auto& [s, t] = v;// { dg-warning 

[ARM/FDPIC v3 08/21] [ARM] FDPIC: Ensure local/global binding for function descriptors

[Christophe Lyon]

Use local binding rules to decide whether we can use GOTOFFFUNCDESC to
compute the function address.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_local_funcdesc_p): New function.
(legitimize_pic_address): Ensure binding rules on function
pointers in FDPIC mode.
(arm_assemble_integer): Likewise.

Change-Id: I3fa0b63bc0f672903f405aa72cc46052de1c0feb

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a6dce36..d0144fd 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3768,6 +3768,42 @@ arm_options_perform_arch_sanity_checks (void)
 }
 }
 
+/* Test whether a local function descriptor is canonical, i.e.,
+   whether we can use GOTOFFFUNCDESC to compute the address of the
+   function.  */
+static bool
+arm_local_funcdesc_p (rtx fnx)
+{
+  tree fn;
+  enum symbol_visibility vis;
+  bool ret;
+
+  if (!TARGET_FDPIC)
+return TRUE;
+
+  if (! SYMBOL_REF_LOCAL_P (fnx))
+return FALSE;
+
+  fn = SYMBOL_REF_DECL (fnx);
+
+  if (! fn)
+return FALSE;
+
+  vis = DECL_VISIBILITY (fn);
+
+  if (vis == VISIBILITY_PROTECTED)
+/* Private function descriptors for protected functions are not
+   canonical.  Temporarily change the visibility to global so that
+   we can ensure unicity of funcdesc pointers.  */
+DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
+
+  ret = default_binds_local_p_1 (fn, flag_pic);
+
+  DECL_VISIBILITY (fn) = vis;
+
+  return ret;
+}
+
 static void
 arm_add_gc_roots (void)
 {
@@ -7485,7 +7521,9 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx 
reg)
   || (GET_CODE (orig) == SYMBOL_REF
   && SYMBOL_REF_LOCAL_P (orig)
   && (SYMBOL_REF_DECL (orig)
-  ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)))
+  ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1)
+  && (!SYMBOL_REF_FUNCTION_P(orig)
+  || arm_local_funcdesc_p (orig
  && NEED_GOT_RELOC
  && arm_pic_data_is_text_relative)
insn = arm_pic_static_addr (orig, reg);
@@ -23053,7 +23091,9 @@ arm_assemble_integer (rtx x, unsigned int size, int 
aligned_p)
  || (GET_CODE (x) == SYMBOL_REF
  && (!SYMBOL_REF_LOCAL_P (x)
  || (SYMBOL_REF_DECL (x)
- ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0
+ ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)
+ || (SYMBOL_REF_FUNCTION_P (x)
+ && !arm_local_funcdesc_p (x)
{
  if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x))
fputs ("(GOTFUNCDESC)", asm_out_file);
-- 
2.6.3

[ARM/FDPIC v3 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is RO

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
FDPIC.
(thumb1_compute_save_core_reg_mask): Likewise.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 92ae24b..a6dce36 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19470,7 +19470,7 @@ arm_compute_save_reg0_reg12_mask (void)
 
   /* Also save the pic base register if necessary.  */
   if (flag_pic
- && !TARGET_SINGLE_PIC_BASE
+ && !TARGET_SINGLE_PIC_BASE && !TARGET_FDPIC
  && arm_pic_register != INVALID_REGNUM
  && crtl->uses_pic_offset_table)
save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
@@ -19504,7 +19504,7 @@ arm_compute_save_reg0_reg12_mask (void)
   /* If we aren't loading the PIC register,
 don't stack it even though it may be live.  */
   if (flag_pic
- && !TARGET_SINGLE_PIC_BASE
+ && !TARGET_SINGLE_PIC_BASE && !TARGET_FDPIC
  && arm_pic_register != INVALID_REGNUM
  && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)
  || crtl->uses_pic_offset_table))
-- 
2.6.3

[ARM/FDPIC v3 09/21] [ARM] FDPIC: Add support for taking address of nested function

[Christophe Lyon]

In FDPIC mode, the trampoline generated to support pointers to nested
functions looks like:

   .wordtrampoline address
   .wordtrampoline GOT address
   ldr  r12, [pc, #8]
   ldr  r9, [pc, #8]
   ldr  pc, [pc, #8]
   .wordstatic chain value
   .wordGOT address
   .wordfunction's address

because in FDPIC function pointers are actually pointers to function
descriptors, we have to actually generate a function descriptor for
the trampoline.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
support.
(arm_trampoline_init): Likewise.
(arm_trampoline_init): Likewise.
* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d0144fd..2a58d83 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3954,13 +3954,50 @@ arm_warn_func_return (tree decl)
   .wordstatic chain value
   .wordfunction's address
XXX FIXME: When the trampoline returns, r8 will be clobbered.  */
+/* In FDPIC mode, the trampoline looks like:
+  .wordtrampoline address
+  .wordtrampoline GOT address
+  ldr  r12, [pc, #8] ; #4 for Thumb2
+  ldr  r9,  [pc, #8] ; #4 for Thumb2
+  ldr  pc,  [pc, #8] ; #4 for Thumb2
+  .wordstatic chain value
+  .wordGOT address
+  .wordfunction's address
+*/
 
 static void
 arm_asm_trampoline_template (FILE *f)
 {
   fprintf (f, "\t.syntax unified\n");
 
-  if (TARGET_ARM)
+  if (TARGET_FDPIC)
+{
+  /* The first two words are a function descriptor pointing to the
+trampoline code just below.  */
+  if (TARGET_ARM)
+   fprintf (f, "\t.arm\n");
+  else if (TARGET_THUMB2)
+   fprintf (f, "\t.thumb\n");
+  else
+   /* Only ARM and Thumb-2 are supported.  */
+   gcc_unreachable ();
+
+  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+  /* Trampoline code which sets the static chain register but also
+PIC register before jumping into real code.  */
+  asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+  STATIC_CHAIN_REGNUM, PC_REGNUM,
+  TARGET_THUMB2 ? 8 : 4);
+  asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+  PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
+  TARGET_THUMB2 ? 8 : 4);
+  asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+  PC_REGNUM, PC_REGNUM,
+  TARGET_THUMB2 ? 8 : 4);
+  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+}
+  else if (TARGET_ARM)
 {
   fprintf (f, "\t.arm\n");
   asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
@@ -4001,12 +4038,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx 
chain_value)
   emit_block_move (m_tramp, assemble_trampoline_template (),
   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
 
-  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
-  emit_move_insn (mem, chain_value);
+  if (TARGET_FDPIC)
+{
+  rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
+  rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+  rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+  /* The function start address is at offset 8, but in Thumb mode
+we want bit 0 set to 1 to indicate Thumb-ness, hence 9
+below.  */
+  rtx trampoline_code_start
+   = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
+
+  /* Write initial funcdesc which points to the trampoline.  */
+  mem = adjust_address (m_tramp, SImode, 0);
+  emit_move_insn (mem, trampoline_code_start);
+  mem = adjust_address (m_tramp, SImode, 4);
+  emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
+  /* Setup static chain.  */
+  mem = adjust_address (m_tramp, SImode, 20);
+  emit_move_insn (mem, chain_value);
+  /* GOT + real function entry point.  */
+  mem = adjust_address (m_tramp, SImode, 24);
+  emit_move_insn (mem, gotaddr);
+  mem = adjust_address (m_tramp, SImode, 28);
+  emit_move_insn (mem, fnaddr);
+}
+  else
+{
+  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
+  emit_move_insn (mem, chain_value);
 
-  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
-  fnaddr = XEXP (DECL_RTL (fndecl), 0);
-  emit_move_insn (mem, fnaddr);
+  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
+  fnaddr = XEXP (DECL_RTL (fndecl), 0);
+  emit_move_insn (mem, fnaddr);
+}
 
   a_tramp = XEXP (m_tramp, 0);
   emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
@@ -4020,7 +4085,

[ARM/FDPIC v3 10/21] [ARM] FDPIC: Implement TLS support.

[Christophe Lyon]

Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.

We do not support the GNU2 TLS dialect.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
(arm_call_tls_get_addr): Add FDPIC support.
(legitimize_tls_address): Likewise.
(arm_emit_tls_decoration): Likewise.

Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 2a58d83..d7b7d99 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2373,9 +2373,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
 
 enum tls_reloc {
   TLS_GD32,
+  TLS_GD32_FDPIC,
   TLS_LDM32,
+  TLS_LDM32_FDPIC,
   TLS_LDO32,
   TLS_IE32,
+  TLS_IE32_FDPIC,
   TLS_LE32,
   TLS_DESCSEQ  /* GNU scheme */
 };
@@ -8674,20 +8677,34 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int 
reloc)
   gcc_assert (reloc != TLS_DESCSEQ);
   start_sequence ();
 
-  labelno = GEN_INT (pic_labelno++);
-  label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
-  label = gen_rtx_CONST (VOIDmode, label);
+  if (TARGET_FDPIC)
+{
+  sum = gen_rtx_UNSPEC (Pmode,
+   gen_rtvec (2, x, GEN_INT (reloc)),
+   UNSPEC_TLS);
+}
+  else
+{
+  labelno = GEN_INT (pic_labelno++);
+  label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
+  label = gen_rtx_CONST (VOIDmode, label);
 
-  sum = gen_rtx_UNSPEC (Pmode,
-   gen_rtvec (4, x, GEN_INT (reloc), label,
-  GEN_INT (TARGET_ARM ? 8 : 4)),
-   UNSPEC_TLS);
+  sum = gen_rtx_UNSPEC (Pmode,
+   gen_rtvec (4, x, GEN_INT (reloc), label,
+  GEN_INT (TARGET_ARM ? 8 : 4)),
+   UNSPEC_TLS);
+}
   reg = load_tls_operand (sum, reg);
 
-  if (TARGET_ARM)
-emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
+  if (TARGET_FDPIC)
+{
+  emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM)));
+}
   else
-emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+if (TARGET_ARM)
+  emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
+else
+  emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
 
   *valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX,
 LCT_PURE, /* LCT_CONST?  */
@@ -8722,6 +8739,7 @@ arm_tls_descseq_addr (rtx x, rtx reg)
   return reg;
 }
 
+
 rtx
 legitimize_tls_address (rtx x, rtx reg)
 {
@@ -8734,6 +8752,9 @@ legitimize_tls_address (rtx x, rtx reg)
 case TLS_MODEL_GLOBAL_DYNAMIC:
   if (TARGET_GNU2_TLS)
{
+ if (TARGET_FDPIC)
+   gcc_unreachable();
+
  reg = arm_tls_descseq_addr (x, reg);
 
  tp = arm_load_tp (NULL_RTX);
@@ -8743,7 +8764,10 @@ legitimize_tls_address (rtx x, rtx reg)
   else
{
  /* Original scheme */
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
+ if (TARGET_FDPIC)
+   insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC);
+ else
+   insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32);
  dest = gen_reg_rtx (Pmode);
  emit_libcall_block (insns, dest, ret, x);
}
@@ -8752,6 +8776,9 @@ legitimize_tls_address (rtx x, rtx reg)
 case TLS_MODEL_LOCAL_DYNAMIC:
   if (TARGET_GNU2_TLS)
{
+ if (TARGET_FDPIC)
+   gcc_unreachable();
+
  reg = arm_tls_descseq_addr (x, reg);
 
  tp = arm_load_tp (NULL_RTX);
@@ -8760,7 +8787,10 @@ legitimize_tls_address (rtx x, rtx reg)
}
   else
{
- insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
+ if (TARGET_FDPIC)
+   insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC);
+ else
+   insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32);
 
  /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
 share the LDM result with other LD model accesses.  */
@@ -8779,23 +8809,35 @@ legitimize_tls_address (rtx x, rtx reg)
   return dest;
 
 case TLS_MODEL_INITIAL_EXEC:
-  labelno = GEN_INT (pic_labelno++);
-  label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
-  label = gen_rtx_CONST (VOIDmode, label);
-  sum = gen_rtx_UNSPEC (Pmode,
-   gen_rtvec (4, x, GEN_INT (TLS_IE32), label,
-  GEN_INT (TARGET_ARM ? 8 : 4)),
-   UNSPEC_TLS);
-  reg = load_tls_operand (sum, reg);
-
-  if (TARGET_ARM)
-   emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
-  else if (TARGET_THUMB2)
-   emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno));

[ARM/FDPIC v3 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame

[Christophe Lyon]

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

libgcc/
* unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN)
(THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC)
(FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER)
(FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT)
(ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0, 
FDPIC_T2_LDR_R12_WITH_FUNCDESC)
(FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New.
(__gnu_personality_sigframe_fdpic): New.
(get_eit_entry): Add FDPIC signal frame support.

Change-Id: I7f9527cc50665dd1a731b7badf71c319fb38bf57

diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
index 7187edd..08d7b44 100644
--- a/libgcc/unwind-arm-common.inc
+++ b/libgcc/unwind-arm-common.inc
@@ -30,6 +30,26 @@
 #include 
 #endif
 
+#if __FDPIC__
+/* Load r7 with rt_sigreturn value.  */
+#define ARM_SET_R7_RT_SIGRETURN0xe3a070ad  /* mov   r7, 
#0xad */
+#define THUMB2_SET_R7_RT_SIGRETURN 0x07adf04f  /* mov.w r7, #0xad */
+
+/* FDPIC jump to restorer sequence.  */
+#define FDPIC_LDR_R12_WITH_FUNCDESC0xe59fc004  /* ldr   r12, [pc, #4] 
*/
+#define FDPIC_LDR_R9_WITH_GOT  0xe59c9004  /* ldr   r9, [r12, #4] 
*/
+#define FDPIC_LDR_PC_WITH_RESTORER 0xe59cf000  /* ldr   pc, [r12] */
+#define FDPIC_T2_LDR_R12_WITH_FUNCDESC  0xc008f8df /* ldr.w r12, [pc, #8] 
*/
+#define FDPIC_T2_LDR_R9_WITH_GOT   0x9004f8dc  /* ldr.w r9, [r12, #4] 
*/
+#define FDPIC_T2_LDR_PC_WITH_RESTORER   0xf000f8dc /* ldr.w pc, [r12] */
+#define FDPIC_FUNCDESC_OFFSET  12
+
+/* Signal frame offsets.  */
+#define ARM_NEW_RT_SIGFRAME_UCONTEXT   0x80
+#define ARM_UCONTEXT_SIGCONTEXT0x14
+#define ARM_SIGCONTEXT_R0  0xc
+#endif
+
 /* We add a prototype for abort here to avoid creating a dependency on
target headers.  */
 extern void abort (void);
@@ -198,6 +218,45 @@ search_EIT_table (const __EIT_entry * table, int nrec, _uw 
return_address)
 }
 }
 
+#if __FDPIC__
+/* VFP is not restored, but this is sufficient to allow unwinding.  */
+static _Unwind_Reason_Code
+__gnu_personality_sigframe_fdpic (_Unwind_State state,
+ _Unwind_Control_Block *ucbp,
+ _Unwind_Context *context)
+{
+unsigned int sp;
+unsigned int pc;
+unsigned int funcdesc;
+unsigned int handler;
+unsigned int first_handler_instruction;
+int i;
+
+_Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp);
+_Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc);
+
+funcdesc = *(unsigned int *)((pc & ~1) + FDPIC_FUNCDESC_OFFSET);
+handler = *(unsigned int *)(funcdesc);
+first_handler_instruction = *(unsigned int *)(handler & ~1);
+
+/* Adjust SP to point to the start of registers according to
+   signal type.  */
+if (first_handler_instruction == ARM_SET_R7_RT_SIGRETURN
+   || first_handler_instruction == THUMB2_SET_R7_RT_SIGRETURN)
+   sp += ARM_NEW_RT_SIGFRAME_UCONTEXT
+ + ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0;
+else
+   sp += ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0;
+/* Restore regs saved on stack by the kernel.  */
+for (i = 0; i < 16; i++)
+   _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp + 4 * i);
+
+return _URC_CONTINUE_UNWIND;
+}
+#endif
+
 /* Find the exception index table eintry for the given address.
Fill in the relevant fields of the UCB.
Returns _URC_FAILURE if an error occurred, _URC_OK on success.  */
@@ -221,6 +280,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
&nrec);
   if (!eitp)
{
+#if __FDPIC__
+ /* If we are unwinding a signal handler then perhaps we have
+reached a trampoline.  Try to detect jump to restorer
+sequence.  */
+ _uw *pc = (_uw *)((return_address+2) & ~1);
+ if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC
+  && pc[1] == FDPIC_LDR_R9_WITH_GOT
+  && pc[2] == FDPIC_LDR_PC_WITH_RESTORER)
+ || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC
+ && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT
+ && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER))
+   {
+ struct funcdesc_t *funcdesc
+   = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic;
+
+ UCB_PR_ADDR (ucbp) = funcdesc->ptr;
+ UCB_PR_GOT (ucbp) = funcdesc->got;
+
+ return _URC_OK;
+   }
+#endif
  UCB_PR_ADDR (ucbp) = 0;
  return _URC_FAILURE;
}
@@ -235,6 +315,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw 
return_address)
 
   if (!eitp)
 {
+#if __FDPIC__
+  /* If we are unwinding a signal handler then perhaps we have
+reached a trampoline.  Try to detect jump to res

[ARM/FDPIC v3 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp

[Christophe Lyon]

We call __aeabi_read_tp() to get the thread pointer. Since this is a
function call, we have to restore the FDPIC register afterwards.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/
* config/arm/arm.c (arm_load_tp): Add FDPIC support.
* config/arm/arm.md (load_tp_soft_fdpic): New pattern.
(load_tp_soft): Disable in FDPIC mode.

Change-Id: I0a2e3466c9afb869ad8e844083ad178de014658e

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d7b7d99..d3a60cb 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -8646,7 +8646,25 @@ arm_load_tp (rtx target)
 
   rtx tmp;
 
-  emit_insn (gen_load_tp_soft ());
+  if (TARGET_FDPIC)
+   {
+ rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3));
+
+ emit_insn (gen_load_tp_soft_fdpic ());
+
+ /* Restore r9.  */
+ XVECEXP (par, 0, 0)
+   = gen_rtx_UNSPEC (VOIDmode,
+ gen_rtvec (2, gen_rtx_REG (Pmode, FDPIC_REGNUM),
+get_hard_reg_initial_val (Pmode, 
FDPIC_REGNUM)),
+ UNSPEC_PIC_RESTORE);
+ XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, 
FDPIC_REGNUM));
+ XVECEXP (par, 0, 2)
+   = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, FDPIC_REGNUM));
+ emit_insn (par);
+   }
+  else
+   emit_insn (gen_load_tp_soft ());
 
   tmp = gen_rtx_REG (SImode, R0_REGNUM);
   emit_move_insn (target, tmp);
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 09a0701..6fea087 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -11485,12 +11485,25 @@
 )
 
 ;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
+(define_insn "load_tp_soft_fdpic"
+  [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
+   (clobber (reg:SI 9))
+   (clobber (reg:SI LR_REGNUM))
+   (clobber (reg:SI IP_REGNUM))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_SOFT_TP && TARGET_FDPIC"
+  "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
+  [(set_attr "conds" "clob")
+   (set_attr "type" "branch")]
+)
+
+;; Doesn't clobber R1-R3.  Must use r0 for the first operand.
 (define_insn "load_tp_soft"
   [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS))
(clobber (reg:SI LR_REGNUM))
(clobber (reg:SI IP_REGNUM))
(clobber (reg:CC CC_REGNUM))]
-  "TARGET_SOFT_TP"
+  "TARGET_SOFT_TP && !TARGET_FDPIC"
   "bl\\t__aeabi_read_tp\\t@ load_tp_soft"
   [(set_attr "conds" "clob")
(set_attr "type" "branch")]
-- 
2.6.3

[ARM/FDPIC v3 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

[Christophe Lyon]

Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.

This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

libgcc/
* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m
architecture.

Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea

diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c
index 564e4f13..6da6e3d 100644
--- a/libgcc/config/arm/unwind-arm.c
+++ b/libgcc/config/arm/unwind-arm.c
@@ -198,6 +198,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context 
*context,
return _UVRSR_FAILED;
 
   vrs->core.r[regno] = *(_uw *) valuep;
+#if defined(__ARM_ARCH_7M__)
+  /* Force LSB bit since we always run thumb code.  */
+  if (regno == 15)
+   vrs->core.r[regno] |= 1;
+#endif
   return _UVRSR_OK;
 
 case _UVRSC_VFP:
-- 
2.6.3

[ARM/FDPIC v3 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests

[Christophe Lyon]

Several tests cannot work on ARM-FDPIC for various reasons: skip them,
or skip some directives.

gcc.dg/20020312-2.c: Skip since it forces -fno-pic.

gcc.target/arm/:
* Skip since r9 is clobbered by assembly code:
  20051215-1.c
  mmx-1.c
  pr61948.c
  pr77933-1.c
  pr77933-2.c

* Skip since the test forces armv5te which is not supported by FDPIC:
  pr40887.c
  pr19599.c

* Skip since FDPIC disables sibcall to external functions:
  sibcall-1.c
  tail-long-call
  vfp-longcall-apcs

* Skip size check since it's different for FDPIC:
  ivopts-2.c
  ivopts-3.c
  ivopts-4.c
  ivopts-5.c
  pr43597.c
  pr43920-2.c

* Disable assembler scanning invalid for FDPIC:
  pr45701-1.c
  pr45701-2.c
  stack-red-zone.c

* gnu2 TLS dialect is not supported by FDPIC:
  tlscall.c

* Test relies on symbols not generated in FDPIC:
  data-rel-2.c
  data-rel-3.c

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/testsuite/
* gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/20051215-1.c: Likewise.
* gcc.target/arm/mmx-1.c: Likewise.
* gcc.target/arm/pr19599.c: Likewise.
* gcc.target/arm/pr40887.c: Likewise.
* gcc.target/arm/pr61948.c: Likewise.
* gcc.target/arm/pr77933-1.c: Likewise.
* gcc.target/arm/pr77933-2.c: Likewise.
* gcc.target/arm/sibcall-1.c: Likewise.
* gcc.target/arm/data-rel-2.c: Likewise.
* gcc.target/arm/data-rel-3.c: Likewise.
* gcc.target/arm/tail-long-call: Likewise.
* gcc.target/arm/tlscall.c: Likewise.
* gcc.target/arm/vfp-longcall-apcs: Likewise.
* gcc.target/arm/ivopts-2.c: Skip object-size test on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/ivopts-3.c: Likewise.
* gcc.target/arm/ivopts-4.c: Likewise.
* gcc.target/arm/ivopts-5.c: Likewise.
* gcc.target/arm/pr43597.c: Likewise.
* gcc.target/arm/pr43920-2.c: Likewise.
* gcc.target/arm/pr45701-1.c: Skip scan-assembler on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/pr45701-2.c: Likewise.
* gcc.target/arm/stack-red-zone.c: Likewise.

Change-Id: Icada7ce52537901fdac10403e7997571b7e2c509

diff --git a/gcc/testsuite/gcc.dg/20020312-2.c 
b/gcc/testsuite/gcc.dg/20020312-2.c
index 1a8afd8..9cfc829 100644
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -9,6 +9,7 @@
 /* { dg-options "-O -fno-pic" } */
 /* { dg-additional-options "-no-pie" { target pie_enabled } } */
 /* { dg-require-effective-target nonlocal_goto } */
+/* { dg-skip-if "" { arm*-*-uclinuxfdpiceabi } "*" "" } */
 
 extern void abort (void);
 
diff --git a/gcc/testsuite/gcc.target/arm/20051215-1.c 
b/gcc/testsuite/gcc.target/arm/20051215-1.c
index 0519dc7..cc07693 100644
--- a/gcc/testsuite/gcc.target/arm/20051215-1.c
+++ b/gcc/testsuite/gcc.target/arm/20051215-1.c
@@ -3,6 +3,7 @@
the call would need an output reload.  */
 /* { dg-do run } */
 /* { dg-options "-O2 -fno-omit-frame-pointer" } */
+/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
 extern void abort (void);
 typedef void (*callback) (void);
 
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-2.c 
b/gcc/testsuite/gcc.target/arm/data-rel-2.c
index 6ba47d6..7d37a8c 100644
--- a/gcc/testsuite/gcc.target/arm/data-rel-2.c
+++ b/gcc/testsuite/gcc.target/arm/data-rel-2.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
 /* { dg-options "-fPIC -mno-pic-data-is-text-relative -mno-single-pic-base" } 
*/
 /* { dg-final { scan-assembler-not "j-\\(.LPIC"  } } */
 /* { dg-final { scan-assembler "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-3.c 
b/gcc/testsuite/gcc.target/arm/data-rel-3.c
index 2ce1e66..534c6c4 100644
--- a/gcc/testsuite/gcc.target/arm/data-rel-3.c
+++ b/gcc/testsuite/gcc.target/arm/data-rel-3.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
 /* { dg-options "-fPIC -mpic-data-is-text-relative" } */
 /* { dg-final { scan-assembler "j-\\(.LPIC"  } } */
 /* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
diff --git a/gcc/testsuite/gcc.target/arm/ivopts-2.c 
b/gcc/testsuite/gcc.target/arm/ivopts-2.c
index afe91aa..f1d5edb 100644
--- a/gcc/testsuite/gcc.target/arm/ivopts-2.c
+++ b/gcc/testsuite/gcc.target/arm/ivopts-2.c
@@ -14,4 +14,4 @@ tr4 (short array[], int n)
 
 /* { dg-final { scan-tree-dump-times "PHI 

[ARM/FDPIC v3 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.

[Christophe Lyon]

In FDPIC mode, r9 is saved in addition to other registers, so update
the expected patterns accordingly.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

* gcc/testsuite/
* gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/interrupt-2.c: Likewise.
* gcc.target/arm/pr70830.c: Likewise.

Change-Id: Id946b79bacc32be585c31e60a355191f104cc29e

diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c 
b/gcc/testsuite/gcc.target/arm/interrupt-1.c
index fe94877..493763d 100644
--- a/gcc/testsuite/gcc.target/arm/interrupt-1.c
+++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c
@@ -13,5 +13,7 @@ void foo ()
   bar (0);
 }
 
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, 
pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" { 
target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, 
pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r9, fp, ip, 
lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r9, fp, 
ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c 
b/gcc/testsuite/gcc.target/arm/interrupt-2.c
index 289eca0..5be1f16 100644
--- a/gcc/testsuite/gcc.target/arm/interrupt-2.c
+++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c
@@ -15,5 +15,7 @@ void test()
   foo = 0;
 }
 
-/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" } } */
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, 
pc}\\^" } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" { 
target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, 
pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r6, r9, ip, 
lr}" { target arm*-*-uclinuxfdpiceabi } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r6, r9, 
ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr70830.c 
b/gcc/testsuite/gcc.target/arm/pr70830.c
index cad903b..cd84c42 100644
--- a/gcc/testsuite/gcc.target/arm/pr70830.c
+++ b/gcc/testsuite/gcc.target/arm/pr70830.c
@@ -11,4 +11,5 @@ void __attribute__ ((interrupt ("IRQ"))) 
dm3730_IRQHandler(void)
 {
 prints("IRQ" );
 }
-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" { 
target { ! arm*-*-uclinuxfdpiceabi } } } } */
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r9, ip, 
pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */
-- 
2.6.3

[ARM/FDPIC v3 16/21] [ARM][testsuite] FDPIC: Skip v8-m and v6-m tests that currently produce an ICE

[Christophe Lyon]

v6-M and v8-M are not supported currently in FDPIC mode, it's better
to skip the tests.

2018-XX-XX  Christophe Lyon  
Mickaël Guêné 

gcc/testsuite/
* gcc.target/arm/atomic-comp-swap-release-acquire-3.c: Skip on
arm*-*-uclinuxfdpiceabi.
* gcc.target/arm/atomic-op-acq_rel-3.c: Likewise.
* gcc.target/arm/atomic-op-acquire-3.c: Likewise.
* gcc.target/arm/atomic-op-char-3.c: Likewise.
* gcc.target/arm/atomic-op-consume-3.c: Likewise.
* gcc.target/arm/atomic-op-int-3.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-3.c: Likewise.
* gcc.target/arm/atomic-op-release-3.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-3.c: Likewise.
* gcc.target/arm/atomic-op-short-3.c: Likewise.
* gcc.target/arm/pr65647.c: Likewise.

Change-Id: I2357be4c92b5a1a8430ae6617c7bba7bec0ea213

diff --git a/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c
index 0191f7a..81b5c3d 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2 -fno-ipa-icf" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c
index f2ed32d..2b03f75 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c
index bba1c27..d315b25 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c
index 17117ee..11e596d 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c
index 8352f0c..e5da00b 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c
index d4f1db3..997ab08 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c
index 09b5ea9..383a48a 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" "" } */
 /* { dg-require-effective-target arm_arch_v8m_base_ok } */
 /* { dg-options "-O2" } */
 /* { dg-add-options arm_arch_v8m_base } */
diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c 
b/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c
index 2b136f5..3227c75 100644
--- a/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c
+++ b/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } 
"*" ""

[ARM/FDPIC v3 17/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode

[Christophe Lyon]

Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC
code and they don't support it: skip them. They also fail on
arm*-linux* when forcing -fPIC.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* gcc.target/arm/eliminate.c: Accept only nonpic targets.
* g++.dg/other/anon5.C: Likewise.

Change-Id: I8efb8d356ce25b020c44a84b07f79a996dca0358

diff --git a/gcc/testsuite/g++.dg/other/anon5.C 
b/gcc/testsuite/g++.dg/other/anon5.C
index ee4601e..dadd92e 100644
--- a/gcc/testsuite/g++.dg/other/anon5.C
+++ b/gcc/testsuite/g++.dg/other/anon5.C
@@ -1,5 +1,6 @@
 // PR c++/34094
 // { dg-do link { target { ! { *-*-darwin* *-*-hpux* *-*-solaris2.* } } } }
+// { dg-require-effective-target nonpic }
 // { dg-options "-gdwarf-2" }
 // Ignore additional message on powerpc-ibm-aix
 // { dg-prune-output "obtain more information" } */
diff --git a/gcc/testsuite/gcc.target/arm/eliminate.c 
b/gcc/testsuite/gcc.target/arm/eliminate.c
index f254dd8..299d4df 100644
--- a/gcc/testsuite/gcc.target/arm/eliminate.c
+++ b/gcc/testsuite/gcc.target/arm/eliminate.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { nonpic } } } */
 /* { dg-options "-O2" }  */
 
 struct X
-- 
2.6.3

[ARM/FDPIC v3 18/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux*

[Christophe Lyon]

Add *-*-uclinux* to tests that work on this target.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* g++.dg/abi/forced.C: Add *-*-uclinux*.
* g++.dg/abi/guard2.C: Likewise.
* g++.dg/ext/cleanup-10.C: Likewise.
* g++.dg/ext/cleanup-11.C: Likewise.
* g++.dg/ext/cleanup-8.C: Likewise.
* g++.dg/ext/cleanup-9.C: Likewise.
* g++.dg/ext/sync-4.C: Likewise.
* g++.dg/ipa/comdat.C: Likewise.
* gcc.dg/20041106-1.c: Likewise.
* gcc.dg/cleanup-10.c: Likewise.
* gcc.dg/cleanup-11.c: Likewise.
* gcc.dg/cleanup-8.c: Likewise.
* gcc.dg/cleanup-9.c: Likewise.
* gcc.dg/fdata-sections-1.c: Likewise.
* gcc.dg/fdata-sections-2.c: Likewise.
* gcc.dg/pr39323-1.c: Likewise.
* gcc.dg/pr39323-2.c: Likewise.
* gcc.dg/pr39323-3.c: Likewise.
* gcc.dg/pr65780-1.c: Likewise.
* gcc.dg/pr65780-2.c: Likewise.
* gcc.dg/pr67338.c: Likewise.
* gcc.dg/pr78185.c: Likewise.
* gcc.dg/pr83100-1.c: Likewise.
* gcc.dg/pr83100-4.c: Likewise.
* gcc.dg/strlenopt-12g.c: Likewise.
* gcc.dg/strlenopt-14g.c: Likewise.
* gcc.dg/strlenopt-14gf.c: Likewise.
* gcc.dg/strlenopt-16g.c: Likewise.
* gcc.dg/strlenopt-17g.c: Likewise.
* gcc.dg/strlenopt-18g.c: Likewise.
* gcc.dg/strlenopt-1f.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-2f.c: Likewise.
* gcc.dg/strlenopt-31g.c: Likewise.
* gcc.dg/strlenopt-33g.c: Likewise.
* gcc.dg/strlenopt-4g.c: Likewise.
* gcc.dg/strlenopt-4gf.c: Likewise.
* gcc.dg/strncmp-2.c: Likewise.
* gcc.dg/struct-ret-3.c: Likewise.
* gcc.dg/torture/pr69760.c: Likewise.
* gcc.target/arm/div64-unwinding.c: Likewise.
* gcc.target/arm/stack-checking.c: Likewise.
* gcc.target/arm/synchronize.c: Likewise.
* gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
* lib/target-supports.exp (check_effective_target_pie): Likewise.
(check_effective_target_sync_long_long_runtime): Likewise.
(check_effective_target_sync_int_long): Likewise.
(check_effective_target_sync_char_short): Likewise.

Change-Id: I89bfea79d4490c5df0b6470def5a31d7f31ac2cc

diff --git a/gcc/testsuite/g++.dg/abi/forced.C 
b/gcc/testsuite/g++.dg/abi/forced.C
index 0e6be28..2d1ec53 100644
--- a/gcc/testsuite/g++.dg/abi/forced.C
+++ b/gcc/testsuite/g++.dg/abi/forced.C
@@ -1,4 +1,4 @@
-// { dg-do run { target *-*-linux* *-*-gnu* } }
+// { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } }
 // { dg-options "-pthread" }
 
 #include 
diff --git a/gcc/testsuite/g++.dg/abi/guard2.C 
b/gcc/testsuite/g++.dg/abi/guard2.C
index c35fa7e..74139a8 100644
--- a/gcc/testsuite/g++.dg/abi/guard2.C
+++ b/gcc/testsuite/g++.dg/abi/guard2.C
@@ -1,6 +1,6 @@
 // PR c++/41611
 // Test that the guard gets its own COMDAT group.
-// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* 
*-*-gnu* } } }
+// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* 
*-*-gnu* *-*-uclinux* } } }
 
 struct A {
   static int f()
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-10.C 
b/gcc/testsuite/g++.dg/ext/cleanup-10.C
index 66c7b76..56aeb66 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-10.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-10.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* *-*-uclinux* } } */
 /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
 /* Verify that cleanups work with exception handling through signal frames
on alternate stack.  */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-11.C 
b/gcc/testsuite/g++.dg/ext/cleanup-11.C
index 6e96521..c6d3560 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-11.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-11.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* *-*-uclinux* } } */
 /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
 /* Verify that cleanups work with exception handling through realtime signal
frames on alternate stack.  */
diff --git a/gcc/testsuite/g++.dg/ext/cleanup-8.C 
b/gcc/testsuite/g++.dg/ext/cleanup-8.C
index ccf9bef..e99508d 100644
--- a/gcc/testsuite/g++.dg/ext/cleanup-8.C
+++ b/gcc/testsuite/g++.dg/ext/cleanup-8.C
@@ -1,4 +1,4 @@
-/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* } } */
+/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* 
*-*-darwin[912]* *-*-uclinux* } } */
 /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */
 /* Verify that cleanups work with exception

[ARM/FDPIC v3 19/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets

[Christophe Lyon]

Some tests have the "nonpic" guard, but pass on
arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
than adding this target to all these tests, add the "pie_enabled"
effective target.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
* g++.dg/ipa/devirt-c-7.C: Likewise.
* g++.dg/ipa/ivinline-1.C: Likewise.
* g++.dg/ipa/ivinline-2.C: Likewise.
* g++.dg/ipa/ivinline-3.C: Likewise.
* g++.dg/ipa/ivinline-4.C: Likewise.
* g++.dg/ipa/ivinline-5.C: Likewise.
* g++.dg/ipa/ivinline-7.C: Likewise.
* g++.dg/ipa/ivinline-8.C: Likewise.
* g++.dg/ipa/ivinline-9.C: Likewise.
* g++.dg/tls/pr79288.C: Likewise.
* gcc.dg/addr_equal-1.c: Likewise.
* gcc.dg/const-1.c: Likewise.
* gcc.dg/ipa/pure-const-1.c: Likewise.
* gcc.dg/noreturn-8.c: Likewise.
* gcc.dg/pr33826.c: Likewise.
* gcc.dg/torture/ipa-pta-1.c: Likewise.
* gcc.dg/tree-ssa/alias-2.c: Likewise.
* gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
* gcc.dg/tree-ssa/loadpre6.c: Likewise.
* gcc.dg/uninit-19.c: Likewise.

Change-Id: I1a0d836b892c23891f739fccdc467d0f354ab82c

diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C 
b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
index 2d37867..906a44d 100644
--- a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
+++ b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C
@@ -1,6 +1,6 @@
 // Runtime test for noexcept-specification.
 // { dg-options "-Wnoexcept" }
-// { dg-do run { target nonpic } }
+// { dg-do run { target { nonpic || pie_enabled } } }
 // { dg-require-effective-target c++11 }
 
 #include 
diff --git a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C 
b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
index 2e76cbe..efb65c2 100644
--- a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
+++ b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C
@@ -1,7 +1,6 @@
 /* Verify that ipa-cp will not get confused by placement new constructing an
object within another one when looking for dynamic type change .  */
-/* { dg-do run } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -Wno-attributes"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-1.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
index 9b10d20..2d988bc 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-1.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-1.C
@@ -1,6 +1,6 @@
 /* Verify that simple virtual calls are inlined even without early
inlining.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-2.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
index 21cd46f..d978638 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-2.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-2.C
@@ -1,6 +1,6 @@
 /* Verify that simple virtual calls using this pointer are inlined
even without early inlining..  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-3.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
index 1e24644..f756a16 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-3.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-3.C
@@ -1,6 +1,6 @@
 /* Verify that simple virtual calls on an object refrence are inlined
even without early inlining.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-4.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
index cf0d980..5fbd3ef 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-4.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-4.C
@@ -1,7 +1,7 @@
 /* Verify that simple virtual calls are inlined even without early
inlining, even when a typecast to an ancestor is involved along the
way.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp"  } */
 
 extern "C" void abort (void);
diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-5.C 
b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
index f15ebf2..6c19907 100644
--- a/gcc/testsuite/g++.dg/ipa/ivinline-5.C
+++ b/gcc/testsuite/g++.dg/ipa/ivinline-5.C
@@ -1,6 +1,6 @@
 /* Verify that virtual call inlining does not pick a wrong method when
there is a user defined ancestor in an object.  */
-/* { dg-do run { target nonpic } } */
+/* { dg-do run { target { nonpic || pie_enabled } } } */
 /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-i

[ARM/FDPIC v3 20/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.

[Christophe Lyon]

uclibc defines bswap_32, so use a different name in this test.

2018-XX-XX  Christophe Lyon  

gcc/testsuite/
* gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32.

Change-Id: I2591bd911030814331cabf97ee5cf6cf8124b4f3

diff --git a/gcc/testsuite/gcc.target/arm/pr43698.c 
b/gcc/testsuite/gcc.target/arm/pr43698.c
index 1fc497c..3b5dad0 100644
--- a/gcc/testsuite/gcc.target/arm/pr43698.c
+++ b/gcc/testsuite/gcc.target/arm/pr43698.c
@@ -6,7 +6,7 @@
 
 char do_reverse_endian = 0;
 
-#  define bswap_32(x) \
+#  define my_bswap_32(x) \
   x) & 0xff00) >> 24) | \
(((x) & 0x00ff) >>  8) | \
(((x) & 0xff00) <<  8) | \
@@ -16,7 +16,7 @@ char do_reverse_endian = 0;
   (__extension__ ({ \
   uint64_t __res; \
   if (!do_reverse_endian) {__res = (X); \
-  } else if (sizeof(X) == 4) { __res = bswap_32((X)); \
+  } else if (sizeof(X) == 4) { __res = my_bswap_32((X)); \
   } \
   __res; \
 }))
-- 
2.6.3

[ARM/FDPIC v3 21/21] [ARM][testsuite] FDPIC: Skip tests using architecture older than v7

[Christophe Lyon]

Since FDPIC requires an architecture >=7, these tests fail because
they enforce and older version. They would pass if the compiler didn't
bail out though.

2018-07-13  Christophe Lyon  

* gcc.target/arm/armv6-unaligned-load-ice.c: Add arm_arch
effective-target.
* gcc.target/arm/attr-unaligned-load-ice.c: Likewise.
* gcc.target/arm/attr_arm-err.c: Likewise.
* gcc.target/arm/ftest-armv4-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-arm.c: Likewise.
* gcc.target/arm/ftest-armv4t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5t-arm.c: Likewise.
* gcc.target/arm/ftest-armv5t-thumb.c: Likewise.
* gcc.target/arm/ftest-armv5te-arm.c: Likewise.
* gcc.target/arm/ftest-armv5te-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6-arm.c: Likewise.
* gcc.target/arm/ftest-armv6-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6k-arm.c: Likewise.
* gcc.target/arm/ftest-armv6k-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6m-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6t2-arm.c: Likewise.
* gcc.target/arm/ftest-armv6t2-thumb.c: Likewise.
* gcc.target/arm/ftest-armv6z-arm.c: Likewise.
* gcc.target/arm/ftest-armv6z-thumb.c: Likewise.
* gcc.target/arm/g2.c: Likewise.
* gcc.target/arm/macro_defs1.c: Likewise.
* gcc.target/arm/pr59858.c: Likewise.
* gcc.target/arm/pr65647-2.c: Likewise.
* gcc.target/arm/pr79058.c: Likewise.
* gcc.target/arm/pr83712.c: Likewise.
* gcc.target/arm/pragma_arch_switch_2.c: Likewise.
* gcc.target/arm/scd42-1.c: Likewise.
* gcc.target/arm/scd42-2.c: Likewise.
* gcc.target/arm/scd42-3.c: Likewise.

Change-Id: I0845b262b241026561cc52a19ff8bb1659675e49

diff --git a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c 
b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
index 88528f1..4c1568f 100644
--- a/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/armv6-unaligned-load-ice.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } 
{ "-march=armv6k" } } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { 
"" } } */
+/* { dg-require-effective-target arm_arch_v6k_ok } */
 /* { dg-options "-mthumb -Os -mfloat-abi=softfp" } */
 /* { dg-add-options arm_arch_v6k } */
 
diff --git a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c 
b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
index e1ed1c1..2eeb522 100644
--- a/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
+++ b/gcc/testsuite/gcc.target/arm/attr-unaligned-load-ice.c
@@ -2,6 +2,7 @@
Verify that unaligned_access is correctly with attribute target.  */
 /* { dg-do compile } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } 
{ "-march=armv6" } } */
+/* { dg-require-effective-target arm_arch_v6_ok } */
 /* { dg-options "-Os -mfloat-abi=softfp -mtp=soft" } */
 /* { dg-add-options arm_arch_v6 } */
 
diff --git a/gcc/testsuite/gcc.target/arm/attr_arm-err.c 
b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
index 630c06a..d410056 100644
--- a/gcc/testsuite/gcc.target/arm/attr_arm-err.c
+++ b/gcc/testsuite/gcc.target/arm/attr_arm-err.c
@@ -2,6 +2,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target arm_arm_ok } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } 
{ "-march=armv6-m" } } */
+/* { dg-require-effective-target arm_arch_v6m_ok } */
 /* { dg-add-options arm_arch_v6m } */
 
 int __attribute__((target("arm")))
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c 
b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
index 4b48ef8..447a8ec 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } 
{ "-march=armv4" } } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { 
"" } } */
+/* { dg-require-effective-target arm_arch_v4_ok } */
 /* { dg-options "-marm" } */
 /* { dg-add-options arm_arch_v4 } */
 
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c 
b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
index 016506f..05db533 100644
--- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
+++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } 
{ "-march=armv4t" } } */
 /* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { 
"" } } */
+/* { dg-require-effective-target arm_arch_v4t_ok } */
 /* { dg-options "-marm" } */
 /* { dg-add-options arm_arch_v4t } */
 
diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c 
b/gcc/testsuite/gcc.

Re: [PATCH v3] Change default to -fno-math-errno

[Wilco Dijkstra]

Joseph Myers wrote:
> On Mon, 8 Oct 2018, Richard Biener wrote:

>> So I think it would be fine if we'd have -fno-math-errno as documented
>> and then the C library would annotate their math functions according
>> to whether they will ever set errno or not.  Once a math function is
>> const or pure it cannot ever set errno so -fno-math-errno shouldn't have
>> any effect.
>
> Note that "will ever set errno" includes possibly setting it in the 
> future, since code may be built with one libm version and used with 
> another.  So it wouldn't be correct to have a "never sets errno" attribute 
> on glibc logb / lround / llround / lrint / llrint / fma / remquo (missing 
> errno setting is a known bug).  

Math functions don't require errno to be set if math_errhandling doesn't
specify MATH_ERRNO. So it's certainly feasible to guarantee errno
won't ever be set. It would even be feasible to decide per application
whether GLIBC sets errno or not.

My feeling is that errno from math functions has been dead for long enough
that removing support for it from libraries is very reasonable - and many
libraries have already done so. Have there been any reports of this breaking
large numbers of applications?

> It also wouldn't be correct to have it on 
> many complex.h functions, because while a requirement to set errno is 
> never part of their interface, they may call real functions which may set 
> errno (and may sometimes move from not setting it to setting it; e.g., 
> they call the internal exp, sincos etc. functions, which for 
> implementations using a wrapper do not set errno, but for implementations 
> without a wrapper have errno setting integrated; whether this results in 
> errno set by complex functions depends on details of exactly how they 
> handle overflow etc. cases).

Math functions (with or without a wrapper) can conditionally set errno if 
required.
You could save/restore errno in really complicated math functions, as is done 
for
rounding modes and exception flags.

For the new math functions all errno handling is already done in a single 
function
so you could do something like: if (want_errno) set_errno (error).

>> glibc has the ieee entry points but I'm not sure if it has any way
>> to use those by default.

Adding more entry points is a bad idea, the __finite entry points and slow
wrappers are bad enough as it is. The new optimized math functions use a
much more efficient and maintainable approach.

Wilco

Re: [Patch, Fortran] PR fortran/83522 – reject array-valued substrings

[David Edelsohn]

Apparently this change also breaks CPU SPEC (465.tonto?).

Is this really a correct change?  Even if the testcases really are
wrong, it seems that this change is going to break a lot of code in
the wild.  This seems like a very bad choice, even if it pedantically
is correct.

Thanks, David

On Wed, Oct 10, 2018 at 7:12 PM Paul Richard Thomas
 wrote:
>
> This seems to have caused errors in the testsuite. I guess that the
> problem is that the testcases are invalid :-(
>
> From David Edelsohn:
> Error: Substring reference of nonscalar not permitted at (1)
>
> arrayio_11.f90
> arrayio_12.f90
> associate_23.f90
> data_char_1.f90
> deferred_character_2.f90
> deferred_character_22.f90
> deferred_character_23.f90
> deferred_character_8.f90
> deferred_type_component_3.f90
>
> Cheers
>
> Paul
>
> On Mon, 8 Oct 2018 at 23:16, Thomas Koenig  wrote:
> >
> > Hi Tobias,
> >
> > nice to hear from you again!
> >
> > > Build and regtested on x86_64-linux.
> > > OK for the trunk?
> >
> > OK. Thanks for the patch!
> >
> > Regards
> >
> > Thomas
>
>
>
> --
> "If you can't explain it simply, you don't understand it well enough"
> - Albert Einstein

Re: [PATCH 09/25] Elide repeated RTL elements.

[Andrew Stubbs]

On 04/10/18 19:12, Jeff Law wrote:

OK.  Thanks for fixing the reader and adding selftests.


Thanks, committed.

Andrew

Re: [Patch, Fortran] PR fortran/83522 – reject array-valued substrings

[David Edelsohn]

Another data point: I tried some of the testcases with IBM XL Fortran
compiler and it didn't complain or fail.  I have no idea if this
behavior is an IBM extension or how other Fortran compilers behave.

GNU Fortran probably should be compatible with other Fortran
compilers, even if the behavior is not pedantically conformant with
the standard.

Thanks, David

On Wed, Oct 10, 2018 at 7:12 PM Paul Richard Thomas
 wrote:
>
> This seems to have caused errors in the testsuite. I guess that the
> problem is that the testcases are invalid :-(
>
> From David Edelsohn:
> Error: Substring reference of nonscalar not permitted at (1)
>
> arrayio_11.f90
> arrayio_12.f90
> associate_23.f90
> data_char_1.f90
> deferred_character_2.f90
> deferred_character_22.f90
> deferred_character_23.f90
> deferred_character_8.f90
> deferred_type_component_3.f90
>
> Cheers
>
> Paul
>
> On Mon, 8 Oct 2018 at 23:16, Thomas Koenig  wrote:
> >
> > Hi Tobias,
> >
> > nice to hear from you again!
> >
> > > Build and regtested on x86_64-linux.
> > > OK for the trunk?
> >
> > OK. Thanks for the patch!
> >
> > Regards
> >
> > Thomas
>
>
>
> --
> "If you can't explain it simply, you don't understand it well enough"
> - Albert Einstein

Re: [PATCH] v2: C++: simplify output from suggest_alternatives_for

[Jason Merrill]

On Wed, Oct 10, 2018 at 5:01 PM David Malcolm  wrote:
> On Tue, 2018-10-09 at 18:38 -0400, Jason Merrill wrote:
> > On Tue, Oct 9, 2018 at 1:19 PM David Malcolm 
> > wrote:
> > > +  /* Emulation of a "move" constructor, but really a copy
> > > + constructor.  */
> > > +
> > > +  name_hint (const name_hint &other)
> > > +  : m_suggestion (other.m_suggestion),
> > > +m_deferred (const_cast (other).take_deferred ())
> > > +  {
> > > +  }
> > > +
> > > +  /* Emulation of "move" assigment, but really copy
> > > assignment.  */
> > > +
> > > +  name_hint& operator= (const name_hint &other)
> > > +  {
> > > +m_suggestion = other.m_suggestion;
> > > +m_deferred = const_cast (other).take_deferred ();
> > > +return *this;
> > > +  }
> > > +
> > > +  /* Take ownership of this name_hint's deferred_diagnostic, for
> > > use
> > > + in chaining up deferred diagnostics.  */
> > > +  gnu::unique_ptr take_deferred () { return
> > > move (m_deferred); }
> >
> > Why do you want to propagate this hackery into name_hint?  I would
> > expect the defaulted special member functions to do the right thing
> > with m_deferred: in -std=c++98 the implicit copy ops call the
> > gnu::unique_ptr copy ops that actually move, and in -std=c++11 and up
> > we're calling the move constructor for std::unique_ptr, which does
> > the
> > right thing.
> >
> > This also doesn't limit the hack to C++98 mode the way unique-ptr.h
> > does.
> >
> > Jason
>
> Thanks for looking at this.
>
> I ran into issues trying to pass around name_hint instances:
>
> ../../src/gcc/cp/name-lookup.c: In function 'name_hint 
> suggest_alternatives_in_other_namespaces(location_t, tree)':
> ../../src/gcc/cp/name-lookup.c:5591:52: error: use of deleted function 
> 'name_hint::name_hint(const name_hint&)'
> 5591 |   return ns_hints.maybe_decorate_with_limit (result);
>  |^
> In file included from ../../src/gcc/cp/name-lookup.c:36:
> ../../src/gcc/c-family/name-hint.h:91:7: note: 'name_hint::name_hint(const 
> name_hint&)' is implicitly deleted because the default definition would be 
> ill-formed:
> 91 | class name_hint
>|   ^
> ../../src/gcc/c-family/name-hint.h:91:7: error: use of deleted function 
> 'std::unique_ptr<_Tp, _Dp>::unique_ptr(const std::unique_ptr<_Tp, _Dp>&) 
> [with _Tp = deferred_diagnostic; _Dp = 
> std::default_delete]'
> In file included from 
> /home/david/coding/gcc-python/gcc-svn-trunk/install-dogfood/include/c++/9.0.0/memory:80,
>  from ../../src/gcc/../include/unique-ptr.h:78,
>  from ../../src/gcc/system.h:730,
>  from ../../src/gcc/cp/name-lookup.c:23:
> /home/david/coding/gcc-python/gcc-svn-trunk/install-dogfood/include/c++/9.0.0/bits/unique_ptr.h:394:7:
>  note: declared here
> 394 |   unique_ptr(const unique_ptr&) = delete;
> |   ^~
> ../../src/gcc/cp/name-lookup.c:5512:1: note:   initializing argument 1 of 
> 'name_hint namespace_hints::maybe_decorate_with_limit(name_hint)'
> 5512 | namespace_hints::maybe_decorate_with_limit (name_hint hint)
>  | ^~~
>
> I can't use the default copy constructor or assignment operators for an
> object containing a gnu::unique_ptr on C++11, as std::unique_ptr has:
>
>   // Disable copy from lvalue.
>   unique_ptr(const unique_ptr&) = delete;
>   unique_ptr& operator=(const unique_ptr&) = delete;
>
> If I understand things right, in C++11 I should be using move
> construction/move assignment for this.
>
> I can't write "&&" in the function params to explicitly request an
> rvalue-reference, as the code need to be compatible with C++98.
>
> std::move is only defined in C++11 onwards.
>
> Our include/unique-ptr.h defines a gnu::move: for C++11 it's std::move,
> but for C++98 it's only defined for the unique_ptr template.
>
> A solution that seems to work appears to be to define gnu::move for
> C++98 for all types rather than just gnu::unique_ptr, implementing it
> in terms of copying an object via lvalue reference, so that we can
> explicitly request a move using "gnu::move" (==std::move on C++),
> without using C++11 syntax, and falling back to a copy on C++98
> (which effectively moves the ptr from the "victim").
>
> Does that sound sane?

I wouldn't change the unique-ptr.h move to take all types, given that
it copies rather than just passing the reference through, which could
be expensive for unsuspecting users.  And given how it subverts the
C++98 type system, I'd rather explicitly opt into it.  So, let's
overload it for name_hint.  And I'd probably return a reference, e.g.

#if __cplusplus < 201103
// std::move emulation to support the use of gnu::unique_ptr in name_hint.
namespace gnu {
inline const name_hint &
move(name_hint &m) { return m; }
}
#endif

to avoid the unnecessary copy.  Actually, I'd be inclined to do that
for gnu::unique_ptr as well, but would want to make sure that it
doesn't break gdb.

Jason

Re: [PATCH] v2: C++: simplify output from suggest_alternatives_for

[Jason Merrill]

On Thu, Oct 11, 2018 at 10:28 AM Jason Merrill  wrote:
>
> On Wed, Oct 10, 2018 at 5:01 PM David Malcolm  wrote:
> > On Tue, 2018-10-09 at 18:38 -0400, Jason Merrill wrote:
> > > On Tue, Oct 9, 2018 at 1:19 PM David Malcolm 
> > > wrote:
> > > > +  /* Emulation of a "move" constructor, but really a copy
> > > > + constructor.  */
> > > > +
> > > > +  name_hint (const name_hint &other)
> > > > +  : m_suggestion (other.m_suggestion),
> > > > +m_deferred (const_cast (other).take_deferred ())
> > > > +  {
> > > > +  }
> > > > +
> > > > +  /* Emulation of "move" assigment, but really copy
> > > > assignment.  */
> > > > +
> > > > +  name_hint& operator= (const name_hint &other)
> > > > +  {
> > > > +m_suggestion = other.m_suggestion;
> > > > +m_deferred = const_cast (other).take_deferred ();
> > > > +return *this;
> > > > +  }
> > > > +
> > > > +  /* Take ownership of this name_hint's deferred_diagnostic, for
> > > > use
> > > > + in chaining up deferred diagnostics.  */
> > > > +  gnu::unique_ptr take_deferred () { return
> > > > move (m_deferred); }
> > >
> > > Why do you want to propagate this hackery into name_hint?  I would
> > > expect the defaulted special member functions to do the right thing
> > > with m_deferred: in -std=c++98 the implicit copy ops call the
> > > gnu::unique_ptr copy ops that actually move, and in -std=c++11 and up
> > > we're calling the move constructor for std::unique_ptr, which does
> > > the
> > > right thing.
> > >
> > > This also doesn't limit the hack to C++98 mode the way unique-ptr.h
> > > does.
> > >
> > > Jason
> >
> > Thanks for looking at this.
> >
> > I ran into issues trying to pass around name_hint instances:
> >
> > ../../src/gcc/cp/name-lookup.c: In function 'name_hint 
> > suggest_alternatives_in_other_namespaces(location_t, tree)':
> > ../../src/gcc/cp/name-lookup.c:5591:52: error: use of deleted function 
> > 'name_hint::name_hint(const name_hint&)'
> > 5591 |   return ns_hints.maybe_decorate_with_limit (result);
> >  |^
> > In file included from ../../src/gcc/cp/name-lookup.c:36:
> > ../../src/gcc/c-family/name-hint.h:91:7: note: 'name_hint::name_hint(const 
> > name_hint&)' is implicitly deleted because the default definition would be 
> > ill-formed:
> > 91 | class name_hint
> >|   ^
> > ../../src/gcc/c-family/name-hint.h:91:7: error: use of deleted function 
> > 'std::unique_ptr<_Tp, _Dp>::unique_ptr(const std::unique_ptr<_Tp, _Dp>&) 
> > [with _Tp = deferred_diagnostic; _Dp = 
> > std::default_delete]'
> > In file included from 
> > /home/david/coding/gcc-python/gcc-svn-trunk/install-dogfood/include/c++/9.0.0/memory:80,
> >  from ../../src/gcc/../include/unique-ptr.h:78,
> >  from ../../src/gcc/system.h:730,
> >  from ../../src/gcc/cp/name-lookup.c:23:
> > /home/david/coding/gcc-python/gcc-svn-trunk/install-dogfood/include/c++/9.0.0/bits/unique_ptr.h:394:7:
> >  note: declared here
> > 394 |   unique_ptr(const unique_ptr&) = delete;
> > |   ^~
> > ../../src/gcc/cp/name-lookup.c:5512:1: note:   initializing argument 1 of 
> > 'name_hint namespace_hints::maybe_decorate_with_limit(name_hint)'
> > 5512 | namespace_hints::maybe_decorate_with_limit (name_hint hint)
> >  | ^~~
> >
> > I can't use the default copy constructor or assignment operators for an
> > object containing a gnu::unique_ptr on C++11, as std::unique_ptr has:
> >
> >   // Disable copy from lvalue.
> >   unique_ptr(const unique_ptr&) = delete;
> >   unique_ptr& operator=(const unique_ptr&) = delete;
> >
> > If I understand things right, in C++11 I should be using move
> > construction/move assignment for this.
> >
> > I can't write "&&" in the function params to explicitly request an
> > rvalue-reference, as the code need to be compatible with C++98.
> >
> > std::move is only defined in C++11 onwards.
> >
> > Our include/unique-ptr.h defines a gnu::move: for C++11 it's std::move,
> > but for C++98 it's only defined for the unique_ptr template.
> >
> > A solution that seems to work appears to be to define gnu::move for
> > C++98 for all types rather than just gnu::unique_ptr, implementing it
> > in terms of copying an object via lvalue reference, so that we can
> > explicitly request a move using "gnu::move" (==std::move on C++),
> > without using C++11 syntax, and falling back to a copy on C++98
> > (which effectively moves the ptr from the "victim").
> >
> > Does that sound sane?
>
> I wouldn't change the unique-ptr.h move to take all types, given that
> it copies rather than just passing the reference through, which could
> be expensive for unsuspecting users.  And given how it subverts the
> C++98 type system, I'd rather explicitly opt into it.  So, let's
> overload it for name_hint.  And I'd probably return a reference, e.g.
>
> #if __cplusplus < 201103
> // std::move emulation to support the use of gnu:

Re: [PATCH v3] Change default to -fno-math-errno

[Wilco Dijkstra]

Hi,

> Note that "will ever set errno" includes possibly setting it in the 
> future, since code may be built with one libm version and used with 
> another.  So it wouldn't be correct to have a "never sets errno" attribute 
> on glibc logb / lround / llround / lrint / llrint / fma / remquo (missing 
> errno setting is a known bug).  

If these functions should set errno, there are many issues both in GCC and
GLIBC. GCC treats fma and remquo always as const/pure, so inlines fma
always even with -fmath-errno. GLIBC targets which support fma as a
single instruction always inline it as a single instruction, as expected.

GCC incorrectly treats many other math functions as const/pure, for 
example GCC "knows" that the C89 sin function will never set errno with
-fmath-errno:

#include 
#include 
int res;
double f(double x)
{
  errno = 0;
  double y = sin (x);
  res = errno;
  return y;
}

So if anything this is good evidence that nobody is using errno in actual
applications, otherwise these bugs would have been found many years ago.

Wilco

Re: [Patch, Fortran] PR fortran/83522 – reject array-valued substrings

[Paul Richard Thomas]

The section from the standard in comment #2 is being misinterpreted.
R609 and R610 concern substrings in the context of section 6.4, which
concerns SCALARS!

Section 6.5 concerns arrays and you will find there:

R618 array-section is data-ref [ ( substring-range ) ] or
complex-part-designator

C624 (R618) Exactly one part-ref shall have nonzero rank, and either
the final part-ref shall have a section-
subscript-list with nonzero rank, another part-ref shall have nonzero
rank, or the complex-part-designator
shall be an array.

Further lines appear later in which in which substrings of array
sections are explicitly mentioned: eg.
If a substring-range appears in an array-section, each element is the
designated substring of the corresponding element of the array
section. The value of a subscript in an array element shall be within
the bounds for its dimension.

Thus the patch is contrary to the standard and must be removed as soon
as possible.

Paul


On Thu, 11 Oct 2018 at 15:20, David Edelsohn  wrote:
>
> Another data point: I tried some of the testcases with IBM XL Fortran
> compiler and it didn't complain or fail.  I have no idea if this
> behavior is an IBM extension or how other Fortran compilers behave.
>
> GNU Fortran probably should be compatible with other Fortran
> compilers, even if the behavior is not pedantically conformant with
> the standard.
>
> Thanks, David
>
> On Wed, Oct 10, 2018 at 7:12 PM Paul Richard Thomas
>  wrote:
> >
> > This seems to have caused errors in the testsuite. I guess that the
> > problem is that the testcases are invalid :-(
> >
> > From David Edelsohn:
> > Error: Substring reference of nonscalar not permitted at (1)
> >
> > arrayio_11.f90
> > arrayio_12.f90
> > associate_23.f90
> > data_char_1.f90
> > deferred_character_2.f90
> > deferred_character_22.f90
> > deferred_character_23.f90
> > deferred_character_8.f90
> > deferred_type_component_3.f90
> >
> > Cheers
> >
> > Paul
> >
> > On Mon, 8 Oct 2018 at 23:16, Thomas Koenig  wrote:
> > >
> > > Hi Tobias,
> > >
> > > nice to hear from you again!
> > >
> > > > Build and regtested on x86_64-linux.
> > > > OK for the trunk?
> > >
> > > OK. Thanks for the patch!
> > >
> > > Regards
> > >
> > > Thomas
> >
> >
> >
> > --
> > "If you can't explain it simply, you don't understand it well enough"
> > - Albert Einstein



-- 
"If you can't explain it simply, you don't understand it well enough"
- Albert Einstein

Re: [PATCH] add simple attribute introspection

[Martin Sebor]

On 10/11/2018 06:04 AM, Joseph Myers wrote:

On Thu, 11 Oct 2018, Martin Sebor wrote:


The attached patch introduces a built-in function called
__builtin_has_attribute that makes some of this possible.
See the documentation and tests for details.


I see nothing in the documentation about handling of equivalent forms of
an attribute - for example, specifying __aligned__ in the attribute but
aligned in __builtin_has_attribute, or vice versa.  I'd expect that to be
documented to work (both of those should return true), with associated
tests.  (And likewise the semantics should allow for a format attribute
using printf in one place and __printf__ in the other, for example, or the
same constant argument represented with different expressions.)


Yes, it occurred to me belatedly that I should add a test for those
as well.  I can also mention it in the documentation, although I'd
have thought it would be implicit in how attributes work in general.
(Or are there some differences between the underscored forms and
the one without it)?



What are the semantics of __builtin_has_attribute for attributes that
can't be tested for?  (E.g. the mode attribute, which ends up resulting in
some existing type with the required mode being used, so there's nothing
to indicate the attribute was originally used to declare things.)


With a few exceptions (like aligned) the built-in returns false
for attributes that aren't attached to a node.  I haven't exercised
nearly all the attributes yet, and this one could very well be among
those that aren't and perhaps can't be handled.  I suspect some
target attributes might be in the same group.  If there's no way
to tell it should probably be documented as a limitation of
the function, maybe also under the attribute itself that can't
be detected.  Alternatively, the built-in return type could be
changed to a tri-state: "don't know," false, true.  Can you
think of a better solution?

Martin

[PATCH, doc] describe mode checking for doloop_end pattern

[Paul Koning]

Since the code that uses the doloop_end pattern does not check the operand mode 
as given in the pattern, the pattern itself may need to do this, and that was 
not documented.  This patch adds that information.  It also updates the example 
to reflect this.

Ok for trunk?

paul

ChangeLog:

2018-10-11  Paul Koning  

* doc/md.texi (doloop_end): Document that the pattern code may
need to check operand mode.

Index: doc/md.texi
===
--- doc/md.texi (revision 265042)
+++ doc/md.texi (working copy)
@@ -7619,7 +7619,23 @@ simplified) from the PDP-11 target:
 
 @smallexample
 @group
-(define_insn "doloop_end"
+(define_expand "doloop_end"
+  [(parallel [(set (pc)
+   (if_then_else
+(ne (match_operand:HI 0 "nonimmediate_operand" "+r,!m")
+(const_int 1))
+(label_ref (match_operand 1 "" ""))
+(pc)))
+  (set (match_dup 0)
+   (plus:HI (match_dup 0)
+ (const_int -1)))])]
+  "TARGET_40_PLUS"
+  "@{
+if (GET_MODE (operands[0]) != HImode)
+  FAIL;
+  @}")
+
+(define_insn "doloop_end_nocc"
   [(set (pc)
 (if_then_else
  (ne (match_operand:HI 0 "nonimmediate_operand" "+r,!m")
@@ -7628,17 +7644,28 @@ simplified) from the PDP-11 target:
  (pc)))
(set (match_dup 0)
 (plus:HI (match_dup 0)
-  (const_int -1)))]
-  ""
-  
+  (const_int -1)))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_40_PLUS && reload_completed"
+  "*
   @{
+rtx lb[1];
+   
 if (which_alternative == 0)
-  return "sob %0,%l1";
+   return \"sob\t%0,%l1\";
+   
+/* emulate sob */
+lb[0] = gen_label_rtx ();
+output_asm_insn (\"dec\t%0\", operands);
+output_asm_insn (\"beq\t%l0\", lb);
+output_asm_insn (\"jmp\t%l1\", operands);
+
+output_asm_label (lb[0]);
+fputs (\":\\n\", asm_out_file);
+   
+return \"\";
+  @}")
 
-/* emulate sob */
-output_asm_insn ("dec %0", operands);
-return "bne %l1";
-  @})
 @end group
 @end smallexample
 
@@ -7662,10 +7689,18 @@ will be non-negative.
 Since the @code{doloop_end} insn is a jump insn that also has an output,
 the reload pass does not handle the output operand.  Therefore, the
 constraint must allow for that operand to be in memory rather than a
-register.  In the example shown above, that is handled by using a loop
-instruction sequence that can handle memory operands when the memory
-alternative appears.
+register.  In the example shown above, that is handled (in the
+@code{doloop_end_nocc} pattern) by using a loop instruction sequence
+that can handle memory operands when the memory alternative appears.
 
+GCC does not check the mode of the loop register operand when generating
+the @code{doloop_end} pattern.  If the pattern is only valid for some
+modes but not others, the pattern should be a @code{define_expand}
+pattern that checks the operand mode in the preparation code, and issues
+@code{FAIL} if an unsupported mode is found.  The example above does
+this, since the machine instruction to be used only exists for
+@code{HImode}.
+
 @end ifset
 @ifset INTERNALS
 @node Insn Canonicalizations

Re: [aarch64}: added variable issue rate feature for falkor

[Kai Tietz]

Hi,

I reworked patch use a tuning flag instead of checking explicit for
CPU flavor. I will send soon an update for it, which won't use the
static variable anymore, and uses instead the SCHED-api.

I would like first to get some comments on current version.

Regards,
Kai
   Jim Wilson 
Kai Tietz 

* config/aarch64/aarch64.c (aarch64_sched_reorder): Implement
TARGET_SCHED_REORDER hook.
(aarch64_variable_issue): Implement TARGET_SCHED_VARIABLE_ISSUE
hook.
	(qdf24xx_): Add AARCH64_EXTRA_TUNE_SCHED_MICRO_OPS tune flag.
(TARGET_SCHED_REORDER): Define.
(TARGET_SCHED_VARIABLE_ISSUE): Likewise.
* config/aarch64/falkor.md (falkor_variable_issue): New.
	* onfig/aarch64/aarch64-tuning-flags.def (SCHED_MICRO_OPS): New flag.

Index: trunk/gcc/config/aarch64/aarch64.c
===
--- trunk.orig/gcc/config/aarch64/aarch64.c
+++ trunk/gcc/config/aarch64/aarch64.c
@@ -955,7 +955,7 @@ static const struct tune_params qdf24xx_
   &generic_branch_cost,
   &generic_approx_modes,
   4, /* memmov_cost  */
-  4, /* issue_rate  */
+  8, /* issue_rate  */
   (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
| AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops  */
   "16",	/* function_align.  */
@@ -968,7 +968,7 @@ static const struct tune_params qdf24xx_
   2,	/* min_div_recip_mul_df.  */
   0,	/* max_case_values.  */
   tune_params::AUTOPREFETCHER_WEAK,	/* autoprefetcher_model.  */
-  AARCH64_EXTRA_TUNE_RENAME_LOAD_REGS, /* tune_flags.  */
+  AARCH64_EXTRA_TUNE_RENAME_LOAD_REGS | AARCH64_EXTRA_TUNE_SCHED_MICRO_OPS, /* tune_flags.  */
   &qdf24xx_prefetch_tune
 };
 
@@ -18037,6 +18037,109 @@ aarch64_run_selftests (void)
 
 #endif /* #if CHECKING_P */
 
+/* The number of micro ops left over after issuing the last instruction in a
+   cycle.  This is subtracted from the next cycle before we start issuing insns.
+   This is initialized to 0 at the start of every basic block.  */
+static int leftover_uops = 0;
+
+/* Implement TARGET_SCHED_REORDER.  */
+
+static int
+aarch64_sched_reorder (FILE *file, int verbose,
+		   rtx_insn **ready ATTRIBUTE_UNUSED,
+		   int *n_readyp ATTRIBUTE_UNUSED,
+		   int clock)
+{
+  int can_issue_more = aarch64_sched_issue_rate ();
+
+  if ((aarch64_tune_params.extra_tuning_flags
+   & AARCH64_EXTRA_TUNE_SCHED_MICRO_OPS) != 0)
+{
+  /* The start of a basic block.  */
+  if (clock == 0)
+	{
+	  if (leftover_uops && file && (verbose > 3))
+	fprintf (file, ";;\tLeftover uops ignored at bb start.\n");
+
+	  leftover_uops = 0;
+	}
+
+  /* Account for issue slots left over from previous cycle.  This value
+	 can be larger than the number of issue slots per cycle, so we need
+	 to check it here before scheduling any instructions.  */
+  else if (leftover_uops)
+	{
+	  can_issue_more -= leftover_uops;
+
+	  if (file && (verbose > 3))
+	{
+	  fprintf (file, ";;\tUse %d issue slots for leftover uops.\n",
+		   leftover_uops);
+	  fprintf (file, ";;\t%d issue slots left.\n", can_issue_more);
+	}
+
+	  leftover_uops = 0;
+
+	  if (can_issue_more < 0)
+	{
+	  leftover_uops = 0 - can_issue_more;
+	  can_issue_more = 0;
+
+	  if (file && (verbose > 3))
+		{
+		  fprintf (file, ";;skipping issue cycle.\n");
+		  fprintf (file, ";;\t%d uops left over.\n", leftover_uops);
+		}
+	}
+	}
+}
+
+  return can_issue_more;
+}
+
+/* Implement TARGET_SCHED_VARIABLE_ISSUE.  */
+
+static int
+aarch64_variable_issue (FILE *file, int verbose,
+			rtx_insn *insn, int more)
+{
+  if (GET_CODE (PATTERN (insn)) != USE
+  && GET_CODE (PATTERN (insn)) != CLOBBER)
+{
+  if ((aarch64_tune_params.extra_tuning_flags
+	   & AARCH64_EXTRA_TUNE_SCHED_MICRO_OPS) == 0)
+	more -= 1;
+  else
+	{
+  /* There is for now just falkor target supporting scheduling
+ 	 of micro operations. Therefore we don't need to check.  */
+	  int issue_slots = get_attr_falkor_variable_issue (insn);
+	  more -= issue_slots;
+
+	  if (file && (verbose > 3))
+	{
+	  fprintf (file, ";;\tInsn takes %d issue slots.\n", issue_slots);
+	  fprintf (file, ";;\t%d issue slots left.\n", more);
+	}
+
+	  /* We schedule an instruction first, and then subtract issue slots,
+	 which means the result can be negative.  We carry the extra over
+	 to the next cycle.  */
+
+	  if (more < 0)
+	{
+	  leftover_uops = 0 - more;
+	  more = 0;
+
+	  if (file && (verbose > 3))
+		fprintf (file, ";;\t%d uops left over.\n", leftover_uops);
+	}
+	}
+}
+
+  return more;
+}
+
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST aarch64_address_cost
 
@@ -18265,6 +18368,12 @@ aarch64_libgcc_floating_mode_supported_p
 #undef TARGET_SCHED_ISSUE_RATE
 #define TARGET_SCHED_ISSUE_RATE aarch64_sched_issue_rate
 
+#undef TARGET_SCHED_REORDER
+#define TARGET_SCHED_REORDER aarch64_sched_reorder
+
+#undef TARGET_SCHED_VARIABLE_ISSUE
+#define

Re: [PATCH v3] Change default to -fno-math-errno

[Wilco Dijkstra]

Hi,
  
> if (math_errhandling & MATH_ERRNO) == 0 a math
> function may still set errno.
>
> it can only set it if there was an error though,
> not arbitrarily clobber it, but this means that
>
> (1) reordering errno access around math calls is
> invalid even with -fno-math-errno.

It's typically the math calls themselves which are optimized, moved, CSEd etc.
However if a compiler has to optimize based on the assumuption that math
calls may still set errno then no optimizations are feasible.

> (2) user code reading errno after a math call can
> assume it to be unmodified in exactly the same
> cases with -fmath-errno and -fno-math-errno.

Again, that would mean there cannot be any difference in code generation
(which blocks all optimization).

To optimize math calls you really need to assume they are const and don't
write errno. This can be done by ensuring the library never sets errno for math
functions or simply ignore the low probability that an optimized math call might
corrupt a non-math use of errno (like GCC already does today for many math
functions, even with -fmath-errno).

Wilco

Re: C++ PATCH to implement C++20 P0892R2 - explicit(bool) [v2]

[Jason Merrill]

On Wed, Oct 3, 2018 at 7:11 PM Marek Polacek  wrote:
>
> On Wed, Oct 03, 2018 at 10:24:52AM -0400, Jason Merrill wrote:
> > On Tue, Oct 2, 2018 at 5:25 PM Marek Polacek  wrote:
> > >
> > > On Mon, Oct 01, 2018 at 07:47:10PM -0400, Jason Merrill wrote:
> > > > On Mon, Oct 1, 2018 at 6:41 PM Marek Polacek  wrote:
> > > > >
> > > > > This patch implements C++20 explicit(bool), as described in:
> > > > > .
> > > > >
> > > > > I tried to follow the noexcept specifier implementation where I 
> > > > > could, which
> > > > > made the non-template parts of this fairly easy.  To make 
> > > > > explicit(expr) work
> > > > > with dependent expressions, I had to add DECL_EXPLICIT_SPEC to 
> > > > > lang_decl_fn,
> > > > > which serves as a vessel to get the explicit-specifier to 
> > > > > tsubst_function_decl
> > > > > where I substitute the dependent arguments.
> > > >
> > > > What's the impact of that on memory consumption?  I'm nervous about
> > > > adding another word to most functions when it's not useful to most of
> > > > them.  For several similar things we've been using hash tables on the
> > > > side.
> > >
> > > Yeah, that is a fair concern.  I'm not sure if I know of a good way to 
> > > measure
> > > it.  I took wide-int.ii and ran /usr/bin/time -v ./cc1plus; then it's 
> > > roughly
> > > Maximum resident set size (kbytes): 95020
> > > vs.
> > > Maximum resident set size (kbytes): 95272
> > > which doesn't seem too bad but I don't know if it proves anything.
> > >
> > > If we went with the hash table, would it work like this?
> > > 1) have a hash table mapping decls (key) to explicit-specifiers
> > > 2) instead of setting DECL_EXPLICIT_SPEC put the parsed explicit-specifier
> > >into the table
> > > 3) in tsubst_function_decl look if the fn decl is associated with any
> > >explicit-specifier, if it is, substitute it, and set 
> > > DECL_NONCONVERTING_P
> > >accordingly.
> >
> > Yes.  I think you want to use tree_cache_map so you don't have to
> > worry about removing entries from the table if the decl is GC'd.
>
> Done (along with the bit idea).

It occurs to me that it might be better to put all these sorts of
things in DECL_ATTRIBUTES instead, but that's definitely a question
for another day.

> +   /* [dcl.fct.spec]
> +  "the constant-expression, if supplied, shall be a contextually
> +  converted constant expression of type bool."  */
> +   expr = build_explicit_specifier (expr, tf_warning_or_error);
> +   /* We could evaluate it -- mark the decl as appropriate.  */
> +   if (expr == boolean_true_node)
> + set_and_check_decl_spec_loc (decl_specs, ds_explicit, token);
> +   else if (explicit_specifier)
> + /* The expression was value-dependent.  Remember it so that we can
> +substitute it later.  */
> + *explicit_specifier = expr;

What if expr == boolean_false_node?

> +  /* Handle explicit(dependent-expr).  */
> +  if (DECL_HAS_DEPENDENT_EXPLICIT_SPEC_P (t))
> +   {
> + tree spec = lookup_explicit_specifier (t);
> + spec = tsubst_copy_and_build (spec, args, complain, in_decl,
> +   /*function_p=*/false,
> +   /*i_c_e_p=*/true);
> + spec = build_explicit_specifier (spec, complain);
> + DECL_NONCONVERTING_P (t) = (spec == boolean_true_node);
> +   }

What if spec is still dependent, e.g. after partial substitution of a
member template?

Jason

Re: [C++ Patch] PR 71140 ("[concepts] ill-formed nested-requirement lacking a semicolon not rejected")

[Paolo Carlini]

Hi,

already pinging this because it seems rather straightforward to me...

On 03/10/18 14:18, Paolo Carlini wrote:

Hi,

a simple issue, we weren't correctly implementing 7.5.7.4 on the 
terminating semicolon. Tested x86_64-linux.


    https://gcc.gnu.org/ml/gcc-patches/2018-10/msg00173.html

Thanks! Paolo.

Re: [C++ Patch] PR 71139 ("[concepts] ill-formed compound-requirement lacking a semicolon not rejected")

[Paolo Carlini]

.. likewise.

On 04/10/18 12:32, Paolo Carlini wrote:

Hi,

yesterday I didn't notice that we have a separate bug for a similar 
issue affecting cp_parser_compound_requirement. Tested x86_64-linux.


Thanks, Paolo.

PS: while working on these issues, I noticed that somewhere else in 
the concepts parsing bits we check the return value of 
cp_parser_require and, in case, immediately return error_mark_node. 
That doesn't seem a good idea - and isn't what we do for all the other 
cp_parser_require semicolon calls - because it normally degrades error 
recovery when the only bug in the code is the missing semicolon. I 
mean to further look into that...


    https://gcc.gnu.org/ml/gcc-patches/2018-10/msg00239.html

Thanks! Paolo.

Re: [PATCH] multiline.exp: complain about mismatched dg-{begin|end}-multiline-output

[Jeff Law]

On 10/11/18 8:20 AM, David Malcolm wrote:
> Mismatched dg-{begin|end}-multiline-output directives are currently
> silently ignored, leading to difficult-to-diagnose test failures
> involving excess output.
> 
> This patch makes multiline.exp complain about them.
> 
> Successfully regrtested on x86_64-pc-linux-gnu
> 
> OK for trunk?
> 
> gcc/testsuite/ChangeLog:
>   * lib/multiline.exp (dg-begin-multiline-output): Issue an error if
>   there hasn't been a dg-end-multiline-output since the last
>   dg-begin-multiline-output.
>   (dg-end-multiline-output): Issue an error if there hasn't been a
>   dg-begin-multiline-output.  Reset _multiline_last_beginning_line
>   as soon possible.  Rename "line" to "last_line".
OK.  Assuming since there's no patches to existing tests that at least
for the x86-64 target we don't have any mismatched dg-blah things in the
tree right now.

jeff

[PATCH] PR libstdc++/80538 Only call sleep for non-zero values

[Jonathan Wakely]

Avoid a system call when no sleep is required. Sleep in a loop (actually
two loops) to handle interruption by signals.

PR libstdc++/80538
* src/c++11/thread.cc (this_thread::__sleep_for)
[_GLIBCXX_HAVE_SLEEP]: Only call sleep for non-zero values.
Loop while sleep call is interrupted and until steady_clock
shows requested duration has elapsed.
(!_GLIBCXX_HAVE_USLEEP]: Use the _GLIBCXX_HAVE_SLEEP code path, but
avoiding the usleep call.
* testsuite/30_threads/this_thread/60421.cc: Test repeated
signal interruptions.

Tested x86_64-linux (by manually fudging the configure macros to test
the !_GLIBCXX_USE_NANOSLEEP paths).

Committed to trunk.


commit 7cad0b3cbb85a78dce40535f897ba27886469da9
Author: Jonathan Wakely 
Date:   Fri Apr 28 17:43:25 2017 +0100

PR libstdc++/80538 Only call sleep for non-zero values

Avoid a system call when no sleep is required. Sleep in a loop (actually
two loops) to handle interruption by signals.

PR libstdc++/80538
* src/c++11/thread.cc (this_thread::__sleep_for)
[_GLIBCXX_HAVE_SLEEP]: Only call sleep for non-zero values.
Loop while sleep call is interrupted and until steady_clock
shows requested duration has elapsed.
(!_GLIBCXX_HAVE_USLEEP]: Use the _GLIBCXX_HAVE_SLEEP code path, but
avoiding the usleep call.
* testsuite/30_threads/this_thread/60421.cc: Test repeated
signal interruptions.

diff --git a/libstdc++-v3/src/c++11/thread.cc b/libstdc++-v3/src/c++11/thread.cc
index c62cb71bf99..564eae6f166 100644
--- a/libstdc++-v3/src/c++11/thread.cc
+++ b/libstdc++-v3/src/c++11/thread.cc
@@ -194,18 +194,35 @@ namespace this_thread
 while (::nanosleep(&__ts, &__ts) == -1 && errno == EINTR)
   { }
 #elif defined(_GLIBCXX_HAVE_SLEEP)
-# ifdef _GLIBCXX_HAVE_USLEEP
-::sleep(__s.count());
-if (__ns.count() > 0)
+const auto target = chrono::steady_clock::now() + __s + __ns;
+while (true)
   {
-long __us = __ns.count() / 1000;
-if (__us == 0)
-  __us = 1;
-::usleep(__us);
-  }
+   unsigned secs = __s.count();
+   if (__ns.count() > 0)
+ {
+# ifdef _GLIBCXX_HAVE_USLEEP
+   long us = __ns.count() / 1000;
+   if (us == 0)
+ us = 1;
+   ::usleep(us);
 # else
-::sleep(__s.count() + (__ns.count() >= 100));
+   if (__ns.count() > 100 || secs == 0)
+ ++secs; // No sub-second sleep function, so round up.
 # endif
+ }
+
+   if (secs > 0)
+ {
+   // Sleep in a loop to handle interruption by signals:
+   while ((secs = ::sleep(secs)))
+ { }
+ }
+   const auto now = chrono::steady_clock::now();
+   if (now >= target)
+ break;
+   __s = chrono::duration_cast(target - now);
+   __ns = chrono::duration_cast(target - (now + __s));
+}
 #elif defined(_GLIBCXX_HAVE_WIN32_SLEEP)
 unsigned long ms = __ns.count() / 100;
 if (__ns.count() > 0 && ms == 0)
diff --git a/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc 
b/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc
index e7d69a49fb6..cd8d2fdd6f3 100644
--- a/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc
+++ b/libstdc++-v3/testsuite/30_threads/this_thread/60421.cc
@@ -53,10 +53,19 @@ test02()
 sleeping = true;
 std::this_thread::sleep_for(time);
 result = std::chrono::system_clock::now() >= (start + time);
+sleeping = false;
   });
-  while (!sleeping) { }
-  std::this_thread::sleep_for(std::chrono::milliseconds(500));
-  pthread_kill(t.native_handle(), SIGUSR1);
+  while (!sleeping)
+  {
+// Wait for the thread to start sleeping.
+  }
+  while (sleeping)
+  {
+// The sleeping thread should finish eventually,
+// even if continually interrupted after less than a second:
+std::this_thread::sleep_for(std::chrono::milliseconds(500));
+pthread_kill(t.native_handle(), SIGUSR1);
+  }
   t.join();
   VERIFY( result );
 }

[PATCH][AArch64] Fix PR87511

[Wilco Dijkstra]

As mentioned in PR87511, the shift used in aarch64_mask_and_shift_for_ubfiz_p
should be evaluated as a HOST_WIDE_INT rather than int.

Passes bootstrap, OK for commit and backport?

ChangeLog:
2018-10-11  Wilco Dijkstra  

gcc/
* config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
Use HOST_WIDE_INT_1U for shift.

testsuite/
* gcc.target/aarch64/pr87511.c: Add new test.

--

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 
385272b8867317be4b2d10e56da25af306121214..86cfb92861eda652718b4e0be013688718d8f1b2
 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8549,7 +8549,8 @@ aarch64_mask_and_shift_for_ubfiz_p (scalar_int_mode mode, 
rtx mask,
   return CONST_INT_P (mask) && CONST_INT_P (shft_amnt)
 && INTVAL (shft_amnt) < GET_MODE_BITSIZE (mode)
 && exact_log2 ((INTVAL (mask) >> INTVAL (shft_amnt)) + 1) >= 0
-&& (INTVAL (mask) & ((1 << INTVAL (shft_amnt)) - 1)) == 0;
+&& (INTVAL (mask)
+& ((HOST_WIDE_INT_1U << INTVAL (shft_amnt)) - 1)) == 0;
 }
 
 /* Calculate the cost of calculating X, storing it in *COST.  Result
diff --git a/gcc/testsuite/gcc.target/aarch64/pr87511.c 
b/gcc/testsuite/gcc.target/aarch64/pr87511.c
new file mode 100644
index 
..98064701594caefa747c10d87924746f295ad8cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr87511.c
@@ -0,0 +1,16 @@
+/* { dg-do assemble } */
+/* { dg-options "-Os" } */
+
+int a, d;
+struct {
+  signed f5 : 26;
+  signed f6 : 12;
+} b;
+signed char c;
+void fn1() {
+  signed char *e = &c;
+  d = a * 10;
+  *e = d;
+  b.f6 = c;
+  b.f5 = 8 <= 3;
+}

Re: [PATCH][AArch64] Fix PR87511

[Richard Sandiford]

Wilco Dijkstra  writes:
> As mentioned in PR87511, the shift used in aarch64_mask_and_shift_for_ubfiz_p
> should be evaluated as a HOST_WIDE_INT rather than int.
>
> Passes bootstrap, OK for commit and backport?

OK for both, thanks.

Richard

(Reviewing since this is really an rtl handling bug rather than
something that needs port knowledge...)

Re: [PATCH, AArch64 v2 00/11] LSE atomics out-of-line

[Richard Henderson]

Ping.

On 10/2/18 9:19 AM, Richard Henderson wrote:
> Changes since v1:
>   * Use config/t-slibgcc-libgcc instead of gcc.c changes.
>   * Some style fixes.
>   * Ifdefs to work with old glibc.
> 
>   * Force TImode registers into even regnos.
> Required by CASP, allowed by the ABI, and is seen as the
> simplier solution than adding two new register classes.
> 
>   * Use match_dup instead of matching constraints for CAS{P}.
> Matching constraints result in lots of extraneous moves
> for TImode, and keeping the expander interface the same
> for non-TImode simplifies the code.
> 
> 
> r~
> 
> 
> Richard Henderson (11):
>   aarch64: Simplify LSE cas generation
>   aarch64: Improve cas generation
>   aarch64: Improve swp generation
>   aarch64: Improve atomic-op lse generation
>   aarch64: Emit LSE st instructions
>   Add visibility to libfunc constructors
>   aarch64: Add out-of-line functions for LSE atomics
>   aarch64: Implement -matomic-ool
>   aarch64: Force TImode values into even registers
>   aarch64: Implement TImode compare-and-swap
>   Enable -matomic-ool by default
> 
>  gcc/config/aarch64/aarch64-protos.h   |  20 +-
>  gcc/optabs-libfuncs.h |   2 +
>  gcc/common/config/aarch64/aarch64-common.c|   6 +-
>  gcc/config/aarch64/aarch64.c  | 494 +++---
>  gcc/optabs-libfuncs.c |  26 +-
>  .../atomic-comp-swap-release-acquire.c|   2 +-
>  .../gcc.target/aarch64/atomic-inst-ldadd.c|  18 +-
>  .../gcc.target/aarch64/atomic-inst-ldlogic.c  |  54 +-
>  .../gcc.target/aarch64/atomic-op-acq_rel.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-acquire.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-char.c   |   2 +-
>  .../gcc.target/aarch64/atomic-op-consume.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-imm.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-int.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-long.c   |   2 +-
>  .../gcc.target/aarch64/atomic-op-relaxed.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-release.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-seq_cst.c|   2 +-
>  .../gcc.target/aarch64/atomic-op-short.c  |   2 +-
>  .../aarch64/atomic_cmp_exchange_zero_reg_1.c  |   2 +-
>  .../atomic_cmp_exchange_zero_strong_1.c   |   2 +-
>  .../gcc.target/aarch64/sync-comp-swap.c   |   2 +-
>  .../gcc.target/aarch64/sync-op-acquire.c  |   2 +-
>  .../gcc.target/aarch64/sync-op-full.c |   2 +-
>  libgcc/config/aarch64/lse.c   | 282 
>  gcc/config/aarch64/aarch64.opt|   4 +
>  gcc/config/aarch64/atomics.md | 608 ++
>  gcc/config/aarch64/iterators.md   |   8 +-
>  gcc/config/aarch64/predicates.md  |  12 +
>  gcc/doc/invoke.texi   |  14 +-
>  libgcc/config.host|   4 +
>  libgcc/config/aarch64/t-lse   |  48 ++
>  32 files changed, 1058 insertions(+), 576 deletions(-)
>  create mode 100644 libgcc/config/aarch64/lse.c
>  create mode 100644 libgcc/config/aarch64/t-lse
> 

Backports to gcc-8-branch

[Jakub Jelinek]

Hi!

I've bootstrapped/regtested and committed following 4 backports from trunk
to gcc-8-branch.

Jakub
2018-10-11  Jakub Jelinek  

Backported from mainline
2018-09-12  Jakub Jelinek  
Andreas Krebbel  

PR tree-optimization/86844
* gimple-ssa-store-merging.c
(imm_store_chain_info::coalesce_immediate): For overlapping stores, if
there are any overlapping stores in between them, make sure they are
also coalesced or we give up completely.

* gcc.c-torture/execute/pr86844.c: New test.
* gcc.dg/store_merging_22.c: New test.
* gcc.dg/store_merging_23.c: New test.

--- gcc/gimple-ssa-store-merging.c  (revision 264231)
+++ gcc/gimple-ssa-store-merging.c  (revision 264232)
@@ -2648,15 +2648,80 @@ imm_store_chain_info::coalesce_immediate
{
  /* Only allow overlapping stores of constants.  */
  if (info->rhs_code == INTEGER_CST
- && merged_store->stores[0]->rhs_code == INTEGER_CST
- && check_no_overlap (m_store_info, i, INTEGER_CST,
-  MAX (merged_store->last_order, info->order),
-  MAX (merged_store->start
-   + merged_store->width,
-   info->bitpos + info->bitsize)))
+ && merged_store->stores[0]->rhs_code == INTEGER_CST)
{
- merged_store->merge_overlapping (info);
- continue;
+ unsigned int last_order
+   = MAX (merged_store->last_order, info->order);
+ unsigned HOST_WIDE_INT end
+   = MAX (merged_store->start + merged_store->width,
+  info->bitpos + info->bitsize);
+ if (check_no_overlap (m_store_info, i, INTEGER_CST,
+   last_order, end))
+   {
+ /* check_no_overlap call above made sure there are no
+overlapping stores with non-INTEGER_CST rhs_code
+in between the first and last of the stores we've
+just merged.  If there are any INTEGER_CST rhs_code
+stores in between, we need to merge_overlapping them
+even if in the sort_by_bitpos order there are other
+overlapping stores in between.  Keep those stores as is.
+Example:
+   MEM[(int *)p_28] = 0;
+   MEM[(char *)p_28 + 3B] = 1;
+   MEM[(char *)p_28 + 1B] = 2;
+   MEM[(char *)p_28 + 2B] = MEM[(char *)p_28 + 6B];
+We can't merge the zero store with the store of two and
+not merge anything else, because the store of one is
+in the original order in between those two, but in
+store_by_bitpos order it comes after the last store that
+we can't merge with them.  We can merge the first 3 stores
+and keep the last store as is though.  */
+ unsigned int len = m_store_info.length (), k = i;
+ for (unsigned int j = i + 1; j < len; ++j)
+   {
+ store_immediate_info *info2 = m_store_info[j];
+ if (info2->bitpos >= end)
+   break;
+ if (info2->order < last_order)
+   {
+ if (info2->rhs_code != INTEGER_CST)
+   {
+ /* Normally check_no_overlap makes sure this
+doesn't happen, but if end grows below, then
+we need to process more stores than
+check_no_overlap verified.  Example:
+   MEM[(int *)p_5] = 0;
+   MEM[(short *)p_5 + 3B] = 1;
+   MEM[(char *)p_5 + 4B] = _9;
+   MEM[(char *)p_5 + 2B] = 2;  */
+ k = 0;
+ break;
+   }
+ k = j;
+ end = MAX (end, info2->bitpos + info2->bitsize);
+   }
+   }
+
+ if (k != 0)
+   {
+ merged_store->merge_overlapping (info);
+
+ for (unsigned int j = i + 1; j <= k; j++)
+   {
+ store_immediate_info *info2 = m_store_info[j];
+ gcc_assert (info2->bitpos < end);
+ if (info2->order < last_order)
+   {
+ gcc_assert (info2->rhs_code == INTEGER_CST);
+ merged_store->merge_overlapping (info2);
+  

Re: [PATCH v3] Change default to -fno-math-errno

[Joseph Myers]

On Thu, 11 Oct 2018, Wilco Dijkstra wrote:

> For the new math functions all errno handling is already done in a 
> single function so you could do something like: if (want_errno) 
> set_errno (error).

want_errno being a global (or TLS) variable gets into the same problems as 
_LIB_VERSION; you want something that's a property of the particular call 
to the function, based on the options used to compile that call (which 
gets you into either wrappers, or building selected functions twice to 
provide no-errno-setting entry point, if you want to be able to optimize 
on the basis that a call cannot change errno).

Saving and restoring seems a plausible approach if you want to e.g. 
provide a guarantee in future glibc versions that complex.h functions will 
not set errno (they'd need review to see if at present they can actually 
call any error cases of other functions that might set errno, or if there 
isn't a problem anyway).

-- 
Joseph S. Myers
jos...@codesourcery.com

[wwwdocs] steering.html - minor formatting changes and a spelling fix

[Gerald Pfeifer]

No change in terms of contents.

Committed.

Gerald

Index: steering.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/steering.html,v
retrieving revision 1.45
diff -u -r1.45 steering.html
--- steering.html   30 Sep 2018 14:38:47 -  1.45
+++ steering.html   11 Oct 2018 17:47:06 -
@@ -25,7 +25,7 @@
 GCC steering committee members
 
 The steering committee consists of the following members.  The best
-place to reach them is the gcc mailinglist.
+place to reach them is the gcc mailing list.
 
 
 David Edelsohn (IBM)
@@ -49,16 +49,15 @@
 Richard Stallman (Free Software Foundation)
 
 
-Membership in the steering committee is a personal membership.
+Membership in the steering committee is a personal membership.
 Affiliations are listed for identification purposes only; steering
 committee members do not represent their employers or academic
-institutions.
-
-Generally speaking, committee members were chosen to represent
+institutions.
+Generally speaking, committee members were chosen to represent
 the interests of communities (e.g. Fortran users, embedded systems
-developers, kernel hackers), not companies.
+developers, kernel hackers), not companies.
 
-The original announcement from November 10, 1998:
+The original announcement from November 10, 1998
 
 
 From its initial conception, the egcs project [now GCC]

Re: [PATCH v3] Change default to -fno-math-errno

[Joseph Myers]

On Thu, 11 Oct 2018, Wilco Dijkstra wrote:

> Hi,
> 
> > Note that "will ever set errno" includes possibly setting it in the 
> > future, since code may be built with one libm version and used with 
> > another.  So it wouldn't be correct to have a "never sets errno" attribute 
> > on glibc logb / lround / llround / lrint / llrint / fma / remquo (missing 
> > errno setting is a known bug).  
> 
> If these functions should set errno, there are many issues both in GCC and
> GLIBC. GCC treats fma and remquo always as const/pure, so inlines fma
> always even with -fmath-errno. GLIBC targets which support fma as a
> single instruction always inline it as a single instruction, as expected.
> 
> GCC incorrectly treats many other math functions as const/pure, for 
> example GCC "knows" that the C89 sin function will never set errno with
> -fmath-errno:

That (for sin) is bug 80042.  (While bug 37073 is enabling for FreeBSD the 
same optimizations as on Darwin and bug 64101 deals with a case where 
glibc's rules for errno setting on underflow do not require errno to be 
set, ISO C leaving that as implementation-defined, but some 
implementations, including the one used by the bug reporter, follow 
different rules that do involve setting errno.)

I suspect the current settings in GCC are based on someone's observations 
of what one particular implementation did around 2003; they aren't based 
on the standard.

> So if anything this is good evidence that nobody is using errno in actual
> applications, otherwise these bugs would have been found many years ago.

People *did* find such bugs, referenced above (but many uses likely would 
be such that the code movement in question does not occur and so the errno 
tests work anyway).

I think it would be reasonable to move to a -fno-math-errno default that 
actually matches the standard semantics (various functions may set errno 
but aren't required to, so replacing with single instructions is OK - 
without requiring a fix for the existing functions wrongly marked as never 
setting errno).  A stronger default (assume the functions never set errno) 
is appropriate on Darwin and FreeBSD (and potentially for some functions 
on some other platforms, if those platforms define no-errno-setting 
semantics for those functions rather than simply not setting errno by 
accident for them), and an explicit option could be used to enable such a 
stronger version on other platforms, and we could provide a way for libm 
implementations to declare that a function variant will never set errno.

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [PATCH] add simple attribute introspection

[Joseph Myers]

On Thu, 11 Oct 2018, Martin Sebor wrote:

> (Or are there some differences between the underscored forms and
> the one without it)?

They should always behave the same.

> With a few exceptions (like aligned) the built-in returns false
> for attributes that aren't attached to a node.  I haven't exercised
> nearly all the attributes yet, and this one could very well be among
> those that aren't and perhaps can't be handled.  I suspect some
> target attributes might be in the same group.  If there's no way
> to tell it should probably be documented as a limitation of
> the function, maybe also under the attribute itself that can't
> be detected.  Alternatively, the built-in return type could be
> changed to a tri-state: "don't know," false, true.  Can you
> think of a better solution?

I don't have a better solution.

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [C++ Patch] PR 85070 ("[8/9 Regression] ICE on C++ code: in lazily_declare_fn, at cp/method.c:2409")

[Jakub Jelinek]

On Mon, Sep 24, 2018 at 12:48:56PM +0200, Paolo Carlini wrote:
> as explained in the audit trail, the gcc_assert added by Nathan triggers
> during error-recovery too, when add_method correctly returns false because
> it failed to add the method. Thus it seems that we should simply loosen a
> bit the assertion. Tested x86_64-linux.

Testcase fails with check-c++-all:
FAIL: g++.dg/cpp0x/pr85070.C  -std=c++17 (test for excess errors)
FAIL: g++.dg/cpp0x/pr85070.C  -std=c++2a (test for excess errors)
FAIL: g++.dg/cpp0x/pr85070.C  -std=c++17 -fconcepts (test for excess errors)

Any reason why you've used c++14_only effective target, rather than c++14?
If I use the latter, i.e. expect c++17/2a/17 + concepts to behave like c++14
in this case, there are no failures.

Tested with make check-c++-all RUNTESTFLAGS=dg.exp=pr85070.C, ok for trunk?

2018-10-11  Jakub Jelinek  

PR c++/85070
* g++.dg/cpp0x/pr85070.C: Change effective target for diagnostics from
c++14_only to c++14.

--- gcc/testsuite/g++.dg/cpp0x/pr85070.C.jj 2018-09-25 15:14:43.205270858 
+0200
+++ gcc/testsuite/g++.dg/cpp0x/pr85070.C2018-10-11 19:55:17.795180058 
+0200
@@ -4,10 +4,10 @@ struct A;
 
 struct B
 {
-  constexpr A & operator= (const A &);  // { dg-warning "used" "" { target 
c++14_only } }
+  constexpr A & operator= (const A &);  // { dg-warning "used" "" { target 
c++14 } }
 };
 
-struct A : B  // { dg-error "cannot be overloaded" "" { target c++14_only } }
+struct A : B  // { dg-error "cannot be overloaded" "" { target c++14 } }
 {
   using B::operator=;
 } a { a = a };


Jakub

[patch] leverage linker relaxation on ppc vxworks RTPs

[Olivier Hainque]

Hello,

Most VxWorks programs refer to kernel services at some point, and these
often end up too far away for short calls on powerpc.

This patch, originally contributed by Doug, arranges to request linker
relaxation by default for RTPs. This helps many programs transparently,
the feature has been available in binutils for a long time now and is
more precise than -mlongcall at compile time.

We have been using minor variants of this patch in-house successfully
for at least couple of years now, I checked that this version has the
intended effect on our gcc-8 based version of the toolchain and the patch
applies untouched on mainline.

Olivier

2018-10-10  Doug Rupp  
Olivier Hainque  

* config/rs6000/vxworks.h (VXWORKS_RELAX_LINK_SPEC): New macro.
Pass --relax to the linker for RTPs.
(LINK_SPEC): Append VXWORKS_RELAX_LINK_SPEC.

--- a/gcc/config/rs6000/vxworks.h
+++ b/gcc/config/rs6000/vxworks.h
@@ -88,8 +88,15 @@ VXWORKS_ADDITIONAL_CPP_SPEC
 
 #undef  LIB_SPEC
 #define LIB_SPEC VXWORKS_LIB_SPEC
+
+/* For RTPs, leverage linker relaxation.  This helps programs referring
+   to, typically, kernel services too far away for short calls.  This is more
+   precise than -mlongcall and can be overriden with -Wl,--no-relax.  */
+#define VXWORKS_RELAX_LINK_SPEC "%{mrtp:--relax}"
+
 #undef  LINK_SPEC
-#define LINK_SPEC VXWORKS_LINK_SPEC
+#define LINK_SPEC VXWORKS_LINK_SPEC " " VXWORKS_RELAX_LINK_SPEC
+
 #undef  STARTFILE_SPEC
 #define STARTFILE_SPEC VXWORKS_STARTFILE_SPEC
 #undef  ENDFILE_SPEC

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

[Peter Bergner]

On 10/10/18 7:57 PM, Peter Bergner wrote:
> The problem is, that hard reg %r26 is defined in insn 32, to be used in
> insn 33, so using %r26 as the reload reg is wrong, because it will clobber
> the value we set in insn 32.  Looking thru LRA, it looks like LRA assumes
> that for a reload, if one of the input pseudos dies in the insn, then the
> hard reg it was assigned to is available to use.  That assumption is (now)
> wrong, because another pseudo may be using that hard reg or in this case,
> the hard reg itself is still live.
> 
> For this example, pseudo 109 also dies in insn 49 and since it's hard reg
> %r28 isn't live thru the insn, we could have used that instead.  However,
> we cannot just look at REG_DEAD notes for free hard regs to use for reload
> regs.  We need to make sure that that hard reg isn't also assigned to another
> pseudo that is live at that insn or even that the hard reg itself is live.
> 
> Vlad, you know the LRA code better than anyone.  Will it be easy to find
> all the places where we create reload regs and fix them up so that we
> look at more than just REG_DEAD notes?  Even though looking at REG_DEAD
> notes isn't enough, I still think the majority of the time those regs
> probably will be free to use, we just have to check for the special
> cases like above where they are not.

Ok, after working in gdb, I see that the PA-RISC port still uses reload
and not LRA, but it too seems to have the same issue of reusing input
regs that have REG_DEAD notes, so the question still stands.  It's just
that whatever fix we come up with will have to be to both LRA and reload.

Peter

Re: [C++ Patch] PR 85070 ("[8/9 Regression] ICE on C++ code: in lazily_declare_fn, at cp/method.c:2409")

[Paolo Carlini]

Hi,

On 11/10/18 19:59, Jakub Jelinek wrote:

On Mon, Sep 24, 2018 at 12:48:56PM +0200, Paolo Carlini wrote:

as explained in the audit trail, the gcc_assert added by Nathan triggers
during error-recovery too, when add_method correctly returns false because
it failed to add the method. Thus it seems that we should simply loosen a
bit the assertion. Tested x86_64-linux.

Testcase fails with check-c++-all:
FAIL: g++.dg/cpp0x/pr85070.C  -std=c++17 (test for excess errors)
FAIL: g++.dg/cpp0x/pr85070.C  -std=c++2a (test for excess errors)
FAIL: g++.dg/cpp0x/pr85070.C  -std=c++17 -fconcepts (test for excess errors)

Ah, sorry, it's because I tested with check-c++.

Any reason why you've used c++14_only effective target, rather than c++14?
If I use the latter, i.e. expect c++17/2a/17 + concepts to behave like c++14
in this case, there are no failures.


Not that I can remember now... I was working on some other issues too...

Paolo.

Re: [PATCH] v2: C++: suggestions for misspelled private members (PR c++/84993)

[Jason Merrill]

OK.
On Fri, Sep 21, 2018 at 5:22 PM David Malcolm  wrote:
>
> This is v2 of the patch; I managed to bit-rot my own patch due to my
> fix for r264335, which tightened up the "is this meaningful" threshold
> on edit distances when finding spelling correction candidates.
>
> The only change in this version is to rename various things in
> the testcase so that they continue to be suggested
> ("colour" vs "m_color" are no longer near enough, so I renamed
> "colour" to "m_colour").
>
> Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
>
> OK for trunk?
>
> Blurb from v1:
>
> PR c++/84993 identifies a problem with our suggestions for
> misspelled member names in the C++ FE for the case where the
> member is private.
>
> For example, given:
>
> class foo
> {
> public:
>   double get_ratio() const { return m_ratio; }
>
> private:
>   double m_ratio;
> };
>
> void test(foo *ptr)
> {
>   if (ptr->ratio >= 0.5)
> ;// etc
> }
>
> ...we currently emit this suggestion:
>
> : In function 'void test(foo*)':
> :12:12: error: 'class foo' has no member named 'ratio'; did you mean 
> 'm_ratio'?
>if (ptr->ratio >= 0.5)
> ^
> m_ratio
>
> ...but if the user follows this suggestion, they get:
>
> : In function 'void test(foo*)':
> :12:12: error: 'double foo::m_ratio' is private within this context
>if (ptr->m_ratio >= 0.5)
> ^~~
> :7:10: note: declared private here
>double m_ratio;
>   ^~~
> :12:12: note: field 'double foo::m_ratio' can be accessed via 'double 
> foo::get_ratio() const'
>if (ptr->m_ratio >= 0.5)
> ^~~
> get_ratio()
>
> It feels wrong to be emitting a fix-it hint that doesn't compile, so this
> patch adds the accessor fix-it hint logic to this case, so that we directly
> offer a valid suggestion:
>
> : In function 'void test(foo*)':
> :12:12: error: 'class foo' has no member named 'ratio'; did you mean
> 'double foo::m_ratio'? (accessible via 'double foo::get_ratio() const')
>if (ptr->ratio >= 0.5)
> ^
> get_ratio()
>
> gcc/cp/ChangeLog:
> PR c++/84993
> * call.c (enforce_access): Move diagnostics to...
> (complain_about_access): ...this new function.
> * cp-tree.h (class access_failure_info): Rename split out field
> "m_field_decl" into "m_decl" and "m_diag_decl".
> (access_failure_info::record_access_failure): Add tree param.
> (access_failure_info::was_inaccessible_p): New accessor.
> (access_failure_info::get_decl): New accessor.
> (access_failure_info::get_diag_decl): New accessor.
> (access_failure_info::get_any_accessor): New member function.
> (access_failure_info::add_fixit_hint): New static member function.
> (complain_about_access): New decl.
> * typeck.c (access_failure_info::record_access_failure): Update
> for change to fields.
> (access_failure_info::maybe_suggest_accessor): Split out into...
> (access_failure_info::get_any_accessor): ...this new function...
> (access_failure_info::add_fixit_hint): ...and this new function.
> (finish_class_member_access_expr): Split out "has no member named"
> error-handling into...
> (complain_about_unrecognized_member): ...this new function, and
> check that the guessed name is accessible along the access path.
> Only provide a spell-correction fix-it hint if it is; otherwise,
> attempt to issue an accessor fix-it hint.
>
> gcc/testsuite/ChangeLog:
> PR c++/84993
> * g++.dg/torture/accessor-fixits-9.C: New test.
> ---
>  gcc/cp/call.c|  64 ++
>  gcc/cp/cp-tree.h |  17 ++-
>  gcc/cp/typeck.c  | 150 
> +--
>  gcc/testsuite/g++.dg/torture/accessor-fixits-9.C | 119 ++
>  4 files changed, 282 insertions(+), 68 deletions(-)
>  create mode 100644 gcc/testsuite/g++.dg/torture/accessor-fixits-9.C
>
> diff --git a/gcc/cp/call.c b/gcc/cp/call.c
> index 69503ca..445dde8 100644
> --- a/gcc/cp/call.c
> +++ b/gcc/cp/call.c
> @@ -6512,6 +6512,38 @@ build_op_delete_call (enum tree_code code, tree addr, 
> tree size,
>return error_mark_node;
>  }
>
> +/* Issue diagnostics about a disallowed access of DECL, using DIAG_DECL
> +   in the diagnostics.
> +
> +   If ISSUE_ERROR is true, then issue an error about the
> +   access, followed by a note showing the declaration.
> +   Otherwise, just show the note.  */
> +
> +void
> +complain_about_access (tree decl, tree diag_decl, bool issue_error)
> +{
> +  if (TREE_PRIVATE (decl))
> +{
> +  if (issue_error)
> +   error ("%q#D is private within this context", diag_decl);
> +  inform (DECL_SOURCE_LOCATION (diag_decl),
> + "declared private here");
> +}
> +  else if (TREE_PROTECTED (decl))
> +{
> +  if (issue_error)

Re: [C++ Patch] PR 85070 ("[8/9 Regression] ICE on C++ code: in lazily_declare_fn, at cp/method.c:2409")

[Jason Merrill]

OK.
On Thu, Oct 11, 2018 at 1:59 PM Jakub Jelinek  wrote:
>
> On Mon, Sep 24, 2018 at 12:48:56PM +0200, Paolo Carlini wrote:
> > as explained in the audit trail, the gcc_assert added by Nathan triggers
> > during error-recovery too, when add_method correctly returns false because
> > it failed to add the method. Thus it seems that we should simply loosen a
> > bit the assertion. Tested x86_64-linux.
>
> Testcase fails with check-c++-all:
> FAIL: g++.dg/cpp0x/pr85070.C  -std=c++17 (test for excess errors)
> FAIL: g++.dg/cpp0x/pr85070.C  -std=c++2a (test for excess errors)
> FAIL: g++.dg/cpp0x/pr85070.C  -std=c++17 -fconcepts (test for excess errors)
>
> Any reason why you've used c++14_only effective target, rather than c++14?
> If I use the latter, i.e. expect c++17/2a/17 + concepts to behave like c++14
> in this case, there are no failures.
>
> Tested with make check-c++-all RUNTESTFLAGS=dg.exp=pr85070.C, ok for trunk?
>
> 2018-10-11  Jakub Jelinek  
>
> PR c++/85070
> * g++.dg/cpp0x/pr85070.C: Change effective target for diagnostics from
> c++14_only to c++14.
>
> --- gcc/testsuite/g++.dg/cpp0x/pr85070.C.jj 2018-09-25 15:14:43.205270858 
> +0200
> +++ gcc/testsuite/g++.dg/cpp0x/pr85070.C2018-10-11 19:55:17.795180058 
> +0200
> @@ -4,10 +4,10 @@ struct A;
>
>  struct B
>  {
> -  constexpr A & operator= (const A &);  // { dg-warning "used" "" { target 
> c++14_only } }
> +  constexpr A & operator= (const A &);  // { dg-warning "used" "" { target 
> c++14 } }
>  };
>
> -struct A : B  // { dg-error "cannot be overloaded" "" { target c++14_only } }
> +struct A : B  // { dg-error "cannot be overloaded" "" { target c++14 } }
>  {
>using B::operator=;
>  } a { a = a };
>
>
> Jakub

Re: [C++ Patch] PR 71140 ("[concepts] ill-formed nested-requirement lacking a semicolon not rejected")

[Jason Merrill]

On Wed, Oct 3, 2018 at 8:18 AM Paolo Carlini  wrote:
> a simple issue, we weren't correctly implementing 7.5.7.4 on the
> terminating semicolon. Tested x86_64-linux.

If the missing semicolon is followed by }, let's allow it with a pedwarn.

Jason

Re: [PATCH][AArch64] Support zero-extended move to FP register

[Wilco Dijkstra]

Here is the same version again with an extra test added:

The popcount expansion uses SIMD instructions acting on 64-bit values.
As a result a popcount of a 32-bit integer requires zero-extension before 
moving the zero-extended value into an FP register.  This patch adds
support for zero-extended int->FP moves to avoid the redundant uxtw.
Similarly, add support for 32-bit zero-extending load->FP register
and 32-bit zero-extending FP->FP and FP->int moves.
Add a missing 'fp' arch attribute to the related 8/16-bit pattern and
fix an incorrect type attribute.

To complete zero-extended load support, add a new alternative to 
load_pair_zero_extendsidi2_aarch64 to support LDP into FP registers too.

int f (int a)
{
  return __builtin_popcount (a);
}

Before:
uxtwx0, w0
fmovd0, x0
cnt v0.8b, v0.8b
addvb0, v0.8b
fmovw0, s0
ret

After:
fmovs0, w0
cnt v0.8b, v0.8b
addvb0, v0.8b
fmovw0, s0
ret

Passes regress on AArch64, OK for commit?

ChangeLog:
2018-10-11  Wilco Dijkstra  

gcc/
* config/aarch64/aarch64.md (zero_extendsidi2_aarch64): Add alternatives
to zero-extend between int and floating-point registers.
(load_pair_zero_extendsidi2_aarch64): Add alternative to emit 
zero-extended
ldp into floating-point registers.  Add type and arch attributes.
(zero_extend2_aarch64): Add arch attribute.
Use f_loads for type attribute.

testsuite/
* gcc.target/aarch64/popcnt.c: Test zero-extended popcount.
* gcc.target/aarch64/vec_zeroextend.c: Test zero-extended vectors.

--
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 
ef2368706e88a551b9d0d2db2385860112bdbdde..5e42485a4727079cc7647f4ded45dd175030b3fb
 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1588,26 +1588,34 @@ (define_insn "*load_pair_extendsidi2_aarch64"
 )
 
 (define_insn "*zero_extendsidi2_aarch64"
-  [(set (match_operand:DI 0 "register_operand" "=r,r")
-(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m")))]
+  [(set (match_operand:DI 0 "register_operand" "=r,r,w,w,r,w")
+(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" 
"r,m,r,m,w,w")))]
   ""
   "@
uxtw\t%0, %w1
-   ldr\t%w0, %1"
-  [(set_attr "type" "extend,load_4")]
+   ldr\t%w0, %1
+   fmov\t%s0, %w1
+   ldr\t%s0, %1
+   fmov\t%w0, %s1
+   fmov\t%s0, %s1"
+  [(set_attr "type" "extend,load_4,f_mcr,f_loads,f_mrc,fmov")
+   (set_attr "arch" "*,*,fp,fp,fp,fp")]
 )
 
 (define_insn "*load_pair_zero_extendsidi2_aarch64"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-   (zero_extend:DI (match_operand:SI 1 "aarch64_mem_pair_operand" "Ump")))
-   (set (match_operand:DI 2 "register_operand" "=r")
-   (zero_extend:DI (match_operand:SI 3 "memory_operand" "m")))]
+  [(set (match_operand:DI 0 "register_operand" "=r,w")
+   (zero_extend:DI (match_operand:SI 1 "aarch64_mem_pair_operand" 
"Ump,Ump")))
+   (set (match_operand:DI 2 "register_operand" "=r,w")
+   (zero_extend:DI (match_operand:SI 3 "memory_operand" "m,m")))]
   "rtx_equal_p (XEXP (operands[3], 0),
plus_constant (Pmode,
   XEXP (operands[1], 0),
   GET_MODE_SIZE (SImode)))"
-  "ldp\\t%w0, %w2, %1"
-  [(set_attr "type" "load_8")]
+  "@
+   ldp\t%w0, %w2, %1
+   ldp\t%s0, %s2, %1"
+  [(set_attr "type" "load_8,neon_load1_2reg")
+   (set_attr "arch" "*,fp")]
 )
 
 (define_expand "2"
@@ -1634,7 +1642,8 @@ (define_insn "*zero_extend2_aarch64"
and\t%0, %1, 
ldr\t%w0, %1
ldr\t%0, %1"
-  [(set_attr "type" "logic_imm,load_4,load_4")]
+  [(set_attr "type" "logic_imm,load_4,f_loads")
+   (set_attr "arch" "*,*,fp")]
 )
 
 (define_expand "qihi2"
diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt.c 
b/gcc/testsuite/gcc.target/aarch64/popcnt.c
index 
7e957966d8e81b8633a444bb42944d0da82ae5db..2b5e9f3e2c0245438ed7bcc5d0d4e01efe01b1ee
 100644
--- a/gcc/testsuite/gcc.target/aarch64/popcnt.c
+++ b/gcc/testsuite/gcc.target/aarch64/popcnt.c
@@ -19,5 +19,16 @@ foo2 (long long x)
   return __builtin_popcountll (x);
 }
 
-/* { dg-final { scan-assembler-not "popcount" } } */
-/* { dg-final { scan-assembler-times "cnt\t" 3 } } */
+int
+foo3 (int *p)
+{
+  return __builtin_popcount (*p);
+}
+
+/* { dg-final { scan-assembler-not {popcount} } } */
+/* { dg-final { scan-assembler-times {cnt\t} 4 } } */
+/* { dg-final { scan-assembler-times {fmov\ts} 1 {target lp64} } } */
+/* { dg-final { scan-assembler-times {fmov\td} 2 {target lp64} } } */
+/* { dg-final { scan-assembler-times {fmov\ts} 2 {target ilp32} } } */
+/* { dg-final { scan-assembler-times {fmov\td} 1 {target ilp32} } } */
+/* { dg-final { scan-assembler-times {ldr\ts} 1 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vec_zeroextend.c 
b/gcc/testsuite/gcc.target/aarch64/vec_zeroextend.c
new file mode 100644
index 
000

[C++ PATCH] parser simplification

[Nathan Sidwell]

In working out how to orchestrate the preprocessor/parser dance that 
modules require, I came across the confused logic of 
cp_parser_translation_unit.  It is only called once, but looks as if it 
used to be called multiple times, and retains the scar tissue from that.


It also bails out on the first extra } brace, ignoring anything after 
that.  A couple of testcases had that hiding later (uninteresting) 
diagnostics.


I moved finish_translation_unit to c_parse_file, as it seems more 
related there than the parsing.


Booted & tested on x86_64-linux, applying to trunk.

nathan
--
Nathan Sidwell
2018-10-11  Nathan Sidwell  

	cp/
	* parser.c (cp_parser_translation_unit): Return void.  Don't fail
	at first extra }, simplify logic.
	(c_parse_file): Call finish_translation_unit here.

	testsuite/
	* g++.dg/parse/close-brace.C: New.
	* g++.dg/cpp0x/noexcept16.C: Avoid warning.
	* g++.old-deja/g++.other/crash32.C: Add another error

Index: cp/parser.c
===
--- cp/parser.c	(revision 265035)
+++ cp/parser.c	(working copy)
@@ -2015,8 +2015,7 @@ static cp_expr cp_parser_userdef_numeric
 
 /* Basic concepts [gram.basic]  */
 
-static bool cp_parser_translation_unit
-  (cp_parser *);
+static void cp_parser_translation_unit (cp_parser *);
 
 /* Expressions [gram.expr]  */
 
@@ -4585,66 +4584,52 @@ cp_parser_userdef_string_literal (tree l
 /* Parse a translation-unit.
 
translation-unit:
- declaration-seq [opt]
-
-   Returns TRUE if all went well.  */
+ declaration-seq [opt]  */
 
-static bool
+static void
 cp_parser_translation_unit (cp_parser* parser)
 {
-  /* The address of the first non-permanent object on the declarator
- obstack.  */
-  static void *declarator_obstack_base;
-
-  bool success;
-
-  /* Create the declarator obstack, if necessary.  */
-  if (!cp_error_declarator)
-{
-  gcc_obstack_init (&declarator_obstack);
-  /* Create the error declarator.  */
-  cp_error_declarator = make_declarator (cdk_error);
-  /* Create the empty parameter list.  */
-  no_parameters = make_parameter_declarator (NULL, NULL, NULL_TREE,
-		 UNKNOWN_LOCATION);
-  /* Remember where the base of the declarator obstack lies.  */
-  declarator_obstack_base = obstack_next_free (&declarator_obstack);
-}
-
-  cp_parser_declaration_seq_opt (parser);
+  gcc_checking_assert (!cp_error_declarator);
+  
+  /* Create the declarator obstack.  */
+  gcc_obstack_init (&declarator_obstack);
+  /* Create the error declarator.  */
+  cp_error_declarator = make_declarator (cdk_error);
+  /* Create the empty parameter list.  */
+  no_parameters = make_parameter_declarator (NULL, NULL, NULL_TREE,
+	 UNKNOWN_LOCATION);
+  /* Remember where the base of the declarator obstack lies.  */
+  void *declarator_obstack_base = obstack_next_free (&declarator_obstack);
 
-  /* If there are no tokens left then all went well.  */
-  if (cp_lexer_next_token_is (parser->lexer, CPP_EOF))
+  for (;;)
 {
-  /* Get rid of the token array; we don't need it any more.  */
-  cp_lexer_destroy (parser->lexer);
-  parser->lexer = NULL;
-
-  /* This file might have been a context that's implicitly extern
-	 "C".  If so, pop the lang context.  (Only relevant for PCH.) */
-  if (parser->implicit_extern_c)
-	{
-	  pop_lang_context ();
-	  parser->implicit_extern_c = false;
-	}
-
-  /* Finish up.  */
-  finish_translation_unit ();
-
-  success = true;
+  cp_parser_declaration_seq_opt (parser);
+  gcc_assert (!cp_parser_parsing_tentatively (parser));
+  if (cp_lexer_next_token_is (parser->lexer, CPP_EOF))
+	break;
+  /* Must have been an extra close-brace.  */
+  cp_parser_error (parser, "expected declaration");
+  cp_lexer_consume_token (parser->lexer);
+  /* If the next token is now a `;', consume it.  */
+  if (cp_lexer_next_token_is (parser->lexer, CPP_SEMICOLON))
+	cp_lexer_consume_token (parser->lexer);
 }
-  else
+
+  /* Get rid of the token array; we don't need it any more.  */
+  cp_lexer_destroy (parser->lexer);
+  parser->lexer = NULL;
+  
+  /* This file might have been a context that's implicitly extern
+ "C".  If so, pop the lang context.  (Only relevant for PCH.) */
+  if (parser->implicit_extern_c)
 {
-  cp_parser_error (parser, "expected declaration");
-  success = false;
+  pop_lang_context ();
+  parser->implicit_extern_c = false;
 }
 
   /* Make sure the declarator obstack was fully cleaned up.  */
   gcc_assert (obstack_next_free (&declarator_obstack)
 	  == declarator_obstack_base);
-
-  /* All went well.  */
-  return success;
 }
 
 /* Return the appropriate tsubst flags for parsing, possibly in N3276
@@ -39130,6 +39115,8 @@ c_parse_file (void)
 ? dk_no_deferred : dk_no_check);
   cp_parser_translation_unit (the_parser);
   the_parser = NULL;
+
+  finish_translation_unit ();
 }
 
 /* Create an identifier for a generic paramete

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

[Peter Bergner]

On 10/11/18 1:18 PM, Peter Bergner wrote:
> Ok, after working in gdb, I see that the PA-RISC port still uses reload
> and not LRA, but it too seems to have the same issue of reusing input
> regs that have REG_DEAD notes, so the question still stands.  It's just
> that whatever fix we come up with will have to be to both LRA and reload.

On second thought, I'm thinking we should just leave reload alone and
only fix this in LRA.  That means we'd have to disable the reg copy
handling when not using LRA though, which might be another reason to
get targets to move to LRA?  I've verified the following patch gets
the PA-RISC test case to pass again.  Thoughts?

If ok, I still have to dig into the fails we're seeing on LRA targets.

Peter

* ira-lives (non_conflicting_reg_copy_p): Disable for non LRA targets.

Index: gcc/ira-lives.c
===
--- gcc/ira-lives.c (revision 264897)
+++ gcc/ira-lives.c (working copy)
@@ -1064,6 +1064,10 @@ find_call_crossed_cheap_reg (rtx_insn *i
 rtx
 non_conflicting_reg_copy_p (rtx_insn *insn)
 {
+  /* Disallow this for non LRA targets.  */
+  if (!targetm.lra_p ())
+return NULL_RTX;
+
   rtx set = single_set (insn);
 
   /* Disallow anything other than a simple register to register copy

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

[Jeff Law]

On 10/11/18 1:23 PM, Peter Bergner wrote:
> On 10/11/18 1:18 PM, Peter Bergner wrote:
>> Ok, after working in gdb, I see that the PA-RISC port still uses reload
>> and not LRA, but it too seems to have the same issue of reusing input
>> regs that have REG_DEAD notes, so the question still stands.  It's just
>> that whatever fix we come up with will have to be to both LRA and reload.
> 
> On second thought, I'm thinking we should just leave reload alone and
> only fix this in LRA.  That means we'd have to disable the reg copy
> handling when not using LRA though, which might be another reason to
> get targets to move to LRA?  I've verified the following patch gets
> the PA-RISC test case to pass again.  Thoughts?
> 
> If ok, I still have to dig into the fails we're seeing on LRA targets.
Hmmm.  Interesting.  I wonder if all the failing targets were reload
targets.  If so, this may be the way forward -- I certainly don't
want to spend much, if any, time fixing reload.

I'm in the middle of something, but will try to look at each of the
failing targets and confirm they use reload by default.

Jeff

Re: [C++ Patch] PR 71140 ("[concepts] ill-formed nested-requirement lacking a semicolon not rejected")

[Paolo Carlini]

Hi,

On 11/10/18 20:36, Jason Merrill wrote:

On Wed, Oct 3, 2018 at 8:18 AM Paolo Carlini  wrote:

a simple issue, we weren't correctly implementing 7.5.7.4 on the
terminating semicolon. Tested x86_64-linux.

If the missing semicolon is followed by }, let's allow it with a pedwarn.


I see. Unfortunately we have yet another issue in this area: our 
requirement-list, as parsed in cp_parser_requirement_list, isn't the 
same as requirement-seq in the working draft:


   requirement-list:
   requirement
   requirement-list ';' requirement[opt]

vs

   requirement-seq
   requirement
   requirement-seq requirement

thus, in particular, we accept a single requirement either terminated 
with semicolon or not (which explains why we have c++/71139 and 
c++/71140 es accept invalid but we don't reject anything valid). We do 
this together with correctly enforcing the terminating semicolon for 
simple-requirement and type-requirement and not enforcing it for 
compound-requirement and nested-requirement (per the bugs at issue). 
Sort of a mess. I don't know how much we care about backward 
compatibility with the TS, etc, in this area (*) but it would be *so* 
nice to implement requirement-seq too correctly and simply require the 
terminating semicolon for all the 4 kinds of requirements...


Thanks, Paolo.

(*) In principle we could even imagine a legacy Concepts TS mode - by 
and large frozen, the way of the library TR1 - and a proper C++20 
concepts mode, useful for much more serious issues too. No idea if 
somebody already discussed this?!?

Use C++11 direct init in __debug::forward_list

[François Dumont]

This patch makes extensive use of C++11 direct init in 
__debug::forward_list.


Doing so I also try to detect useless creation of safe iterators in 
debug implementation. In __debug::forward_list there are severals but I 
wonder if it is worth fixing those. Most of them are like this:


  void
  splice_after(const_iterator __pos, forward_list& __list)
  { splice_after(__pos, std::move(__list)); }

__pos is copied.

Do you think I shouldn't care, gcc will optimize it ?

I wonder if it would be ok in debug implementation to use this kind of 
signature:


void splice_after(const const_iterator& __pos, forward_list& __list)

Iterator taken as rvalue reference ?

I guess it is not Standard conformant so not correct but maybe I could 
add a private _M_splice_after with this signature.


    * include/debug/forward_list
    (forward_list<>::before_begin()): Use C++11 direct initialization.
    (forward_list<>::begin()): Likewise.
    (forward_list<>::end()): Likewise.
    (forward_list<>::cbefore_begin()): Likewise.
    (forward_list<>::cbegin()): Likewise.
    (forward_list<>::cend()): Likewise.
    (forward_list<>::emplace_after<>(const_iterator, _Args&&...)): 
Likewise.

    (forward_list<>::insert_after(const_iterator, const _Tp&)): Likewise.
    (forward_list<>::insert_after(const_iterator, _Tp&&)): Likewise.
    (forward_list<>::insert_after(const_iterator, size_type, const _Tp&)):
    Likewise.
    (forward_list<>::insert_after(const_iterator, initializer_list<>)):
    Likewise.
    (forward_list<>::erase_after(const_iterator)): Likewise.
    (forward_list<>::erase_after(const_iterator, const_iterator)): Likewise
    and ensure consistent iterator comparison.

Tested under Linux x86_64, Debug mode and committed.

François

diff --git a/libstdc++-v3/include/debug/forward_list b/libstdc++-v3/include/debug/forward_list
index e542447badd..c9744eda55a 100644
--- a/libstdc++-v3/include/debug/forward_list
+++ b/libstdc++-v3/include/debug/forward_list
@@ -316,39 +316,39 @@ namespace __debug
 
   iterator
   before_begin() noexcept
-  { return iterator(_Base::before_begin(), this); }
+  { return { _Base::before_begin(), this }; }
 
   const_iterator
   before_begin() const noexcept
-  { return const_iterator(_Base::before_begin(), this); }
+  { return { _Base::before_begin(), this }; }
 
   iterator
   begin() noexcept
-  { return iterator(_Base::begin(), this); }
+  { return { _Base::begin(), this }; }
 
   const_iterator
   begin() const noexcept
-  { return const_iterator(_Base::begin(), this); }
+  { return { _Base::begin(), this }; }
 
   iterator
   end() noexcept
-  { return iterator(_Base::end(), this); }
+  { return { _Base::end(), this }; }
 
   const_iterator
   end() const noexcept
-  { return const_iterator(_Base::end(), this); }
+  { return { _Base::end(), this }; }
 
   const_iterator
   cbegin() const noexcept
-  { return const_iterator(_Base::cbegin(), this); }
+  { return { _Base::cbegin(), this }; }
 
   const_iterator
   cbefore_begin() const noexcept
-  { return const_iterator(_Base::cbefore_begin(), this); }
+  { return { _Base::cbefore_begin(), this }; }
 
   const_iterator
   cend() const noexcept
-  { return const_iterator(_Base::cend(), this); }
+  { return { _Base::cend(), this }; }
 
   using _Base::empty;
   using _Base::max_size;
@@ -388,32 +388,30 @@ namespace __debug
 	emplace_after(const_iterator __pos, _Args&&... __args)
 	{
 	  __glibcxx_check_insert_after(__pos);
-	  return iterator(_Base::emplace_after(__pos.base(),
+	  return { _Base::emplace_after(__pos.base(),
 	std::forward<_Args>(__args)...),
-			  this);
+		   this };
	}
 
   iterator
   insert_after(const_iterator __pos, const _Tp& __val)
   {
 	__glibcxx_check_insert_after(__pos);
-	return iterator(_Base::insert_after(__pos.base(), __val), this);
+	return { _Base::insert_after(__pos.base(), __val), this };
   }
 
   iterator
   insert_after(const_iterator __pos, _Tp&& __val)
   {
 	__glibcxx_check_insert_after(__pos);
-	return iterator(_Base::insert_after(__pos.base(), std::move(__val)),
-		   	this);
+	return { _Base::insert_after(__pos.base(), std::move(__val)), this };
   }
 
   iterator
   insert_after(const_iterator __pos, size_type __n, const _Tp& __val)
   {
 	__glibcxx_check_insert_after(__pos);
-	return iterator(_Base::insert_after(__pos.base(), __n, __val),
-		   	this);
+	return { _Base::insert_after(__pos.base(), __n, __val), this };
   }
 
   template __il)
   {
 	__glibcxx_check_insert_after(__pos);
-	return iterator(_Base::insert_after(__pos.base(), __il), this);
+	return { _Base::insert_after(__pos.base(), __il), this };
   }
 
 private:
@@ -458,7 +456,7 @@ namespace __debug
   erase_after(const_iterator __pos)
   {
 	__glibcxx_check_erase_after(__pos);

Re: [PATCH 3/4] - Change sprintf to use new get_range_strlen overload

[Jeff Law]

On 10/10/18 4:36 PM, Jeff Law wrote:
> On 10/2/18 10:37 AM, Martin Sebor wrote:
>> [3/4] - Change sprintf to use new get_range_strlen overload
>>
>> This change makes use of the new get_range_strlen() overload
>> in gimple-ssa-sprintf.c.  This necessitated a few changes to
>> the API but also enabled the removal of the flexarray member
>> from strlen_data_t.
>>
>> This also patch restores the bool return value for the public
>> get_strlen_range function but with a different meaning (to
>> indicate whether the computed range is suitable as is to rely
>> on for optimization, rather than whether the argument may
>> refer to a flexible array member).
>>
>> The changes to gimple-ssa-sprintf.c involve more indentation
>> adjustments than new functionality so to make the review easier
>> I attach gcc-9-3-gimple-ssa-sprintf.c.diff-b with the white
>> space changes stripped.
>>
>> gcc-9-3.diff
>>
>> [3/4] - Change sprintf to use new get_range_strlen overload
>>
>> gcc/ChangeLog:
>>
>>  * gimple-fold.c (get_range_strlen): Avoid clearing minlen after
>>  recursive call fails for COND_EXPR and GIMPLE_PHI.
>>  Set minlen to ssize_type rather than size_type.  Remove flexarray.
>>  (get_range_strlen): Return bool.
>>  (get_range_strlen): Return bool.  Clear minmaxlen[0].
>>  * gimple-fold.h (strlen_data_t): Remove member.  Update comments.
>>  (get_range_strlen): Return bool.
>>  * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Reset lenrange[0]
>>  when maxlen is unbounded.
>>  * gimple-ssa-sprintf.c (get_string_length): Call new overload of
>>  get_range_strlen.  Adjust max, likely, and unlikely counters for
>>  strings of unbounded lengths.
> This fixes most, but not all of the regressions introduced in patch #2
> (pr79376 continues to regress).  However it introduces a bunch of
> regressions on warn-sprintf-no-nul.c.
I think the warn-sprintf-no-nul.c regressions are just a matter of
failing to set res.nonstr when get_range_strlen finds as non-terminated
string.

That just leaves pr79376 -- I think the test is bogus given the
requirement that we not optimize based on subobject boundaries.  We
can't use the subobject boundaries to set the output range of the snprintf.

Jeff

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

[Vladimir Makarov]

On 10/11/2018 03:23 PM, Peter Bergner wrote:

On 10/11/18 1:18 PM, Peter Bergner wrote:

Ok, after working in gdb, I see that the PA-RISC port still uses reload
and not LRA, but it too seems to have the same issue of reusing input
regs that have REG_DEAD notes, so the question still stands.  It's just
that whatever fix we come up with will have to be to both LRA and reload.

On second thought, I'm thinking we should just leave reload alone and
only fix this in LRA.  That means we'd have to disable the reg copy
handling when not using LRA though, which might be another reason to
get targets to move to LRA?  I've verified the following patch gets
the PA-RISC test case to pass again.  Thoughts?

If ok, I still have to dig into the fails we're seeing on LRA targets.

I think it has a sense because even if LRA has the same problem, it will 
be hard to fix it in reload and LRA.  Nobody worked on reload pass for a 
long time and it is not worth to fix it because we are moving from reload.


I suspect that LRA might be immune to these failures because it 
generates new reload pseudos if it is necessary for insn constraints.  
Plus there is some primitive value numbering in LRA which can avoid the 
problem.


In any case, the patch is ok for me.


* ira-lives (non_conflicting_reg_copy_p): Disable for non LRA targets.

Index: gcc/ira-lives.c
===
--- gcc/ira-lives.c (revision 264897)
+++ gcc/ira-lives.c (working copy)
@@ -1064,6 +1064,10 @@ find_call_crossed_cheap_reg (rtx_insn *i
  rtx
  non_conflicting_reg_copy_p (rtx_insn *insn)
  {
+  /* Disallow this for non LRA targets.  */
+  if (!targetm.lra_p ())
+return NULL_RTX;
+
rtx set = single_set (insn);
  
/* Disallow anything other than a simple register to register copy

[doc PATCH] mention interaction with noinline in flatten

[Martin Sebor]

While writing tests for attribute flatten I wasn't 100% sure
from reading the manual if it would respect attribute noinline
or if it would override it.  Turns out it's the former so
the attached patch mentions it in the manual.  Unless there
are objections I will commit the change tomorrow.

Martin
gcc/ChangeLog:

	* doc/extend.texi (attribute flatten): Mention interaction with
	noinline.

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 0d9b99f..d6f4630 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -2615,8 +2615,9 @@ explicit @code{externally_visible} attributes are still necessary.
 @cindex @code{flatten} function attribute
 Generally, inlining into a function is limited.  For a function marked with
 this attribute, every call inside this function is inlined, if possible.
-Whether the function itself is considered for inlining depends on its size and
-the current inlining parameters.
+Functions declared with attribute @code{noinline} and similar are not
+inlined.  Whether the function itself is considered for inlining depends
+on its size and the current inlining parameters.
 
 @item format (@var{archetype}, @var{string-index}, @var{first-to-check})
 @cindex @code{format} function attribute

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

[Peter Bergner]

On 10/11/18 2:40 PM, Jeff Law wrote:
> On 10/11/18 1:23 PM, Peter Bergner wrote:
>> On 10/11/18 1:18 PM, Peter Bergner wrote:
>>> Ok, after working in gdb, I see that the PA-RISC port still uses reload
>>> and not LRA, but it too seems to have the same issue of reusing input
>>> regs that have REG_DEAD notes, so the question still stands.  It's just
>>> that whatever fix we come up with will have to be to both LRA and reload.
>>
>> On second thought, I'm thinking we should just leave reload alone and
>> only fix this in LRA.  That means we'd have to disable the reg copy
>> handling when not using LRA though, which might be another reason to
>> get targets to move to LRA?  I've verified the following patch gets
>> the PA-RISC test case to pass again.  Thoughts?
>>
>> If ok, I still have to dig into the fails we're seeing on LRA targets.
> Hmmm.  Interesting.  I wonder if all the failing targets were reload
> targets.  If so, this may be the way forward -- I certainly don't
> want to spend much, if any, time fixing reload.
> 
> I'm in the middle of something, but will try to look at each of the
> failing targets and confirm they use reload by default.

These are the easy ones (they default to reload):

bergner@pike:~/gcc/gcc-fsf-mainline/gcc/config$ grep -r TARGET_LRA_P | grep 
false | sort
alpha/alpha.c:#define TARGET_LRA_P hook_bool_void_false
avr/avr.c:#define TARGET_LRA_P hook_bool_void_false
bfin/bfin.c:#define TARGET_LRA_P hook_bool_void_false
c6x/c6x.c:#define TARGET_LRA_P hook_bool_void_false
cr16/cr16.c:#define TARGET_LRA_P hook_bool_void_false
cris/cris.c:#define TARGET_LRA_P hook_bool_void_false
epiphany/epiphany.c:#define TARGET_LRA_P hook_bool_void_false
fr30/fr30.c:#define TARGET_LRA_P hook_bool_void_false
frv/frv.c:#define TARGET_LRA_P hook_bool_void_false
h8300/h8300.c:#define TARGET_LRA_P hook_bool_void_false
ia64/ia64.c:#define TARGET_LRA_P hook_bool_void_false
iq2000/iq2000.c:#define TARGET_LRA_P hook_bool_void_false
lm32/lm32.c:#define TARGET_LRA_P hook_bool_void_false
m32c/m32c.c:#define TARGET_LRA_P hook_bool_void_false
m32r/m32r.c:#define TARGET_LRA_P hook_bool_void_false
m68k/m68k.c:#define TARGET_LRA_P hook_bool_void_false
mcore/mcore.c:#define TARGET_LRA_P hook_bool_void_false
microblaze/microblaze.c:#define TARGET_LRA_P hook_bool_void_false
mmix/mmix.c:#define TARGET_LRA_P hook_bool_void_false
mn10300/mn10300.c:#define TARGET_LRA_P hook_bool_void_false
moxie/moxie.c:#define TARGET_LRA_P hook_bool_void_false
msp430/msp430.c:#define TARGET_LRA_P hook_bool_void_false
nvptx/nvptx.c:#define TARGET_LRA_P hook_bool_void_false
pa/pa.c:#define TARGET_LRA_P hook_bool_void_false
rl78/rl78.c:#define TARGET_LRA_P hook_bool_void_false
spu/spu.c:#define TARGET_LRA_P hook_bool_void_false
stormy16/stormy16.c:#define TARGET_LRA_P hook_bool_void_false
tilegx/tilegx.c:#define TARGET_LRA_P hook_bool_void_false
tilepro/tilepro.c:#define TARGET_LRA_P hook_bool_void_false
vax/vax.c:#define TARGET_LRA_P hook_bool_void_false
visium/visium.c:#define TARGET_LRA_P hook_bool_void_false
xtensa/xtensa.c:#define TARGET_LRA_P hook_bool_void_false

These are harder since they support -mlra:

arc/arc.c:#define TARGET_LRA_P arc_lra_p
ft32/ft32.c:#define TARGET_LRA_P ft32_lra_p
mips/mips.c:#define TARGET_LRA_P mips_lra_p
pdp11/pdp11.c:#define TARGET_LRA_P pdp11_lra_p
powerpcspe/powerpcspe.c:#define TARGET_LRA_P rs6000_lra_p
rx/rx.c:#define TARGET_LRA_Prx_enable_lra
s390/s390.c:#define TARGET_LRA_P s390_lra_p
sh/sh.c:#define TARGET_LRA_P sh_lra_p
sparc/sparc.c:#define TARGET_LRA_P sparc_lra_p

Quickly looking into their *.opt files, the follwoing default to LRA:
  mips, s390
while these default to reload:
  ft32, sh4
and these I'm not sure of without looking deeper:
  arc, pdp11, powerpcspe, rx, sparc

...if that helps.

Peter

Re: [PATCH] Optimize sin(atan(x)) and cos(atan(x)), take 3 (PR tree-optimization/86829)

[Jeff Law]

On 10/9/18 5:29 PM, Giuliano Augusto Faulin Belinassi wrote:
> Fixed all issues pointed in the previous iteration.
> There is now a significant change regarding how the sin(atan(x))
> constant is calculated, as now it checks for which values such that
> computing 1 + x*x won't overflow. There are two reasons for this
> change: (1) Avoid an intermediate infinity value when optimizing
> cos(atan(x)), and (2) avoid the requirement of separate constants for
> sin(atan(x)) and cos(atan(x)), thus making easier to maintain the
> code.
> 
> gcc/ChangeLog
> 
> 2018-10-09  Giuliano Belinassi  
> 
> PR tree-optimization/86829
> * match.pd: Added sin(atan(x)) and cos(atan(x)) simplification rules.
> * real.c (build_sinatan_real): New function to build a constant equal to 
> the
> largest value c such that 1 + c*c will not overflow.
> * real.h (build_sinatan_real): Allows this function to be called 
> externally.
> 
> gcc/testsuite/gcc.dg/ChangeLog
> 
> 2018-10-09  Giuliano Belinassi  
> 
> PR tree-optimization/86829
> * gcc.dg/sinatan-1.c: New test.
> * gcc.dg/sinatan-2.c: New test.
> * gcc.dg/sinatan-3.c: New test.
> 
> There are no tests broken in trunk that seems related to this PR.
THanks.  I've installed this onto the trunk.  It's right at the
borderline of what would require a copyright assignment.  So if you're
going to do further work on GCC you should go ahead and start the
copyright assignment process.

Jeff

[PATCH, doc] describe mode checking for doloop_end pattern

[Paul Koning]

Updated with an additional item I just debugged.

Since the code that uses the doloop_end pattern does not check the operand mode 
as given in the pattern, the pattern itself may need to do this, and that was 
not documented.  In addition, if the doloop_end pattern is a define_expand, 
there must be a define_insn (or define_insn_and_split) matching the generated 
pattern.  I had a define_split instead, and the result was an ICE in loop 
optimization (loop2_done pass).

This patch adds that information.  It also updates the example to reflect this.

Ok for trunk?

paul

ChangeLog:

2018-10-11  Paul Koning  

* doc/md.texi (doloop_end): Document that the pattern code may
need to check operand mode.

Index: md.texi
===
--- md.texi (revision 265042)
+++ md.texi (working copy)
@@ -7619,7 +7619,23 @@ simplified) from the PDP-11 target:
 
 @smallexample
 @group
-(define_insn "doloop_end"
+(define_expand "doloop_end"
+  [(parallel [(set (pc)
+   (if_then_else
+(ne (match_operand:HI 0 "nonimmediate_operand" "+r,!m")
+(const_int 1))
+(label_ref (match_operand 1 "" ""))
+(pc)))
+  (set (match_dup 0)
+   (plus:HI (match_dup 0)
+ (const_int -1)))])]
+  ""
+  "@{
+if (GET_MODE (operands[0]) != HImode)
+  FAIL;
+  @}")
+
+(define_insn "doloop_end_insn"
   [(set (pc)
 (if_then_else
  (ne (match_operand:HI 0 "nonimmediate_operand" "+r,!m")
@@ -7662,10 +7678,23 @@ will be non-negative.
 Since the @code{doloop_end} insn is a jump insn that also has an output,
 the reload pass does not handle the output operand.  Therefore, the
 constraint must allow for that operand to be in memory rather than a
-register.  In the example shown above, that is handled by using a loop
-instruction sequence that can handle memory operands when the memory
-alternative appears.
+register.  In the example shown above, that is handled (in the
+@code{doloop_end_nocc} pattern) by using a loop instruction sequence
+that can handle memory operands when the memory alternative appears.
 
+GCC does not check the mode of the loop register operand when generating
+the @code{doloop_end} pattern.  If the pattern is only valid for some
+modes but not others, the pattern should be a @code{define_expand}
+pattern that checks the operand mode in the preparation code, and issues
+@code{FAIL} if an unsupported mode is found.  The example above does
+this, since the machine instruction to be used only exists for
+@code{HImode}.
+
+If the @code{doloop_end} pattern is a @code{define_expand}, there must
+also be a @code{define_insn} or @code{define_insn_and_split} matching
+the generated pattern.  Otherwise, the compiler will fail during loop
+optimization.
+
 @end ifset
 @ifset INTERNALS
 @node Insn Canonicalizations

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

[Jeff Law]

On 10/11/18 3:05 PM, Peter Bergner wrote:
> On 10/11/18 2:40 PM, Jeff Law wrote:
>> On 10/11/18 1:23 PM, Peter Bergner wrote:
>>> On 10/11/18 1:18 PM, Peter Bergner wrote:
 Ok, after working in gdb, I see that the PA-RISC port still uses reload
 and not LRA, but it too seems to have the same issue of reusing input
 regs that have REG_DEAD notes, so the question still stands.  It's just
 that whatever fix we come up with will have to be to both LRA and reload.
>>>
>>> On second thought, I'm thinking we should just leave reload alone and
>>> only fix this in LRA.  That means we'd have to disable the reg copy
>>> handling when not using LRA though, which might be another reason to
>>> get targets to move to LRA?  I've verified the following patch gets
>>> the PA-RISC test case to pass again.  Thoughts?
>>>
>>> If ok, I still have to dig into the fails we're seeing on LRA targets.
>> Hmmm.  Interesting.  I wonder if all the failing targets were reload
>> targets.  If so, this may be the way forward -- I certainly don't
>> want to spend much, if any, time fixing reload.
>>
>> I'm in the middle of something, but will try to look at each of the
>> failing targets and confirm they use reload by default.
> 
> These are the easy ones (they default to reload):
> 
> bergner@pike:~/gcc/gcc-fsf-mainline/gcc/config$ grep -r TARGET_LRA_P | grep 
> false | sort
> alpha/alpha.c:#define TARGET_LRA_P hook_bool_void_false
> avr/avr.c:#define TARGET_LRA_P hook_bool_void_false
> bfin/bfin.c:#define TARGET_LRA_P hook_bool_void_false
> c6x/c6x.c:#define TARGET_LRA_P hook_bool_void_false
> cr16/cr16.c:#define TARGET_LRA_P hook_bool_void_false
> cris/cris.c:#define TARGET_LRA_P hook_bool_void_false
> epiphany/epiphany.c:#define TARGET_LRA_P hook_bool_void_false
> fr30/fr30.c:#define TARGET_LRA_P hook_bool_void_false
> frv/frv.c:#define TARGET_LRA_P hook_bool_void_false
> h8300/h8300.c:#define TARGET_LRA_P hook_bool_void_false
> ia64/ia64.c:#define TARGET_LRA_P hook_bool_void_false
> iq2000/iq2000.c:#define TARGET_LRA_P hook_bool_void_false
> lm32/lm32.c:#define TARGET_LRA_P hook_bool_void_false
> m32c/m32c.c:#define TARGET_LRA_P hook_bool_void_false
> m32r/m32r.c:#define TARGET_LRA_P hook_bool_void_false
> m68k/m68k.c:#define TARGET_LRA_P hook_bool_void_false
> mcore/mcore.c:#define TARGET_LRA_P hook_bool_void_false
> microblaze/microblaze.c:#define TARGET_LRA_P hook_bool_void_false
> mmix/mmix.c:#define TARGET_LRA_P hook_bool_void_false
> mn10300/mn10300.c:#define TARGET_LRA_P hook_bool_void_false
> moxie/moxie.c:#define TARGET_LRA_P hook_bool_void_false
> msp430/msp430.c:#define TARGET_LRA_P hook_bool_void_false
> nvptx/nvptx.c:#define TARGET_LRA_P hook_bool_void_false
> pa/pa.c:#define TARGET_LRA_P hook_bool_void_false
> rl78/rl78.c:#define TARGET_LRA_P hook_bool_void_false
> spu/spu.c:#define TARGET_LRA_P hook_bool_void_false
> stormy16/stormy16.c:#define TARGET_LRA_P hook_bool_void_false
> tilegx/tilegx.c:#define TARGET_LRA_P hook_bool_void_false
> tilepro/tilepro.c:#define TARGET_LRA_P hook_bool_void_false
> vax/vax.c:#define TARGET_LRA_P hook_bool_void_false
> visium/visium.c:#define TARGET_LRA_P hook_bool_void_false
> xtensa/xtensa.c:#define TARGET_LRA_P hook_bool_void_false
> 
> These are harder since they support -mlra:
> 
> arc/arc.c:#define TARGET_LRA_P arc_lra_p
> ft32/ft32.c:#define TARGET_LRA_P ft32_lra_p
> mips/mips.c:#define TARGET_LRA_P mips_lra_p
> pdp11/pdp11.c:#define TARGET_LRA_P pdp11_lra_p
> powerpcspe/powerpcspe.c:#define TARGET_LRA_P rs6000_lra_p
> rx/rx.c:#define TARGET_LRA_P  rx_enable_lra
> s390/s390.c:#define TARGET_LRA_P s390_lra_p
> sh/sh.c:#define TARGET_LRA_P sh_lra_p
> sparc/sparc.c:#define TARGET_LRA_P sparc_lra_p
> 
> Quickly looking into their *.opt files, the follwoing default to LRA:
>   mips, s390
So the failing targets were aarch64, alpha, arm, sh4, s390, alpha and
hppa.  In theory your patch has a reasonable chance of fixing sh4, alpha
and hppa.  So I suspect we're still going to have the aarch64, arm and
s390 issues.


I've had my tester turned off while we sorted this out.   I'll put your
patch to disable the conflict pruning for non-LRA targets and see what
we get overnight.



jeff

[doc PATCH] using multiple format-arg attributes on a single function (PR 87593)

[Martin Sebor]

Attached is a documentation-only patch to clarify the use case
of multiple distinct format_arg attributes on a single function.
It's far from obvious that the use case makes sense so explicitly
mentioning it should help avoid the mistake of assuming that
accepting it is due to the lack of better checking in the area
(it could also prompt Clang to support the use case -- likely
an omission due to its obscurity).

However, since it makes less sense to declare the same function
multiple times with distinct format_arg attributes, a follow-on
improvement would be to issue a warning on such instances.  I'll
leave the bug open until that's implemented.

Martin
gcc/ChangeLog:

	* doc/extend.texi (attribute format_arg): Discuss using multiple
	attributes on a single function.

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 0d9b99f..6355453 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -2698,13 +2699,15 @@ Target Machines}.
 @item format_arg (@var{string-index})
 @cindex @code{format_arg} function attribute
 @opindex Wformat-nonliteral
-The @code{format_arg} attribute specifies that a function takes a format
-string for a @code{printf}, @code{scanf}, @code{strftime} or
+The @code{format_arg} attribute specifies that a function takes one or
+more format strings for a @code{printf}, @code{scanf}, @code{strftime} or
 @code{strfmon} style function and modifies it (for example, to translate
 it into another language), so the result can be passed to a
 @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style
 function (with the remaining arguments to the format function the same
-as they would have been for the unmodified string).  For example, the
+as they would have been for the unmodified string).  Multiple
+@code{format_arg} attributes may be applied to the same function, each
+designating a distinct parameter as a format string.  For example, the
 declaration:
 
 @smallexample
@@ -2724,6 +2727,11 @@ string argument is not constant; this would generate a warning when
 @option{-Wformat-nonliteral} is used, but the calls could not be checked
 without the attribute.
 
+In calls to a function declared with more than one @code{format_arg}
+attribute, each with a distinct argument value, the corresponding
+actual function arguments are checked against all format strings
+designated by the attributes.
+
 The parameter @var{string-index} specifies which argument is the format
 string argument (starting from one).  Since non-static C++ methods have
 an implicit @code{this} argument, the arguments of such methods should

Re: [PATCH] PR libstdc++/80538 Only call sleep for non-zero values

[Jonathan Wakely]

On 11/10/18 17:37 +0100, Jonathan Wakely wrote:

Avoid a system call when no sleep is required. Sleep in a loop (actually
two loops) to handle interruption by signals.

PR libstdc++/80538
* src/c++11/thread.cc (this_thread::__sleep_for)
[_GLIBCXX_HAVE_SLEEP]: Only call sleep for non-zero values.
Loop while sleep call is interrupted and until steady_clock
shows requested duration has elapsed.
(!_GLIBCXX_HAVE_USLEEP]: Use the _GLIBCXX_HAVE_SLEEP code path, but
avoiding the usleep call.
* testsuite/30_threads/this_thread/60421.cc: Test repeated
signal interruptions.

Tested x86_64-linux (by manually fudging the configure macros to test
the !_GLIBCXX_USE_NANOSLEEP paths).

Committed to trunk.





commit 7cad0b3cbb85a78dce40535f897ba27886469da9
Author: Jonathan Wakely 
Date:   Fri Apr 28 17:43:25 2017 +0100

   PR libstdc++/80538 Only call sleep for non-zero values

   Avoid a system call when no sleep is required. Sleep in a loop (actually
   two loops) to handle interruption by signals.

   PR libstdc++/80538
   * src/c++11/thread.cc (this_thread::__sleep_for)
   [_GLIBCXX_HAVE_SLEEP]: Only call sleep for non-zero values.
   Loop while sleep call is interrupted and until steady_clock
   shows requested duration has elapsed.
   (!_GLIBCXX_HAVE_USLEEP]: Use the _GLIBCXX_HAVE_SLEEP code path, but
   avoiding the usleep call.
   * testsuite/30_threads/this_thread/60421.cc: Test repeated
   signal interruptions.

diff --git a/libstdc++-v3/src/c++11/thread.cc b/libstdc++-v3/src/c++11/thread.cc
index c62cb71bf99..564eae6f166 100644
--- a/libstdc++-v3/src/c++11/thread.cc
+++ b/libstdc++-v3/src/c++11/thread.cc
@@ -194,18 +194,35 @@ namespace this_thread
while (::nanosleep(&__ts, &__ts) == -1 && errno == EINTR)
  { }
#elif defined(_GLIBCXX_HAVE_SLEEP)
-# ifdef _GLIBCXX_HAVE_USLEEP
-::sleep(__s.count());
-if (__ns.count() > 0)
+const auto target = chrono::steady_clock::now() + __s + __ns;
+while (true)
  {
-long __us = __ns.count() / 1000;
-if (__us == 0)
-  __us = 1;
-::usleep(__us);
-  }
+   unsigned secs = __s.count();
+   if (__ns.count() > 0)
+ {
+# ifdef _GLIBCXX_HAVE_USLEEP
+   long us = __ns.count() / 1000;
+   if (us == 0)
+ us = 1;
+   ::usleep(us);
# else
-::sleep(__s.count() + (__ns.count() >= 100));
+   if (__ns.count() > 100 || secs == 0)
+ ++secs; // No sub-second sleep function, so round up.
# endif


I wonder if this would be worthwhile:

--- a/libstdc++-v3/src/c++11/thread.cc
+++ b/libstdc++-v3/src/c++11/thread.cc
@@ -208,6 +208,8 @@ namespace this_thread
# else
   if (__ns.count() > 100 || secs == 0)
 ++secs; // No sub-second sleep function, so round up.
+   else
+ __gthread_yield();
# endif
 }

That way for durations smaller than 1ms we give other threads a chance
to run, instead of sleeping for the __s seconds, looping back to this
test, and then sleeping an entire extra second.

But I'm assuming that systems with no usleep are probably rare, and
can live with rounding up to sleep for a full second.

Re: [doc PATCH] using multiple format-arg attributes on a single function (PR 87593)

[Joseph Myers]

On Thu, 11 Oct 2018, Martin Sebor wrote:

> Attached is a documentation-only patch to clarify the use case
> of multiple distinct format_arg attributes on a single function.
> It's far from obvious that the use case makes sense so explicitly
> mentioning it should help avoid the mistake of assuming that
> accepting it is due to the lack of better checking in the area
> (it could also prompt Clang to support the use case -- likely
> an omission due to its obscurity).

This doc patch is OK (though I wonder if it should mention ngettext 
explicitly as an example of a use case for multiple format_arg 
attributes).

-- 
Joseph S. Myers
jos...@codesourcery.com

[Patch, Fortran] PR58787 ICE (error recovery) in check_proc_interface

[Tobias Burnus]

Next patch, next try …

The problem is the following: We have a use-associated symbol (a 
function) – which is once referenced (by use association).


We now declare a same-name function in the 'contains' section.

gfortran now parses the function name, fetches the symbol and reports 
that one duplicates the function (gfc_error_now). However, it continues 
afterwards and creates a sym_tree in the gfc_current_ns – and duly 
increases the sym->refs to 2.


A bit later, the function gets rejected. (Parsing of the formal 
arguments fails when setting a attribute of a use-associated symbol, but 
I think this doesn't matter. reject_statement() is called, which rolls 
back the symbol, but again, I think that doesn't matter – it just makes 
some other solutions a tad more difficult.)


Now, the contains namespace is cleaned up: As the function name is in 
the namespace's sym_tree, gfc_release_symbol() is invoked.


The symbol itself is not freed (as --refs > 0), but sym->formal_ns is. 
(There are some safety nets, like sym->rev == 2 and sym->ns != 
sym->formal_ns, but they don't help.)


Later, the symbol of the parent's namespace is resolved – and this 
includes resolving the formal arguments. – And accessing freed memory 
might crash gfortran.


As solution, I return early and with an error from get_proc_name(). I 
think that's cleaner than waiting longer – and the early return avoids 
creating the symbol at the first place. (Otherwise, modifications have 
to go beyond rolling back of the symbols; doing refs++ probably helps, 
but is rather intransparent.)



Pro of the early return: Avoids accessing already freed memory, might 
generate shorter error output as some later fails (like for not being 
able to modify attributes of a use-associated symbol) are gone.


Contra: As one returns before entering a procedure, all following lines 
are in the outer scope (usually 'contains') and there probably 
unexpected. Hence, one might get a bunch of follow-up errors which do 
not help.



Build on x86-64 and even more carefully regtested.

OK?

Tobias

2018-10-12  Tobias Burnus 

	PR fortran/58787
	* decl.c (get_proc_name): Return with error before
	creating sym_tree.

	PR fortran/58787
	* gfortran.dg/goacc/pr77765.f90: Modify dg-error.
	* gfortran.dg/interface_42.f90: Ditto.
	* gfortran.dg/internal_references_1.f90: Ditto.
	* gfortran.dg/invalid_procedure_name.f90: Ditto.
	* gfortran.dg/pr65453.f90: Ditto.
	* gfortran.dg/pr77414.f90: Ditto.
	* gfortran.dg/pr78741.f90: Ditto.
	* gfortran.dg/same_name_2.f90: Ditto.

diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c
index 7f79811d152..87c736fb2db 100644
--- a/gcc/fortran/decl.c
+++ b/gcc/fortran/decl.c
@@ -1231,28 +1231,39 @@ get_proc_name (const char *name, gfc_symbol **result, bool module_fcn_entry)
 	  && sym->attr.proc != 0
 	  && (sym->attr.subroutine || sym->attr.function || sym->attr.entry)
 	  && sym->attr.if_source != IFSRC_UNKNOWN)
-	gfc_error_now ("Procedure %qs at %C is already defined at %L",
-		   name, &sym->declared_at);
-
+	{
+	  gfc_error_now ("Procedure %qs at %C is already defined at %L",
+			 name, &sym->declared_at);
+	  return true;
+	}
   if (sym->attr.flavor != 0
 	  && sym->attr.entry && sym->attr.if_source != IFSRC_UNKNOWN)
-	gfc_error_now ("Procedure %qs at %C is already defined at %L",
-		   name, &sym->declared_at);
+	{
+	  gfc_error_now ("Procedure %qs at %C is already defined at %L",
+			 name, &sym->declared_at);
+	  return true;
+	}
 
   if (sym->attr.external && sym->attr.procedure
 	  && gfc_current_state () == COMP_CONTAINS)
-	gfc_error_now ("Contained procedure %qs at %C clashes with "
-			"procedure defined at %L",
-		   name, &sym->declared_at);
+	{
+	  gfc_error_now ("Contained procedure %qs at %C clashes with "
+			 "procedure defined at %L",
+			 name, &sym->declared_at);
+	  return true;
+	}
 
   /* Trap a procedure with a name the same as interface in the
 	 encompassing scope.  */
   if (sym->attr.generic != 0
 	  && (sym->attr.subroutine || sym->attr.function)
 	  && !sym->attr.mod_proc)
-	gfc_error_now ("Name %qs at %C is already defined"
-		   " as a generic interface at %L",
-		   name, &sym->declared_at);
+	{
+	  gfc_error_now ("Name %qs at %C is already defined"
+			 " as a generic interface at %L",
+			 name, &sym->declared_at);
+	  return true;
+	}
 
   /* Trap declarations of attributes in encompassing scope.  The
 	 signature for this is that ts.kind is set.  Legitimate
@@ -1263,8 +1274,11 @@ get_proc_name (const char *name, gfc_symbol **result, bool module_fcn_entry)
 	  && gfc_current_ns->parent != NULL
 	  && sym->attr.access == 0
 	  && !module_fcn_entry)
-	gfc_error_now ("Procedure %qs at %C has an explicit interface "
+	{
+	  gfc_error_now ("Procedure %qs at %C has an explicit interface "
 		   "from a previous declaration",  name);
+	  return true;
+	}
 }
 
   /* C1246 (R1225) MODULE shall appear only in the function-stmt or
@@ -1276,17 +1290,23 @@ get_proc_na

[PATCH] v3: C++: simplify output from suggest_alternatives_for

[David Malcolm]

On Thu, 2018-10-11 at 10:31 -0400, Jason Merrill wrote:
> On Thu, Oct 11, 2018 at 10:28 AM Jason Merrill 
> wrote:
> > 
> > On Wed, Oct 10, 2018 at 5:01 PM David Malcolm 
> > wrote:
> > > On Tue, 2018-10-09 at 18:38 -0400, Jason Merrill wrote:
> > > > On Tue, Oct 9, 2018 at 1:19 PM David Malcolm  > > > om>
> > > > wrote:
> > > > > +  /* Emulation of a "move" constructor, but really a copy
> > > > > + constructor.  */
> > > > > +
> > > > > +  name_hint (const name_hint &other)
> > > > > +  : m_suggestion (other.m_suggestion),
> > > > > +m_deferred (const_cast
> > > > > (other).take_deferred ())
> > > > > +  {
> > > > > +  }
> > > > > +
> > > > > +  /* Emulation of "move" assigment, but really copy
> > > > > assignment.  */
> > > > > +
> > > > > +  name_hint& operator= (const name_hint &other)
> > > > > +  {
> > > > > +m_suggestion = other.m_suggestion;
> > > > > +m_deferred = const_cast
> > > > > (other).take_deferred ();
> > > > > +return *this;
> > > > > +  }
> > > > > +
> > > > > +  /* Take ownership of this name_hint's deferred_diagnostic,
> > > > > for
> > > > > use
> > > > > + in chaining up deferred diagnostics.  */
> > > > > +  gnu::unique_ptr take_deferred () {
> > > > > return
> > > > > move (m_deferred); }
> > > > 
> > > > Why do you want to propagate this hackery into name_hint?  I
> > > > would
> > > > expect the defaulted special member functions to do the right
> > > > thing
> > > > with m_deferred: in -std=c++98 the implicit copy ops call the
> > > > gnu::unique_ptr copy ops that actually move, and in -std=c++11
> > > > and up
> > > > we're calling the move constructor for std::unique_ptr, which
> > > > does
> > > > the
> > > > right thing.
> > > > 
> > > > This also doesn't limit the hack to C++98 mode the way unique-
> > > > ptr.h
> > > > does.
> > > > 
> > > > Jason
> > > 
> > > Thanks for looking at this.
> > > 
> > > I ran into issues trying to pass around name_hint instances:
> > > 
> > > ../../src/gcc/cp/name-lookup.c: In function 'name_hint
> > > suggest_alternatives_in_other_namespaces(location_t, tree)':
> > > ../../src/gcc/cp/name-lookup.c:5591:52: error: use of deleted
> > > function 'name_hint::name_hint(const name_hint&)'
> > > 5591 |   return ns_hints.maybe_decorate_with_limit (result);
> > >  |^
> > > In file included from ../../src/gcc/cp/name-lookup.c:36:
> > > ../../src/gcc/c-family/name-hint.h:91:7: note:
> > > 'name_hint::name_hint(const name_hint&)' is implicitly deleted
> > > because the default definition would be ill-formed:
> > > 91 | class name_hint
> > >|   ^
> > > ../../src/gcc/c-family/name-hint.h:91:7: error: use of deleted
> > > function 'std::unique_ptr<_Tp, _Dp>::unique_ptr(const
> > > std::unique_ptr<_Tp, _Dp>&) [with _Tp = deferred_diagnostic; _Dp
> > > = std::default_delete]'
> > > In file included from /home/david/coding/gcc-python/gcc-svn-
> > > trunk/install-dogfood/include/c++/9.0.0/memory:80,
> > >  from ../../src/gcc/../include/unique-ptr.h:78,
> > >  from ../../src/gcc/system.h:730,
> > >  from ../../src/gcc/cp/name-lookup.c:23:
> > > /home/david/coding/gcc-python/gcc-svn-trunk/install-
> > > dogfood/include/c++/9.0.0/bits/unique_ptr.h:394:7: note: declared
> > > here
> > > 394 |   unique_ptr(const unique_ptr&) = delete;
> > > |   ^~
> > > ../../src/gcc/cp/name-lookup.c:5512:1: note:   initializing
> > > argument 1 of 'name_hint
> > > namespace_hints::maybe_decorate_with_limit(name_hint)'
> > > 5512 | namespace_hints::maybe_decorate_with_limit (name_hint
> > > hint)
> > >  | ^~~
> > > 
> > > I can't use the default copy constructor or assignment operators
> > > for an
> > > object containing a gnu::unique_ptr on C++11, as std::unique_ptr
> > > has:
> > > 
> > >   // Disable copy from lvalue.
> > >   unique_ptr(const unique_ptr&) = delete;
> > >   unique_ptr& operator=(const unique_ptr&) = delete;
> > > 
> > > If I understand things right, in C++11 I should be using move
> > > construction/move assignment for this.
> > > 
> > > I can't write "&&" in the function params to explicitly request
> > > an
> > > rvalue-reference, as the code need to be compatible with C++98.
> > > 
> > > std::move is only defined in C++11 onwards.
> > > 
> > > Our include/unique-ptr.h defines a gnu::move: for C++11 it's
> > > std::move,
> > > but for C++98 it's only defined for the unique_ptr template.
> > > 
> > > A solution that seems to work appears to be to define gnu::move
> > > for
> > > C++98 for all types rather than just gnu::unique_ptr,
> > > implementing it
> > > in terms of copying an object via lvalue reference, so that we
> > > can
> > > explicitly request a move using "gnu::move" (==std::move on C++),
> > > without using C++11 syntax, and falling back to a copy on C++98
> > > (which effectively moves the ptr from the "victim").
> > > 
> > > Does that sound sane?
> > 
> 

[PATCH] PR libstdc++/77691 increase allocation size to at least alignment

[Jonathan Wakely]

It's not safe to assume that malloc(n) returns memory aligned to more
than n, so when relying on the guaranteed alignment of malloc ensure
that the number of bytes allocated is at least as large as the
alignment.

PR libstdc++/77691
* include/experimental/memory_resource (__resource_adaptor_imp): Do
not allocate sizes smaller than alignment when relying on guaranteed
alignment.
* testsuite/experimental/memory_resource/new_delete_resource.cc:
Adjust expected number of bytes allocated for alignof(max_align_t).

Tested x86_64-linux, committed to trunk.

commit 100292bfb473df26817d99ffa56ad6728177732b
Author: Jonathan Wakely 
Date:   Fri Oct 12 00:10:27 2018 +0100

PR libstdc++/77691 increase allocation size to at least alignment

It's not safe to assume that malloc(n) returns memory aligned to more
than n, so when relying on the guaranteed alignment of malloc ensure
that the number of bytes allocated is at least as large as the
alignment.

PR libstdc++/77691
* include/experimental/memory_resource (__resource_adaptor_imp): Do
not allocate sizes smaller than alignment when relying on guaranteed
alignment.
* testsuite/experimental/memory_resource/new_delete_resource.cc:
Adjust expected number of bytes allocated for alignof(max_align_t).

diff --git a/libstdc++-v3/include/experimental/memory_resource 
b/libstdc++-v3/include/experimental/memory_resource
index ccb45bfa335..fd40d2cf45b 100644
--- a/libstdc++-v3/include/experimental/memory_resource
+++ b/libstdc++-v3/include/experimental/memory_resource
@@ -421,7 +421,12 @@ namespace pmr {
   do_allocate(size_t __bytes, size_t __alignment) override
   {
if (__alignment <= __guaranteed_alignment<_Alloc>::value)
- return _M_alloc.allocate(__bytes);
+ {
+   if (__bytes < __alignment)
+ __bytes = __alignment;
+   return _M_alloc.allocate(__bytes);
+ }
+
 
const _AlignMgr __mgr(__bytes, __alignment);
// Assume _M_alloc returns 1-byte aligned memory, so allocate enough
@@ -437,6 +442,8 @@ namespace pmr {
auto __ptr = static_cast(__p);
if (__alignment <= __guaranteed_alignment<_Alloc>::value)
  {
+   if (__bytes < __alignment)
+ __bytes = __alignment;
_M_alloc.deallocate(__ptr, __bytes);
return;
  }
diff --git 
a/libstdc++-v3/testsuite/experimental/memory_resource/new_delete_resource.cc 
b/libstdc++-v3/testsuite/experimental/memory_resource/new_delete_resource.cc
index 11667b1d138..3af3861d1a0 100644
--- a/libstdc++-v3/testsuite/experimental/memory_resource/new_delete_resource.cc
+++ b/libstdc++-v3/testsuite/experimental/memory_resource/new_delete_resource.cc
@@ -109,11 +109,13 @@ test03()
   using std::size_t;
   void* p = nullptr;
 
+  auto max = [](int n, int a) { return n > a ? n : a; };
+
   bytes_allocated = 0;
 
   memory_resource* r1 = new_delete_resource();
-  p = r1->allocate(1);
-  VERIFY( bytes_allocated == 1 );
+  p = r1->allocate(1); // uses alignment = alignof(max_align_t)
+  VERIFY( bytes_allocated <= alignof(max_align_t) );
   VERIFY( aligned(p) );
   r1->deallocate(p, 1);
   VERIFY( bytes_allocated == 0 );
@@ -125,13 +127,13 @@ test03()
   VERIFY( bytes_allocated == 0 );
 
   p = r1->allocate(3, alignof(short));
-  VERIFY( bytes_allocated == 3 );
+  VERIFY( bytes_allocated == max(3, alignof(short)) );
   VERIFY( aligned(p) );
   r1->deallocate(p, 3, alignof(short));
   VERIFY( bytes_allocated == 0 );
 
   p = r1->allocate(4, alignof(long));
-  VERIFY( bytes_allocated == 4 );
+  VERIFY( bytes_allocated == max(4, alignof(long)) );
   VERIFY( aligned(p) );
   r1->deallocate(p, 4, alignof(long));
   VERIFY( bytes_allocated == 0 );

Re: C++ PATCH to implement C++20 P0892R2 - explicit(bool) [v2]

[Marek Polacek]

On Thu, Oct 11, 2018 at 11:35:23AM -0400, Jason Merrill wrote:
> > +   /* [dcl.fct.spec]
> > +  "the constant-expression, if supplied, shall be a contextually
> > +  converted constant expression of type bool."  */
> > +   expr = build_explicit_specifier (expr, tf_warning_or_error);
> > +   /* We could evaluate it -- mark the decl as appropriate.  */
> > +   if (expr == boolean_true_node)
> > + set_and_check_decl_spec_loc (decl_specs, ds_explicit, token);
> > +   else if (explicit_specifier)
> > + /* The expression was value-dependent.  Remember it so that we can
> > +substitute it later.  */
> > + *explicit_specifier = expr;
> 
> What if expr == boolean_false_node?

Then we proceed like no explicit was present and the decl isn't marked as
explicit/nonconverting.  Perhaps I could have made this clearer with

  else if (expr == boolean_true_node)
/* Don't mark the decl as explicit.  */;

or somesuch.
 
> > +  /* Handle explicit(dependent-expr).  */
> > +  if (DECL_HAS_DEPENDENT_EXPLICIT_SPEC_P (t))
> > +   {
> > + tree spec = lookup_explicit_specifier (t);
> > + spec = tsubst_copy_and_build (spec, args, complain, in_decl,
> > +   /*function_p=*/false,
> > +   /*i_c_e_p=*/true);
> > + spec = build_explicit_specifier (spec, complain);
> > + DECL_NONCONVERTING_P (t) = (spec == boolean_true_node);
> > +   }
> 
> What if spec is still dependent, e.g. after partial substitution of a
> member template?

Something like this?

template struct A {
  template
  explicit(N) operator T();
};

void
bar ()
{
  A a;
  int i = a;
}

This also seemed to work: if spec is still dependent, the decl isn't marked as
DECL_NONCONVERTING_P, and we'll try again after deduction (fn_type_unification
in add_template_candidate).

Marek

C++ PATCH for c++/87594, constexpr rejects-valid with range-based for

[Marek Polacek]

Here potential_constant_expression_1 rejects the testcase because the body of
the for loop calls a non-constexpr function.  But the range is empty so the
function would never get called.
The trick with evaluating the for-condition doesn't work here, because we're
dealing with a converted range-based for and can't evaluate

  __for_begin != __for_end

because the constexpr cache doesn't have the values of these two VAR_DECLs.

So either we can use this ugly hack (more specialized), or just not check the
body of the loop (more general), similarly to what we do (don't do) with
switch.

Bootstrapped/regtested on x86_64-linux, ok for trunk?

2018-10-11  Marek Polacek  

PR c++/87594 - constexpr rejects-valid with range-based for.
* constexpr.c (potential_constant_expression_1) : Return
true for a converted ange-based for-statement.

* g++.dg/cpp1y/constexpr-loop8.C: New test.

diff --git gcc/cp/constexpr.c gcc/cp/constexpr.c
index 4fa8c965a9d..685ca743859 100644
--- gcc/cp/constexpr.c
+++ gcc/cp/constexpr.c
@@ -5827,6 +5827,17 @@ potential_constant_expression_1 (tree t, bool want_rval, 
bool strict, bool now,
tmp = cxx_eval_outermost_constant_expr (tmp, true);
  if (integer_zerop (tmp))
return true;
+ /* See if this is
+__for_begin != __for_end
+cp_convert_range_for created for us.  If so, this is a converted
+range-based for-statement, and we're not able to evaluate this
+condition, so we might end up skipping the body entirely.  */
+ else if (TREE_CODE (tmp) == NE_EXPR
+  && VAR_P (TREE_OPERAND (tmp, 0))
+  && DECL_NAME (TREE_OPERAND (tmp, 0)) == for_begin_identifier
+  && VAR_P (TREE_OPERAND (tmp, 1))
+  && DECL_NAME (TREE_OPERAND (tmp, 1)) == for_end_identifier)
+   return true;
}
   if (!RECUR (FOR_EXPR (t), any))
return false;
diff --git gcc/testsuite/g++.dg/cpp1y/constexpr-loop8.C 
gcc/testsuite/g++.dg/cpp1y/constexpr-loop8.C
index e69de29bb2d..bf132f2484e 100644
--- gcc/testsuite/g++.dg/cpp1y/constexpr-loop8.C
+++ gcc/testsuite/g++.dg/cpp1y/constexpr-loop8.C
@@ -0,0 +1,44 @@
+// PR c++/87594
+// { dg-do compile { target c++14 } }
+
+constexpr bool always_false() { return false; }
+int f() { return 1; }
+
+constexpr int
+fn1()
+{
+  struct empty_range {
+constexpr int* begin() { return 0; }
+constexpr int* end() { return 0; }
+  } e;
+  for (auto x : e)
+f();
+  return 0;
+}
+
+constexpr int
+fn2 ()
+{
+  int a[] = { 1, 2, 3 };
+  for (auto x : a)
+f(); // { dg-error "call to non-.constexpr. function" }
+  return 0;
+}
+
+constexpr int
+fn3 ()
+{
+  __extension__ int a[] = { };
+  for (auto x : a)
+f();
+  return 0;
+}
+
+
+void
+bar ()
+{
+  constexpr int i1 = fn1 ();
+  constexpr int i2 = fn2 (); // { dg-message "in .constexpr. expansion of " }
+  constexpr int i3 = fn3 ();
+}

C++ PATCH to add test to cover case RANGE_FOR_STMT

[Marek Polacek]

Recently it came up that no test in the testsuite triggers the RANGE_FOR_STMT
case in potential_constant_expression_1.  I came up with this valid test that
tickles that codepath.

I can't use ({ }) instead of a lambda because the constexpr machinery doesn't
handle statement expressions; see default: in cxx_eval_constant_expression.

Tested on x86_64-linux, ok for trunk?

2018-10-11  Marek Polacek  

* g++.dg/cpp1z/constexpr-lambda22.C: New test,

diff --git gcc/testsuite/g++.dg/cpp1z/constexpr-lambda22.C 
gcc/testsuite/g++.dg/cpp1z/constexpr-lambda22.C
index e69de29bb2d..8bb473431a5 100644
--- gcc/testsuite/g++.dg/cpp1z/constexpr-lambda22.C
+++ gcc/testsuite/g++.dg/cpp1z/constexpr-lambda22.C
@@ -0,0 +1,20 @@
+// { dg-do compile }
+// { dg-options -std=c++17 }
+
+#define SA(X) static_assert((X),#X)
+
+template
+constexpr int
+foo ()
+{
+  constexpr int a[] = { 1, 2, 3, 4, 5 };
+  int i = 0;
+  auto j = [&] {
+for (auto x : a)
+  i++;
+return i;
+  }();
+  return j;
+}
+
+SA (foo() == 5);

C++ PATCH for decomp31.C test

[Marek Polacek]

Running make check-c++ RUNTESTFLAGS=dg.exp=decomp31.C will yield
# of unsupported tests  3
because the test (as the only one in cpp1z/) uses
"dg-do compile { target c++17 }" which doesn't work (yet?).  This patch
makes it use explicit dg-options as in other tests, so now we get
# of expected passes1

Tested on x86_64-linux, ok for trunk?

2018-10-11  Marek Polacek  

* g++.dg/cpp1z/decomp31.C: Use explicit dg-options.

--- gcc/testsuite/g++.dg/cpp1z/decomp31.C
+++ gcc/testsuite/g++.dg/cpp1z/decomp31.C
@@ -1,5 +1,6 @@
 // PR c++/81888
-// { dg-do compile { target c++17 } }
+// { dg-do compile }
+// { dg-options "-std=c++17" }
 
 struct S {
   bool s = true;