Re: [PATCH] Optionally sanitize globals in user-defined sections
On 04/17/2015 08:29 PM, Andi Kleen wrote:
Yury Gribov writes:
+
+static bool
+section_sanitized_p (const char *sec)
+{
+ if (!sanitized_sections)
+return false;
+ size_t len = strlen (sec);
+ const char *p = sanitized_sections;
+ while ((p = strstr (p, sec)))
+{
+ if ((p == sanitized_sections || p[-1] == ',')
+ && (p[len] == 0 || p[len] == ','))
+ return true;
No wildcard support? That may be a long option in some cases.
Right. Do you think * will be enough or we also need ? and [a-f] syntax?
-Y
Re: [Patch, fortran] PR65792 unitialized structure constructor array subcomponent
> Snip > Both patches have been regression tested on trunk on x86_64-linux. > > OK for trunk [first patch]? > OK for 4.9 and 5 (after the 5.1 release) [second patch]? > > Mikael > > PS: Dominiq reported that the variant of this patch posted on the PR was > also fixing PR49324. I couldn't confirm as what seems to be the > remaining testcase there (comment #6) doesn't fail with trunk here. I have tested both patches on my working tree and on a clean one, but only on top of the [better patch] for pr61831, without the hunk @@ -4990,7 +5010,7 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * tmp = gfc_deallocate_alloc_comp (e->ts.u.derived, tmp, parm_rank); - gfc_add_expr_to_block (&se->post, tmp); + gfc_prepend_expr_to_block (&se->post, tmp); } /* Add argument checking of passing an unallocated/NULL actual to as said in pr61831 comment 45 (the above hunk causes a regression for gfortran.dg/alloc_comp_assign_10.f90). AFAICT this is the [better patch] which fixes PR49324. Now Andre Vehreschild has submitted a patch for pr59678 at https://gcc.gnu.org/ml/fortran/2015-04/msg00061.html. Andre's patch works well with the [second patch]+[better patch], but leads to a regression for gfortran.dg/class_19.f03 (pr65792 comment 3) with the [first patch]+[better patch]. So if the [first patch] is chosen, it will require some change(s) in Andre’s patch. Thanks for working on these issues, Dominique
Re: [Patch, Fortran, PR58586, v1] ICE with derived type with allocatable component passed by value
Hello,
Le 15/04/2015 20:03, Andre Vehreschild a écrit :
> by accident I patched this pr. For short, when a structure constructor for a
> structure with an allocatable component or a function returning a type with an
> allocatable component is passed as actual argument to a function, then
> gfortran
> ICEs. This patch fixes, both the ICE and a segfault at runtime.
>
> I was pointed to the patch in comment #44 of pr61831 which seemingly fixes the
> #3 comment of pr58586, too, but causes a memory leak. I therefore like to
> point
> out, that adding the a->expr.expr_type != EXPR_STRUCTURE of Mikael's patch in
> pr61831 should not be added to trans-expr.c::gfc_conv_procedure_call (), when
> this patch for 58586 is applied.
Note that I plan to submit the pr61831 patch soon, and that the comment
#44 patch doesn't have the a->expr.expr_type != EXPR_STRUCTURE (in
opposition to precedent patches).
I hope that means the patches are compatible. ;-)
>
> diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c
> index 9e6432f..80dfed1 100644
> --- a/gcc/fortran/trans-expr.c
> +++ b/gcc/fortran/trans-expr.c
> @@ -5344,8 +5344,19 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym,
> && (e->expr_type != EXPR_VARIABLE && !e->rank))
> {
> int parm_rank;
> - tmp = build_fold_indirect_ref_loc (input_location,
> - parmse.expr);
> + /* It is known the e returns a structure type with at least one
> + allocatable component. When e is a function, ensure that the
> + function is called once only by using a temporary variable. */
> + if (e->expr_type == EXPR_FUNCTION)
> + parmse.expr = gfc_evaluate_now_loc (input_location,
> + parmse.expr, &se->pre);
You need not limit this to functions only.
I think you can even do this without condition.
> +
> + if (POINTER_TYPE_P (TREE_TYPE (parmse.expr)))
This distinguishes arguments with/without value attribute, right?
I think it's better to use the frontend information here (fsym->attr.value).
> + tmp = build_fold_indirect_ref_loc (input_location,
> +parmse.expr);
> + else
> + tmp = parmse.expr;
> +
> parm_rank = e->rank;
> switch (parm_kind)
> {
Otherwise, this looks good. Can you post an updated patch taking the
above comments into account?
Ah, and don't forget to provide a ChangeLog entry with it.
Mikael
[Patch, fortran] merge two gfc_trans_scalar_assign flags
Hello,
while working on pr65792, I noticed that gfc_trans_scalar_assign's
l_is_temp and dealloc flags are used only once, and at the same place.
This patch merges them together.
The calls are changed from
gfc_trans_scalar_assign (...blah..., foo, x, bar);
to
gfc_trans_scalar_assign (...blah..., x, !foo && bar);
As foo is most of the time either true or false, this is a simplification.
regression tested on x86-64-unknown-linux-gnu.
OK for post 5.1 trunk?
Mikael
2015-04-19 Mikael Morin
* trans.h (gfc_trans_scalar_assign): Remove fourth argument.
* trans-expr.c (gfc_trans_scalar_assign): Merge fourth into sixth
argument.
(gfc_conv_subref_array_arg, gfc_trans_subarray_assign,
gfc_trans_subcomponent_assign, gfc_trans_assignment_1): Update callers.
* trans-array.c (gfc_conv_expr_descriptor): Ditto.
* trans-stmt.c (forall_make_variable_temp,
generate_loop_for_temp_to_lhs, generate_loop_for_rhs_to_temp,
gfc_trans_where_assign, gfc_trans_where_3): Ditto.
Index: trans-array.c
===
--- trans-array.c (révision 221972)
+++ trans-array.c (copie de travail)
@@ -6760,9 +6760,9 @@ gfc_conv_expr_descriptor (gfc_se *se, gfc_expr *ex
gfc_add_block_to_block (&block, &lse.pre);
lse.string_length = rse.string_length;
- tmp = gfc_trans_scalar_assign (&lse, &rse, expr->ts, true,
+ tmp = gfc_trans_scalar_assign (&lse, &rse, expr->ts,
expr->expr_type == EXPR_VARIABLE
- || expr->expr_type == EXPR_ARRAY, true);
+ || expr->expr_type == EXPR_ARRAY, false);
gfc_add_expr_to_block (&block, tmp);
/* Finish the copying loops. */
Index: trans-expr.c
===
--- trans-expr.c (révision 221972)
+++ trans-expr.c (copie de travail)
@@ -4191,7 +4191,7 @@ gfc_conv_subref_array_arg (gfc_se * parmse, gfc_ex
if (intent != INTENT_OUT)
{
- tmp = gfc_trans_scalar_assign (&lse, &rse, expr->ts, true, false, true);
+ tmp = gfc_trans_scalar_assign (&lse, &rse, expr->ts, false, false);
gfc_add_expr_to_block (&body, tmp);
gcc_assert (rse.ss == gfc_ss_terminator);
gfc_trans_scalarizing_loops (&loop, &body);
@@ -4298,7 +4298,7 @@ gfc_conv_subref_array_arg (gfc_se * parmse, gfc_ex
gcc_assert (lse.ss == gfc_ss_terminator);
- tmp = gfc_trans_scalar_assign (&lse, &rse, expr->ts, false, false, true);
+ tmp = gfc_trans_scalar_assign (&lse, &rse, expr->ts, false, true);
gfc_add_expr_to_block (&body, tmp);
/* Generate the copying loops. */
@@ -6504,7 +6504,7 @@ gfc_trans_subarray_assign (tree dest, gfc_componen
gfc_conv_expr (&rse, expr);
- tmp = gfc_trans_scalar_assign (&lse, &rse, cm->ts, true, false, true);
+ tmp = gfc_trans_scalar_assign (&lse, &rse, cm->ts, false, false);
gfc_add_expr_to_block (&body, tmp);
gcc_assert (rse.ss == gfc_ss_terminator);
@@ -6977,7 +6977,7 @@ gfc_trans_subcomponent_assign (tree dest, gfc_comp
if (cm->ts.type == BT_CHARACTER)
lse.string_length = cm->ts.u.cl->backend_decl;
lse.expr = dest;
- tmp = gfc_trans_scalar_assign (&lse, &se, cm->ts, true, false, true);
+ tmp = gfc_trans_scalar_assign (&lse, &se, cm->ts, false, false);
gfc_add_expr_to_block (&block, tmp);
}
return gfc_finish_block (&block);
@@ -7882,7 +7882,7 @@ gfc_conv_string_parameter (gfc_se * se)
tree
gfc_trans_scalar_assign (gfc_se * lse, gfc_se * rse, gfc_typespec ts,
- bool l_is_temp, bool deep_copy, bool dealloc)
+ bool deep_copy, bool dealloc)
{
stmtblock_t block;
tree tmp;
@@ -7931,7 +7931,7 @@ gfc_trans_scalar_assign (gfc_se * lse, gfc_se * rs
the same as the rhs. This must be done following the assignment
to prevent deallocating data that could be used in the rhs
expression. */
- if (!l_is_temp && dealloc)
+ if (dealloc)
{
tmp_var = gfc_evaluate_now (lse->expr, &lse->pre);
tmp = gfc_deallocate_alloc_comp_no_caf (ts.u.derived, tmp_var, 0);
@@ -9013,9 +9013,9 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr
}
tmp = gfc_trans_scalar_assign (&lse, &rse, expr1->ts,
- l_is_temp || init_flag,
expr_is_variable (expr2) || scalar_to_array
- || expr2->expr_type == EXPR_ARRAY, dealloc);
+ || expr2->expr_type == EXPR_ARRAY,
+ !(l_is_temp || init_flag) && dealloc);
gfc_add_expr_to_block (&body, tmp);
if (lss == gfc_ss_terminator)
@@ -9056,7 +9056,7 @@ gfc_trans_assignment_1 (gfc_expr * expr1, gfc_expr
rse.string_length = string_length;
tmp = gfc_trans_scalar_assign (&lse, &rse, expr1->ts,
- false, false, dealloc);
+ false, dealloc);
gfc_add_expr_to_block (&body, tmp);
}
Index: trans-stmt.c
===
--- trans-stmt.c (révision 221973)
+++ trans-stmt.c (copie de travail)
@@ -2835,8 +2835,8 @@ forall_make_var
[wwwdocs] Remove extra SD-6 column in C++14 language stats.
I accidentally added an extra column to the C++14 language stats by duplicating a column for the SD-6 feature test macros. This one-liner fixes it. I'll need someone to apply this... Sorry. Ed ? class_key.txt ? help ? patch ? patch_cxx14 ? patch_cxx14_2 ? patch_cxx14_3 ? patch_cxx1y ? patch_feature_test ? patch_feature_test_2 ? patch_has_attribute ? htdocs/projects/patch_cxx1y Index: htdocs/projects/cxx1y.html === RCS file: /cvs/gcc/wwwdocs/htdocs/projects/cxx1y.html,v retrieving revision 1.22 diff -r1.22 cxx1y.html 142d141 < __has_cpp_attribute(deprecated) >= 201309
Re: [PATCH] Optionally sanitize globals in user-defined sections
On Sun, Apr 19, 2015 at 10:54:57AM +0300, Yury Gribov wrote:
> On 04/17/2015 08:29 PM, Andi Kleen wrote:
> >Yury Gribov writes:
> >>+
> >>+static bool
> >>+section_sanitized_p (const char *sec)
> >>+{
> >>+ if (!sanitized_sections)
> >>+return false;
> >>+ size_t len = strlen (sec);
> >>+ const char *p = sanitized_sections;
> >>+ while ((p = strstr (p, sec)))
> >>+{
> >>+ if ((p == sanitized_sections || p[-1] == ',')
> >>+ && (p[len] == 0 || p[len] == ','))
> >>+ return true;
> >
> >No wildcard support? That may be a long option in some cases.
>
> Right. Do you think * will be enough or we also need ? and [a-f] syntax?
libiberty contains and gcc build utilities already use fnmatch, so you
should just use that (with carefully chosen FNM_* options).
Jakub
[patch, fortran] PR 37131
Hello world,
here is the first installation of the matmul inlining patch.
This patch calculates c=MATMUL(a,b) using DO loops where there is no
dependency between a and c/b and c loops, taking care of realloc on
assignment and bounds checking (using the same error messages that the
library does), and does not cause any regressions in the test suite.
There are several directions this should be extended at a later date:
- Remove unneeded bounds checking for the individual array accesses
- Add handling of TRANSPOSE of the arguments
- Add handling of temporaries for arguments, where needed
However, I think the patch is useful as it is now, and can go
into trunk.
So: OK for trunk?
Thomas
2015-04-19 Thomas Koenig
PR fortran/37131
* gfortran.h (gfc_isym_id): Add GFC_ISYM_FE_RUNTIME_ERROR.
(gfc_array_spec): Add resolved flag.
(gfc_intrinsic_sym): Add vararg.
* intrinsic.h (gfc_check_fe_runtime_error): Add prototype.
(gfc_resolve_re_runtime_error): Likewise.
Add prototype for gfc_is_reallocatable_lhs.
* array.c (gfc_resolve_array_spec): Do not resolve if it has
already been resolved.
* trans-array.h (gfc_is_reallocatable_lhs): Remove prototype.
* check.c (gfc_check_fe_runtime_error): New function.
* intrinsic.c (add_sym_1p): New function.
(make_vararg): New function.
(add_subroutines): Add fe_runtime_error.
(gfc_intrinsic_sub_interface): Skip sorting for variable number
of arguments.
* iresolve.c (gfc_resolve_fe_runtime_error): New function.
* lang.opt (inline-matmul-limit): New option.
(gfc_post_options): If no inline matmul limit has been set and
BLAS is called externally, use the BLAS limit.
* simplify.c (simplify_bound): Get constant lower bounds from
array spec for assumed shape arrays.
* frontend-passes.c: Include intrinsic.h.
(var_num): New global counter for naming temporary variablbles.
(matrix_case): Enum for differentiating the different matmul
cases.
(realloc_string_callback): Add "trim" to the variable name.
(create_var): Add optional argument vname as part of the name.
Use var_num. Set dimension of result correctly. Split off block
creation into
(insert_block): New function.
(cfe_expr_0): Use "fcn" as part of temporary variable name.
(optimize_namesapce): Also set gfc_current_ns. Call
optimize_matmul_assign.
(combine_array_constructor): Use "constr" as part of
temporary name.
(get_array_inq_function): New function.
(build_logical_expr): New function.
(get_operand): new function.
(inline_limit_check): New function.
(runtime_error_ne): New function.
(matmul_lhs_realloc): New function.
(is_functino_or_op): New function.
(has_function_or_op): New function.
(freeze_expr): New function.
(freeze_references): New function.
(convert_to_index_kind): New function.
(create_do_loop): New function.
(get_size_m1): New function.
(scalarized_expr): New function.
(optimize_matmul_assign): New function.
* simplify.c (simplify_bound): Simplify the case of the
lower bound of an assumed-shape argument.
2015-04-19 Thomas Koenig
PR fortran/37131
* gfortran.dg/dependency_26.f90: Add option to suppress inlining
matmul.
* gfortran.dg/function_optimize_1.f90: Likewise.
* gfortran.dg/function_optimize_2.f90: Likewise.
* gfortran.dg/function_optimize_5.f90: Likewise.
* gfortran.dg/function_optimize_7.f90: Likewise.
* gfortran.dg/inline_matmul_1.f90: New test.
* gfortran.dg/inline_matmul_2.f90: New test.
* gfortran.dg/inline_matmul_3.f90: New test.
* gfortran.dg/inline_matmul_4.f90: New test.
Index: fortran/array.c
===
--- fortran/array.c (Revision 18)
+++ fortran/array.c (Arbeitskopie)
@@ -338,6 +338,9 @@ gfc_resolve_array_spec (gfc_array_spec *as, int ch
if (as == NULL)
return true;
+ if (as->resolved)
+return true;
+
for (i = 0; i < as->rank + as->corank; i++)
{
e = as->lower[i];
@@ -364,6 +367,8 @@ gfc_resolve_array_spec (gfc_array_spec *as, int ch
}
}
+ as->resolved = true;
+
return true;
}
Index: fortran/check.c
===
--- fortran/check.c (Revision 18)
+++ fortran/check.c (Arbeitskopie)
@@ -5527,7 +5527,37 @@ gfc_check_random_seed (gfc_expr *size, gfc_expr *p
return true;
}
+bool
+gfc_check_fe_runtime_error (gfc_actual_arglist *a)
+{
+ gfc_expr *e;
+ int len, i;
+ int num_percent, nargs;
+ e = a->expr;
+ if (e->expr_type != EXPR_CONSTANT)
+return true;
+
+ len = e-
Re: [PATCH] PR 62173, re-shuffle insns for RTL loop invariant hoisting
2015-02-11 18:18 GMT+00:00 Jiong Wang : > > 2015-02-11 Jiong Wang > > gcc/ > * loop-invariant.c (find_defs): Enable DF_DU_CHAIN build. > (vfp_const_iv): New hash table. > (expensive_addr_check_p): New boolean. > (init_inv_motion_data): Initialize new variables. > (free_inv_motion_data): Release hash table. > (create_new_invariant): Set cheap_address to false for iv in > vfp_const_iv table. > (find_invariant_insn): Skip dependencies check for iv in vfp_const_iv > table. > (use_for_single_du): New function. > (reshuffle_insn_with_vfp): Likewise. > (find_invariants_bb): Call reshuffle_insn_with_vfp. For performance measurement: on AArch64: * this patch finds several hundreds new loop invariants across speck2k6. * one bench in spec2k6 float get +4.5% performance improvement. I guess similar improvements could be achieved on other RISC backend. Regards, Jiong
Re: [wwwdocs] Remove extra SD-6 column in C++14 language stats.
On Sun, 19 Apr 2015, Ed Smith-Rowland wrote: I'll need someone to apply this... Done. (Good timing before the GCC 5.1 release.) Gerald
[PATCH, i386, Darwin RFT]: Remove reload_in_progress checks
Hello!
Attached patch removes reload_in_progress checks for x86 (LRA enabled)
target. AFAICS, reload_in_progress is never set during the
compilation, a watchpoint on this variable didn't trigger for a couple
of complex compilations.
2015-04-19 Uros Bizjak
* config/i386/i386.c (set_pic_reg_ever_live): Remove.
(legitimize_pic_address): Do not call set_pic_reg_ever_live.
(legitimize_tls_address): Ditto.
(ix86_expand_move): Ditto.
(ix86_expand_binary_operator): Remove reload_in_progress checks.
(ix86_expand_unary_operator): Ditto.
* config/i386/predicates.md (index_register_operand): Ditto.
Patch was bootstrapped on x86_64-linux-gnu and regression tested for
x86_64-linux-gnu, i686-linux-gnu with and w/o -fpic.
The patch also changes Darwin specific code that can't be tested
properly on linux. Instead of leaving a reload_in_progress_check
theere, I'd ask someone to bootstrap and regression test the patch on
Darwin target.
I'll wait for the Darwin regression test results (and possible
comments) before committing the patch.
Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c (revision 222194)
+++ config/i386/i386.c (working copy)
@@ -13576,15 +13576,6 @@ ix86_GOT_alias_set (void)
return set;
}
-/* Set regs_ever_live for PIC base address register
- to true if required. */
-static void
-set_pic_reg_ever_live ()
-{
- if (reload_in_progress)
-df_set_regs_ever_live (REGNO (pic_offset_table_rtx), true);
-}
-
/* Return a legitimate reference for ORIG (an address) using the
register REG. If REG is 0, a new pseudo is generated.
@@ -13635,7 +13626,6 @@ legitimize_pic_address (rtx orig, rtx reg)
/* This symbol may be referenced via a displacement from the PIC
base address (@GOTOFF). */
- set_pic_reg_ever_live ();
if (GET_CODE (addr) == CONST)
addr = XEXP (addr, 0);
if (GET_CODE (addr) == PLUS)
@@ -13667,7 +13657,6 @@ legitimize_pic_address (rtx orig, rtx reg)
/* This symbol may be referenced via a displacement from the PIC
base address (@GOTOFF). */
- set_pic_reg_ever_live ();
if (GET_CODE (addr) == CONST)
addr = XEXP (addr, 0);
if (GET_CODE (addr) == PLUS)
@@ -13728,7 +13717,6 @@ legitimize_pic_address (rtx orig, rtx reg)
/* This symbol must be referenced via a load from the
Global Offset Table (@GOT). */
- set_pic_reg_ever_live ();
new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
new_rtx = gen_rtx_CONST (Pmode, new_rtx);
if (TARGET_64BIT)
@@ -13780,7 +13768,6 @@ legitimize_pic_address (rtx orig, rtx reg)
{
if (!TARGET_64BIT)
{
- set_pic_reg_ever_live ();
new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
UNSPEC_GOTOFF);
new_rtx = gen_rtx_PLUS (Pmode, new_rtx, op1);
@@ -14082,7 +14069,6 @@ legitimize_tls_address (rtx x, enum tls_model mode
}
else if (flag_pic)
{
- set_pic_reg_ever_live ();
pic = pic_offset_table_rtx;
type = TARGET_ANY_GNU_TLS ? UNSPEC_GOTNTPOFF : UNSPEC_GOTTPOFF;
}
@@ -17306,10 +17292,8 @@ ix86_expand_move (machine_mode mode, rtx operands[
/* dynamic-no-pic */
if (MACHOPIC_INDIRECT)
{
- rtx temp = ((reload_in_progress
- || ((op0 && REG_P (op0))
- && mode == Pmode))
- ? op0 : gen_reg_rtx (Pmode));
+ rtx temp = (op0 && REG_P (op0) && mode == Pmode)
+? op0 : gen_reg_rtx (Pmode));
op1 = machopic_indirect_data_reference (op1, temp);
if (MACHOPIC_PURE)
op1 = machopic_legitimize_pic_address (op1, mode,
@@ -17957,17 +17941,11 @@ ix86_expand_binary_operator (enum rtx_code code, m
/* Emit the instruction. */
op = gen_rtx_SET (VOIDmode, dst, gen_rtx_fmt_ee (code, mode, src1, src2));
- if (reload_in_progress)
+
+ if (reload_completed
+ && code == PLUS
+ && !rtx_equal_p (dst, src1))
{
- /* Reload doesn't know about the flags register, and doesn't know that
- it doesn't want to clobber it. We can only do this with PLUS. */
- gcc_assert (code == PLUS);
- emit_insn (op);
-}
- else if (reload_completed
- && code == PLUS
- && !rtx_equal_p (dst, src1))
-{
/* This is going to be an LEA; avoid splitting it later. */
emit_insn (op);
}
@@ -18130,13 +18108,9 @@ ix86_expand_unary_operator (enum rtx_code code, ma
/* Emit the instruction. */
op = gen_rtx_SET (VOIDmode, dst, gen_rtx_fmt_e (code, mode, src));
- if (reload_in_progress || code == NOT)
-{
- /* Reload doesn't know about the flags register, and doesn't know that
-
Re: [PATCH 1/2] PR c++/61636
On 2015-04-18 18:53, Adam Butcher wrote:
Test like this?
/* { dg-do run { target c++14 } } */
/* { dg-final { scan-assembler-not "..." } } */
struct X
{
int f (int, double) { return 255; }
static int f (int, int) { return 65535; }
auto m1 ()
{
return [=] (auto a) {
return f (7, a);
};
}
auto m2 ()
{
return [=] (auto a) {
return f (9, 10) + a;
};
}
And this:
auto m3 ()
{
return [=] (auto a) {
return f (11, 12.0) + a;
};
}
Currently we don't capture 'this' here despite the call not being
dependent on any lambda parameter and resolving to a non-static member
function.
I think I need to resolve a member call within a generic lambda as if
it were not in template context to determine whether it unambiguously
resolves to a static member function. If it does, then no capture
required. Otherwise, 'this' should be captured because either a) the
call is to a non-static member function without any dependent parameters
or b) because it may resolve to a non-static member function at callop
instantiate time.
No sure whether I can do all this at my current patch site in
cp_parser_postfix_expression or whether it needs to be later.
Adam
[PATCH] tetstsuite gcc.target/i386/ avx512*
Hi all, the attached patch makes it possible to compile and run the failing avx512* testcases on FreeBSD (amd64). See the failing testcases: https://gcc.gnu.org/ml/gcc-testresults/2015-04/msg02272.html The header values.h mentions that this interface is obsolete and one should use and/or instead. FreeBSD lacks the "values.h" header. Done so and tested on FreeBSD amd64-unknown-freebsd11.0 and CentOS7.1. Ok for trunk? Thanks, Andreas 2015-04-19 Andreas Tobler * gcc.target/i386/avx512bw-vpermi2w-2.c: Fix includes to use actual headers. * gcc.target/i386/avx512bw-vpermt2w-2.c: Likewise. * gcc.target/i386/avx512bw-vpmaddubsw-2.c: Likewise. * gcc.target/i386/avx512bw-vpmaddwd-2.c: Likewise. * gcc.target/i386/avx512dq-vfpclasspd-2.c: Likewise. * gcc.target/i386/avx512dq-vfpclassps-2.c: Likewise. * gcc.target/i386/avx512vbmi-vpermi2b-2.c: Likewise. * gcc.target/i386/avx512vbmi-vpermt2b-2.c: Likewise. Index: avx512bw-vpermi2w-2.c === --- avx512bw-vpermi2w-2.c (revision 20) +++ avx512bw-vpermi2w-2.c (working copy) @@ -6,8 +6,9 @@ #include "avx512f-helper.h" #define SIZE (AVX512F_LEN / 16) -#include "math.h" -#include "values.h" +#include +#include +#include #include "avx512f-mask-type.h" #define NUM 32 Index: avx512bw-vpermt2w-2.c === --- avx512bw-vpermt2w-2.c (revision 20) +++ avx512bw-vpermt2w-2.c (working copy) @@ -6,8 +6,9 @@ #include "avx512f-helper.h" #define SIZE (AVX512F_LEN / 16) -#include "math.h" -#include "values.h" +#include +#include +#include #include "avx512f-mask-type.h" #define NUM 32 Index: avx512bw-vpmaddubsw-2.c === --- avx512bw-vpmaddubsw-2.c (revision 20) +++ avx512bw-vpmaddubsw-2.c (working copy) @@ -6,7 +6,8 @@ #include "avx512f-helper.h" #include -#include +#include +#include #define SIZE (AVX512F_LEN / 16) #include "avx512f-mask-type.h" Index: avx512bw-vpmaddwd-2.c === --- avx512bw-vpmaddwd-2.c (revision 20) +++ avx512bw-vpmaddwd-2.c (working copy) @@ -6,7 +6,8 @@ #include "avx512f-helper.h" #include -#include +#include +#include #define SIZE (AVX512F_LEN / 32) #include "avx512f-mask-type.h" Index: avx512dq-vfpclasspd-2.c === --- avx512dq-vfpclasspd-2.c (revision 20) +++ avx512dq-vfpclasspd-2.c (working copy) @@ -6,7 +6,8 @@ #include "avx512f-helper.h" #include -#include +#include +#include #define SIZE (AVX512F_LEN / 64) #include "avx512f-mask-type.h" Index: avx512dq-vfpclassps-2.c === --- avx512dq-vfpclassps-2.c (revision 20) +++ avx512dq-vfpclassps-2.c (working copy) @@ -6,7 +6,8 @@ #include "avx512f-helper.h" #include -#include +#include +#include #include "avx512f-mask-type.h" #define SIZE (AVX512F_LEN / 32) Index: avx512vbmi-vpermi2b-2.c === --- avx512vbmi-vpermi2b-2.c (revision 20) +++ avx512vbmi-vpermi2b-2.c (working copy) @@ -7,8 +7,9 @@ #include "avx512f-helper.h" #define SIZE (AVX512F_LEN / 8) -#include "math.h" -#include "values.h" +#include +#include +#include #include "avx512f-mask-type.h" #define NUM 32 Index: avx512vbmi-vpermt2b-2.c === --- avx512vbmi-vpermt2b-2.c (revision 20) +++ avx512vbmi-vpermt2b-2.c (working copy) @@ -7,8 +7,9 @@ #include "avx512f-helper.h" #define SIZE (AVX512F_LEN / 8) -#include "math.h" -#include "values.h" +#include +#include +#include #include "avx512f-mask-type.h" #define NUM 32
Re: [PATCH, i386, Darwin RFT]: Remove reload_in_progress checks
With the patch bootstrapping x86_64-apple-darwin14 was broken due to a typo: ../../work/gcc/config/i386/i386.c: In function 'void ix86_expand_move(machine_mode, rtx_def**)': ../../work/gcc/config/i386/i386.c:17296:32: error: expected ',' or ';' before ')' token ? op0 : gen_reg_rtx (Pmode)); ^ After removing the extra right parenthesis, I am now at stage 2. Dominique > Le 19 avr. 2015 à 20:35, Uros Bizjak a écrit : > > Hello! > > Attached patch removes reload_in_progress checks for x86 (LRA enabled) > target. AFAICS, reload_in_progress is never set during the > compilation, a watchpoint on this variable didn't trigger for a couple > of complex compilations. > > 2015-04-19 Uros Bizjak > >* config/i386/i386.c (set_pic_reg_ever_live): Remove. >(legitimize_pic_address): Do not call set_pic_reg_ever_live. >(legitimize_tls_address): Ditto. >(ix86_expand_move): Ditto. >(ix86_expand_binary_operator): Remove reload_in_progress checks. >(ix86_expand_unary_operator): Ditto. >* config/i386/predicates.md (index_register_operand): Ditto. > > Patch was bootstrapped on x86_64-linux-gnu and regression tested for > x86_64-linux-gnu, i686-linux-gnu with and w/o -fpic. > > The patch also changes Darwin specific code that can't be tested > properly on linux. Instead of leaving a reload_in_progress_check > theere, I'd ask someone to bootstrap and regression test the patch on > Darwin target. > > I'll wait for the Darwin regression test results (and possible > comments) before committing the patch. > > Uros. >
[PATCH] Fix check for whether a function is a variadic function
stdarg_p() apparently returns false for a variadic function that has no
concrete parameters, e.g. "void foo (...);". This patch fixes this
issue by removing the predicate's seemingly bogus "n != NULL_TREE" test.
(Zero-parameter functions like "void bar (void);" will always have a
void_type_node sentinel in their fntype's argument list.)
OK to commit after testing?
gcc/ChangeLog:
* tree.c (stdarg_p): Return true for variadic functions with no
concrete parameters.
gcc/testsuite/ChangeLog:
* g++.dg/variadic-main.C: New test.
---
gcc/testsuite/g++.dg/variadic-main.C | 7 +++
gcc/tree.c | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/g++.dg/variadic-main.C
diff --git a/gcc/testsuite/g++.dg/variadic-main.C
b/gcc/testsuite/g++.dg/variadic-main.C
new file mode 100644
index 000..b262bfd
--- /dev/null
+++ b/gcc/testsuite/g++.dg/variadic-main.C
@@ -0,0 +1,7 @@
+/* { dg-options "-Wpedantic" } */
+
+int
+main (...) /* { dg-warning "declared as variadic function" } */
+{
+ return 0;
+}
diff --git a/gcc/tree.c b/gcc/tree.c
index 01860af..d388a1c 100644
--- a/gcc/tree.c
+++ b/gcc/tree.c
@@ -11518,7 +11518,7 @@ stdarg_p (const_tree fntype)
n = t;
}
- return n != NULL_TREE && n != void_type_node;
+ return n != void_type_node;
}
/* Return true if TYPE has a prototype. */
--
2.4.0.rc2
patch to fix PR65805
The followingpatch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65805
The problem occurred when SP was changed between the original insn and
rematerialized one and the rematerialized insn contained a reg which
will be substituted by SP. In this case difference between sp offset
and the previous sp offset was used twice.
The patch was bootstrapped and tested on x86/x86-64 and ppc64.
It is hard to create a test for the PR which will be stable. So the test
is absent.
Committed to the trunk as rev. 23.
Jakub, the problem is present in GCC5 RC too. Should I commit it into
gcc-5-branch too?
2015-04-19 Vladimir Makarov
PR rtl-optimization/65805
* lra-eliminations.c (lra_eliminate_regs_1): Add new assert.
Don't use difference of offset and previous offset if
update_sp_offset is non-zero.
(eliminate_regs_in_insn): Ditto.
* lra-spills.c (remove_pseudos): Exchange 4th and 6th args in
lra_eliminate_regs_1 call.
* lra-constraints.c (get_equiv_with_elimination): Ditto.
Index: lra-eliminations.c
===
--- lra-eliminations.c (revision 20)
+++ lra-eliminations.c (working copy)
@@ -318,7 +318,9 @@ get_elimination (rtx reg)
substitution if UPDATE_P, or the full offset if FULL_P, or
otherwise zero. If FULL_P, we also use the SP offsets for
elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
- offsets of register elimnable to SP.
+ offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
+ non-zero, don't use difference of the offset and the previous
+ offset.
MEM_MODE is the mode of an enclosing MEM. We need this to know how
much to adjust a register for, e.g., PRE_DEC. Also, if we are
@@ -341,7 +343,8 @@ lra_eliminate_regs_1 (rtx_insn *insn, rt
const char *fmt;
int copied = 0;
- gcc_assert (!update_p || !full_p);
+ lra_assert (!update_p || !full_p);
+ lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
if (! current_function_decl)
return x;
@@ -366,11 +369,14 @@ lra_eliminate_regs_1 (rtx_insn *insn, rt
{
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
- if (update_p)
- return plus_constant (Pmode, to,
- ep->offset - ep->previous_offset
- + (ep->to_rtx == stack_pointer_rtx
- ? update_sp_offset : 0));
+ if (update_sp_offset != 0)
+ {
+ if (ep->to_rtx == stack_pointer_rtx)
+ return plus_constant (Pmode, to, update_sp_offset);
+ return to;
+ }
+ else if (update_p)
+ return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
else if (full_p)
return plus_constant (Pmode, to,
ep->offset
@@ -395,16 +401,15 @@ lra_eliminate_regs_1 (rtx_insn *insn, rt
if (! update_p && ! full_p)
return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
-
- offset = (update_p
- ? ep->offset - ep->previous_offset
- + (ep->to_rtx == stack_pointer_rtx
- ? update_sp_offset : 0)
- : ep->offset);
+
+ if (update_sp_offset != 0)
+ offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
+ else
+ offset = (update_p
+ ? ep->offset - ep->previous_offset : ep->offset);
if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
offset -= lra_get_insn_recog_data (insn)->sp_offset;
- if (CONST_INT_P (XEXP (x, 1))
- && INTVAL (XEXP (x, 1)) == -offset)
+ if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
return to;
else
return gen_rtx_PLUS (Pmode, to,
@@ -451,12 +456,18 @@ lra_eliminate_regs_1 (rtx_insn *insn, rt
{
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
- if (update_p)
+ if (update_sp_offset != 0)
+ {
+ if (ep->to_rtx == stack_pointer_rtx)
+ return plus_constant (Pmode,
+ gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
+ update_sp_offset * INTVAL (XEXP (x, 1)));
+ return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
+ }
+ else if (update_p)
return plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
- (ep->offset - ep->previous_offset
- + (ep->to_rtx == stack_pointer_rtx
- ? update_sp_offset : 0))
+ (ep->offset - ep->previous_offset)
* INTVAL (XEXP (x, 1)));
else if (full_p)
{
@@ -889,11 +900,12 @@ remove_reg_equal_offset_note (rtx insn,
If REPLACE_P is false, just update the offsets while keeping the
base register the same. If FIRST_P, use the sp offset for
- elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this.
- Attach the note about used elimination for insns setting frame
- pointer to update elimination easy (without parsing already
- generated elimination insns to find offset previously used) in
- future. */
+ elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
+ UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
+ and the previous offset. At
Re: [wwwdocs] Porting to again
On Wed, 18 Feb 2015, Marek Polacek wrote: > This is a revised version. I reworded the paragraph dealing with > __STDC_VERSION__, made some clarifications wrt %a, and added some > text wrt cpp -P issue. I made some minor changes on top of this: - Use a shorter URL for a PR reference. - Avoid a "here" link. - Various wording changes. With that I am nearly through for everything related to the GCC 5.1 release. ;-) Gerald Index: porting_to.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/porting_to.html,v retrieving revision 1.8 diff -u -r1.8 porting_to.html --- porting_to.html 18 Apr 2015 19:45:17 - 1.8 +++ porting_to.html 20 Apr 2015 00:22:50 - @@ -29,19 +29,20 @@ The preprocessor started to emit line markers to properly distinguish whether a macro token comes from a system header, or from a normal header -(see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60723";>PR60723). -These new markers can cause intriguing problems, if the packages aren't ready +(see https://gcc.gnu.org/PR60723";>PR60723). +These new markers can cause intriguing problems for software not ready to handle them. To stop the preprocessor from generating the #line -directives, use the -P option, documented -https://gcc.gnu.org/onlinedocs/gcc/Preprocessor-Options.html#Preprocessor-Options";>here. -Consider the following snippet: +directives, use +https://gcc.gnu.org/onlinedocs/gcc/Preprocessor-Options.html#Preprocessor-Options";>the -P option. + +Consider the following snippet: #includeexitfailure EXIT_FAILURE -While older "gcc -E" used to emit: +In the past "gcc -E" used to emit: # 2 "t.c" 2 @@ -57,7 +58,7 @@ 1 -As can be seen, the exitfailure and 1 tokens +Observe how the exitfailure and 1 tokens are not on the same line anymore.
[PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64
The attached patch resolves the failures in a number of address
sanitizer tests on powerpc64*-*-*-* discussed in bug 65479 (the
failures in c-c++-common/asan/swapcontext-test-1.c reported in
pr65643 remain unresolved).
The patch has been tested on powerpc64*-*-*-* and x86_64 with
no regressions.
Is this okay for trunk? For 5.1?
Martin
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b4052ef..18eede3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2015-04-19 Martin Sebor
+
+ PR sanitizer/65479
+ * gcc/testsuite/c-c++-common/asan/misalign-1.c [powerpc*-*-*-*]:
+ Use -fno-omit-frame-pointer. Adjust line numbers and expect exact
+ matches.
+ * gcc/testsuite/c-c++-common/asan/misalign-2.c: Ditto.
+ * gcc/testsuite/c-c++-common/asan/null-deref-1.c: Ditto.
+
2015-04-18 Martin Sebor
* gfortran.dg/pr32627.f03 (strptr): Change size to match the number
diff --git a/gcc/testsuite/c-c++-common/asan/misalign-1.c b/gcc/testsuite/c-c++-common/asan/misalign-1.c
index f1cca16..833b82a 100644
--- a/gcc/testsuite/c-c++-common/asan/misalign-1.c
+++ b/gcc/testsuite/c-c++-common/asan/misalign-1.c
@@ -1,5 +1,6 @@
/* { dg-do run { target { ilp32 || lp64 } } } */
/* { dg-options "-O2" } */
+/* { dg-additional-options "-fasynchronous-unwind-tables" { target powerpc*-*-*-* } } */
/* { dg-additional-options "-fno-omit-frame-pointer" { target *-*-darwin* } } */
/* { dg-shouldfail "asan" } */
@@ -39,5 +40,5 @@ main ()
/* { dg-output "ERROR: AddressSanitizer:\[^\n\r]*on address\[^\n\r]*" } */
/* { dg-output "0x\[0-9a-f\]+ at pc 0x\[0-9a-f\]+ bp 0x\[0-9a-f\]+ sp 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */
/* { dg-output "\[^\n\r]*READ of size 4 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */
-/* { dg-output "#0 0x\[0-9a-f\]+ +(in _*foo(\[^\n\r]*misalign-1.c:1\[01]|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
-/* { dg-output "#1 0x\[0-9a-f\]+ +(in _*main (\[^\n\r]*misalign-1.c:3\[45]|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */
+/* { dg-output "#0 0x\[0-9a-f\]+ +(in _*foo(\[^\n\r]*misalign-1.c:12|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
+/* { dg-output "#1 0x\[0-9a-f\]+ +(in _*main (\[^\n\r]*misalign-1.c:36|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */
diff --git a/gcc/testsuite/c-c++-common/asan/misalign-2.c b/gcc/testsuite/c-c++-common/asan/misalign-2.c
index 9f400b4..923d26b 100644
--- a/gcc/testsuite/c-c++-common/asan/misalign-2.c
+++ b/gcc/testsuite/c-c++-common/asan/misalign-2.c
@@ -1,5 +1,6 @@
/* { dg-do run { target { ilp32 || lp64 } } } */
/* { dg-options "-O2" } */
+/* { dg-additional-options "-fasynchronous-unwind-tables" { target powerpc*-*-*-* } } */
/* { dg-additional-options "-fno-omit-frame-pointer" { target *-*-darwin* } } */
/* { dg-shouldfail "asan" } */
@@ -39,5 +40,5 @@ main ()
/* { dg-output "ERROR: AddressSanitizer:\[^\n\r]*on address\[^\n\r]*" } */
/* { dg-output "0x\[0-9a-f\]+ at pc 0x\[0-9a-f\]+ bp 0x\[0-9a-f\]+ sp 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */
/* { dg-output "\[^\n\r]*READ of size 4 at 0x\[0-9a-f\]+ thread T0\[^\n\r]*(\n|\r\n|\r)" } */
-/* { dg-output "#0 0x\[0-9a-f\]+ +(in _*baz(\[^\n\r]*misalign-2.c:2\[23]|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
-/* { dg-output "#1 0x\[0-9a-f\]+ +(in _*main (\[^\n\r]*misalign-2.c:3\[45]|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */
+/* { dg-output "#0 0x\[0-9a-f\]+ +(in _*baz(\[^\n\r]*misalign-2.c:24|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
+/* { dg-output "#1 0x\[0-9a-f\]+ +(in _*main (\[^\n\r]*misalign-2.c:36|\[^\n\r]*:0)|\[(\]).*(\n|\r\n|\r)" } */
diff --git a/gcc/testsuite/c-c++-common/asan/null-deref-1.c b/gcc/testsuite/c-c++-common/asan/null-deref-1.c
index 45d35ac..b9bc3e5 100644
--- a/gcc/testsuite/c-c++-common/asan/null-deref-1.c
+++ b/gcc/testsuite/c-c++-common/asan/null-deref-1.c
@@ -1,5 +1,6 @@
/* { dg-do run } */
/* { dg-options "-fno-omit-frame-pointer -fno-shrink-wrap" } */
+/* { dg-additional-options "-fasynchronous-unwind-tables" { target { powerpc*-*-*-*} } } */
/* { dg-additional-options "-mno-omit-leaf-frame-pointer" { target { i?86-*-* x86_64-*-* } } } */
/* { dg-shouldfail "asan" } */
@@ -18,5 +19,5 @@ int main()
/* { dg-output "ERROR: AddressSanitizer:? SEGV on unknown address\[^\n\r]*" } */
/* { dg-output "0x\[0-9a-f\]+ \[^\n\r]*pc 0x\[0-9a-f\]+\[^\n\r]*(\n|\r\n|\r)" } */
-/* { dg-output "\[^\n\r]*#0 0x\[0-9a-f\]+ +(in \[^\n\r]*NullDeref\[^\n\r]* (\[^\n\r]*null-deref-1.c:10|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
-/* { dg-output "#1 0x\[0-9a-f\]+ +(in _*main (\[^\n\r]*null-deref-1.c:15|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
+/* { dg-output "\[^\n\r]*#0 0x\[0-9a-f\]+ +(in \[^\n\r]*NullDeref\[^\n\r]* (\[^\n\r]*null-deref-1.c:11|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
+/* { dg-output "#1 0x\[0-9a-f\]+ +(in _*main (\[^\n\r]*null-deref-1.c:16|\[^\n\r]*:0)|\[(\])\[^\n\r]*(\n|\r\n|\r)" } */
diff --git a/libbacktrace/ChangeLog b/libbacktrace/ChangeLog
index e385d8f..9348321 10
[Patch] pr65779 - [5/6 Regression] undefined local symbol on powerpc
This patch removes bogus debug info left around by shrink-wrapping,
which on some powerpc targets with just the right register allocation
led to assembly errors.
Bootstrapped and regression tested powerpc64-linux and x86_64-linux.
I did see some regressions, but completely unrelated to this patch.
See pr65810 for the powerpc64 regressions. x86_64-linux showed fails
of
+FAIL: c-c++-common/ubsan/object-size-10.c -O2 execution test
+FAIL: c-c++-common/ubsan/object-size-10.c -O2 -flto -fno-use-linker-plugin
-flto-partition=none execution test
+FAIL: c-c++-common/ubsan/object-size-10.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects execution test
+FAIL: gfortran.dg/class_allocate_18.f90 -O0 execution test
+FAIL: gfortran.dg/class_allocate_18.f90 -O1 execution test
FAIL: gfortran.dg/class_allocate_18.f90 -O3 -fomit-frame-pointer
-funroll-all-loops -finline-functions execution test
-FAIL: gfortran.dg/class_allocate_18.f90 -Os execution test
+FAIL: gfortran.dg/class_allocate_18.f90 -O3 -g execution test
with the log for the ubsan fails
/src/gcc-5/gcc/testsuite/c-c++-common/ubsan/object-size-10.c:19:11: runtime
error: index 128 out of bounds for type 'char [128]'
/src/gcc-5/gcc/testsuite/c-c++-common/ubsan/object-size-10.c:19:11: runtime
error: load of address 0x0804a000 with insufficient space for an object of type
'char'
0x0804a000: note: pointer points here
I assume I was thrashing my ubuntu 14.10 x86_64 box too hard and just
ran out of memory. Running the test by hand resulted in the expected
output.
The class_allocate_18.f90 failure are intermittent, and occur
occasionally when running the testcase by hand. :-(
gcc/
PR debug/65779
* shrink-wrap.c (insn_uses_reg): New function.
(move_insn_for_shrink_wrap): Remove debug insns using regs set
by the moved insn.
gcc/testsuite/
* gcc.dg/pr65779.c: New.
Index: gcc/shrink-wrap.c
===
--- gcc/shrink-wrap.c (revision 222160)
+++ gcc/shrink-wrap.c (working copy)
@@ -182,6 +182,21 @@ live_edge_for_reg (basic_block bb, int regno, int
return live_edge;
}
+static bool
+insn_uses_reg (rtx_insn *insn, unsigned int regno, unsigned int end_regno)
+{
+ df_ref use;
+
+ FOR_EACH_INSN_USE (use, insn)
+{
+ rtx reg = DF_REF_REG (use);
+
+ if (REG_P (reg) && REGNO (reg) >= regno && REGNO (reg) < end_regno)
+ return true;
+}
+ return false;
+}
+
/* Try to move INSN from BB to a successor. Return true on success.
USES and DEFS are the set of registers that are used and defined
after INSN in BB. SPLIT_P indicates whether a live edge from BB
@@ -340,10 +355,15 @@ move_insn_for_shrink_wrap (basic_block bb, rtx_ins
*split_p = true;
}
+ vec live_bbs;
+ if (MAY_HAVE_DEBUG_INSNS)
+live_bbs.create (5);
/* At this point we are committed to moving INSN, but let's try to
move it as far as we can. */
do
{
+ if (MAY_HAVE_DEBUG_INSNS)
+ live_bbs.safe_push (bb);
live_out = df_get_live_out (bb);
live_in = df_get_live_in (next_block);
bb = next_block;
@@ -426,6 +446,34 @@ move_insn_for_shrink_wrap (basic_block bb, rtx_ins
SET_REGNO_REG_SET (bb_uses, i);
}
+ /* Remove debug insns using regs set by the insn we are moving. */
+ if (MAY_HAVE_DEBUG_INSNS)
+{
+ while (!live_bbs.is_empty ())
+ {
+ rtx_insn *dinsn;
+ basic_block tmp_bb = live_bbs.pop ();
+
+ FOR_BB_INSNS_REVERSE (tmp_bb, dinsn)
+ {
+ if (dinsn == insn)
+ break;
+ if (DEBUG_INSN_P (dinsn)
+ && insn_uses_reg (dinsn, dregno, end_dregno))
+ {
+ if (*split_p)
+ /* If split, then we will be moving insn into a
+ newly created block immediately after the entry
+ block. Move the debug info there too. */
+ emit_debug_insn_after (PATTERN (dinsn), bb_note (bb));
+ delete_insn (dinsn);
+ break;
+ }
+ }
+ }
+ live_bbs.release ();
+}
+
emit_insn_after (PATTERN (insn), bb_note (bb));
delete_insn (insn);
return true;
Index: gcc/testsuite/gcc.dg/pr65779.c
===
--- gcc/testsuite/gcc.dg/pr65779.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr65779.c (working copy)
@@ -0,0 +1,64 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -g" } */
+/* { dg-additional-options "-mrelocatable" { target powerpc-*-rtems* } } */
+
+unsigned long __attribute__ ((noinline))
+adler32 (unsigned long adler, unsigned char *buf, unsigned int len)
+{
+ unsigned long s1 = adler & 0x;
+ unsigned long s2 = (adler >> 16) & 0x;
+ int k;
+
+ if (buf == 0)
+return 1L;
+
+ while (len > 0)
+{
+ k = len < 5552 ? len : 5552;
+ len -= k;
+
Re: [PATCH] Fix check for whether a function is a variadic function
On 04/19/2015 07:45 PM, Patrick Palka wrote: stdarg_p() apparently returns false for a variadic function that has no concrete parameters, e.g. "void foo (...);". This patch fixes this issue by removing the predicate's seemingly bogus "n != NULL_TREE" test. What does this do with K&R non-prototype declarations, e.g. "int main();"? Jason
Re: [PATCH 1/2] PR c++/61636
On 04/19/2015 03:03 PM, Adam Butcher wrote: I think I need to resolve a member call within a generic lambda as if it were not in template context to determine whether it unambiguously resolves to a static member function. If it does, then no capture required. Otherwise, 'this' should be captured because either a) the call is to a non-static member function without any dependent parameters or b) because it may resolve to a non-static member function at callop instantiate time. Right. No sure whether I can do all this at my current patch site in cp_parser_postfix_expression or whether it needs to be later. I think it needs to be later, when the context of the lambda is fully instantiated, so that any other dependencies are resolved. Perhaps this means that we need to partially instantiate the (generic) lambda body... This is reminding me of bug 47226, though I'm not sure the fixes need to coordinate. Jason
Re: [PATCH] Add new target h8300-*-linux
At Fri, 17 Apr 2015 10:53:51 -0600,
Jeff Law wrote:
>
> On 03/05/2015 09:50 AM, Yoshinori Sato wrote:
> > Add h8300-*-linux target for h8300 linux kernel and userland.
> >
> > h8300-*-elf is some difference of standard elf.
> > h8300-*-linux is compatible of standard elf rules.
> >
> > Thanks.
> >
> > diff --git a/gcc/ChangeLog b/gcc/ChangeLog
> > index cfacea1..fc5101c 100644
> > --- a/gcc/ChangeLog
> > +++ b/gcc/ChangeLog
> > @@ -1,3 +1,12 @@
> > +2015-03-06 Yoshinori Sato
> > +
> > + * config.gcc: Add h8300-*-linux
> > + * config/h8300/h8300.c (h8300_option_override):
> > + Exclusive -mh vs -ms/-msx
> > + (h8300_file_start): Target priority -msx > -ms > -mh
> > + * config/h8300/linux.h: New file.
> > + * config/h8300/t-linux: Likewise.
> Mostly OK. Two minor issues/questions that need to be addressed, then
> this ought to be able to be committed to the trunk.
>
OK.
>
> >
> > + if (TARGET_H8300H && (TARGET_H8300S || TARGET_H8300SX))
> > +{
> > + target_flags ^= MASK_H8300H;
> > +}
> I'm a bit concerned by this. Why did you need to make this change?
>
The flag is exclusion, but it's set both.
>
> > +#undef LINK_SPEC
> > +#define LINK_SPEC "%{mh:%{!mn:-m h8300helf_linux}} %{ms:%{!mn:-m
> > h8300self_linux}}"
> Presumably you don't need to support normal mode or the older H8/300
> processor. Does that allow you to simplify LINK_SPEC at all?
OK.
I will cleanup.
> I'm going to assume the sfp-machine.h contents are correct.
>
> You did file a copyright form with the FSF, right (I believe I asked
> before, but I don't recall the result).
Yes.
gnu.org #976270
> Jeff
--
Yoshinori Sato
Re: [PATCH][MIPS] Enable load-load/store-store bonding
Gentle reminder! - Thanks and regards, Sameera D. On Monday 30 March 2015 04:58 PM, sameera wrote: Hi! Sorry for delay in sending this patch for review. Please find attached updated patch. In P5600, 2 consecutive loads/stores of same type which access contiguous memory locations are bonded together by instruction issue unit to dispatch single load/store instruction which accesses both locations. This allows 2X improvement in memory intensive code. This optimization can be performed for LH, SH, LW, SW, LWC, SWC, LDC, SDC instructions. This patch adds peephole2 patterns to identify such loads/stores, and put them in parallel, so that the scheduler will not split it - thereby guaranteeing h/w level load/store bonding. The patch is tested with dejagnu for correctness, and tested on hardware for performance. Ok for trunk? Changelog: gcc/ * config/mips/mips.md (JOIN_MODE): New mode iterator. (join2_load_Store): New pattern. (join2_loadhi): Likewise. (define_peehole2): Add peephole2 patterns to join 2 HI/SI/SF/DF-mode load-load and store-stores. * config/mips/mips.opt (mload-store-pairs): New option. (TARGET_LOAD_STORE_PAIRS): New macro. *config/mips/mips.h (ENABLE_LD_ST_PAIRS): Likewise. *config/mips/mips-protos.h (mips_load_store_bonding_p): New prototype. *config/mips/mips.c(mips_load_store_bonding_p): New function. - Thanks and regards, Sameera D. On Tuesday 24 June 2014 04:12 PM, Sameera Deshpande wrote: Hi Richard, Thanks for the review. Please find attached updated patch after your review comments. Changelog: gcc/ * config/mips/mips.md (JOIN_MODE): New mode iterator. (join2_load_Store): New pattern. (join2_loadhi): Likewise. (define_peehole2): Add peephole2 patterns to join 2 HI/SI/SF/DF-mode load-load and store-stores. * config/mips/mips.opt (mload-store-pairs): New option. (TARGET_LOAD_STORE_PAIRS): New macro. *config/mips/mips.h (ENABLE_P5600_LD_ST_PAIRS): Likewise. *config/mips/mips-protos.h (mips_load_store_bonding_p): New prototype. *config/mips/mips.c(mips_load_store_bonding_p): New function. The change is tested with dejagnu with additional options -mload-store-pairs and -mtune=p5600. The perf measurement is yet to finish. We had offline discussion based on your comment. There is additional view on the same. Only ISAs mips32r2, mips32r3 and mips32r5 support P5600. Remaining ISAs do not support P5600. For mips32r2 (24K) and mips32r3 (micromips), load-store pairing is implemented separately, and hence, as you suggested, P5600 Ld-ST bonding optimization should not be enabled for them. So, is it fine if I emit error for any ISAs other than mips32r2, mips32r3 and mips32r5 when P5600 is enabled, or the compilation should continue by emitting warning and disabling P5600? No, the point is that we have two separate concepts: ISA and optimisation target. -mipsN and -march=N control the ISA (which instructions are available) and -mtune=M controls optimisation decisions within the constraints of that N, such as scheduling and the cost of things like multiplication and division. E.g. you could have -mips2 -mtune=p5600 -mfix-24k: generate MIPS II- compatible code, optimise it for p5600, but make sure that 24k workarounds are used. The code would run correctly on any MIPS II-compatible processor without known errata and also on the 24k. Ok, disabled the peephole pattern for fix-24k and micromips - to allow specific patterns to be matched. + +mld-st-pairing +Target Report Var(TARGET_ENABLE_LD_ST_PAIRING) Enable load/store +pairing Other options are just "TARGET_" + the captialised form of the option name, so I'd prefer TARGET_LD_ST_PAIRING instead. Although "ld" might be misleading since it's an abbreviation for "load" rather than the LD instruction. Maybe -mload-store-pairs, since plurals are more common than "-ing"? Not sure that's a great suggestion though. Renamed the option and corresponding macro as suggested. Performance testing for this patch is not yet done. If the patch proves beneficial in most of the testcases (which we believe will do on P5600) we will enable this optimization by default for P5600 - in which case this option can be removed. OK. Sending the patch for comments before performance testing is fine, but I think it'd be better to commit the patch only after the testing is done, since otherwise the patch might need to be tweaked. I don't see any problem with keeping the option in case people want to experiment with it. I just think the patch should only go in once it can be enabled by default for p5600. I.e. the option would exist to turn off the pairing. Not having the option is fine too of course. Yes, after perf analysis, I will share the results across, and then depending upon the impact, the decision can be made - whether to make the option as default or not, and then the patch will be submitted. We should allow pairing even without -mtune=p56
Re: [PATCH] [ARM] Fix widen-sum pattern in neon.md.
On 04/15/2015 03:13 AM, Ramana Radhakrishnan wrote:
On Thu, Mar 5, 2015 at 1:34 PM, Xingxing Pan wrote:
Hi,
The expanding of widen-sum pattern always fails. The vectorizer expects the
operands to have the same size, while the current implementation of
widen-sum pattern dose not conform to this.
This patch implements the widen-sum pattern with vpadal. Change the vaddw
pattern to anonymous. Add widen-sum test cases for neon.
Can you please respin addressing James and Kyrill's comments ?
Ramana
--
Regards,
Xingxing
Hi,
Sorry for late response.
The pattern is rewritten to utilize neon_vpadal's "0"
constraints. Have run vect.exp and neon.exp in an armv7 board.
vect.exp has two new XFAILs:
XFAIL: gcc.dg/vect/slp-reduc-3.c scan-tree-dump-times vect "vectorizing
stmts using SLP" 1
XFAIL: gcc.dg/vect/slp-reduc-3.c -flto -ffat-lto-objects
scan-tree-dump-times vect "vectorizing stmts using SLP" 1
This is because widen-sum optimization precedes SLP. The xfail predicate
vect_widen_sum_hi_to_si becomes true when widen-sum is enabled.
neon.exp has four new XFAILs:
XFAIL: gcc.target/arm/neon/vect-widen-sum-char2short-s-d.c
scan-tree-dump-times vect "pattern recognized.*w\\+" 1
XFAIL: gcc.target/arm/neon/vect-widen-sum-char2short-s-d.c
scan-rtl-dump-times expand "UNSPEC_VPADAL" 1
XFAIL: gcc.target/arm/neon/vect-widen-sum-char2short-s.c
scan-tree-dump-times vect "pattern recognized.*w\\+" 1
XFAIL: gcc.target/arm/neon/vect-widen-sum-char2short-s.c
scan-rtl-dump-times expand "UNSPEC_VPADAL" 1
If the widen-sum pattern is successfully expanded, "w+" and
"UNSPEC_VPADAL" should appear in the dump file like other
vect-widen-sum-*.c tests. But vect-widen-sum-char2short-s[-d].c is
special because at tree level the signed operations will be converted
into unsigned operations, which destroy the widen-sum pattern. That is
due to the workaround of PR tree-optimization/25125. I just add xfail
following gcc.dg/vect/vect-reduc-pattern-2c.c.
--
Regards,
Xingxing
commit c44b5bd19efb029b8bbd4e3c7e2d631bdc482b7c
Author: Xingxing Pan
Date: Sun Apr 19 15:54:43 2015 +0800
Fix widen-sum pattern in neon.md.
gcc/
2015-04-19 Xingxing Pan
* config/arm/iterators.md (VWSD): New.
(V_widen_sum_d): New.
* config/arm/neon.md (widen_ssum3): Redefined.
(widen_usum3): Ditto.
(neon_svaddw3): New anonymous define_insn.
(neon_uvaddw3): Ditto.
gcc/testsuite/
2015-04-19 Xingxing Pan
* gcc.target/arm/neon/vect-widen-sum-char2short-s-d.c: New.
* gcc.target/arm/neon/vect-widen-sum-char2short-s.c: New.
* gcc.target/arm/neon/vect-widen-sum-char2short-u-d.c: New.
* gcc.target/arm/neon/vect-widen-sum-char2short-u.c: New.
* gcc.target/arm/neon/vect-widen-sum-short2int-s-d.c: New.
* gcc.target/arm/neon/vect-widen-sum-short2int-s.c: New.
* gcc.target/arm/neon/vect-widen-sum-short2int-u-d.c: New.
* gcc.target/arm/neon/vect-widen-sum-short2int-u.c: New.
* lib/target-supports.exp
(check_effective_target_vect_widen_sum_hi_to_si_pattern): Return 1 for ARM NEON.
(check_effective_target_vect_widen_sum_hi_to_si): Ditto.
(check_effective_target_vect_widen_sum_qi_to_hi): Ditto.
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index f7f8ab7..f73278d 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -95,6 +95,9 @@
;; Widenable modes.
(define_mode_iterator VW [V8QI V4HI V2SI])
+;; Widenable modes. Used by widen sum.
+(define_mode_iterator VWSD [V8QI V4HI V16QI V8HI])
+
;; Narrowable modes.
(define_mode_iterator VN [V8HI V4SI V2DI])
@@ -555,9 +558,14 @@
;; Same as V_widen, but lower-case.
(define_mode_attr V_widen_l [(V8QI "v8hi") (V4HI "v4si") ( V2SI "v2di")])
-;; Widen. Result is half the number of elements, but widened to double-width.
+;; Widen. Result is half the number of elements, but widened to double-width.
(define_mode_attr V_unpack [(V16QI "V8HI") (V8HI "V4SI") (V4SI "V2DI")])
+;; Widen. Result is half the number of elements, but widened to double-width.
+;; Used by widen sum.
+(define_mode_attr V_widen_sum_d [(V8QI "V4HI") (V4HI "V2SI")
+ (V16QI "V8HI") (V8HI "V4SI")])
+
;; Conditions to be used in extenddi patterns.
(define_mode_attr qhs_zextenddi_cond [(SI "") (HI "&& arm_arch6") (QI "")])
(define_mode_attr qhs_sextenddi_cond [(SI "") (HI "&& arm_arch6")
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 63c327e..839883f 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -1174,7 +1174,29 @@
;; Widening operations
-(define_insn "widen_ssum3"
+(define_expand "widen_usum3"
+ [(match_operand: 0 "s_register_operand" "")
+ (match_operand:VWSD 1 "s_register_operand" "")
+ (match_operand: 2 "s_register_operand" "")]
+ "TARGET_NEON"
+ {
+emit_insn (gen_neon_vpadalu (operands[0], operands[2],
[PATCH PR65767]Fix test case failure on arm-none-eabi
Hi,
As comments at PR65767 and PR65718, we should use namespace other than std
to avoid duplicated definition problem on arm-none-eabi. This patch fixes
the issue. It is an obvious change, but I will wait for approval because of
GCC5 branch.
Is it OK?
gcc/testsuite/ChangeLog
2015-04-20 Bin Cheng
PR testsuite/65767
* g++.dg/lto/pr65276_0.C: Change namespace std to std2.
* g++.dg/lto/pr65276_1.C: Change namespace std to std2.
diff --git a/gcc/testsuite/g++.dg/lto/pr65276_0.C
b/gcc/testsuite/g++.dg/lto/pr65276_0.C
index c8e9699..9c72e68 100644
--- a/gcc/testsuite/g++.dg/lto/pr65276_0.C
+++ b/gcc/testsuite/g++.dg/lto/pr65276_0.C
@@ -7,7 +7,7 @@
extern "C++"
{
- namespace std
+ namespace std2
{
class exception
{
@@ -16,7 +16,7 @@ extern "C++"
};
}
}
-namespace std
+namespace std2
{
struct __cow_string
{
@@ -31,9 +31,9 @@ namespace std
__cow_string _M_msg;
};
}
-namespace std
+namespace std2
{
- class system_error:public std::runtime_error
+ class system_error:public std2::runtime_error
{
};
enum _Ios_Fmtflags
diff --git a/gcc/testsuite/g++.dg/lto/pr65276_1.C
b/gcc/testsuite/g++.dg/lto/pr65276_1.C
index ee49752..dafa4fc 100644
--- a/gcc/testsuite/g++.dg/lto/pr65276_1.C
+++ b/gcc/testsuite/g++.dg/lto/pr65276_1.C
@@ -3,7 +3,7 @@
#pragma interface
extern "C++"
{
- namespace std
+ namespace std2
{
class exception
{
@@ -12,7 +12,7 @@ extern "C++"
};
}
}
-namespace std
+namespace std2
{
struct __cow_string
{
