[gcc r15-3535] testsuite: Use dg-compile, not gcc -c

2024-09-08 Thread J?rgen Kvalsvik via Gcc-cvs
https://gcc.gnu.org/g:b8cd236cbef60fc52524b41e2ca173eb12528792

commit r15-3535-gb8cd236cbef60fc52524b41e2ca173eb12528792
Author: Jørgen Kvalsvik 
Date:   Fri Aug 9 08:28:35 2024 +0200

testsuite: Use dg-compile, not gcc -c

Since this is a pure compile test it makes sense to inform dejagnu of
it.

gcc/testsuite/ChangeLog:

* gcc.misc-tests/gcov-23.c: Use dg-compile, not gcc -c

Diff:
---
 gcc/testsuite/gcc.misc-tests/gcov-23.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.misc-tests/gcov-23.c 
b/gcc/testsuite/gcc.misc-tests/gcov-23.c
index 72849d80e3ae..72ba0aa13895 100644
--- a/gcc/testsuite/gcc.misc-tests/gcov-23.c
+++ b/gcc/testsuite/gcc.misc-tests/gcov-23.c
@@ -1,4 +1,5 @@
-/* { dg-options "-fcondition-coverage -ftest-coverage -O2 -c" } */
+/* { dg-options "-fcondition-coverage -ftest-coverage -O2" } */
+/* { dg-do compile } */
 
 #include 
 #include 


[gcc r15-3536] gcov: Cache source files

2024-09-08 Thread J?rgen Kvalsvik via Gcc-cvs
https://gcc.gnu.org/g:1e17a11171dae2bc5d60380bf48c12ef49f59c7f

commit r15-3536-g1e17a11171dae2bc5d60380bf48c12ef49f59c7f
Author: Jørgen Kvalsvik 
Date:   Thu Jul 4 09:42:24 2024 +0200

gcov: Cache source files

Cache the source files as they are read, rather than discarding them at
the end of output_lines (), and move the reading of the source file to
the new function slurp.

This patch does not really change anything other than moving the file
reading out of output_file, but set gcov up for more interaction with
the source file. The motvating example is reporting coverage on
functions from different source files, notably C++ headers and
((always_inline)).

Here is an example of what gcov does today:

hello.h:
inline __attribute__((always_inline))
int hello (const char *s)
{
  if (s)
printf ("hello, %s!\n", s);
  else
printf ("hello, world!\n");
  return 0;
}

hello.c:
int notmain(const char *entity)
{
  return hello (entity);
}

int main()
{
  const char *empty = 0;
  if (!empty)
hello (empty);
  else
puts ("Goodbye!");
}

$ gcov -abc hello
function notmain called 0 returned 0% blocks executed 0%
#:4:int notmain(const char *entity)
%:4-block 2
branch  0 never executed (fallthrough)
branch  1 never executed
-:5:{
#:6:  return hello (entity);
%:6-block 7
-:7:}

Clearly there is a branch in notmain, but the branch comes from the
inlining of hello. This is not very obvious from looking at the output.
Here is hello.h.gcov:

-:3:inline __attribute__((always_inline))
-:4:int hello (const char *s)
-:5:{
#:6:  if (s)
%:6-block 3
branch  0 never executed (fallthrough)
branch  1 never executed
%:6-block 2
branch  2 never executed (fallthrough)
branch  3 never executed
#:7:printf ("hello, %s!\n", s);
%:7-block 4
call0 never executed
%:7-block 3
call1 never executed
-:8:  else
#:9:printf ("hello, world!\n");
%:9-block 5
call0 never executed
%:9-block 4
call1 never executed
#:   10:  return 0;
%:   10-block 6
%:   10-block 5
-:   11:}

The blocks from the different call sites have all been interleaved.

The reporting could tuned be to list the inlined function, too, like
this:

1:4:int notmain(const char *entity)
-: == inlined from hello.h ==
1:6:  if (s)
branch  0 taken 0 (fallthrough)
branch  1 taken 1
#:7:printf ("hello, %s!\n", s);
%:7-block 3
call0 never executed
-:8:  else
1:9:printf ("hello, world!\n");
1:9-block 4
call0 returned 1
1:   10:  return 0;
1:   10-block 5
-: == inlined from hello.h (end) ==
-:5:{
1:6:  return hello (entity);
1:6-block 7
-:7:}

Implementing something to this effect relies on having the sources for
both files (hello.c, hello.h) available, which is what this patch sets
up.

Note that the previous reading code would leak the source file content,
and explicitly storing them is not a huge departure nor performance
implication. I verified this with valgrind:

With slurp:

$ valgrind gcov ./hello
== == Memcheck, a memory error detector
== == Copyright (C) 2002-2022, and GNU GPL'd, by Julian Seward et al.
== == Using Valgrind-3.19.0 and LibVEX; rerun with -h for copyright info
== == Command: ./gcc/gcov demo
== ==
File 'hello.c'
Lines executed:100.00% of 4
Creating 'hello.c.gcov'

File 'hello.h'
Lines executed:75.00% of 4
Creating 'hello.h.gcov'
== ==
== == HEAP SUMMARY:
== == in use at exit: 84,907 bytes in 54 blocks
== ==   total heap usage: 254 allocs, 200 frees, 137,156 bytes allocated
== ==
== == LEAK SUMMARY:
== ==definitely lost: 1,237 bytes in 22 blocks
== ==indirectly lost: 562 bytes in 18 blocks
== ==  possibly lost: 0 bytes in 0 blocks
== ==still reachable: 83,108 bytes in 14 blocks
== ==   of which reachable via heuristic:
== == newarray   : 1,544 bytes in 1 blocks
== == suppressed: 0 bytes in 0 blocks
== == Rerun with --leak-check=full to see details of leaked memory
== ==
== == For lists of detected and suppressed errors, rerun with: -s
== == ERROR SUMMARY:

[gcc r15-3537] x86-64: Don't use temp for argument in a TImode register

2024-09-08 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:fa7bbb065c63aa802e0bbb04d605407dad58cf94

commit r15-3537-gfa7bbb065c63aa802e0bbb04d605407dad58cf94
Author: H.J. Lu 
Date:   Fri Sep 6 05:24:07 2024 -0700

x86-64: Don't use temp for argument in a TImode register

Don't use temp for a PARALLEL BLKmode argument of an EXPR_LIST expression
in a TImode register.  Otherwise, the TImode variable will be put in
the GPR save area which guarantees only 8-byte alignment.

gcc/

PR target/116621
* config/i386/i386.cc (ix86_gimplify_va_arg): Don't use temp for
a PARALLEL BLKmode container of an EXPR_LIST expression in a
TImode register.

gcc/testsuite/

PR target/116621
* gcc.target/i386/pr116621.c: New test.

Signed-off-by: H.J. Lu 

Diff:
---
 gcc/config/i386/i386.cc  | 22 ++--
 gcc/testsuite/gcc.target/i386/pr116621.c | 43 
 2 files changed, 63 insertions(+), 2 deletions(-)

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 707b75a6d5db..45320124b91c 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -4908,13 +4908,31 @@ ix86_gimplify_va_arg (tree valist, tree type, 
gimple_seq *pre_p,
 
   examine_argument (nat_mode, type, 0, &needed_intregs, &needed_sseregs);
 
-  need_temp = (!REG_P (container)
+  bool container_in_reg = false;
+  if (REG_P (container))
+   container_in_reg = true;
+  else if (GET_CODE (container) == PARALLEL
+  && GET_MODE (container) == BLKmode
+  && XVECLEN (container, 0) == 1)
+   {
+ /* Check if it is a PARALLEL BLKmode container of an EXPR_LIST
+expression in a TImode register.  In this case, temp isn't
+needed.  Otherwise, the TImode variable will be put in the
+GPR save area which guarantees only 8-byte alignment.   */
+ rtx x = XVECEXP (container, 0, 0);
+ if (GET_CODE (x) == EXPR_LIST
+ && REG_P (XEXP (x, 0))
+ && XEXP (x, 1) == const0_rtx)
+   container_in_reg = true;
+   }
+
+  need_temp = (!container_in_reg
   && ((needed_intregs && TYPE_ALIGN (type) > 64)
   || TYPE_ALIGN (type) > 128));
 
   /* In case we are passing structure, verify that it is consecutive block
  on the register save area.  If not we need to do moves.  */
-  if (!need_temp && !REG_P (container))
+  if (!need_temp && !container_in_reg)
{
  /* Verify that all registers are strictly consecutive  */
  if (SSE_REGNO_P (REGNO (XEXP (XVECEXP (container, 0, 0), 0
diff --git a/gcc/testsuite/gcc.target/i386/pr116621.c 
b/gcc/testsuite/gcc.target/i386/pr116621.c
new file mode 100644
index ..704266458a85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr116621.c
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+#include 
+#include 
+
+union S8302
+{
+  union
+  {
+double b;
+int c;
+  } a;
+  long double d;
+  unsigned short int f[5];
+};
+
+union S8302 s8302;
+extern void check8302va (int i, ...);
+
+int
+main (void)
+{
+  memset (&s8302, '\0', sizeof (s8302));
+  s8302.a.b = -221438.25;
+  check8302va (1, s8302);
+  return 0;
+}
+
+__attribute__((noinline, noclone))
+void
+check8302va (int z, ...)
+{
+  union S8302 arg, *p;
+  va_list ap;
+
+  __builtin_va_start (ap, z);
+  p = &s8302;
+  arg = __builtin_va_arg (ap, union S8302);
+  if (p->a.b != arg.a.b)
+__builtin_abort ();
+  __builtin_va_end (ap);
+}


[gcc r14-10654] libstdc++: use concrete return type for std::forward_like

2024-09-08 Thread Patrick Palka via Libstdc++-cvs
https://gcc.gnu.org/g:140aab25a4865433d987d73c57f4ddf11fdac1e2

commit r14-10654-g140aab25a4865433d987d73c57f4ddf11fdac1e2
Author: Patrick Palka 
Date:   Sat Aug 3 09:05:05 2024 -0400

libstdc++: use concrete return type for std::forward_like

Inspired by https://github.com/llvm/llvm-project/issues/101614 this
inverts the relationship between forward_like and __like_t so that
forward_like is defined in terms of __like_t and with a concrete return
type.  __like_t in turn is defined via partial specializations that
pattern match on the const- and reference-ness of T.

This turns out to be more SFINAE friendly and significantly cheaper
to compile than the previous implementation.

libstdc++-v3/ChangeLog:

* include/bits/move.h (__like_impl): New metafunction.
(__like_t): Redefine in terms of __like_impl.
(forward_like): Redefine in terms of __like_t.
* testsuite/20_util/forward_like/2_neg.cc: Don't expect
error outside the immediate context anymore.

Reviewed-by: Jonathan Wakely 
(cherry picked from commit 8256d5c0097dff00f9bdf9ee0c9d53bd7cec2802)

Diff:
---
 libstdc++-v3/include/bits/move.h   | 47 +++---
 .../testsuite/20_util/forward_like/2_neg.cc|  6 +--
 2 files changed, 26 insertions(+), 27 deletions(-)

diff --git a/libstdc++-v3/include/bits/move.h b/libstdc++-v3/include/bits/move.h
index bb200c95964a..8397a01b6323 100644
--- a/libstdc++-v3/include/bits/move.h
+++ b/libstdc++-v3/include/bits/move.h
@@ -88,31 +88,32 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
 #if __glibcxx_forward_like // C++ >= 23
   template
-  [[nodiscard]]
-  constexpr decltype(auto)
-  forward_like(_Up&& __x) noexcept
-  {
-constexpr bool __as_rval = is_rvalue_reference_v<_Tp&&>;
-
-if constexpr (is_const_v>)
-  {
-   using _Up2 = remove_reference_t<_Up>;
-   if constexpr (__as_rval)
- return static_cast(__x);
-   else
- return static_cast(__x);
-  }
-else
-  {
-   if constexpr (__as_rval)
- return static_cast&&>(__x);
-   else
- return static_cast<_Up&>(__x);
-  }
-  }
+  struct __like_impl; // _Tp must be a reference and _Up an lvalue reference
+
+  template
+  struct __like_impl<_Tp&, _Up&>
+  { using type = _Up&; };
+
+  template
+  struct __like_impl
+  { using type = const _Up&; };
+
+  template
+  struct __like_impl<_Tp&&, _Up&>
+  { using type = _Up&&; };
+
+  template
+  struct __like_impl
+  { using type = const _Up&&; };
 
   template
-using __like_t = decltype(std::forward_like<_Tp>(std::declval<_Up>()));
+using __like_t = typename __like_impl<_Tp&&, _Up&>::type;
+
+  template
+  [[nodiscard]]
+  constexpr __like_t<_Tp, _Up>
+  forward_like(_Up&& __x) noexcept
+  { return static_cast<__like_t<_Tp, _Up>>(__x); }
 #endif
 
   /**
diff --git a/libstdc++-v3/testsuite/20_util/forward_like/2_neg.cc 
b/libstdc++-v3/testsuite/20_util/forward_like/2_neg.cc
index ff835af19151..5dafa419a7ea 100644
--- a/libstdc++-v3/testsuite/20_util/forward_like/2_neg.cc
+++ b/libstdc++-v3/testsuite/20_util/forward_like/2_neg.cc
@@ -2,9 +2,7 @@
 
 #include 
 
-auto x1 = std::forward_like(1); // { dg-error "here" }
+auto x1 = std::forward_like(1); // { dg-error "no match" }
 // { dg-error "forming reference to void" "" { target *-*-* } 0 }
-auto x2 = std::forward_like(1); // { dg-error "here" }
+auto x2 = std::forward_like(1); // { dg-error "no match" }
 // { dg-error "forming reference to qualified function" "" { target *-*-* } 0 }
-
-// { dg-prune-output "inconsistent deduction for auto return type" } // 
PR111484


[gcc r14-10655] c++: inherited CTAD fixes [PR116276]

2024-09-08 Thread Patrick Palka via Gcc-cvs
https://gcc.gnu.org/g:b5ed381d05e0ed9edf2f320b71f8775ea96a4866

commit r14-10655-gb5ed381d05e0ed9edf2f320b71f8775ea96a4866
Author: Patrick Palka 
Date:   Fri Aug 9 21:15:25 2024 -0400

c++: inherited CTAD fixes [PR116276]

This implements the overlooked inherited vs non-inherited guide
tiebreaker from P2582R1.  This requires tracking inherited-ness of a
guide, for which it seems natural to reuse the lang_decl_fn::context
field which for a constructor tracks its inherited-ness.

This patch also works around CLASSTYPE_CONSTRUCTORS not reliably
returning all inherited constructors (due to some using-decl handling
quirks in in push_class_level_binding) by iterating over TYPE_FIELDS
instead.

This patch also makes us recognize another written form of inherited
constructor, 'using Base::Base::Base' whose USING_DECL_SCOPE is a
TYPENAME_TYPE.

PR c++/116276

gcc/cp/ChangeLog:

* call.cc (joust): Implement P2582R1 inherited vs non-inherited
guide tiebreaker.
* cp-tree.h (lang_decl_fn::context): Document usage in
deduction_guide_p FUNCTION_DECLs.
(inherited_guide_p): Declare.
* pt.cc (inherited_guide_p): Define.
(set_inherited_guide_context): Define.
(alias_ctad_tweaks): Use set_inherited_guide_context.
(inherited_ctad_tweaks): Recognize some inherited constructors
whose scope is a TYPENAME_TYPE.
(ctor_deduction_guides_for): For C++23 inherited CTAD, iterate
over TYPE_FIELDS instead of CLASSTYPE_CONSTRUCTORS to recognize
all inherited constructors.

gcc/testsuite/ChangeLog:

* g++.dg/cpp23/class-deduction-inherited4.C: Remove an xfail.
* g++.dg/cpp23/class-deduction-inherited5.C: New test.
* g++.dg/cpp23/class-deduction-inherited6.C: New test.

Reviewed-by: Jason Merrill 
(cherry picked from commit 8cc67b520968ca9a13fd96896522aa66e39a99e2)

Diff:
---
 gcc/cp/call.cc | 27 -
 gcc/cp/cp-tree.h   |  8 ++--
 gcc/cp/pt.cc   | 43 
 .../g++.dg/cpp23/class-deduction-inherited4.C  |  4 +-
 .../g++.dg/cpp23/class-deduction-inherited5.C  | 25 
 .../g++.dg/cpp23/class-deduction-inherited6.C  | 46 ++
 6 files changed, 139 insertions(+), 14 deletions(-)

diff --git a/gcc/cp/call.cc b/gcc/cp/call.cc
index 793b98347124..0f4eeeb53951 100644
--- a/gcc/cp/call.cc
+++ b/gcc/cp/call.cc
@@ -13226,10 +13226,35 @@ joust (struct z_candidate *cand1, struct z_candidate 
*cand2, bool warn,
   else if (cand2->rewritten ())
 return 1;
 
-  /* F1 is generated from a deduction-guide (13.3.1.8) and F2 is not */
   if (deduction_guide_p (cand1->fn))
 {
   gcc_assert (deduction_guide_p (cand2->fn));
+
+  /* F1 and F2 are generated from class template argument deduction for a
+class D, and F2 is generated from inheriting constructors from a base
+class of D while F1 is not, and for each explicit function argument,
+the corresponding parameters of F1 and F2 are either both ellipses or
+have the same type.  */
+  bool inherited1 = inherited_guide_p (cand1->fn);
+  bool inherited2 = inherited_guide_p (cand2->fn);
+  if (int diff = inherited2 - inherited1)
+   {
+ for (i = 0; i < len; ++i)
+   {
+ conversion *t1 = cand1->convs[i + off1];
+ conversion *t2 = cand2->convs[i + off2];
+ /* ??? It seems the ellipses part of this tiebreaker isn't
+needed since a mismatch should have broken the tie earlier
+during ICS comparison.  */
+ gcc_checking_assert (t1->ellipsis_p == t2->ellipsis_p);
+ if (!same_type_p (t1->type, t2->type))
+   break;
+   }
+ if (i == len)
+   return diff;
+   }
+
+  /* F1 is generated from a deduction-guide (13.3.1.8) and F2 is not */
   /* We distinguish between candidates from an explicit deduction guide and
 candidates built from a constructor based on DECL_ARTIFICIAL.  */
   int art1 = DECL_ARTIFICIAL (cand1->fn);
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 3f607313db61..ab2b0904ed60 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -2981,9 +2981,10 @@ struct GTY(()) lang_decl_fn {
  this pointer and result pointer adjusting thunks are
  chained here.  This pointer thunks to return pointer thunks
  will be chained on the return pointer thunk.
- For a DECL_CONSTUCTOR_P FUNCTION_DECL, this is the base from
- whence we inherit.  Otherwise, it is the class in which a
- (namespace-scope) friend is defined (if any).   */
+ For a DECL_CONSTRUCTOR_P or deduction_guide_p FUNCTION_DECL,
+ this i

[gcc r14-10656] c++: c->B::m access resolved through current inst [PR116320]

2024-09-08 Thread Patrick Palka via Gcc-cvs
https://gcc.gnu.org/g:149d87fbe661da29d8a0aa671b42bd532206a8b8

commit r14-10656-g149d87fbe661da29d8a0aa671b42bd532206a8b8
Author: Patrick Palka 
Date:   Thu Aug 15 10:23:54 2024 -0400

c++: c->B::m access resolved through current inst [PR116320]

Here when checking the access of (the injected-class-name) B in c->B::m
at parse time, we notice its context B (now the type) is a base of the
object type C, so we proceed to use C as the effective qualifying
type.  But this C is the dependent specialization not the primary
template type, so it has empty TYPE_BINFO, which leads to a segfault later
from perform_or_defer_access_check.

The reason the DERIVED_FROM_P (B, C) test guarding this code path works
despite C having empty TYPE_BINFO is because of its currently_open_class
logic (added in r9-713-gd9338471b91bbe) which replaces a dependent
specialization with the primary template type if we're inside it.  So the
safest fix seems to be to call currently_open_class in the caller as well.

PR c++/116320

gcc/cp/ChangeLog:

* semantics.cc (check_accessibility_of_qualified_id): Try
currently_open_class when using the object type as the
effective qualifying type.

gcc/testsuite/ChangeLog:

* g++.dg/template/access42.C: New test.

Reviewed-by: Jason Merrill 
(cherry picked from commit 484f139ccd3b631a777802e810a632678b42ffab)

Diff:
---
 gcc/cp/semantics.cc  | 11 ---
 gcc/testsuite/g++.dg/template/access42.C | 17 +
 2 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/gcc/cp/semantics.cc b/gcc/cp/semantics.cc
index b5569066708e..ceeac82fa081 100644
--- a/gcc/cp/semantics.cc
+++ b/gcc/cp/semantics.cc
@@ -2497,9 +2497,14 @@ check_accessibility_of_qualified_id (tree decl,
 OBJECT_TYPE.  */
   && CLASS_TYPE_P (object_type)
   && DERIVED_FROM_P (scope, object_type))
-/* If we are processing a `->' or `.' expression, use the type of the
-   left-hand side.  */
-qualifying_type = object_type;
+{
+  /* If we are processing a `->' or `.' expression, use the type of the
+left-hand side.  */
+  if (tree open = currently_open_class (object_type))
+   qualifying_type = open;
+  else
+   qualifying_type = object_type;
+}
   else if (nested_name_specifier)
 {
   /* If the reference is to a non-static member of the
diff --git a/gcc/testsuite/g++.dg/template/access42.C 
b/gcc/testsuite/g++.dg/template/access42.C
new file mode 100644
index ..f1dcbce80c24
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/access42.C
@@ -0,0 +1,17 @@
+// PR c++/116320
+// { dg-do compile { target c++11 } }
+
+template struct C;
+template using C_ptr = C*;
+
+struct B { int m; using B_typedef = B; };
+
+template
+struct C : B {
+  void f(C_ptr c) {
+c->B::m;
+c->B_typedef::m;
+  }
+};
+
+template struct C;


[gcc r15-3539] doc: Enhance Intel CPU documentation

2024-09-08 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:91bc2ad28c58ca3f4c2f96601d8af51f570e08c4

commit r15-3539-g91bc2ad28c58ca3f4c2f96601d8af51f570e08c4
Author: Haochen Jiang 
Date:   Fri Sep 6 11:19:26 2024 +0800

doc: Enhance Intel CPU documentation

This patch will add those recent aliased CPU names into documentation
for clearness.

gcc/ChangeLog:

PR target/116617
* doc/invoke.texi: Add meteorlake, raptorlake and lunarlake.

Diff:
---
 gcc/doc/invoke.texi | 25 ++---
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 019e0a5ca805..b9a86a9a181f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -34741,12 +34741,14 @@ UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, 
AVX512-FP16 and AVX512BF16
 instruction set support.
 
 @item alderlake
-Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
-SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES,
-XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B,
-CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,
-VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set
-support.
+@itemx raptorlake
+@itemx meteorlake
+Intel Alderlake/Raptorlake/Meteorlake CPU with 64-bit extensions, MOVBE, MMX,
+SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND,
+XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,
+MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,
+LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and
+AVX-VNNI instruction set support.
 
 @item rocketlake
 Intel Rocketlake CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3
@@ -34788,11 +34790,12 @@ UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT and 
CMPCCXADD instruction set
 support.
 
 @item arrowlake-s
-Intel Arrow Lake S CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
-SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,
-XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
-MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,
-PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
+@itemx lunarlake
+Intel Arrow Lake S/Lunarlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
+SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE,
+XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,
+MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,
+LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
 UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512,
 SM3 and SM4 instruction set support.


[gcc r14-10658] doc: Enhance Intel CPU documentation

2024-09-08 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:3951efed1cce970a5c61eacbad7e5f5314a9fc17

commit r14-10658-g3951efed1cce970a5c61eacbad7e5f5314a9fc17
Author: Haochen Jiang 
Date:   Fri Sep 6 11:19:26 2024 +0800

doc: Enhance Intel CPU documentation

This patch will add those recent aliased CPU names into documentation
for clearness.

gcc/ChangeLog:

PR target/116617
* doc/invoke.texi: Add meteorlake, raptorlake and lunarlake.

Diff:
---
 gcc/doc/invoke.texi | 25 ++---
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 80476bcf37a1..176851baf61d 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -34484,12 +34484,14 @@ UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, 
AVX512-FP16 and AVX512BF16
 instruction set support.
 
 @item alderlake
-Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
-SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES,
-XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B,
-CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,
-VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set
-support.
+@itemx raptorlake
+@itemx meteorlake
+Intel Alderlake/Raptorlake/Meteorlake CPU with 64-bit extensions, MOVBE, MMX,
+SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND,
+XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,
+MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,
+LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and
+AVX-VNNI instruction set support.
 
 @item rocketlake
 Intel Rocketlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3
@@ -34531,11 +34533,12 @@ UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT and 
CMPCCXADD instruction set
 support.
 
 @item arrowlake-s
-Intel Arrow Lake S CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
-SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC,
-XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI,
-MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT,
-PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
+@itemx lunarlake
+Intel Arrow Lake S/Lunarlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
+SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE,
+XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,
+MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,
+LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
 UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512,
 SM3 and SM4 instruction set support.


[gcc r13-9011] doc: Enhance Intel CPU documentation

2024-09-08 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:0a16b1b97c112e41a0d37235e83678a67abd9454

commit r13-9011-g0a16b1b97c112e41a0d37235e83678a67abd9454
Author: Haochen Jiang 
Date:   Fri Sep 6 11:19:26 2024 +0800

doc: Enhance Intel CPU documentation

This patch will add those recent aliased CPU names into documentation
for clearness, partly backported from GCC15 trunk patch.

gcc/ChangeLog:

PR target/116617
* doc/invoke.texi: Add meteorlake, raptorlake and lunarlake.

Diff:
---
 gcc/doc/invoke.texi | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b17d0cf93411..0f665ed6779a 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -32532,12 +32532,14 @@ UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, 
AVX512-FP16 and AVX512BF16
 instruction set support.
 
 @item alderlake
-Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
-SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES,
-XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B,
-CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU,
-VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set
-support.
+@itemx raptorlake
+@itemx meteorlake
+Intel Alderlake/Raptorlake/Meteorlake CPU with 64-bit extensions, MOVBE, MMX,
+SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND,
+XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,
+MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,
+LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and
+AVX-VNNI instruction set support.
 
 @item rocketlake
 Intel Rocketlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3