[gcc r15-1935] testsuite: Tests the pattern folding x/sqrt(x) to sqrt(x) for Float16
https://gcc.gnu.org/g:1ae5fc24e86ecc9e7b60346d9ca2e56f83517bda
commit r15-1935-g1ae5fc24e86ecc9e7b60346d9ca2e56f83517bda
Author: Jennifer Schmitz
Date: Wed Jul 10 12:54:01 2024 +0530
testsuite: Tests the pattern folding x/sqrt(x) to sqrt(x) for Float16
As a follow-up to adding a pattern that folds x/sqrt(x) to sqrt(x) in
match.pd, this patch adds a test case for type Float16 for armv8.2-a+fp16.
The patch was bootstrapped and regtested on aarch64-linux-gnu, no
regression.
Signed-off-by: Jennifer Schmitz
gcc/testsuite/
* gcc.target/aarch64/sqrt_div_float16.c: New test.
Diff:
---
gcc/testsuite/gcc.target/aarch64/sqrt_div_float16.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/gcc/testsuite/gcc.target/aarch64/sqrt_div_float16.c
b/gcc/testsuite/gcc.target/aarch64/sqrt_div_float16.c
new file mode 100644
index ..c4f297ef17ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sqrt_div_float16.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -fdump-tree-forwprop-details" } */
+/* { dg-require-effective-target c99_runtime } */
+
+#pragma GCC target ("arch=armv8.2-a+fp16")
+
+_Float16 f (_Float16 x)
+{
+ _Float16 t1 = __builtin_sqrt (x);
+ _Float16 t2 = x / t1;
+ return t2;
+}
+
+/* { dg-final { scan-tree-dump "gimple_simplified to t2_\[0-9\]+ = .SQRT
.x_\[0-9\]*.D.." "forwprop1" } } */
[gcc r15-1936] Match: Support form 2 for the .SAT_TRUNC
https://gcc.gnu.org/g:80e446e829d818dc19daa6e671b9626e93ee4949
commit r15-1936-g80e446e829d818dc19daa6e671b9626e93ee4949
Author: Pan Li
Date: Fri Jul 5 20:36:35 2024 +0800
Match: Support form 2 for the .SAT_TRUNC
This patch would like to add form 2 support for the .SAT_TRUNC. Aka:
Form 2:
#define DEF_SAT_U_TRUC_FMT_2(NT, WT) \
NT __attribute__((noinline)) \
sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \
{\
bool overflow = x > (WT)(NT)(-1); \
return overflow ? (NT)-1 : (NT)x; \
}
DEF_SAT_U_TRUC_FMT_2(uint32, uint64)
Before this patch:
3 │
4 │ __attribute__((noinline))
5 │ uint32_t sat_u_truc_uint64_t_to_uint32_t_fmt_2 (uint64_t x)
6 │ {
7 │ uint32_t _1;
8 │ long unsigned int _3;
9 │
10 │ ;; basic block 2, loop depth 0
11 │ ;;pred: ENTRY
12 │ _3 = MIN_EXPR ;
13 │ _1 = (uint32_t) _3;
14 │ return _1;
15 │ ;;succ: EXIT
16 │
17 │ }
After this patch:
3 │
4 │ __attribute__((noinline))
5 │ uint32_t sat_u_truc_uint64_t_to_uint32_t_fmt_2 (uint64_t x)
6 │ {
7 │ uint32_t _1;
8 │
9 │ ;; basic block 2, loop depth 0
10 │ ;;pred: ENTRY
11 │ _1 = .SAT_TRUNC (x_2(D)); [tail call]
12 │ return _1;
13 │ ;;succ: EXIT
14 │
15 │ }
The below test suites are passed for this patch:
1. The x86 bootstrap test.
2. The x86 fully regression test.
3. The rv64gcv fully regresssion test.
gcc/ChangeLog:
* match.pd: Add form 2 for .SAT_TRUNC.
* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
Add new case NOP_EXPR, and try to match SAT_TRUNC.
Signed-off-by: Pan Li
Diff:
---
gcc/match.pd | 17 -
gcc/tree-ssa-math-opts.cc | 4
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/gcc/match.pd b/gcc/match.pd
index 4edfa2ae2c90..3759c64d461f 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3234,7 +3234,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
(if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type)
&& types_match (type, @0, @1
-/* Unsigned saturation truncate, case 1 (), sizeof (WT) > sizeof (NT).
+/* Unsigned saturation truncate, case 1, sizeof (WT) > sizeof (NT).
SAT_U_TRUNC = (NT)x | (NT)(-(X > (WT)(NT)(-1))). */
(match (unsigned_integer_sat_trunc @0)
(bit_ior:c (negate (convert (gt @0 INTEGER_CST@1)))
@@ -3250,6 +3250,21 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
}
(if (otype_precision < itype_precision && wi::eq_p (trunc_max, int_cst))
+/* Unsigned saturation truncate, case 2, sizeof (WT) > sizeof (NT).
+ SAT_U_TRUNC = (NT)(MIN_EXPR (X, 255)). */
+(match (unsigned_integer_sat_trunc @0)
+ (convert (min @0 INTEGER_CST@1))
+ (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type)
+ && TYPE_UNSIGNED (TREE_TYPE (@0)))
+ (with
+ {
+ unsigned itype_precision = TYPE_PRECISION (TREE_TYPE (@0));
+ unsigned otype_precision = TYPE_PRECISION (type);
+ wide_int trunc_max = wi::mask (otype_precision, false, itype_precision);
+ wide_int int_cst = wi::to_wide (@1, itype_precision);
+ }
+ (if (otype_precision < itype_precision && wi::eq_p (trunc_max, int_cst))
+
/* x > y && x != XXX_MIN --> x > y
x > y && x == XXX_MIN --> false . */
(for eqne (eq ne)
diff --git a/gcc/tree-ssa-math-opts.cc b/gcc/tree-ssa-math-opts.cc
index a35caf5f0588..ac86be8eb947 100644
--- a/gcc/tree-ssa-math-opts.cc
+++ b/gcc/tree-ssa-math-opts.cc
@@ -6170,6 +6170,10 @@ math_opts_dom_walker::after_dom_children (basic_block bb)
match_unsigned_saturation_sub (&gsi, as_a (stmt));
break;
+ case NOP_EXPR:
+ match_unsigned_saturation_trunc (&gsi, as_a (stmt));
+ break;
+
default:;
}
}
[gcc r15-1937] [PR115394] Remove streamer_debugging and it's uses.
https://gcc.gnu.org/g:23c2e6de305b8a9e44041d54e587f1333f06134c
commit r15-1937-g23c2e6de305b8a9e44041d54e587f1333f06134c
Author: Prathamesh Kulkarni
Date: Wed Jul 10 16:58:20 2024 +0530
[PR115394] Remove streamer_debugging and it's uses.
gcc/ChangeLog:
PR lto/115394
* lto-streamer.h: Remove streamer_debugging definition.
* lto-streamer-out.cc (stream_write_tree_ref): Remove use of
streamer_debugging.
(lto_output_tree): Likewise.
* tree-streamer-in.cc (streamer_read_tree_bitfields): Likewise.
(streamer_get_pickled_tree): Likewise.
* tree-streamer-out.cc (pack_ts_base_value_fields): Likewise.
Signed-off-by: Prathamesh Kulkarni
Diff:
---
gcc/lto-streamer-out.cc | 8
gcc/lto-streamer.h | 4
gcc/tree-streamer-in.cc | 18 --
gcc/tree-streamer-out.cc | 2 --
4 files changed, 32 deletions(-)
diff --git a/gcc/lto-streamer-out.cc b/gcc/lto-streamer-out.cc
index d4f728094ed5..8b4bf9659cb3 100644
--- a/gcc/lto-streamer-out.cc
+++ b/gcc/lto-streamer-out.cc
@@ -487,8 +487,6 @@ stream_write_tree_ref (struct output_block *ob, tree t)
gcc_checking_assert (tag == LTO_global_stream_ref);
streamer_write_hwi (ob, -(int)(ix * 2 + id + 1));
}
- if (streamer_debugging)
- streamer_write_uhwi (ob, TREE_CODE (t));
}
}
@@ -1839,9 +1837,6 @@ lto_output_tree (struct output_block *ob, tree expr,
will instantiate two different nodes for the same object. */
streamer_write_record_start (ob, LTO_tree_pickle_reference);
streamer_write_uhwi (ob, ix);
- if (streamer_debugging)
- streamer_write_enum (ob->main_stream, LTO_tags, LTO_NUM_TAGS,
-lto_tree_code_to_tag (TREE_CODE (expr)));
lto_stats.num_pickle_refs_output++;
}
else
@@ -1882,9 +1877,6 @@ lto_output_tree (struct output_block *ob, tree expr,
}
streamer_write_record_start (ob, LTO_tree_pickle_reference);
streamer_write_uhwi (ob, ix);
- if (streamer_debugging)
- streamer_write_enum (ob->main_stream, LTO_tags, LTO_NUM_TAGS,
-lto_tree_code_to_tag (TREE_CODE (expr)));
}
in_dfs_walk = false;
lto_stats.num_pickle_refs_output++;
diff --git a/gcc/lto-streamer.h b/gcc/lto-streamer.h
index e8dbba471edb..79c44d2cae71 100644
--- a/gcc/lto-streamer.h
+++ b/gcc/lto-streamer.h
@@ -126,10 +126,6 @@ along with GCC; see the file COPYING3. If not see
typedef unsigned char lto_decl_flags_t;
-/* Stream additional data to LTO object files to make it easier to debug
- streaming code. This changes object files. */
-static const bool streamer_debugging = false;
-
/* Tags representing the various IL objects written to the bytecode file
(GIMPLE statements, basic blocks, EH regions, tree nodes, etc).
diff --git a/gcc/tree-streamer-in.cc b/gcc/tree-streamer-in.cc
index 35341a2b2b68..c248a74f7a1a 100644
--- a/gcc/tree-streamer-in.cc
+++ b/gcc/tree-streamer-in.cc
@@ -485,15 +485,6 @@ streamer_read_tree_bitfields (class lto_input_block *ib,
/* Read the bitpack of non-pointer values from IB. */
bp = streamer_read_bitpack (ib);
-
- /* The first word in BP contains the code of the tree that we
- are about to read. */
- if (streamer_debugging)
-{
- code = (enum tree_code) bp_unpack_value (&bp, 16);
- lto_tag_check (lto_tree_code_to_tag (code),
-lto_tree_code_to_tag (TREE_CODE (expr)));
-}
code = TREE_CODE (expr);
/* Note that all these functions are highly sensitive to changes in
@@ -1110,17 +1101,8 @@ streamer_get_pickled_tree (class lto_input_block *ib,
class data_in *data_in)
{
unsigned HOST_WIDE_INT ix;
tree result;
- enum LTO_tags expected_tag;
ix = streamer_read_uhwi (ib);
result = streamer_tree_cache_get_tree (data_in->reader_cache, ix);
-
- if (streamer_debugging)
-{
- expected_tag = streamer_read_enum (ib, LTO_tags, LTO_NUM_TAGS);
- gcc_assert (result
- && TREE_CODE (result) == lto_tag_to_tree_code (expected_tag));
-}
-
return result;
}
diff --git a/gcc/tree-streamer-out.cc b/gcc/tree-streamer-out.cc
index c30ab62a5856..b7205287ffb6 100644
--- a/gcc/tree-streamer-out.cc
+++ b/gcc/tree-streamer-out.cc
@@ -71,8 +71,6 @@ write_identifier (struct output_block *ob,
static inline void
pack_ts_base_value_fields (struct bitpack_d *bp, tree expr)
{
- if (streamer_debugging)
-bp_pack_value (bp, TREE_CODE (expr), 16);
if (!TYPE_P (expr))
{
bp_pack_value (bp, TREE_SIDE_EFFECTS (expr), 1);
[gcc r15-1938] arm: cleanup legacy ARM_PE code
https://gcc.gnu.org/g:73f5a3aa3e2f468d2c1a0f6884fe433a4f30
commit r15-1938-g73f5a3aa3e2f468d2c1a0f6884fe433a4f30
Author: Richard Earnshaw
Date: Tue Jul 9 22:31:32 2024 +0100
arm: cleanup legacy ARM_PE code
The arm 'pe' target was removed back in 2012 when the FPA support was
removed, but in a small number of places some conditional code was
accidentally left behind. It's no-longer needed, so remove it.
gcc/ChangeLog:
* config/arm/arm-protos.h (arm_dllexport_name_p): Remove prototype.
(arm_dllimport_name_p): Likewise.
(arm_pe_unique_section): Likewise.
(arm_pe_encode_section_info): Likewise.
(arm_dllexport_p): Likewise.
(arm_dllimport_p): Likewise.
(arm_mark_dllexport): Likewise.
(arm_mark_dllimport): Likewise.
(arm_change_mode_p): Likewise.
* config/arm/arm.cc (arm_gnu_attributes): Remove attributes for
ARM_PE.
(TARGET_ENCODE_SECTION_INFO): Remove setting for ARM_PE.
(is_called_in_ARM_mode): Remove ARM_PE conditional code.
(thumb1_output_interwork): Remove obsolete ARM_PE code.
(arm_encode_section_info): Remove surrounding #ifndef.
Diff:
---
gcc/config/arm/arm-protos.h | 12
gcc/config/arm/arm.cc | 32 +---
2 files changed, 1 insertion(+), 43 deletions(-)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 34d6be76e94a..50cae2b513a2 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -266,19 +266,7 @@ extern const char *thumb1_output_casesi (rtx *);
extern const char *thumb2_output_casesi (rtx *);
#endif
-/* Defined in pe.c. */
-extern int arm_dllexport_name_p (const char *);
-extern int arm_dllimport_name_p (const char *);
-
-#ifdef TREE_CODE
-extern void arm_pe_unique_section (tree, int);
-extern void arm_pe_encode_section_info (tree, rtx, int);
-extern int arm_dllexport_p (tree);
-extern int arm_dllimport_p (tree);
-extern void arm_mark_dllexport (tree);
-extern void arm_mark_dllimport (tree);
extern bool arm_change_mode_p (tree);
-#endif
extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
struct gcc_options *);
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 93993d95eb96..92cd168e6593 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -208,9 +208,7 @@ static int aapcs_select_return_coproc (const_tree,
const_tree);
static void arm_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED;
static void arm_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED;
#endif
-#ifndef ARM_PE
static void arm_encode_section_info (tree, rtx, int);
-#endif
static void arm_file_end (void);
static void arm_file_start (void);
@@ -352,21 +350,7 @@ static const attribute_spec arm_gnu_attributes[] =
NULL },
{ "naked",0, 0, true, false, false, false,
arm_handle_fndecl_attribute, NULL },
-#ifdef ARM_PE
- /* ARM/PE has three new attributes:
- interfacearm - ?
- dllexport - for exporting a function/variable that will live in a dll
- dllimport - for importing a function/variable from a dll
-
- Microsoft allows multiple declspecs in one __declspec, separating
- them with spaces. We do NOT support this. Instead, use __declspec
- multiple times.
- */
- { "dllimport",0, 0, true, false, false, false, NULL, NULL },
- { "dllexport",0, 0, true, false, false, false, NULL, NULL },
- { "interfacearm", 0, 0, true, false, false, false,
-arm_handle_fndecl_attribute, NULL },
-#elif TARGET_DLLIMPORT_DECL_ATTRIBUTES
+#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
{ "dllimport",0, 0, false, false, false, false, handle_dll_attribute,
NULL },
{ "dllexport",0, 0, false, false, false, false, handle_dll_attribute,
@@ -488,11 +472,7 @@ static const scoped_attribute_specs *const
arm_attribute_table[] =
#define TARGET_MEMORY_MOVE_COST arm_memory_move_cost
#undef TARGET_ENCODE_SECTION_INFO
-#ifdef ARM_PE
-#define TARGET_ENCODE_SECTION_INFO arm_pe_encode_section_info
-#else
#define TARGET_ENCODE_SECTION_INFO arm_encode_section_info
-#endif
#undef TARGET_STRIP_NAME_ENCODING
#define TARGET_STRIP_NAME_ENCODING arm_strip_name_encoding
@@ -26821,11 +26801,7 @@ is_called_in_ARM_mode (tree func)
if (TARGET_CALLEE_INTERWORKING && TREE_PUBLIC (func))
return true;
-#ifdef ARM_PE
- return lookup_attribute ("interfacearm", DECL_ATTRIBUTES (func)) !=
NULL_TREE;
-#else
return false;
-#endif
}
/* Given the stack offsets and register mask in OFFSETS, decide how
@@ -28301,10 +28277,6 @@ thumb1_output_interwork (void)
#define STUB_NAME ".real_start_of"
fprintf (f, "\t.code\t16\n");
-#ifdef ARM_PE
- if (arm_dllexport_name_p (name))
-name = arm_strip_name_encoding (name);
-#endif
asm_fprintf (f, "\t.globl %s%U%s\n", STUB_NAME, name);
fprintf
[gcc r15-1939] middle-end: Fix stalled swapped condition code value [PR115836]
https://gcc.gnu.org/g:44933fdeb338e00c972e42224b9a83d3f8f6a757
commit r15-1939-g44933fdeb338e00c972e42224b9a83d3f8f6a757
Author: Uros Bizjak
Date: Wed Jul 10 09:27:27 2024 +0200
middle-end: Fix stalled swapped condition code value [PR115836]
emit_store_flag_1 calculates scode (swapped condition code) at the
beginning of the function from the value of code variable. However,
code variable may change before scode usage site, resulting in
invalid stalled scode value.
Move calculation of scode value just before its only usage site to
avoid stalled scode value.
PR middle-end/115836
gcc/ChangeLog:
* expmed.cc (emit_store_flag_1): Move calculation of
scode just before its only usage site.
Diff:
---
gcc/expmed.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 8bbbc94a98cb..154964bd0687 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -5632,11 +5632,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
enum insn_code icode;
machine_mode compare_mode;
enum mode_class mclass;
- enum rtx_code scode;
if (unsignedp)
code = unsigned_condition (code);
- scode = swap_condition (code);
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
@@ -5751,6 +5749,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
if (GET_MODE_CLASS (mode) == MODE_FLOAT)
{
+ enum rtx_code scode = swap_condition (code);
+
tem = emit_cstore (target, icode, scode, mode, compare_mode,
unsignedp, op1, op0, normalizep, target_mode);
if (tem)
[gcc r14-10404] middle-end: Fix stalled swapped condition code value [PR115836]
https://gcc.gnu.org/g:47a8b464d2dd9a586a9e15242c9825e39e1ecd4c
commit r14-10404-g47a8b464d2dd9a586a9e15242c9825e39e1ecd4c
Author: Uros Bizjak
Date: Wed Jul 10 09:27:27 2024 +0200
middle-end: Fix stalled swapped condition code value [PR115836]
emit_store_flag_1 calculates scode (swapped condition code) at the
beginning of the function from the value of code variable. However,
code variable may change before scode usage site, resulting in
invalid stalled scode value.
Move calculation of scode value just before its only usage site to
avoid stalled scode value.
PR middle-end/115836
gcc/ChangeLog:
* expmed.cc (emit_store_flag_1): Move calculation of
scode just before its only usage site.
(cherry picked from commit 44933fdeb338e00c972e42224b9a83d3f8f6a757)
Diff:
---
gcc/expmed.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 4ec035e4843b..19765311b954 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -5617,11 +5617,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
enum insn_code icode;
machine_mode compare_mode;
enum mode_class mclass;
- enum rtx_code scode;
if (unsignedp)
code = unsigned_condition (code);
- scode = swap_condition (code);
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
@@ -5736,6 +5734,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
if (GET_MODE_CLASS (mode) == MODE_FLOAT)
{
+ enum rtx_code scode = swap_condition (code);
+
tem = emit_cstore (target, icode, scode, mode, compare_mode,
unsignedp, op1, op0, normalizep, target_mode);
if (tem)
[gcc r11-11567] libstdc++: Destroy allocators in re-inserted container nodes [PR114401]
https://gcc.gnu.org/g:69ce8e406a2aa0aba5dcae5e419503ec105355b0
commit r11-11567-g69ce8e406a2aa0aba5dcae5e419503ec105355b0
Author: Jonathan Wakely
Date: Thu Mar 21 13:25:15 2024 +
libstdc++: Destroy allocators in re-inserted container nodes [PR114401]
The allocator objects in container node handles were not being destroyed
after the node was re-inserted into a container. They are stored in a
union and so need to be explicitly destroyed when the node becomes
empty. The containers were zeroing the node handle's pointer, which
makes it empty, causing the handle's destructor to think there's nothing
to clean up.
Add a new member function to the node handle which destroys the
allocator and zeros the pointer. Change the containers to call that
instead of just changing the pointer manually.
We can also remove the _M_empty member of the union which is not
necessary.
libstdc++-v3/ChangeLog:
PR libstdc++/114401
* include/bits/hashtable.h (_Hashtable::_M_reinsert_node): Call
release() on node handle instead of just zeroing its pointer.
(_Hashtable::_M_reinsert_node_multi): Likewise.
(_Hashtable::_M_merge_unique): Likewise.
* include/bits/node_handle.h (_Node_handle_common::release()):
New member function.
(_Node_handle_common::_Optional_alloc::_M_empty): Remove
unnecessary union member.
(_Node_handle_common): Declare _Hashtable as a friend.
* include/bits/stl_tree.h (_Rb_tree::_M_reinsert_node_unique):
Call release() on node handle instead of just zeroing its
pointer.
(_Rb_tree::_M_reinsert_node_equal): Likewise.
(_Rb_tree::_M_reinsert_node_hint_unique): Likewise.
(_Rb_tree::_M_reinsert_node_hint_equal): Likewise.
* testsuite/23_containers/multiset/modifiers/114401.cc: New test.
* testsuite/23_containers/set/modifiers/114401.cc: New test.
* testsuite/23_containers/unordered_multiset/modifiers/114401.cc:
New test.
* testsuite/23_containers/unordered_set/modifiers/114401.cc: New
test.
(cherry picked from commit c2e28df90a1640cebadef6c6c8ab5ea964071bb1)
Diff:
---
libstdc++-v3/include/bits/hashtable.h | 8 +-
libstdc++-v3/include/bits/node_handle.h| 19 +++-
libstdc++-v3/include/bits/stl_tree.h | 10 +-
.../23_containers/multiset/modifiers/114401.cc | 125
.../23_containers/set/modifiers/114401.cc | 125
.../unordered_multiset/modifiers/114401.cc | 126 +
.../unordered_set/modifiers/114401.cc | 126 +
7 files changed, 527 insertions(+), 12 deletions(-)
diff --git a/libstdc++-v3/include/bits/hashtable.h
b/libstdc++-v3/include/bits/hashtable.h
index eeefa7859226..ad0d6731de0a 100644
--- a/libstdc++-v3/include/bits/hashtable.h
+++ b/libstdc++-v3/include/bits/hashtable.h
@@ -950,7 +950,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
// DR 1189.
// reserve, if present, comes from _Rehash_base.
-#if __cplusplus > 201402L
+#if __cplusplus > 201404L
/// Re-insert an extracted node into a container with unique keys.
insert_return_type
_M_reinsert_node(node_type&& __nh)
@@ -975,7 +975,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
{
__ret.position
= _M_insert_unique_node(__bkt, __code, __nh._M_ptr);
- __nh._M_ptr = nullptr;
+ __nh.release();
__ret.inserted = true;
}
}
@@ -995,7 +995,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
auto __code = this->_M_hash_code(__k);
auto __ret
= _M_insert_multi_node(__hint._M_cur, __code, __nh._M_ptr);
- __nh._M_ptr = nullptr;
+ __nh.release();
return __ret;
}
@@ -1062,7 +1062,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
{
auto __nh = __src.extract(__pos);
_M_insert_unique_node(__bkt, __code, __nh._M_ptr, __n_elt);
- __nh._M_ptr = nullptr;
+ __nh.release();
__n_elt = 1;
}
else if (__n_elt != 1)
diff --git a/libstdc++-v3/include/bits/node_handle.h
b/libstdc++-v3/include/bits/node_handle.h
index 7d8d0dc8cea8..8f500c2f8303 100644
--- a/libstdc++-v3/include/bits/node_handle.h
+++ b/libstdc++-v3/include/bits/node_handle.h
@@ -168,6 +168,16 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_M_ptr = nullptr;
}
+ // Destroys the allocator. Does not deallocate or destroy the node.
+ // Precondition: !empty()
+ // Postcondition: empty()
+ void
+ release() noexcept
+ {
+ _M_alloc.release();
+ _M_ptr = nullptr;
+ }
+
protected:
typename _AllocTraits::pointer
[gcc r15-1940] PR modula2/115823 Wrong expansion of isnormal optab
https://gcc.gnu.org/g:2d1f68e7965795dc66db83bc7840ba7a23eeb01b
commit r15-1940-g2d1f68e7965795dc66db83bc7840ba7a23eeb01b
Author: Gaius Mulley
Date: Wed Jul 10 15:52:37 2024 +0100
PR modula2/115823 Wrong expansion of isnormal optab
The bug fix changes gcc/m2/gm2-gcc/m2builtins.c:m2builtins_BuiltinExists
to recognise both __builtin_ and functionname as a builtin.
gcc/m2/ChangeLog:
PR modula2/115823
* gm2-gcc/m2builtins.cc (struct builtin_macro_definition): New
field builtinname.
(builtin_function_match): New function.
(builtin_macro_match): Ditto.
(m2builtins_BuiltinExists): Use builtin_function_match and
builtin_macro_match.
(lookup_builtin_macro): Use builtin_macro_match.
(lookup_builtin_function): Use builtin_function_match.
(define_builtin): Assign builtinname field.
gcc/testsuite/ChangeLog:
PR modula2/115823
* gm2/builtins/run/pass/testalloa.mod: New test.
Signed-off-by: Gaius Mulley
Diff:
---
gcc/m2/gm2-gcc/m2builtins.cc | 31 ---
gcc/testsuite/gm2/builtins/run/pass/testalloa.mod | 47 +++
2 files changed, 73 insertions(+), 5 deletions(-)
diff --git a/gcc/m2/gm2-gcc/m2builtins.cc b/gcc/m2/gm2-gcc/m2builtins.cc
index 31c344c4a59e..e3e55a699917 100644
--- a/gcc/m2/gm2-gcc/m2builtins.cc
+++ b/gcc/m2/gm2-gcc/m2builtins.cc
@@ -396,6 +396,7 @@ struct builtin_type_info
struct GTY(()) builtin_macro_definition
{
const char *name;
+ const char *builtinname;
tree function_node;
tree return_node;
};
@@ -911,6 +912,26 @@ target_support_exists (struct builtin_function_entry *fe)
}
}
+/* Return true if name matches the builtin name. */
+
+static
+bool builtin_function_match (struct builtin_function_entry *fe,
+const char *name)
+{
+ return (strcmp (name, fe->name) == 0)
+|| (strcmp (name, fe->library_name) == 0);
+}
+
+/* Return true if name matches the builtin macro name. */
+
+static
+bool builtin_macro_match (builtin_macro_definition bmd,
+ const char *name)
+{
+ return (strcmp (bmd.name, name) == 0)
+|| (strcmp (bmd.builtinname, name) == 0);
+}
+
/* BuiltinExists - returns TRUE if the builtin function, name, exists
for this target architecture. */
@@ -921,12 +942,11 @@ m2builtins_BuiltinExists (char *name)
struct builtin_function_entry *fe;
for (fe = &list_of_builtins[0]; fe->name != NULL; fe++)
-if (strcmp (name, fe->name) == 0)
+if (builtin_function_match (fe, name))
return true;
- // return target_support_exists (fe);
int length = vec_safe_length (builtin_macros);
for (int idx = 0; idx < length; idx++)
-if (strcmp ((*builtin_macros)[idx].name, name) == 0)
+if (builtin_macro_match ((*builtin_macros)[idx], name))
return true;
return false;
}
@@ -939,7 +959,7 @@ lookup_builtin_macro (location_t location, char *name)
{
int length = vec_safe_length (builtin_macros);
for (int idx = 0; idx < length; idx++)
-if (strcmp ((*builtin_macros)[idx].name, name) == 0)
+if (builtin_macro_match ((*builtin_macros)[idx], name))
{
tree functype = TREE_TYPE ((*builtin_macros)[idx].function_node);
tree funcptr = build1 (ADDR_EXPR, build_pointer_type (functype),
@@ -965,7 +985,7 @@ lookup_builtin_function (location_t location, char *name)
struct builtin_function_entry *fe;
for (fe = &list_of_builtins[0]; fe->name != NULL; fe++)
-if ((strcmp (name, fe->name) == 0) && target_support_exists (fe))
+if (builtin_function_match (fe, name) && target_support_exists (fe))
{
tree functype = TREE_TYPE (fe->function_node);
tree funcptr = build1 (ADDR_EXPR, build_pointer_type (functype),
@@ -1422,6 +1442,7 @@ define_builtin (enum built_in_function val, const char
*name, tree prototype,
set_call_expr_flags (decl, flags);
set_builtin_decl (val, decl, true);
bmd.name = name;
+ bmd.builtinname = libname;
bmd.function_node = decl;
bmd.return_node = TREE_TYPE (prototype);
vec_safe_push (builtin_macros, bmd);
diff --git a/gcc/testsuite/gm2/builtins/run/pass/testalloa.mod
b/gcc/testsuite/gm2/builtins/run/pass/testalloa.mod
new file mode 100644
index ..9d88dbae3043
--- /dev/null
+++ b/gcc/testsuite/gm2/builtins/run/pass/testalloa.mod
@@ -0,0 +1,47 @@
+MODULE testalloa ;
+
+FROM libc IMPORT printf, exit ;
+FROM Builtins IMPORT alloca ;
+FROM SYSTEM IMPORT ADR, ADDRESS ;
+
+
+(*
+ assert -
+*)
+
+PROCEDURE assert (value: BOOLEAN; message: ARRAY OF CHAR) ;
+BEGIN
+ IF NOT value
+ THEN
+ printf ("test failed: %s\n", ADR (message)) ;
+ code := 1
+ END
+END assert ;
+
+
+(*
+ test -
+*)
+
+PROCEDURE test ;
+VAR
+ ptr: ADDRESS ;
+BEGIN
+ ptr := alloca (10) ;
+ assert (ptr # NIL, "alloca (10) # NIL")
+END test ;
+
+
+VAR
+ cod
[gcc r15-1941] fixincludes: add bypass to darwin_objc_runtime_1
https://gcc.gnu.org/g:8326956159053b215b5cfe6cd41bfceff413491e
commit r15-1941-g8326956159053b215b5cfe6cd41bfceff413491e
Author: Francois-Xavier Coudert
Date: Wed Jul 10 14:50:38 2024 +0200
fixincludes: add bypass to darwin_objc_runtime_1
Headers are now fixed in the macOS 15 SDK, and the fix should be
bypassed there.
fixincludes/ChangeLog:
* fixincl.x: Regenerate.
* inclhack.def (darwin_objc_runtime_1): Add bypass.
Diff:
---
fixincludes/fixincl.x| 15 +++
fixincludes/inclhack.def | 1 +
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/fixincludes/fixincl.x b/fixincludes/fixincl.x
index fb9950d9b21d..9dc05ea17f10 100644
--- a/fixincludes/fixincl.x
+++ b/fixincludes/fixincl.x
@@ -2,11 +2,11 @@
*
* DO NOT EDIT THIS FILE (fixincl.x)
*
- * It has been AutoGen-ed June 27, 2024 at 06:52:39 PM by AutoGen 5.18.16
+ * It has been AutoGen-ed July 10, 2024 at 02:49:05 PM by AutoGen 5.18.16
* From the definitionsinclhack.def
* and the template file fixincl
*/
-/* DO NOT SVN-MERGE THIS FILE, EITHER Thu Jun 27 18:52:39 CEST 2024
+/* DO NOT SVN-MERGE THIS FILE, EITHER Wed Jul 10 14:49:05 CEST 2024
*
* You must regenerate it. Use the ./genfixes script.
*
@@ -3124,8 +3124,15 @@ objc_enumerateClasses.*\n\
.*\n\
.*OBJC_REFINED_FOR_SWIFT.*";
-#defineDARWIN_OBJC_RUNTIME_1_TEST_CT 1
+/*
+ * content bypass pattern - skip fix if pattern found
+ */
+tSCC zDarwin_Objc_Runtime_1Bypass0[] =
+ "#ifdef __BLOCKS__";
+
+#defineDARWIN_OBJC_RUNTIME_1_TEST_CT 2
static tTestDesc aDarwin_Objc_Runtime_1Tests[] = {
+ { TT_NEGREP, zDarwin_Objc_Runtime_1Bypass0, (regex_t*)NULL },
{ TT_EGREP,zDarwin_Objc_Runtime_1Select0, (regex_t*)NULL }, };
/*
@@ -11195,7 +11202,7 @@ static const char* apzX11_SprintfPatch[] = {
*
* List of all fixes
*/
-#define REGEX_COUNT 317
+#define REGEX_COUNT 318
#define MACH_LIST_SIZE_LIMIT 187
#define FIX_COUNT274
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index 9f4a41199a1b..1ac8e335419e 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -1512,6 +1512,7 @@ fix = {
.*
.*OBJC_REFINED_FOR_SWIFT.*
_EOSelect_;
+ bypass= "#ifdef __BLOCKS__";
c_fix = format;
c_fix_arg = "#if __BLOCKS__\n%0\n#endif";
test_text = <<- _OBJC_RUNTIME_1
[gcc(refs/users/matz/heads/x86-ssw)] x86-ssw: tidy and commentary
https://gcc.gnu.org/g:4e6291b6aa5c2033a36e0ac92077a55471e64f92
commit 4e6291b6aa5c2033a36e0ac92077a55471e64f92
Author: Michael Matz
Date: Tue Jul 9 17:27:37 2024 +0200
x86-ssw: tidy and commentary
Diff:
---
gcc/config/i386/i386.cc | 310
gcc/config/i386/i386.h | 1 +
2 files changed, 101 insertions(+), 210 deletions(-)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 20f4dcd61870..8c9505d53a75 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -6970,7 +6970,7 @@ ix86_compute_frame_layout (void)
}
frame->save_regs_using_mov
-= (TARGET_PROLOGUE_USING_MOVE /*|| flag_shrink_wrap_separate*/) &&
m->use_fast_prologue_epilogue;
+= TARGET_PROLOGUE_USING_MOVE && m->use_fast_prologue_epilogue;
/* Skip return address and error code in exception handler. */
offset = INCOMING_FRAME_SP_OFFSET;
@@ -7133,9 +7133,7 @@ ix86_compute_frame_layout (void)
|| (flag_stack_clash_protection
&& !ix86_target_stack_probe ()
&& to_allocate > get_probe_interval ()))
-{
- frame->cannot_use_moves = true;
-}
+frame->cannot_use_moves = true;
if ((!to_allocate && frame->nregs <= 1)
|| frame->cannot_use_moves)
@@ -9190,6 +9188,11 @@ ix86_expand_prologue (void)
m->fs.cfa_reg == stack_pointer_rtx);
else
{
+ /* Even when shrink-wrapping separately we call emit_prologue
+which will reset the frame-state with the expectation that
+we leave this routine with the state valid for the normal
+body of the function, i.e. reflecting allocated frame.
+So track this by hand. */
if (m->fs.cfa_reg == stack_pointer_rtx)
m->fs.cfa_offset -= allocate;
m->fs.sp_offset += allocate;
@@ -10786,9 +10789,17 @@ ix86_live_on_entry (bitmap regs)
}
/* Separate shrink-wrapping. */
+
+/* On x86 we have one component for each hardreg (a component is handled
+ if it's a callee saved register), and one additional component for
+ the frame allocation. */
+
#define NCOMPONENTS (FIRST_PSEUDO_REGISTER + 1)
#define SW_FRAME FIRST_PSEUDO_REGISTER
+/* Returns false when we can't allocate the frame as a separate
+ component. Otherwise return true. */
+
static bool
separate_frame_alloc_p (void)
{
@@ -10801,12 +10812,17 @@ separate_frame_alloc_p (void)
return true;
}
+/* Implements TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS.
+ Returns an sbitmap with all components that we intend to possibly
+ handle for the current function. */
+
static sbitmap
ix86_get_separate_components (void)
{
struct machine_function *m = cfun->machine;
struct ix86_frame *frame = &m->frame;
sbitmap components;
+ unsigned min, max;
ix86_finalize_stack_frame_flags ();
if (frame->cannot_use_moves
@@ -10814,24 +10830,42 @@ ix86_get_separate_components (void)
|| cfun->machine->func_type != TYPE_NORMAL)
return NULL;
+ min = max = INVALID_REGNUM;
+
components = sbitmap_alloc (NCOMPONENTS);
bitmap_clear (components);
for (unsigned regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (ix86_save_reg (regno, true, true))
{
+ if (min == INVALID_REGNUM)
+ min = regno;
+ max = regno;
bitmap_set_bit (components, regno);
}
+ if (max >= FIRST_PSEUDO_REGISTER)
+{
+ sbitmap_free (components);
+ return NULL;
+}
+
+ m->ssw_min_reg = min;
+ m->ssw_max_reg = max;
+
if (separate_frame_alloc_p ())
bitmap_set_bit (components, SW_FRAME);
return components;
}
+/* Implements TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB. Given a BB
+ return all components that are necessary for it. */
+
static sbitmap
ix86_components_for_bb (basic_block bb)
{
+ struct machine_function *m = cfun->machine;
bool need_frame = false;
sbitmap components = sbitmap_alloc (NCOMPONENTS);
bitmap_clear (components);
@@ -10840,7 +10874,7 @@ ix86_components_for_bb (basic_block bb)
bitmap gen = &DF_LIVE_BB_INFO (bb)->gen;
bitmap kill = &DF_LIVE_BB_INFO (bb)->kill;
- for (unsigned regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+ for (unsigned regno = m->ssw_min_reg; regno <= m->ssw_max_reg; regno++)
if (ix86_save_reg (regno, true, true)
&& (bitmap_bit_p (in, regno)
|| bitmap_bit_p (gen, regno)
@@ -10881,6 +10915,9 @@ ix86_components_for_bb (basic_block bb)
return components;
}
+/* Implements TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS. Filter out
+ from COMPONENTS those that we can't handle on edge E. */
+
static void
ix86_disqualify_components (sbitmap components, edge e, sbitmap, bool)
{
@@ -10890,6 +10927,10 @@ ix86_disqualify_components (sbitmap components, edge
e, sbitmap, bool)
bitmap_clear_bit (components, SW_FRAME);
}
+/* Helper for frame allocation. This resets cfun->machine->fs to
+ reflect the state at the first
[gcc(refs/users/matz/heads/x86-ssw)] Add target hook shrink_wrap.cleanup_components
https://gcc.gnu.org/g:826dd85cb9f368608a9890046cd701f7530d7315
commit 826dd85cb9f368608a9890046cd701f7530d7315
Author: Michael Matz
Date: Wed Jul 10 17:10:18 2024 +0200
Add target hook shrink_wrap.cleanup_components
when the shrink wrapping infrastructure removed components
the target might need to remove even more for dependency reasons.
x86 for instance needs to remove the frame-allocation component
when some register components are removed.
Diff:
---
gcc/config/i386/i386.cc | 17 +
gcc/doc/tm.texi | 8
gcc/doc/tm.texi.in | 2 ++
gcc/shrink-wrap.cc | 10 ++
gcc/target.def | 10 ++
5 files changed, 47 insertions(+)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 8c9505d53a75..36202b7dcb07 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -10927,6 +10927,21 @@ ix86_disqualify_components (sbitmap components, edge
e, sbitmap, bool)
bitmap_clear_bit (components, SW_FRAME);
}
+/* Implements TARGET_SHRINK_WRAP_CLEANUP_COMPONENTS. The infrastructure
+ has removed some components (noted in REMOVED), this cleans out any
+ further components that can't be shrink wrapped separately
+ anymore. */
+
+static void
+ix86_cleanup_components (sbitmap components, sbitmap removed)
+{
+ /* If separate shrink wrapping removed any register components
+ then we must also removed SW_FRAME. */
+ bitmap_clear_bit (removed, SW_FRAME);
+ if (!bitmap_empty_p (removed))
+bitmap_clear_bit (components, SW_FRAME);
+}
+
/* Helper for frame allocation. This resets cfun->machine->fs to
reflect the state at the first instruction before prologue (i.e.
the call just happened). */
@@ -11107,6 +11122,8 @@ ix86_set_handled_components (sbitmap)
#define TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB ix86_components_for_bb
#undef TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS
#define TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS ix86_disqualify_components
+#undef TARGET_SHRINK_WRAP_CLEANUP_COMPONENTS
+#define TARGET_SHRINK_WRAP_CLEANUP_COMPONENTS ix86_cleanup_components
#undef TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS
#define TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS
ix86_emit_prologue_components
#undef TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index c8b8b126b242..201c8b9f94da 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -5352,6 +5352,14 @@ components in @var{edge_components} that the target
cannot handle on edge
epilogue instead.
@end deftypefn
+@deftypefn {Target Hook} void TARGET_SHRINK_WRAP_CLEANUP_COMPONENTS (sbitmap
@var{components}, sbitmap @var{removed})
+This hook is called after the shrink wrapping infrastructure disqualified
+components for various reasons (e.g. because an unsplittable edge would
+have to be split). If there are interdependencies between components the
+target can remove those from @var{components} whose dependencies are in
+@var{removed}. If this hook would do nothing it doesn't need to be defined.
+@end deftypefn
+
@deftypefn {Target Hook} void TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS
(sbitmap)
Emit prologue insns for the components indicated by the parameter.
@end deftypefn
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 658e1e63371e..f23e6ff3e455 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -3787,6 +3787,8 @@ generic code.
@hook TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS
+@hook TARGET_SHRINK_WRAP_CLEANUP_COMPONENTS
+
@hook TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS
@hook TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS
diff --git a/gcc/shrink-wrap.cc b/gcc/shrink-wrap.cc
index 2bec492c2a57..db5c1f24d11c 100644
--- a/gcc/shrink-wrap.cc
+++ b/gcc/shrink-wrap.cc
@@ -1432,6 +1432,9 @@ disqualify_problematic_components (sbitmap components)
{
auto_sbitmap pro (SBITMAP_SIZE (components));
auto_sbitmap epi (SBITMAP_SIZE (components));
+ auto_sbitmap old (SBITMAP_SIZE (components));
+
+ bitmap_copy (old, components);
basic_block bb;
FOR_EACH_BB_FN (bb, cfun)
@@ -1496,6 +1499,13 @@ disqualify_problematic_components (sbitmap components)
}
}
}
+
+ /* If the target needs to know that we removed some components,
+ tell it. */
+ bitmap_and_compl (old, old, components);
+ if (targetm.shrink_wrap.cleanup_components
+ && !bitmap_empty_p (old))
+targetm.shrink_wrap.cleanup_components (components, old);
}
/* Place code for prologues and epilogues for COMPONENTS where we can put
diff --git a/gcc/target.def b/gcc/target.def
index fdad7bbc93e2..ac26e8ed38d7 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -6872,6 +6872,16 @@ epilogue instead.",
void, (sbitmap components, edge e, sbitmap edge_components, bool is_prologue),
NULL)
+DEFHOOK
+(cleanup_components,
+ "This hook is called after the shrink wrapping infrastructure disqualified\n\
+components for various reasons (e.g. because an unsplittable ed
[gcc r15-1942] c++, contracts: Fix ICE in create_tmp_var [PR113968]
https://gcc.gnu.org/g:c829042849da4e82668db8c845ef0847264c8687
commit r15-1942-gc829042849da4e82668db8c845ef0847264c8687
Author: Nina Ranns
Date: Thu Jul 4 17:08:58 2024 +0100
c++, contracts: Fix ICE in create_tmp_var [PR113968]
During contract parsing, in grok_contract(), we proceed even if the
condition contains errors. This results in contracts with embedded errors
which eventually confuse gimplify. Checks for errors have been added in
grok_contract() to exit early if an error is encountered.
PR c++/113968
gcc/cp/ChangeLog:
* contracts.cc (grok_contract): Check for error_mark_node early
exit.
gcc/testsuite/ChangeLog:
* g++.dg/contracts/pr113968.C: New test.
Signed-off-by: Nina Ranns
Diff:
---
gcc/cp/contracts.cc | 7 +++
gcc/testsuite/g++.dg/contracts/pr113968.C | 29 +
2 files changed, 36 insertions(+)
diff --git a/gcc/cp/contracts.cc b/gcc/cp/contracts.cc
index 634e3cf4fa9a..a7d0fdacf6ec 100644
--- a/gcc/cp/contracts.cc
+++ b/gcc/cp/contracts.cc
@@ -750,6 +750,9 @@ tree
grok_contract (tree attribute, tree mode, tree result, cp_expr condition,
location_t loc)
{
+ if (condition == error_mark_node)
+return error_mark_node;
+
tree_code code;
if (is_attribute_p ("assert", attribute))
code = ASSERTION_STMT;
@@ -785,6 +788,10 @@ grok_contract (tree attribute, tree mode, tree result,
cp_expr condition,
/* The condition is converted to bool. */
condition = finish_contract_condition (condition);
+
+ if (condition == error_mark_node)
+return error_mark_node;
+
CONTRACT_CONDITION (contract) = condition;
return contract;
diff --git a/gcc/testsuite/g++.dg/contracts/pr113968.C
b/gcc/testsuite/g++.dg/contracts/pr113968.C
new file mode 100644
index ..fbaad1c930d5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/contracts/pr113968.C
@@ -0,0 +1,29 @@
+// check that an invalid contract condition doesn't cause an ICE
+// { dg-do compile }
+// { dg-options "-std=c++2a -fcontracts " }
+
+struct A
+{
+ A (A&);
+};
+struct S
+{
+ void f(A a)
+[[ pre : a]] // { dg-error "could not convert" }
+[[ pre : a.b]]// { dg-error "has no member" }
+{
+
+}
+};
+void f(A a)
+ [[ pre : a]] // { dg-error "could not convert" }
+ [[ pre : a.b]]// { dg-error "has no member" }
+ {
+[[ assert : a ]]; // { dg-error "could not convert" }
+[[ assert : a.b ]];// { dg-error "has no member" }
+ }
+
+int
+main ()
+{
+}
[gcc r15-1943] fixincludes: skip stdio_stdarg_h on darwin
https://gcc.gnu.org/g:7d454cae9d7df1f2936ad02d0742674a85396736
commit r15-1943-g7d454cae9d7df1f2936ad02d0742674a85396736
Author: Francois-Xavier Coudert
Date: Wed Jul 10 17:23:18 2024 +0200
fixincludes: skip stdio_stdarg_h on darwin
The fix is unnecessary on macOS.
fixincludes/ChangeLog:
* fixincl.x: Regenerate.
* inclhack.def (stdio_stdarg_h): Skip on darwin.
Diff:
---
fixincludes/fixincl.x| 5 +++--
fixincludes/inclhack.def | 1 +
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/fixincludes/fixincl.x b/fixincludes/fixincl.x
index 9dc05ea17f10..bfacf9aa3ae9 100644
--- a/fixincludes/fixincl.x
+++ b/fixincludes/fixincl.x
@@ -2,11 +2,11 @@
*
* DO NOT EDIT THIS FILE (fixincl.x)
*
- * It has been AutoGen-ed July 10, 2024 at 02:49:05 PM by AutoGen 5.18.16
+ * It has been AutoGen-ed July 10, 2024 at 05:22:37 PM by AutoGen 5.18.16
* From the definitionsinclhack.def
* and the template file fixincl
*/
-/* DO NOT SVN-MERGE THIS FILE, EITHER Wed Jul 10 14:49:05 CEST 2024
+/* DO NOT SVN-MERGE THIS FILE, EITHER Wed Jul 10 17:22:37 CEST 2024
*
* You must regenerate it. Use the ./genfixes script.
*
@@ -8975,6 +8975,7 @@ tSCC zStdio_Stdarg_HList[] =
*/
tSCC* apzStdio_Stdarg_HMachs[] = {
"*-*-solaris2.1[0-9]*",
+"*-*-darwin*",
(const char*)NULL };
/*
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index 1ac8e335419e..69f751b4f27e 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -4484,6 +4484,7 @@ fix = {
* , which includes .
*/
mach = '*-*-solaris2.1[0-9]*';
+mach = "*-*-darwin*";
not_machine = true;
c_fix = wrap;
[gcc r15-1944] rtl-ssa: Add replace_nondebug_insn [PR115785]
https://gcc.gnu.org/g:e08ebd7d77a216ee2313b585c370333c66497b53
commit r15-1944-ge08ebd7d77a216ee2313b585c370333c66497b53
Author: Richard Sandiford
Date: Wed Jul 10 17:01:29 2024 +0100
rtl-ssa: Add replace_nondebug_insn [PR115785]
change_insns is used to change multiple instructions at once, so that
the IR on return is valid & self-consistent. These changes can involve
moving instructions, and the new position for one instruction might
be expressed in terms of the old position of another instruction
that is changing at the same time.
change_insns therefore adds placeholder instructions to mark each
new instruction position, then replaces each placeholder with the
corresponding real instruction. This replacement was done in two
steps: removing the old placeholder instruction and inserting the new
real instruction. But it's more convenient for the upcoming fix for
PR115785 if we do the operation as a single step. That should also
be slightly more efficient, since e.g. no splay tree operations are
needed.
This operation happens purely on the rtl-ssa instruction chain.
The placeholders are never represented in rtl.
gcc/
PR rtl-optimization/115785
* rtl-ssa/functions.h (function_info::replace_nondebug_insn):
Declare.
* rtl-ssa/insns.h (insn_info::order_node::set_uid): New function.
(insn_info::remove_note): Declare.
* rtl-ssa/insns.cc (insn_info::remove_note): New function.
(function_info::replace_nondebug_insn): Likewise.
* rtl-ssa/changes.cc (function_info::change_insns): Use
replace_nondebug_insn instead of remove_insn + add_insn.
Diff:
---
gcc/rtl-ssa/changes.cc | 5 +
gcc/rtl-ssa/functions.h | 1 +
gcc/rtl-ssa/insns.cc| 42 ++
gcc/rtl-ssa/insns.h | 4
4 files changed, 48 insertions(+), 4 deletions(-)
diff --git a/gcc/rtl-ssa/changes.cc b/gcc/rtl-ssa/changes.cc
index bc80d7da8296..6b6f7cd5d3ab 100644
--- a/gcc/rtl-ssa/changes.cc
+++ b/gcc/rtl-ssa/changes.cc
@@ -874,14 +874,11 @@ function_info::change_insns (array_slice
changes)
}
else
{
- // Remove the placeholder first so that we have a wider range of
- // program points when inserting INSN.
insn_info *after = placeholder->prev_any_insn ();
if (!insn->is_temporary ())
remove_insn (insn);
- remove_insn (placeholder);
+ replace_nondebug_insn (placeholder, insn);
insn->set_bb (after->bb ());
- add_insn_after (insn, after);
}
}
}
diff --git a/gcc/rtl-ssa/functions.h b/gcc/rtl-ssa/functions.h
index e21346217235..8be04f1aa969 100644
--- a/gcc/rtl-ssa/functions.h
+++ b/gcc/rtl-ssa/functions.h
@@ -274,6 +274,7 @@ private:
insn_info::order_node *need_order_node (insn_info *);
void add_insn_after (insn_info *, insn_info *);
+ void replace_nondebug_insn (insn_info *, insn_info *);
void append_insn (insn_info *);
void remove_insn (insn_info *);
diff --git a/gcc/rtl-ssa/insns.cc b/gcc/rtl-ssa/insns.cc
index 68365e323ec6..7e26bfd978fe 100644
--- a/gcc/rtl-ssa/insns.cc
+++ b/gcc/rtl-ssa/insns.cc
@@ -70,6 +70,16 @@ insn_info::add_note (insn_note *note)
*ptr = note;
}
+// Remove NOTE from the instruction's notes.
+void
+insn_info::remove_note (insn_note *note)
+{
+ insn_note **ptr = &m_first_note;
+ while (*ptr != note)
+ptr = &(*ptr)->m_next_note;
+ *ptr = note->m_next_note;
+}
+
// Implement compare_with for the case in which this insn and OTHER
// have the same program point.
int
@@ -346,6 +356,38 @@ function_info::add_insn_after (insn_info *insn, insn_info
*after)
}
}
+// Replace non-debug instruction OLD_INSN with non-debug instruction NEW_INSN.
+// NEW_INSN is not currently linked.
+void
+function_info::replace_nondebug_insn (insn_info *old_insn, insn_info *new_insn)
+{
+ gcc_assert (!old_insn->is_debug_insn ()
+ && !new_insn->is_debug_insn ()
+ && !new_insn->has_insn_links ());
+
+ insn_info *prev = old_insn->prev_any_insn ();
+ insn_info *next_nondebug = old_insn->next_nondebug_insn ();
+
+ // We should never remove the entry or exit block's instructions.
+ gcc_checking_assert (prev && next_nondebug);
+
+ new_insn->copy_prev_from (old_insn);
+ new_insn->copy_next_from (old_insn);
+
+ prev->set_next_any_insn (new_insn);
+ next_nondebug->set_prev_sametype_insn (new_insn);
+
+ new_insn->set_point (old_insn->point ());
+ if (insn_info::order_node *order = old_insn->get_order_node ())
+{
+ order->set_uid (new_insn->uid ());
+ old_insn->remove_note (order);
+ new_insn->add_note (order);
+}
+
+ old_insn->clear_insn_links ();
+}
+
// Remove INSN from the function's list of instructions.
void
function_info::remove_insn (insn_info *insn)
diff --g
[gcc r15-1945] recog: Handle some mode-changing hardreg propagations
https://gcc.gnu.org/g:9d20529d94b23275885f380d155fe8671ab5353a
commit r15-1945-g9d20529d94b23275885f380d155fe8671ab5353a
Author: Richard Sandiford
Date: Wed Jul 10 17:01:29 2024 +0100
recog: Handle some mode-changing hardreg propagations
insn_propagation would previously only replace (reg:M H) with X
for some hard register H if the uses of H were also in mode M.
This patch extends it to handle simple mode punning too.
The original motivation was to try to get rid of the execution
frequency test in aarch64_split_simd_shift_p, but doing that is
follow-up work.
I tried this on at least one target per CPU directory (as for
the late-combine patches) and it seems to be a small win for
all of them.
The patch includes a couple of updates to the ia32 results.
In pr105033.c, foo3 replaced:
vmovq 8(%esp), %xmm1
vpunpcklqdq %xmm1, %xmm0, %xmm0
with:
vmovhps 8(%esp), %xmm0, %xmm0
In vect-bfloat16-2b.c, 5 of the vec_extract_v32bf_* routines
(specifically the ones with nonzero even indices) replaced
things like:
movl28(%esp), %eax
vmovd %eax, %xmm0
with:
vpinsrw $0, 28(%esp), %xmm0, %xmm0
(These functions return a bf16, and so only the low 16 bits matter.)
gcc/
* recog.cc (insn_propagation::apply_to_rvalue_1): Handle simple
cases of hardreg propagation in which the register is set and
used in different modes.
gcc/testsuite/
* gcc.target/i386/pr105033.c: Expect vmovhps for the ia32 version
of foo.
* gcc.target/i386/vect-bfloat16-2b.c: Expect more vpinsrws.
Diff:
---
gcc/recog.cc | 31 +++-
gcc/testsuite/gcc.target/i386/pr105033.c | 4 ++-
gcc/testsuite/gcc.target/i386/vect-bfloat16-2b.c | 2 +-
3 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/gcc/recog.cc b/gcc/recog.cc
index 56370e40e01f..36507f3f57ce 100644
--- a/gcc/recog.cc
+++ b/gcc/recog.cc
@@ -1055,7 +1055,11 @@ insn_propagation::apply_to_rvalue_1 (rtx *loc)
machine_mode mode = GET_MODE (x);
auto old_num_changes = num_validated_changes ();
- if (from && GET_CODE (x) == GET_CODE (from) && rtx_equal_p (x, from))
+ if (from
+ && GET_CODE (x) == GET_CODE (from)
+ && (REG_P (x)
+ ? REGNO (x) == REGNO (from)
+ : rtx_equal_p (x, from)))
{
/* Don't replace register asms in asm statements; we mustn't
change the user's register allocation. */
@@ -1065,11 +1069,26 @@ insn_propagation::apply_to_rvalue_1 (rtx *loc)
&& asm_noperands (PATTERN (insn)) > 0)
return false;
+ rtx newval = to;
+ if (GET_MODE (x) != GET_MODE (from))
+ {
+ gcc_assert (REG_P (x) && HARD_REGISTER_P (x));
+ if (REG_NREGS (x) != REG_NREGS (from)
+ || !REG_CAN_CHANGE_MODE_P (REGNO (x), GET_MODE (from),
+GET_MODE (x)))
+ return false;
+ newval = simplify_subreg (GET_MODE (x), to, GET_MODE (from),
+ subreg_lowpart_offset (GET_MODE (x),
+ GET_MODE (from)));
+ if (!newval)
+ return false;
+ }
+
if (should_unshare)
- validate_unshare_change (insn, loc, to, 1);
+ validate_unshare_change (insn, loc, newval, 1);
else
- validate_change (insn, loc, to, 1);
- if (mem_depth && !REG_P (to) && !CONSTANT_P (to))
+ validate_change (insn, loc, newval, 1);
+ if (mem_depth && !REG_P (newval) && !CONSTANT_P (newval))
{
/* We're substituting into an address, but TO will have the
form expected outside an address. Canonicalize it if
@@ -1083,9 +1102,9 @@ insn_propagation::apply_to_rvalue_1 (rtx *loc)
{
/* TO is owned by someone else, so create a copy and
return TO to its original form. */
- rtx to = copy_rtx (*loc);
+ newval = copy_rtx (*loc);
cancel_changes (old_num_changes);
- validate_change (insn, loc, to, 1);
+ validate_change (insn, loc, newval, 1);
}
}
num_replacements += 1;
diff --git a/gcc/testsuite/gcc.target/i386/pr105033.c
b/gcc/testsuite/gcc.target/i386/pr105033.c
index ab05e3b3bc85..10e39783464d 100644
--- a/gcc/testsuite/gcc.target/i386/pr105033.c
+++ b/gcc/testsuite/gcc.target/i386/pr105033.c
@@ -1,6 +1,8 @@
/* { dg-do compile } */
/* { dg-options "-march=sapphirerapids -O2" } */
-/* { dg-final { scan-assembler-times {vpunpcklqdq[ \t]+} 3 } } */
+/* { dg-final { scan-assembler-times {vpunpcklqdq[ \t]+} 3 { target { ! ia32 }
} } } */
+/* { dg-final { scan-assembler-times {vpunpcklqdq[ \t]+} 2 { target ia32 } } }
*/
+/* { dg-final
[gcc r15-1946] c++: array new with value-initialization [PR115645]
https://gcc.gnu.org/g:fde96e8205f343e6471a11cc9def967bb5dd5362
commit r15-1946-gfde96e8205f343e6471a11cc9def967bb5dd5362
Author: Marek Polacek
Date: Tue Jul 2 15:22:39 2024 -0400
c++: array new with value-initialization [PR115645]
This extends the r11-5179 fix which doesn't work with multidimensional
arrays. In particular,
struct S {
explicit S() { }
};
auto p = new S[1][1]();
should not say "converting to S from initializer list would use
explicit constructor" because there's no {}. However, since we
went into the block where we create a {}, we got confused. We
should not have gotten there but we did because array_p was true.
This patch refines the check once more.
PR c++/115645
gcc/cp/ChangeLog:
* init.cc (build_new): Don't do any deduction for arrays with
bounds if it's value-initialized.
gcc/testsuite/ChangeLog:
* g++.dg/expr/anew7.C: New test.
Diff:
---
gcc/cp/init.cc| 12
gcc/testsuite/g++.dg/expr/anew7.C | 13 +
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/gcc/cp/init.cc b/gcc/cp/init.cc
index 826a31c4a84e..e9561c146d7b 100644
--- a/gcc/cp/init.cc
+++ b/gcc/cp/init.cc
@@ -4005,10 +4005,14 @@ build_new (location_t loc, vec
**placement, tree type,
/* P1009: Array size deduction in new-expressions. */
const bool array_p = TREE_CODE (type) == ARRAY_TYPE;
if (*init
- /* If ARRAY_P, we have to deduce the array bound. For C++20 paren-init,
-we have to process the parenthesized-list. But don't do it for (),
-which is value-initialization, and INIT should stay empty. */
- && (array_p || (cxx_dialect >= cxx20 && nelts && !(*init)->is_empty (
+ /* If the array didn't specify its bound, we have to deduce it. */
+ && ((array_p && !TYPE_DOMAIN (type))
+ /* For C++20 array with parenthesized-init, we have to process
+the parenthesized-list. But don't do it for (), which is
+value-initialization, and INIT should stay empty. */
+ || (cxx_dialect >= cxx20
+ && (array_p || nelts)
+ && !(*init)->is_empty (
{
/* This means we have 'new T[]()'. */
if ((*init)->is_empty ())
diff --git a/gcc/testsuite/g++.dg/expr/anew7.C
b/gcc/testsuite/g++.dg/expr/anew7.C
new file mode 100644
index ..ead5536e1093
--- /dev/null
+++ b/gcc/testsuite/g++.dg/expr/anew7.C
@@ -0,0 +1,13 @@
+// PR c++/115645
+// { dg-do compile { target c++11 } }
+
+struct S {
+ explicit S() { }
+};
+
+auto p = new S[1][1]();
+auto q = new S[1][1]{}; // { dg-error "explicit" }
+auto r = new S[1]();
+auto s = new S[1]{}; // { dg-error "explicit" }
+auto t = new S[1][1][1]();
+auto u = new S[1][1][1]{}; // { dg-error "explicit" }
[gcc r15-1947] internal-fn: Reuse SUBREG_PROMOTED_VAR_P handling
https://gcc.gnu.org/g:5686d3b8ae16d9aeea8d39a56ec6f8ecee661e01
commit r15-1947-g5686d3b8ae16d9aeea8d39a56ec6f8ecee661e01
Author: Richard Sandiford
Date: Wed Jul 10 17:37:58 2024 +0100
internal-fn: Reuse SUBREG_PROMOTED_VAR_P handling
expand_fn_using_insn has code to handle SUBREG_PROMOTED_VAR_P
destinations. Specifically, for:
(subreg/v:M1 (reg:M2 R) ...)
it creates a new temporary register T, uses it for the output
operand, then sign- or zero-extends the M1 lowpart of T to M2,
storing the result in R.
This patch splits this handling out into helper routines and
uses them for other instances of:
if (!rtx_equal_p (target, ops[0].value))
emit_move_insn (target, ops[0].value);
It's quite probable that this doesn't help any of the other cases;
in particular, it shouldn't affect vectors. But I think it could
be useful for the CRC work.
gcc/
* internal-fn.cc (create_call_lhs_operand, assign_call_lhs): New
functions, split out from...
(expand_fn_using_insn): ...here.
(expand_load_lanes_optab_fn): Use them.
(expand_GOMP_SIMT_ENTER_ALLOC): Likewise.
(expand_GOMP_SIMT_LAST_LANE): Likewise.
(expand_GOMP_SIMT_ORDERED_PRED): Likewise.
(expand_GOMP_SIMT_VOTE_ANY): Likewise.
(expand_GOMP_SIMT_XCHG_BFLY): Likewise.
(expand_GOMP_SIMT_XCHG_IDX): Likewise.
(expand_partial_load_optab_fn): Likewise.
(expand_vec_cond_optab_fn): Likewise.
(expand_vec_cond_mask_optab_fn): Likewise.
(expand_RAWMEMCHR): Likewise.
(expand_gather_load_optab_fn): Likewise.
(expand_while_optab_fn): Likewise.
(expand_SPACESHIP): Likewise.
Diff:
---
gcc/internal-fn.cc | 162 +++--
1 file changed, 84 insertions(+), 78 deletions(-)
diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
index 4948b48bde81..95946bfd6839 100644
--- a/gcc/internal-fn.cc
+++ b/gcc/internal-fn.cc
@@ -199,6 +199,58 @@ const direct_internal_fn_info
direct_internal_fn_array[IFN_LAST + 1] = {
not_direct
};
+/* Like create_output_operand, but for callers that will use
+ assign_call_lhs afterwards. */
+
+static void
+create_call_lhs_operand (expand_operand *op, rtx lhs_rtx, machine_mode mode)
+{
+ /* Do not assign directly to a promoted subreg, since there is no
+ guarantee that the instruction will leave the upper bits of the
+ register in the state required by SUBREG_PROMOTED_SIGN. */
+ rtx dest = lhs_rtx;
+ if (dest && GET_CODE (dest) == SUBREG && SUBREG_PROMOTED_VAR_P (dest))
+dest = NULL_RTX;
+ create_output_operand (op, dest, mode);
+}
+
+/* Move the result of an expanded instruction into the lhs of a gimple call.
+ LHS is the lhs of the call, LHS_RTX is its expanded form, and OP is the
+ result of the expanded instruction. OP should have been set up by
+ create_call_lhs_operand. */
+
+static void
+assign_call_lhs (tree lhs, rtx lhs_rtx, expand_operand *op)
+{
+ if (rtx_equal_p (lhs_rtx, op->value))
+return;
+
+ /* If the return value has an integral type, convert the instruction
+ result to that type. This is useful for things that return an
+ int regardless of the size of the input. If the instruction result
+ is smaller than required, assume that it is signed.
+
+ If the return value has a nonintegral type, its mode must match
+ the instruction result. */
+ if (GET_CODE (lhs_rtx) == SUBREG && SUBREG_PROMOTED_VAR_P (lhs_rtx))
+{
+ /* If this is a scalar in a register that is stored in a wider
+mode than the declared mode, compute the result into its
+declared mode and then convert to the wider mode. */
+ gcc_checking_assert (INTEGRAL_TYPE_P (TREE_TYPE (lhs)));
+ rtx tmp = convert_to_mode (GET_MODE (lhs_rtx), op->value, 0);
+ convert_move (SUBREG_REG (lhs_rtx), tmp,
+ SUBREG_PROMOTED_SIGN (lhs_rtx));
+}
+ else if (GET_MODE (lhs_rtx) == GET_MODE (op->value))
+emit_move_insn (lhs_rtx, op->value);
+ else
+{
+ gcc_checking_assert (INTEGRAL_TYPE_P (TREE_TYPE (lhs)));
+ convert_move (lhs_rtx, op->value, 0);
+}
+}
+
/* Expand STMT using instruction ICODE. The instruction has NOUTPUTS
output operands and NINPUTS input operands, where NOUTPUTS is either
0 or 1. The output operand (if any) comes first, followed by the
@@ -220,15 +272,8 @@ expand_fn_using_insn (gcall *stmt, insn_code icode,
unsigned int noutputs,
gcc_assert (noutputs == 1);
if (lhs)
lhs_rtx = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE);
-
- /* Do not assign directly to a promoted subreg, since there is no
-guarantee that the instruction will leave the upper bits of the
-register in the state required by SUBREG_PROMOTED_SIGN. */
- rtx dest = lhs_rtx;
[gcc r15-1948] RISC-V: Add support for B standard extension
https://gcc.gnu.org/g:2a90c41a131080e5fdd2b5554fcdba5c654cb93f
commit r15-1948-g2a90c41a131080e5fdd2b5554fcdba5c654cb93f
Author: Edwin Lu
Date: Wed Jul 10 09:44:48 2024 -0700
RISC-V: Add support for B standard extension
This patch adds support for recognizing the B standard extension to be the
collection of Zba, Zbb, Zbs extensions for consistency and conciseness
across toolchains
https://github.com/riscv/riscv-b/tags
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Add imply rules for B
extension
* config/riscv/arch-canonicalize: Ditto
Signed-off-by: Edwin Lu
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 7 +++
gcc/config/riscv/arch-canonicalize | 1 +
2 files changed, 8 insertions(+)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index dab2e7679653..b0a16f5bd30f 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -84,6 +84,10 @@ static const riscv_implied_info_t riscv_implied_info[] =
{"zabha", "zaamo"},
+ {"b", "zba"},
+ {"b", "zbb"},
+ {"b", "zbs"},
+
{"zdinx", "zfinx"},
{"zfinx", "zicsr"},
{"zdinx", "zicsr"},
@@ -245,6 +249,8 @@ static const struct riscv_ext_version
riscv_ext_version_table[] =
{"c", ISA_SPEC_CLASS_20190608, 2, 0},
{"c", ISA_SPEC_CLASS_2P2, 2, 0},
+ {"b", ISA_SPEC_CLASS_NONE, 1, 0},
+
{"h", ISA_SPEC_CLASS_NONE, 1, 0},
{"v", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -405,6 +411,7 @@ static const struct riscv_ext_version
riscv_ext_version_table[] =
static const struct riscv_ext_version riscv_combine_info[] =
{
{"a", ISA_SPEC_CLASS_20191213, 2, 1},
+ {"b", ISA_SPEC_CLASS_NONE, 1, 0},
{"zk", ISA_SPEC_CLASS_NONE, 1, 0},
{"zkn", ISA_SPEC_CLASS_NONE, 1, 0},
{"zks", ISA_SPEC_CLASS_NONE, 1, 0},
diff --git a/gcc/config/riscv/arch-canonicalize
b/gcc/config/riscv/arch-canonicalize
index 35a7fe4455a6..2ea514dd9869 100755
--- a/gcc/config/riscv/arch-canonicalize
+++ b/gcc/config/riscv/arch-canonicalize
@@ -45,6 +45,7 @@ IMPLIED_EXT = {
"zabha" : ["zaamo"],
"f" : ["zicsr"],
+ "b" : ["zba", "zbb", "zbs"],
"zdinx" : ["zfinx", "zicsr"],
"zfinx" : ["zicsr"],
"zhinx" : ["zhinxmin", "zfinx", "zicsr"],
[gcc r15-1949] RISC-V: Update testsuite to use b
https://gcc.gnu.org/g:04df2a924bba38c271bfe4ed0e94af1877413818
commit r15-1949-g04df2a924bba38c271bfe4ed0e94af1877413818
Author: Edwin Lu
Date: Wed Jul 3 17:17:27 2024 -0700
RISC-V: Update testsuite to use b
Update all instances of zba_zbb_zbs in the testsuite to use b instead
gcc/testsuite/ChangeLog:
* g++.target/riscv/redundant-bitmap-1.C: Use gcb instead of
zba_zbb_zbs
* g++.target/riscv/redundant-bitmap-2.C: Ditto
* g++.target/riscv/redundant-bitmap-3.C: Ditto
* g++.target/riscv/redundant-bitmap-4.C: Ditto
* gcc.target/riscv/shift-add-1.c: Ditto
* gcc.target/riscv/shift-add-2.c: Ditto
* gcc.target/riscv/synthesis-1.c: Ditto
* gcc.target/riscv/synthesis-2.c: Ditto
* gcc.target/riscv/synthesis-3.c: Ditto
* gcc.target/riscv/synthesis-4.c: Ditto
* gcc.target/riscv/synthesis-5.c: Ditto
* gcc.target/riscv/synthesis-6.c: Ditto
* gcc.target/riscv/synthesis-7.c: Ditto
* gcc.target/riscv/synthesis-8.c: Ditto
* gcc.target/riscv/zba_zbs_and-1.c: Ditto
* gcc.target/riscv/zbs-zext-3.c: Ditto
* lib/target-supports.exp: Add b to riscv_get_arch
Signed-off-by: Edwin Lu
Diff:
---
gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C | 2 +-
gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C | 2 +-
gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C | 2 +-
gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C | 2 +-
gcc/testsuite/gcc.target/riscv/shift-add-1.c| 2 +-
gcc/testsuite/gcc.target/riscv/shift-add-2.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-1.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-2.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-3.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-4.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-5.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-6.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-7.c| 2 +-
gcc/testsuite/gcc.target/riscv/synthesis-8.c| 2 +-
gcc/testsuite/gcc.target/riscv/zba_zbs_and-1.c | 2 +-
gcc/testsuite/gcc.target/riscv/zbs-zext-3.c | 4 ++--
gcc/testsuite/lib/target-supports.exp | 2 +-
17 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C
b/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C
index 37066f10eeae..62bb2ab7b67d 100644
--- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C
+++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */
+/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */
void setBit(char &a, int b) {
char c = 0x1UL << b;
diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C
b/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C
index 86acaba298fc..52204daecd11 100644
--- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C
+++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */
+/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */
void setBit(char &a, int b) {
char c = 0x1UL << b;
diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C
b/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C
index 16bd7c1785e7..6745220f2f41 100644
--- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C
+++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */
+/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */
void setBit(char &a, int b) {
char c = 0x1UL << b;
diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C
b/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C
index f664ee01a016..5e351fe457e9 100644
--- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C
+++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */
+/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */
void setBit(char &a, int b) {
char c = 0x1UL << b;
diff --git a/gcc/testsuite/gcc.target/riscv/shift-add-1.c
b/gcc/testsuite/gcc.target/riscv/shift-add-1.c
index d98875c32716..db84a51a2227 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-add-1.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-add-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc_zba_zbb_zbs -mabi=lp64" } */
+/* { dg-options "-march=rv64gcb -mabi=lp64" } */
/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
int composeFromSurrogate(const unsigned short high) {
diff --git a/gcc/testsuite/gcc.target/riscv/shift-add-2.c
b/gcc/testsuite/gcc.target/riscv/sh
[gcc r15-1950] testsuite: Align testcase with implementation [PR105090]
https://gcc.gnu.org/g:4865a92b35054fdfaa1318a4c1f56d95d44012a2
commit r15-1950-g4865a92b35054fdfaa1318a4c1f56d95d44012a2
Author: Torbjörn SVENSSON
Date: Wed Jul 10 18:14:22 2024 +0200
testsuite: Align testcase with implementation [PR105090]
Since r13-1006-g2005b9b888eeac, the test case copysign_softfloat_1.c
no longer contains any lsr istruction, so drop the check as per
comment 9 in PR105090.
gcc/testsuite/ChangeLog:
PR target/105090
* gcc.target/arm/copysign_softfloat_1.c: Drop check for lsr
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
index a14922f1c12a..50317b7abe59 100644
--- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
@@ -42,7 +42,6 @@ main (int argc, char **argv)
int index = 0;
/* { dg-final { scan-assembler-times "bfi" 2 { target arm_softfloat } } } */
-/* { dg-final { scan-assembler-times "lsr" 1 { target arm_softfloat } } } */
for (index; index < N; index++)
{
if (__builtin_copysignf (a_f[index], b_f[index]) != c_f[index])
[gcc r14-10405] testsuite: Align testcase with implementation [PR105090]
https://gcc.gnu.org/g:e7d81cf551bcbf6cfa7612c1dc3c83fef036b3e1
commit r14-10405-ge7d81cf551bcbf6cfa7612c1dc3c83fef036b3e1
Author: Torbjörn SVENSSON
Date: Wed Jul 10 18:14:22 2024 +0200
testsuite: Align testcase with implementation [PR105090]
Since r13-1006-g2005b9b888eeac, the test case copysign_softfloat_1.c
no longer contains any lsr istruction, so drop the check as per
comment 9 in PR105090.
gcc/testsuite/ChangeLog:
PR target/105090
* gcc.target/arm/copysign_softfloat_1.c: Drop check for lsr
Signed-off-by: Torbjörn SVENSSON
(cherry picked from commit 4865a92b35054fdfaa1318a4c1f56d95d44012a2)
Diff:
---
gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
index a14922f1c12a..50317b7abe59 100644
--- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
@@ -42,7 +42,6 @@ main (int argc, char **argv)
int index = 0;
/* { dg-final { scan-assembler-times "bfi" 2 { target arm_softfloat } } } */
-/* { dg-final { scan-assembler-times "lsr" 1 { target arm_softfloat } } } */
for (index; index < N; index++)
{
if (__builtin_copysignf (a_f[index], b_f[index]) != c_f[index])
[gcc r13-8902] testsuite: Align testcase with implementation [PR105090]
https://gcc.gnu.org/g:4f6f63f2cfcc62d6d893f301ea6aa4f6365624ba
commit r13-8902-g4f6f63f2cfcc62d6d893f301ea6aa4f6365624ba
Author: Torbjörn SVENSSON
Date: Wed Jul 10 18:14:22 2024 +0200
testsuite: Align testcase with implementation [PR105090]
Since r13-1006-g2005b9b888eeac, the test case copysign_softfloat_1.c
no longer contains any lsr istruction, so drop the check as per
comment 9 in PR105090.
gcc/testsuite/ChangeLog:
PR target/105090
* gcc.target/arm/copysign_softfloat_1.c: Drop check for lsr
Signed-off-by: Torbjörn SVENSSON
(cherry picked from commit 4865a92b35054fdfaa1318a4c1f56d95d44012a2)
Diff:
---
gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
index a14922f1c12a..50317b7abe59 100644
--- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
@@ -42,7 +42,6 @@ main (int argc, char **argv)
int index = 0;
/* { dg-final { scan-assembler-times "bfi" 2 { target arm_softfloat } } } */
-/* { dg-final { scan-assembler-times "lsr" 1 { target arm_softfloat } } } */
for (index; index < N; index++)
{
if (__builtin_copysignf (a_f[index], b_f[index]) != c_f[index])
[gcc r13-8903] middle-end: Fix stalled swapped condition code value [PR115836]
https://gcc.gnu.org/g:cc47ad09e571016f498710fbd8a19f302c9004de
commit r13-8903-gcc47ad09e571016f498710fbd8a19f302c9004de
Author: Uros Bizjak
Date: Wed Jul 10 09:27:27 2024 +0200
middle-end: Fix stalled swapped condition code value [PR115836]
emit_store_flag_1 calculates scode (swapped condition code) at the
beginning of the function from the value of code variable. However,
code variable may change before scode usage site, resulting in
invalid stalled scode value.
Move calculation of scode value just before its only usage site to
avoid stalled scode value.
PR middle-end/115836
gcc/ChangeLog:
* expmed.cc (emit_store_flag_1): Move calculation of
scode just before its only usage site.
(cherry picked from commit 44933fdeb338e00c972e42224b9a83d3f8f6a757)
Diff:
---
gcc/expmed.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 1553ea8e31eb..e06cdd47e9e6 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -5607,11 +5607,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
enum insn_code icode;
machine_mode compare_mode;
enum mode_class mclass;
- enum rtx_code scode;
if (unsignedp)
code = unsigned_condition (code);
- scode = swap_condition (code);
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
@@ -5726,6 +5724,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
if (GET_MODE_CLASS (mode) == MODE_FLOAT)
{
+ enum rtx_code scode = swap_condition (code);
+
tem = emit_cstore (target, icode, scode, mode, compare_mode,
unsignedp, op1, op0, normalizep, target_mode);
if (tem)
[gcc r12-10610] middle-end: Fix stalled swapped condition code value [PR115836]
https://gcc.gnu.org/g:10904e051f1b970cd8e030dff7dec8374c946b12
commit r12-10610-g10904e051f1b970cd8e030dff7dec8374c946b12
Author: Uros Bizjak
Date: Wed Jul 10 09:27:27 2024 +0200
middle-end: Fix stalled swapped condition code value [PR115836]
emit_store_flag_1 calculates scode (swapped condition code) at the
beginning of the function from the value of code variable. However,
code variable may change before scode usage site, resulting in
invalid stalled scode value.
Move calculation of scode value just before its only usage site to
avoid stalled scode value.
PR middle-end/115836
gcc/ChangeLog:
* expmed.cc (emit_store_flag_1): Move calculation of
scode just before its only usage site.
(cherry picked from commit 44933fdeb338e00c972e42224b9a83d3f8f6a757)
Diff:
---
gcc/expmed.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 1bb4da8d094e..39e53faec70e 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -5601,11 +5601,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
enum insn_code icode;
machine_mode compare_mode;
enum mode_class mclass;
- enum rtx_code scode;
if (unsignedp)
code = unsigned_condition (code);
- scode = swap_condition (code);
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
@@ -5773,6 +5771,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
if (GET_MODE_CLASS (mode) == MODE_FLOAT)
{
+ enum rtx_code scode = swap_condition (code);
+
tem = emit_cstore (target, icode, scode, mode, compare_mode,
unsignedp, op1, op0, normalizep, target_mode);
if (tem)
[gcc r15-1951] c: ICE on invalid with attribute optimize [PR115549]
https://gcc.gnu.org/g:4c7009735f73f59c9a635d79c048c8981310e331
commit r15-1951-g4c7009735f73f59c9a635d79c048c8981310e331
Author: Marek Polacek
Date: Thu Jun 27 16:39:29 2024 -0400
c: ICE on invalid with attribute optimize [PR115549]
I had this PR in my open tabs so why not go ahead and fix it.
decl_attributes gets last_decl, the last already pushed declaration,
to be used in common_handle_aligned_attribute. In C++, we look up
the decl via find_last_decl, which returns NULL_TREE if it finds
a decl that had not been declared. In C, we look up the decl via
lookup_last_decl which returns error_mark_node rather than NULL_TREE
in that case.
The error_mark_node causes a crash in common_handle_aligned_attribute.
We can fix this on the C FE side like in the patch below.
PR c/115549
gcc/c/ChangeLog:
* c-decl.cc (c_decl_attributes): If lookup_last_decl returns
error_mark_node, use NULL_TREE as last_decl.
gcc/testsuite/ChangeLog:
* c-c++-common/attr-aligned-2.c: New test.
Diff:
---
gcc/c/c-decl.cc | 5 -
gcc/testsuite/c-c++-common/attr-aligned-2.c | 8
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index 0eac266471f7..97f1d346835e 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -5496,8 +5496,11 @@ c_decl_attributes (tree *node, tree attributes, int
flags)
/* Look up the current declaration with all the attributes merged
so far so that attributes on the current declaration that's
about to be pushed that conflict with the former can be detected,
- diagnosed, and rejected as appropriate. */
+ diagnosed, and rejected as appropriate. To match the C++ FE, do
+ not pass an error_mark_node when we found an undeclared variable. */
tree last_decl = lookup_last_decl (*node);
+ if (last_decl == error_mark_node)
+last_decl = NULL_TREE;
return decl_attributes (node, attributes, flags, last_decl);
}
diff --git a/gcc/testsuite/c-c++-common/attr-aligned-2.c
b/gcc/testsuite/c-c++-common/attr-aligned-2.c
new file mode 100644
index ..991b3904540b
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/attr-aligned-2.c
@@ -0,0 +1,8 @@
+/* PR c/115549 */
+/* { dg-do compile } */
+
+__attribute__((aligned,optimize(s))) /* { dg-error "not declared|undeclared" }
*/
+int s()
+{
+ return 0;
+}
[gcc r15-1952] c: ICE with invalid sizeof [PR115642]
https://gcc.gnu.org/g:0c27eade4754c13a54e265e4305182c95be1e441
commit r15-1952-g0c27eade4754c13a54e265e4305182c95be1e441
Author: Marek Polacek
Date: Tue Jun 25 14:55:08 2024 -0400
c: ICE with invalid sizeof [PR115642]
Here we ICE in c_expr_sizeof_expr on an erroneous expr.value. The
code checks for expr.value == error_mark_node but here the e_m_n is
wrapped in a C_MAYBE_CONST_EXPR. I don't think we should have created
such a tree, so let's return earlier in c_cast_expr.
PR c/115642
gcc/c/ChangeLog:
* c-typeck.cc (c_cast_expr): Return error_mark_node if build_c_cast
failed.
gcc/testsuite/ChangeLog:
* gcc.dg/noncompile/sizeof-1.c: New test.
Diff:
---
gcc/c/c-typeck.cc | 3 +++
gcc/testsuite/gcc.dg/noncompile/sizeof-1.c | 7 +++
2 files changed, 10 insertions(+)
diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc
index 455dc374b481..36f88fcd03de 100644
--- a/gcc/c/c-typeck.cc
+++ b/gcc/c/c-typeck.cc
@@ -6702,6 +6702,9 @@ c_cast_expr (location_t loc, struct c_type_name
*type_name, tree expr)
return error_mark_node;
ret = build_c_cast (loc, type, expr);
+ if (ret == error_mark_node)
+return error_mark_node;
+
if (type_expr)
{
bool inner_expr_const = true;
diff --git a/gcc/testsuite/gcc.dg/noncompile/sizeof-1.c
b/gcc/testsuite/gcc.dg/noncompile/sizeof-1.c
new file mode 100644
index ..db7e2044b113
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/noncompile/sizeof-1.c
@@ -0,0 +1,7 @@
+/* PR c/115642 */
+/* { dg-do compile } */
+
+void f (int N) {
+ int a[2][N];
+ sizeof ((int [2][N])a); /* { dg-error "cast specifies array type" } */
+}
[gcc r11-11568] middle-end: Fix stalled swapped condition code value [PR115836]
https://gcc.gnu.org/g:d67566cefe7325998cc2471a28e9d3a3016455a0
commit r11-11568-gd67566cefe7325998cc2471a28e9d3a3016455a0
Author: Uros Bizjak
Date: Wed Jul 10 09:27:27 2024 +0200
middle-end: Fix stalled swapped condition code value [PR115836]
emit_store_flag_1 calculates scode (swapped condition code) at the
beginning of the function from the value of code variable. However,
code variable may change before scode usage site, resulting in
invalid stalled scode value.
Move calculation of scode value just before its only usage site to
avoid stalled scode value.
PR middle-end/115836
gcc/ChangeLog:
* expmed.c (emit_store_flag_1): Move calculation of
scode just before its only usage site.
(cherry picked from commit 44933fdeb338e00c972e42224b9a83d3f8f6a757)
Diff:
---
gcc/expmed.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/expmed.c b/gcc/expmed.c
index 3143f38e0570..2c916eab43b6 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -5589,11 +5589,9 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
enum insn_code icode;
machine_mode compare_mode;
enum mode_class mclass;
- enum rtx_code scode;
if (unsignedp)
code = unsigned_condition (code);
- scode = swap_condition (code);
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
@@ -5761,6 +5759,8 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx
op0, rtx op1,
if (GET_MODE_CLASS (mode) == MODE_FLOAT)
{
+ enum rtx_code scode = swap_condition (code);
+
tem = emit_cstore (target, icode, scode, mode, compare_mode,
unsignedp, op1, op0, normalizep, target_mode);
if (tem)
[gcc r15-1954] i386: Swap compare operands in ustrunc patterns
https://gcc.gnu.org/g:aae535f3a870659d1f002f82bd585de0bcec7905
commit r15-1954-gaae535f3a870659d1f002f82bd585de0bcec7905
Author: Uros Bizjak
Date: Wed Jul 10 23:00:00 2024 +0200
i386: Swap compare operands in ustrunc patterns
A last minute change led to a wrong operand order in the compare insn.
gcc/ChangeLog:
* config/i386/i386.md (ustruncdi2): Swap compare operands.
(ustruncsi2): Ditto.
(ustrunchiqi2): Ditto.
Diff:
---
gcc/config/i386/i386.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index e2f30695d70e..de9f4ba04962 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -9990,7 +9990,7 @@
rtx sat = force_reg (DImode, GEN_INT (GET_MODE_MASK (mode)));
rtx dst;
- emit_insn (gen_cmpdi_1 (op1, sat));
+ emit_insn (gen_cmpdi_1 (sat, op1));
if (TARGET_CMOVE)
{
@@ -10026,7 +10026,7 @@
rtx sat = force_reg (SImode, GEN_INT (GET_MODE_MASK (mode)));
rtx dst;
- emit_insn (gen_cmpsi_1 (op1, sat));
+ emit_insn (gen_cmpsi_1 (sat, op1));
if (TARGET_CMOVE)
{
@@ -10062,7 +10062,7 @@
rtx sat = force_reg (HImode, GEN_INT (GET_MODE_MASK (QImode)));
rtx dst;
- emit_insn (gen_cmphi_1 (op1, sat));
+ emit_insn (gen_cmphi_1 (sat, op1));
if (TARGET_CMOVE)
{
[gcc r15-1955] libstdc++: ranges::find needs explicit conversion to size_t [PR115799]
https://gcc.gnu.org/g:cda469a59e222496248025e0834a15d466f79d4a
commit r15-1955-gcda469a59e222496248025e0834a15d466f79d4a
Author: Jonathan Wakely
Date: Mon Jul 8 10:45:52 2024 +0100
libstdc++: ranges::find needs explicit conversion to size_t [PR115799]
For an integer-class type we need to use an explicit conversion to size_t.
libstdc++-v3/ChangeLog:
PR libstdc++/115799
* include/bits/ranges_util.h (__find_fn): Make conversion
from difference type ti size_t explicit.
* testsuite/25_algorithms/find/bytes.cc: Check ranges::find with
__gnu_test::test_contiguous_range.
* testsuite/std/ranges/range.cc: Adjust expected difference_type
for __gnu_test::test_contiguous_range.
* testsuite/util/testsuite_iterators.h
(contiguous_iterator_wrapper):
Use __max_diff_type as difference type.
(test_range::sentinel, test_sized_range_sized_sent::sentinel):
Ensure that operator- returns difference_type.
Diff:
---
libstdc++-v3/include/bits/ranges_util.h| 3 +-
libstdc++-v3/testsuite/25_algorithms/find/bytes.cc | 10 ++
libstdc++-v3/testsuite/std/ranges/range.cc | 5 ++-
libstdc++-v3/testsuite/util/testsuite_iterators.h | 42 --
4 files changed, 48 insertions(+), 12 deletions(-)
diff --git a/libstdc++-v3/include/bits/ranges_util.h
b/libstdc++-v3/include/bits/ranges_util.h
index a1f42875b11d..e6d96073e87b 100644
--- a/libstdc++-v3/include/bits/ranges_util.h
+++ b/libstdc++-v3/include/bits/ranges_util.h
@@ -506,9 +506,10 @@ namespace ranges
if (static_cast<_Vt>(__value) == __value) [[likely]]
if (__n > 0)
{
+ const size_t __nu = static_cast(__n);
const int __ival = static_cast(__value);
const void* __p0 = std::to_address(__first);
- if (auto __p1 = __builtin_memchr(__p0, __ival, __n))
+ if (auto __p1 = __builtin_memchr(__p0, __ival, __nu))
__n = (const char*)__p1 - (const char*)__p0;
}
return __first + __n;
diff --git a/libstdc++-v3/testsuite/25_algorithms/find/bytes.cc
b/libstdc++-v3/testsuite/25_algorithms/find/bytes.cc
index e1d6c01ab215..03dada0fec75 100644
--- a/libstdc++-v3/testsuite/25_algorithms/find/bytes.cc
+++ b/libstdc++-v3/testsuite/25_algorithms/find/bytes.cc
@@ -114,9 +114,19 @@ test_non_characters()
#endif
}
+#if __cpp_lib_ranges
+void
+test_pr115799c0(__gnu_test::test_contiguous_range r)
+{
+ // Non-common range with integer-class type as difference_type.
+ (void) std::ranges::find(r, 'a');
+}
+#endif
+
void
test_pr115799c2(__gnu_test::input_iterator_wrapper i)
{
+ // Non-contiguous range of character type.
(void) std::find(i, i, 'a');
}
diff --git a/libstdc++-v3/testsuite/std/ranges/range.cc
b/libstdc++-v3/testsuite/std/ranges/range.cc
index 760f6ffacfdb..5464a9bf66bc 100644
--- a/libstdc++-v3/testsuite/std/ranges/range.cc
+++ b/libstdc++-v3/testsuite/std/ranges/range.cc
@@ -56,6 +56,7 @@ static_assert(
std::ranges::range&> );
using std::same_as;
using C = test_contiguous_range;
+using R = test_random_access_range;
using I = test_input_range;
using O = test_output_range;
@@ -69,7 +70,9 @@ static_assert( same_as,
static_assert( same_as,
decltype(std::declval().end())> );
-static_assert( same_as,
+static_assert( ! same_as,
+std::ptrdiff_t> ); // __detail::__max_diff_type
+static_assert( same_as,
std::ptrdiff_t> );
static_assert( same_as,
std::ptrdiff_t> );
diff --git a/libstdc++-v3/testsuite/util/testsuite_iterators.h
b/libstdc++-v3/testsuite/util/testsuite_iterators.h
index ec2971284b4c..e7f7abe222d5 100644
--- a/libstdc++-v3/testsuite/util/testsuite_iterators.h
+++ b/libstdc++-v3/testsuite/util/testsuite_iterators.h
@@ -34,6 +34,10 @@
#include
#endif
+#if __cplusplus > 201703L
+#include
+#endif
+
#ifndef _TESTSUITE_ITERATORS
#define _TESTSUITE_ITERATORS
@@ -675,6 +679,9 @@ namespace __gnu_test
using iterator_concept = std::contiguous_iterator_tag;
+ // Use an integer-class type to try and break the library code.
+ using difference_type = std::ranges::__detail::__max_diff_type;
+
contiguous_iterator_wrapper&
operator++()
{
@@ -706,27 +713,42 @@ namespace __gnu_test
}
contiguous_iterator_wrapper&
- operator+=(std::ptrdiff_t n)
+ operator+=(difference_type n)
{
- random_access_iterator_wrapper::operator+=(n);
+ auto d = static_cast(n);
+ random_access_iterator_wrapper::operator+=(d);
return *this;
}
friend contiguous_iterator_wrapper
- operator+(contiguous_iterator_wrapper iter, std::ptrdiff_t n)
[gcc r15-1956] libstdc++: Use direct-initialization for std::vector's allocator [PR115854]
https://gcc.gnu.org/g:c5efc6eca8e3eee7038ae218cf7e2dbe9ed9d82a
commit r15-1956-gc5efc6eca8e3eee7038ae218cf7e2dbe9ed9d82a
Author: Jonathan Wakely
Date: Wed Jul 10 10:29:52 2024 +0100
libstdc++: Use direct-initialization for std::vector's allocator
[PR115854]
The consensus in the standard committee is that this change shouldn't be
necessary, and the Allocator requirements should require conversions
between rebound allocators to be implicit. But we can make it work for
now anyway.
libstdc++-v3/ChangeLog:
PR libstdc++/115854
* include/bits/stl_bvector.h (_Bvector_base): Convert allocator
to rebound type explicitly.
* testsuite/23_containers/vector/allocator/115854.cc: New test.
* testsuite/23_containers/vector/bool/allocator/115854.cc: New test.
Diff:
---
libstdc++-v3/include/bits/stl_bvector.h| 2 +-
.../testsuite/23_containers/vector/allocator/115854.cc | 10 ++
.../testsuite/23_containers/vector/bool/allocator/115854.cc| 10 ++
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/libstdc++-v3/include/bits/stl_bvector.h
b/libstdc++-v3/include/bits/stl_bvector.h
index 8685cc64cc44..245e1c3b3a77 100644
--- a/libstdc++-v3/include/bits/stl_bvector.h
+++ b/libstdc++-v3/include/bits/stl_bvector.h
@@ -654,7 +654,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
_GLIBCXX20_CONSTEXPR
_Bvector_base(const allocator_type& __a)
- : _M_impl(__a) { }
+ : _M_impl(_Bit_alloc_type(__a)) { }
#if __cplusplus >= 201103L
_Bvector_base(_Bvector_base&&) = default;
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/115854.cc
b/libstdc++-v3/testsuite/23_containers/vector/allocator/115854.cc
new file mode 100644
index ..6c9016b311f2
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/115854.cc
@@ -0,0 +1,10 @@
+// { dg-do compile { target c++11 } }
+
+#include
+#include
+
+__gnu_test::ExplicitConsAlloc alloc;
+std::vector> v;
+std::vector> v1(alloc);
+std::vector> v2(v1, alloc);
+std::vector> v3(std::move(v1), alloc);
diff --git
a/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/115854.cc
b/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/115854.cc
new file mode 100644
index ..14b28cc3e964
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/115854.cc
@@ -0,0 +1,10 @@
+// { dg-do compile { target c++11 } }
+
+#include
+#include
+
+__gnu_test::ExplicitConsAlloc alloc;
+std::vector> v;
+std::vector> v1(alloc);
+std::vector> v2(v1, alloc);
+std::vector> v3(std::move(v1),
alloc);
[gcc r15-1957] libstdc++: Minor optimization for std::locale::encoding()
https://gcc.gnu.org/g:9f758953eb2cb89e306025dc232ae20da6cb860a
commit r15-1957-g9f758953eb2cb89e306025dc232ae20da6cb860a
Author: Jonathan Wakely
Date: Wed Jul 10 17:47:56 2024 +0100
libstdc++: Minor optimization for std::locale::encoding()
For the C locale we know the encoding is ASCII, so we can avoid using
newlocale and nl_langinfo_l. Similarly, for an unnamed locale, we aren't
going to get a useful answer, so we can just use a default-constrcuted
std::text_encoding representing an unknown encoding.
libstdc++-v3/ChangeLog:
* src/c++26/text_encoding.cc (__locale_encoding): Add to unnamed
namespace.
(std::locale::encoding): Optimize for "C" and "*" names.
Diff:
---
libstdc++-v3/src/c++26/text_encoding.cc | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/libstdc++-v3/src/c++26/text_encoding.cc
b/libstdc++-v3/src/c++26/text_encoding.cc
index b9a50ef1a001..efe2997562a4 100644
--- a/libstdc++-v3/src/c++26/text_encoding.cc
+++ b/libstdc++-v3/src/c++26/text_encoding.cc
@@ -36,7 +36,9 @@
namespace std
{
_GLIBCXX_BEGIN_NAMESPACE_VERSION
-
+namespace
+{
+// Attempt to determine the text_encoding used by the named locale.
text_encoding
__locale_encoding(const char* name)
{
@@ -54,6 +56,7 @@ __locale_encoding(const char* name)
return enc;
}
+} // namespace
_GLIBCXX_END_NAMESPACE_VERSION
} // namespace std
@@ -87,8 +90,15 @@ std::text_encoding::_M_is_environment() const
std::text_encoding
std::locale::encoding() const
{
- return std::__locale_encoding(name().c_str());
+ string name = this->name();
+ if (name.length() == 1)
+{
+ if (name[0] == 'C')
+ return text_encoding(text_encoding::ASCII);
+ if (name[0] == '*')
+ return {};
+}
+ return __locale_encoding(name.c_str());
}
#endif // CHAR_BIT == 8
-
#endif // _GLIBCXX_USE_NL_LANGINFO_L
[gcc r15-1958] libstdc++: Make std::basic_format_context non-copyable [PR114387]
https://gcc.gnu.org/g:d8cd8521185436ea45ed48c5dd481277e9b8a98d
commit r15-1958-gd8cd8521185436ea45ed48c5dd481277e9b8a98d
Author: Jonathan Wakely
Date: Wed Jul 10 10:27:24 2024 +0100
libstdc++: Make std::basic_format_context non-copyable [PR114387]
Users are not supposed to create objects of this type, and there's no
reason it needs to be copyable. LWG 4061 makes it non-copyable and
non-default constructible.
libstdc++-v3/ChangeLog:
PR libstdc++/114387
* include/std/format (basic_format_context): Define copy
operations as deleted, as per LWG 4061.
* testsuite/std/format/context.cc: New test.
Diff:
---
libstdc++-v3/include/std/format | 7 +-
libstdc++-v3/testsuite/std/format/context.cc | 36
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/libstdc++-v3/include/std/format b/libstdc++-v3/include/std/format
index 48deba2bcb2d..16cee0d3c74d 100644
--- a/libstdc++-v3/include/std/format
+++ b/libstdc++-v3/include/std/format
@@ -3851,6 +3851,12 @@ namespace __format
: _M_args(__args), _M_out(std::move(__out)), _M_loc(__loc)
{ }
+ // _GLIBCXX_RESOLVE_LIB_DEFECTS
+ // 4061. Should std::basic_format_context be
+ // default-constructible/copyable/movable?
+ basic_format_context(const basic_format_context&) = delete;
+ basic_format_context& operator=(const basic_format_context&) = delete;
+
template
friend _Out2
__format::__do_vformat_to(_Out2, basic_string_view<_CharT2>,
@@ -3858,7 +3864,6 @@ namespace __format
const locale*);
public:
- basic_format_context() = default;
~basic_format_context() = default;
using iterator = _Out;
diff --git a/libstdc++-v3/testsuite/std/format/context.cc
b/libstdc++-v3/testsuite/std/format/context.cc
new file mode 100644
index ..5cc5e9c9ba22
--- /dev/null
+++ b/libstdc++-v3/testsuite/std/format/context.cc
@@ -0,0 +1,36 @@
+// { dg-do compile { target c++20 } }
+
+#include
+
+template
+concept format_context_reqs = std::is_destructible_v
+ && (!std::is_default_constructible_v)
+ && (!std::is_copy_constructible_v)
+ && (!std::is_move_constructible_v)
+ && (!std::is_copy_assignable_v)
+ && (!std::is_move_assignable_v)
+ && requires (Context& ctx, const Context& cctx) {
+typename Context::iterator;
+typename Context::char_type;
+requires std::same_as,
+ std::formatter>;
+{ ctx.locale() } -> std::same_as;
+{ ctx.out() } -> std::same_as;
+{ ctx.advance_to(ctx.out()) } -> std::same_as;
+{ cctx.arg(1) } -> std::same_as>;
+ };
+
+template
+constexpr bool
+check(std::basic_format_context*)
+{
+ using context = std::basic_format_context;
+ static_assert( format_context_reqs );
+ static_assert( std::is_same_v );
+ static_assert( std::is_same_v );
+ return true;
+}
+
+static_assert( check( (std::format_context*)nullptr) );
+static_assert( check( (std::wformat_context*)nullptr) );
+static_assert( check( (std::basic_format_context*)nullptr) );
[gcc r15-1959] Vect: Optimize truncation for .SAT_SUB operands
https://gcc.gnu.org/g:3918bea620e826b0df68a9c8492b791a67f294b5
commit r15-1959-g3918bea620e826b0df68a9c8492b791a67f294b5
Author: Pan Li
Date: Sun Jun 30 10:55:50 2024 +0800
Vect: Optimize truncation for .SAT_SUB operands
To get better vectorized code of .SAT_SUB, we would like to avoid the
truncated operation for the assignment. For example, as below.
unsigned int _1;
unsigned int _2;
unsigned short int _4;
_9 = (unsigned short int).SAT_SUB (_1, _2);
If we make sure that the _1 is in the range of unsigned short int. Such
as a def similar to:
_1 = (unsigned short int)_4;
Then we can do the distribute the truncation operation to:
_3 = (unsigned short int) MIN (65535, _2); // aka _3 = .SAT_TRUNC (_2);
_9 = .SAT_SUB (_4, _3);
Then, we can better vectorized code and avoid the unnecessary narrowing
stmt during vectorization with below stmt(s).
_3 = .SAT_TRUNC(_2); // SI => HI
_9 = .SAT_SUB (_4, _3);
Let's take RISC-V vector as example to tell the changes. For below
sample code:
__attribute__((noinline))
void test (uint16_t *x, unsigned b, unsigned n)
{
unsigned a = 0;
uint16_t *p = x;
do {
a = *--p;
*p = (uint16_t)(a >= b ? a - b : 0);
} while (--n);
}
Before this patch:
...
.L3:
vle16.v v1,0(a3)
vrsub.vx v5,v2,t1
mvt3,a4
addw a4,a4,t5
vrgather.vv v3,v1,v5
vsetvli zero,zero,e32,m1,ta,ma
vzext.vf2 v1,v3
vssubu.vx v1,v1,a1
vsetvli zero,zero,e16,mf2,ta,ma
vncvt.x.x.w v1,v1
vrgather.vv v3,v1,v5
vse16.v v3,0(a3)
sub a3,a3,t4
bgtu t6,a4,.L3
...
After this patch:
test:
...
.L3:
vle16.v v3,0(a3)
vrsub.vxv5,v2,a6
mv a7,a4
addwa4,a4,t3
vrgather.vv v1,v3,v5
vssubu.vv v1,v1,v6
vrgather.vv v3,v1,v5
vse16.v v3,0(a3)
sub a3,a3,t1
bgtut4,a4,.L3
...
The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.
2. The rv64gcv build with glibc.
3. The x86 bootstrap tests.
4. The x86 fully regression tests.
gcc/ChangeLog:
* tree-vect-patterns.cc (vect_recog_sat_sub_pattern_transform):
Add new func impl to perform the truncation distribution.
(vect_recog_sat_sub_pattern): Perform above optimize before
generate .SAT_SUB call.
Signed-off-by: Pan Li
Diff:
---
gcc/tree-vect-patterns.cc | 65 +++
1 file changed, 65 insertions(+)
diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc
index 86e893a1c433..4570c25b6647 100644
--- a/gcc/tree-vect-patterns.cc
+++ b/gcc/tree-vect-patterns.cc
@@ -4566,6 +4566,70 @@ vect_recog_sat_add_pattern (vec_info *vinfo,
stmt_vec_info stmt_vinfo,
return NULL;
}
+/*
+ * Try to transform the truncation for .SAT_SUB pattern, mostly occurs in
+ * the benchmark zip. Aka:
+ *
+ * unsigned int _1;
+ * unsigned int _2;
+ * unsigned short int _4;
+ * _9 = (unsigned short int).SAT_SUB (_1, _2);
+ *
+ * if _1 is known to be in the range of unsigned short int. For example
+ * there is a def _1 = (unsigned short int)_4. Then we can transform the
+ * truncation to:
+ *
+ * _3 = (unsigned short int) MIN (65535, _2); // aka _3 = .SAT_TRUNC (_2);
+ * _9 = .SAT_SUB (_4, _3);
+ *
+ * Then, we can better vectorized code and avoid the unnecessary narrowing
+ * stmt during vectorization with below stmt(s).
+ *
+ * _3 = .SAT_TRUNC(_2); // SI => HI
+ * _9 = .SAT_SUB (_4, _3);
+ */
+static void
+vect_recog_sat_sub_pattern_transform (vec_info *vinfo,
+ stmt_vec_info stmt_vinfo,
+ tree lhs, tree *ops)
+{
+ tree otype = TREE_TYPE (lhs);
+ tree itype = TREE_TYPE (ops[0]);
+ unsigned itype_prec = TYPE_PRECISION (itype);
+ unsigned otype_prec = TYPE_PRECISION (otype);
+
+ if (types_compatible_p (otype, itype) || otype_prec >= itype_prec)
+return;
+
+ tree v_otype = get_vectype_for_scalar_type (vinfo, otype);
+ tree v_itype = get_vectype_for_scalar_type (vinfo, itype);
+ tree_pair v_pair = tree_pair (v_otype, v_itype);
+
+ if (v_otype == NULL_TREE || v_itype == NULL_TREE
+|| !direct_internal_fn_supported_p (IFN_SAT_TRUNC, v_pair,
+ OPTIMIZE_FOR_BOTH))
+return;
+
+ /* 1. Find the _4 and update ops[0] as above example. */
+ vect_unpromoted_value unprom;
+ tree tmp = vect_look_through_possible_promotion (vinfo, ops[0], &unprom);
+
+ if (tmp == NULL_TREE || TYPE_PRECISION (unprom.type) != otype_prec)
+return;
+
+ ops[0] = tmp;
+
+ /* 2. Generate _3 = .SAT_TRUNC (_2) and update ops[1] as above example. */
+
[gcc r15-1961] RISC-V: c implies zca, and conditionally zcf & zcd
https://gcc.gnu.org/g:36e5e409190e595638cec053ea034d20d5c74d6b
commit r15-1961-g36e5e409190e595638cec053ea034d20d5c74d6b
Author: Fei Gao
Date: Wed Jul 10 10:12:02 2024 +
RISC-V: c implies zca, and conditionally zcf & zcd
According to Zc-1.0.4-3.pdf from
https://github.com/riscvarchive/riscv-code-size-reduction/releases/tag/v1.0.4-3
The rule is that:
- C always implies Zca
- C+F implies Zcf (RV32 only)
- C+D implies Zcd
Signed-off-by: Fei Gao
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc:
c implies zca, and conditionally zcf & zcd.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/attribute-15.c: adapt TC.
* gcc.target/riscv/attribute-16.c: likewise.
* gcc.target/riscv/attribute-17.c: likewise.
* gcc.target/riscv/attribute-18.c: likewise.
* gcc.target/riscv/pr110696.c: likewise.
* gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: likewise.
* gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: likewise.
* gcc.target/riscv/rvv/base/pr114352-1.c: likewise.
* gcc.target/riscv/rvv/base/pr114352-3.c: likewise.
* gcc.target/riscv/arch-39.c: New test.
* gcc.target/riscv/arch-40.c: New test.
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 12
gcc/testsuite/gcc.target/riscv/arch-39.c | 7 +++
gcc/testsuite/gcc.target/riscv/arch-40.c | 7 +++
gcc/testsuite/gcc.target/riscv/attribute-15.c| 2 +-
gcc/testsuite/gcc.target/riscv/attribute-16.c| 2 +-
gcc/testsuite/gcc.target/riscv/attribute-17.c| 2 +-
gcc/testsuite/gcc.target/riscv/attribute-18.c| 2 +-
gcc/testsuite/gcc.target/riscv/pr110696.c| 2 +-
.../gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c | 2 +-
.../gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/base/pr114352-1.c | 4 ++--
gcc/testsuite/gcc.target/riscv/rvv/base/pr114352-3.c | 8
12 files changed, 39 insertions(+), 13 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index b0a16f5bd30f..3c4178c19c99 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -82,6 +82,18 @@ static const riscv_implied_info_t riscv_implied_info[] =
{"a", "zaamo"},
{"a", "zalrsc"},
+ {"c", "zca"},
+ {"c", "zcf",
+ [] (const riscv_subset_list *subset_list) -> bool
+ {
+ return subset_list->xlen () == 32 && subset_list->lookup ("f");
+ }},
+ {"c", "zcd",
+ [] (const riscv_subset_list *subset_list) -> bool
+ {
+ return subset_list->lookup ("d");
+ }},
+
{"zabha", "zaamo"},
{"b", "zba"},
diff --git a/gcc/testsuite/gcc.target/riscv/arch-39.c
b/gcc/testsuite/gcc.target/riscv/arch-39.c
new file mode 100644
index ..beeb81e44c50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-39.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64idc_zcmt -mabi=lp64d" } */
+int
+foo ()
+{}
+
+/* { dg-error "zcd conflicts with zcmt" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/arch-40.c
b/gcc/testsuite/gcc.target/riscv/arch-40.c
new file mode 100644
index ..eaefaf1d0d75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-40.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64idc_zcmp -mabi=lp64d" } */
+int
+foo ()
+{}
+
+/* { dg-error "zcd conflicts with zcmp" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-15.c
b/gcc/testsuite/gcc.target/riscv/attribute-15.c
index a2e394b6489b..ac6caaecd4f7 100644
--- a/gcc/testsuite/gcc.target/riscv/attribute-15.c
+++ b/gcc/testsuite/gcc.target/riscv/attribute-15.c
@@ -3,4 +3,4 @@
int foo()
{
}
-/* { dg-final { scan-assembler ".attribute arch,
\"rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0_zaamo1p0_zalrsc1p0\"" } } */
+/* { dg-final { scan-assembler ".attribute arch,
\"rv32i2p0_m2p0_a2p0_f2p0_d2p0_c2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zcf1p0\""
} } */
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-16.c
b/gcc/testsuite/gcc.target/riscv/attribute-16.c
index d2b18160cb5d..539e426ca976 100644
--- a/gcc/testsuite/gcc.target/riscv/attribute-16.c
+++ b/gcc/testsuite/gcc.target/riscv/attribute-16.c
@@ -3,4 +3,4 @@
int foo()
{
}
-/* { dg-final { scan-assembler ".attribute arch,
\"rv32i2p1_m2p0_a2p0_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0\""
} } */
+/* { dg-final { scan-assembler ".attribute arch,
\"rv32i2p1_m2p0_a2p0_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zcf1p0\""
} } */
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-17.c
b/gcc/testsuite/gcc.target/riscv/attribute-17.c
index fc2f488a3aca..309
[gcc/aoliva/heads/testbase] (268 commits) RISC-V: c implies zca, and conditionally zcf & zcd
The branch 'aoliva/heads/testbase' was updated to point to:
36e5e409190e... RISC-V: c implies zca, and conditionally zcf & zcd
It previously pointed to:
73ad57c244c2... libstdc++: Fix std::codecvt for e
Diff:
Summary of changes (added commits):
---
36e5e40... RISC-V: c implies zca, and conditionally zcf & zcd (*)
f777ab3... Daily bump. (*)
3918bea... Vect: Optimize truncation for .SAT_SUB operands (*)
d8cd852... libstdc++: Make std::basic_format_context non-copyable [PR1 (*)
9f75895... libstdc++: Minor optimization for std::locale::encoding() (*)
c5efc6e... libstdc++: Use direct-initialization for std::vector' (*)
cda469a... libstdc++: ranges::find needs explicit conversion to size_t (*)
aae535f... i386: Swap compare operands in ustrunc patterns (*)
f0fb6b6... c++: remove Concepts TS code (*)
0c27ead... c: ICE with invalid sizeof [PR115642] (*)
4c70097... c: ICE on invalid with attribute optimize [PR115549] (*)
4865a92... testsuite: Align testcase with implementation [PR105090] (*)
04df2a9... RISC-V: Update testsuite to use b (*)
2a90c41... RISC-V: Add support for B standard extension (*)
5686d3b... internal-fn: Reuse SUBREG_PROMOTED_VAR_P handling (*)
fde96e8... c++: array new with value-initialization [PR115645] (*)
9d20529... recog: Handle some mode-changing hardreg propagations (*)
e08ebd7... rtl-ssa: Add replace_nondebug_insn [PR115785] (*)
7d454ca... fixincludes: skip stdio_stdarg_h on darwin (*)
c829042... c++, contracts: Fix ICE in create_tmp_var [PR113968] (*)
8326956... fixincludes: add bypass to darwin_objc_runtime_1 (*)
2d1f68e... PR modula2/115823 Wrong expansion of isnormal optab (*)
44933fd... middle-end: Fix stalled swapped condition code value [PR115 (*)
73f... arm: cleanup legacy ARM_PE code (*)
23c2e6d... [PR115394] Remove streamer_debugging and it's uses. (*)
80e446e... Match: Support form 2 for the .SAT_TRUNC (*)
1ae5fc2... testsuite: Tests the pattern folding x/sqrt(x) to sqrt(x) f (*)
6fce466... testsuite: Allow matching `{_1, { 0,0,0,0 }}` for vect/slp- (*)
8f8bddb... Remove expanding complex EQ/NE inside a GIMPLE_RETURN [PR11 (*)
7a345d0... RISC-V: fix zcmp popretz [PR113715] (*)
0dcfef4... Daily bump. (*)
5b46f19... Fix test errors after r15-1394 for sizeof(int)==sizeof(long (*)
7825c07... c: Fix ICE for redeclaration of structs with different alig (*)
592a746... c: Fix ICE for incorrect code in comptypes_verify [PR115696 (*)
e611189... rs6000, remove vector set and vector init built-ins. (*)
5db91b3... rs6000, remove __builtin_vsx_xvcmpeqsp_p built-in (*)
c5b4bfe... rs6000, extend vec_xxpermdi built-in for __int128 args (*)
ca4842f... rs6000, remove __builtin_vsx_xvnegdp and __builtin_vsx_xvne (*)
7121926... rs6000, remove __builtin_vsx_vperm_* built-ins (*)
52d5698... rs6000, remove the vec_xxsel built-ins, they are duplicates (*)
807bed0... rs6000, add overloaded vec_sel with int128 arguments (*)
8d6326e... rs6000, remove duplicated built-ins of vecmergl and vec_mer (*)
fd9fdb3... rs6000, Remove redundant vector float/double type conversio (*)
b620845... rs6000, extend the current vec_{un,}signed{e,o} built-ins (*)
6031e34... rs6000, fix error in unsigned vector float to unsigned int (*)
224cc56... rs6000, Remove __builtin_vsx_xvcv{sp{sx,u}ws,dpuxds_uns} (*)
7ed9a45... rs6000, Remove __builtin_vsx_cmple* builtins (*)
d17889d... i386: Implement .SAT_TRUNC for unsigned integers (*)
2d6e6a7... diagnostics: use refs rather than pointers for diagnostic_{ (*)
959c168... arm: clean up some legacy FPA related cruft. (*)
5ef0b7d... RISC-V: Fix comment/naming in attribute parsing code (*)
85fa334... RISC-V: Deduplicate arch subset list processing (*)
0717d50... RISC-V: testsuite: Properly gate LTO tests (*)
298a576... i386: Correct AVX10 CPUID emulation (*)
4f76717... c: Rewrite c_parser_omp_tile_sizes to use c_parser_expr_lis (*)
8eab506... c++: Implement C++26 CWG2819 - Allow cv void * null pointer (*)
23ab7f6... Rename __{float,double}_u to __x86_{float,double}_u to avoi (*)
ecde8d5... RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form (*)
35b1096... RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form (*)
ceb944a... Daily bump. (*)
98914f9... [to-be-committed][RISC-V][V3] DCE analysis for extension el (*)
113b5ce... c-format.cc: add ctors to format_check_results and format_c (*)
2b3027b... i386: Promote {QI,HI}mode x86_movcc_0_m1_neg to SImod (*)
40d234d... libstdc++: Fix _Atomic(T) macro in [PR115807] (*)
a0e64a0... Remove trailing whitespace from invoke.texi (*)
f3f9e4e... x86: Support bitwise and/andnot/abs/neg/copysign/xorsign op (*)
5be9703... rs6000: load high and low part of 128bit vector independent (*)
dafd63d... RISC-V: Implement .SAT_TRUNC for vector unsigned int (*)
7183a8c... fortran: Move definition of variable closer to its uses (*)
682731d... [RISC-V] add implied extens
[gcc/aoliva/heads/testme] (269 commits) [i386] adjust flag_omit_frame_pointer in a single function
The branch 'aoliva/heads/testme' was updated to point to:
ef1d9ef17840... [i386] adjust flag_omit_frame_pointer in a single function
It previously pointed to:
18cdf562ea2a... UI_To_gnu: cope with per-target precision limits
Diff:
!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---
18cdf56... UI_To_gnu: cope with per-target precision limits
f216931... Introduce general caching of sized type
0a9b788... [dwarf] get_debug_type of TYPE_NAME to compare with qualifi
0c598db... make_type_from_size: avoid TYPE_DEBUG_TYPE / TREE_TYPE loop
2e886d9... Map unpacked type to packed deduped type for debug info
cdfb1ef... make_type_from_size: fix compare for type reuse
0803a2d... Follow only proper TYPE_DEBUG_TYPE
d47c7fe... Avoid dropping bits from num/den in fixed-point types
Summary of changes (added commits):
---
ef1d9ef... [i386] adjust flag_omit_frame_pointer in a single function
36e5e40... RISC-V: c implies zca, and conditionally zcf & zcd (*)
f777ab3... Daily bump. (*)
3918bea... Vect: Optimize truncation for .SAT_SUB operands (*)
d8cd852... libstdc++: Make std::basic_format_context non-copyable [PR1 (*)
9f75895... libstdc++: Minor optimization for std::locale::encoding() (*)
c5efc6e... libstdc++: Use direct-initialization for std::vector' (*)
cda469a... libstdc++: ranges::find needs explicit conversion to size_t (*)
aae535f... i386: Swap compare operands in ustrunc patterns (*)
f0fb6b6... c++: remove Concepts TS code (*)
0c27ead... c: ICE with invalid sizeof [PR115642] (*)
4c70097... c: ICE on invalid with attribute optimize [PR115549] (*)
4865a92... testsuite: Align testcase with implementation [PR105090] (*)
04df2a9... RISC-V: Update testsuite to use b (*)
2a90c41... RISC-V: Add support for B standard extension (*)
5686d3b... internal-fn: Reuse SUBREG_PROMOTED_VAR_P handling (*)
fde96e8... c++: array new with value-initialization [PR115645] (*)
9d20529... recog: Handle some mode-changing hardreg propagations (*)
e08ebd7... rtl-ssa: Add replace_nondebug_insn [PR115785] (*)
7d454ca... fixincludes: skip stdio_stdarg_h on darwin (*)
c829042... c++, contracts: Fix ICE in create_tmp_var [PR113968] (*)
8326956... fixincludes: add bypass to darwin_objc_runtime_1 (*)
2d1f68e... PR modula2/115823 Wrong expansion of isnormal optab (*)
44933fd... middle-end: Fix stalled swapped condition code value [PR115 (*)
73f... arm: cleanup legacy ARM_PE code (*)
23c2e6d... [PR115394] Remove streamer_debugging and it's uses. (*)
80e446e... Match: Support form 2 for the .SAT_TRUNC (*)
1ae5fc2... testsuite: Tests the pattern folding x/sqrt(x) to sqrt(x) f (*)
6fce466... testsuite: Allow matching `{_1, { 0,0,0,0 }}` for vect/slp- (*)
8f8bddb... Remove expanding complex EQ/NE inside a GIMPLE_RETURN [PR11 (*)
7a345d0... RISC-V: fix zcmp popretz [PR113715] (*)
0dcfef4... Daily bump. (*)
5b46f19... Fix test errors after r15-1394 for sizeof(int)==sizeof(long (*)
7825c07... c: Fix ICE for redeclaration of structs with different alig (*)
592a746... c: Fix ICE for incorrect code in comptypes_verify [PR115696 (*)
e611189... rs6000, remove vector set and vector init built-ins. (*)
5db91b3... rs6000, remove __builtin_vsx_xvcmpeqsp_p built-in (*)
c5b4bfe... rs6000, extend vec_xxpermdi built-in for __int128 args (*)
ca4842f... rs6000, remove __builtin_vsx_xvnegdp and __builtin_vsx_xvne (*)
7121926... rs6000, remove __builtin_vsx_vperm_* built-ins (*)
52d5698... rs6000, remove the vec_xxsel built-ins, they are duplicates (*)
807bed0... rs6000, add overloaded vec_sel with int128 arguments (*)
8d6326e... rs6000, remove duplicated built-ins of vecmergl and vec_mer (*)
fd9fdb3... rs6000, Remove redundant vector float/double type conversio (*)
b620845... rs6000, extend the current vec_{un,}signed{e,o} built-ins (*)
6031e34... rs6000, fix error in unsigned vector float to unsigned int (*)
224cc56... rs6000, Remove __builtin_vsx_xvcv{sp{sx,u}ws,dpuxds_uns} (*)
7ed9a45... rs6000, Remove __builtin_vsx_cmple* builtins (*)
d17889d... i386: Implement .SAT_TRUNC for unsigned integers (*)
2d6e6a7... diagnostics: use refs rather than pointers for diagnostic_{ (*)
959c168... arm: clean up some legacy FPA related cruft. (*)
5ef0b7d... RISC-V: Fix comment/naming in attribute parsing code (*)
85fa334... RISC-V: Deduplicate arch subset list processing (*)
0717d50... RISC-V: testsuite: Properly gate LTO tests (*)
298a576... i386: Correct AVX10 CPUID emulation (*)
4f76717... c: Rewrite c_parser_omp_tile_sizes to use c_parser_expr_lis (*)
8eab506... c++: Implement C++26 CWG2819 - Allow cv void * null pointer (*)
23ab7f6... Rename __{float,double}_u to __x86_{float,double}_u to avoi (*)
ecde8d5... RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form (*)
35b1096... RISC-V: Add testcases for unsigned vecto
[gcc(refs/users/aoliva/heads/testme)] [i386] adjust flag_omit_frame_pointer in a single function [PR113719]
https://gcc.gnu.org/g:ef1d9ef17840032c60e9757d92a55fc71ba55353 commit ef1d9ef17840032c60e9757d92a55fc71ba55353 Author: Alexandre Oliva Date: Thu Jul 11 01:16:32 2024 -0300 [i386] adjust flag_omit_frame_pointer in a single function [PR113719] The first two patches for PR113719 have each regressed gcc.dg/ipa/iinline-attr.c on a different target. The reason for this instability is that there are competing flag_omit_frame_pointer overriders on x86: - ix86_recompute_optlev_based_flags computes and sets a -f[no-]omit-frame-pointer default depending on USE_IX86_FRAME_POINTER and, in 32-bit mode, optimize_size - ix86_option_override_internal enables flag_omit_frame_pointer for -momit-leaf-frame-pointer to take effect ix86_option_override[_internal] calls ix86_recompute_optlev_based_flags before setting flag_omit_frame_pointer. It is called during global process_options. But ix86_recompute_optlev_based_flags is also called by parse_optimize_options, during attribute processing, and at that point, ix86_option_override is not called, so the final overrider for global options is not applied to the optimize attributes. If they differ, the testcase fails. In order to fix this, we need to process all overriders of this option whenever we process any of them. Since this setting is affected by optimization options, it makes sense to compute it in parse_optimize_options, rather than in process_options. for gcc/ChangeLog PR target/113719 * config/i386/i386-options.cc (ix86_option_override_internal): Move flag_omit_frame_pointer final overrider... (ix86_recompute_optlev_based_flags): ... here. Diff: --- gcc/config/i386/i386-options.cc | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 5824c0cb072e..059ef3ae6ad4 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -1911,6 +1911,12 @@ ix86_recompute_optlev_based_flags (struct gcc_options *opts, opts->x_flag_pcc_struct_return = DEFAULT_PCC_STRUCT_RETURN; } } + + /* Keep nonleaf frame pointers. */ + if (opts->x_flag_omit_frame_pointer) +opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER; + else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags)) +opts->x_flag_omit_frame_pointer = 1; } /* Implement part of TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE hook. */ @@ -2590,12 +2596,6 @@ ix86_option_override_internal (bool main_args_p, opts->x_target_flags |= MASK_NO_RED_ZONE; } - /* Keep nonleaf frame pointers. */ - if (opts->x_flag_omit_frame_pointer) -opts->x_target_flags &= ~MASK_OMIT_LEAF_FRAME_POINTER; - else if (TARGET_OMIT_LEAF_FRAME_POINTER_P (opts->x_target_flags)) -opts->x_flag_omit_frame_pointer = 1; - /* If we're doing fast math, we don't care about comparison order wrt NaNs. This lets us use a shorter comparison sequence. */ if (opts->x_flag_finite_math_only)
