Anyone please help me to get out of this issue
Thanks,
Sravan
On Thu, Aug 8, 2013 at 5:29 PM, sravan megan wrote:
> Hi All,
>
>I am new to GCC. I was working in an Embedded processor with
> GCC-4.6.4 version.
>
>I need to add load/store reverse instructions to the MD file.
>
>My instructions will look as below:
>
>LWX Rd,Ra,Rb
>
> operation: Addr := Ra + Rb
> Rd := *Addr(loading data with the opposite endianness)
>
> SWX Rd,Ra,Rb
>
> operation: Addr := Ra + Rb
> *Addr := Rd(storing data with the opposite endianness)
>
>
>
> To add the above instructions in to md file I tried below pattern in md
> file
>
> (define_insn "movsi_rev"
> [(set (match_operand:SI 0 "nonimmediate_operand" "=d,m")
> (bswap: SI (match_operand:SI 1 "move_src_operand" "m,d")))]
> ""
> "@
>lwx\t%0,%1,%0
>swx\t%0,%1,%0"
> [(set_attr "type" "load,store")
> (set_attr "mode" "SI")
> (set_attr "length""4,4")])
>
>
>I wrote a small testcase which is generating swx instruction but
> the operands are more due to which it is failing in assembler phase
>
> ex:
> int store_rev(int *n)
> {
> return *n) & 0xff00) >> 24)
> | (((*n) & 0x00ff) >> 8)
> | (((*n) & 0xff00) << 8)
> | (((*n) & 0x00ff) << 24));
>
> }
>
> for the above store_rev function I need to generate only single swx
> instruction.
> I was successful in generating the swx instruction but instead of 3
> registers compiler is generating one extra operand "0" swx r0,r2,0,r0
>
>ex: instead of swx r0,r2,r0 it is generating swx r0,r2,0,r0
>
> can anyone please help me in removing the extra operand in the above
> instruction.
>
> Thanks,
> Sravan
