dynamic attribute
Hello I want a new attribute in my port. This has to be dynamic like the aligned attribute. So I registered a new handler in the attribute table and was able to get the value inside the handler. But how can I use this value in prologue or epilogue. All tries to append this value to the function declaration failed. Is there a better example than the aligned attribute which can show me a solution? I want to give the opportunity to overwrite the automatic register save and restore mechanism during entry and exit. So I have to read a mask out of the code, Thanks Michael Fogel
Need help for a net target
Hello
For my diploma thesis I have to implement a new back-end for GCC.
The microcontroller is based on an FPGA and was developed one year ago.
Only an Assembler is available and now my university lecturer wants an C
compiler too. I decided to use GCC in version 4.2.1 as basis for the new
compiler.
I started with an new target, defined the mandatory target macros and
implemented the instruction patterns.
After i few tries i was able to compile my first file. Now I try to make
the optimization working, but there is a problem i can not solve.
Compiling the following code with activated optimization comes up with
an error message.
#define RAM_ADDRESS 0
#define SERIAL_OFFSET 800
void ReadSerialNumber(void) {
int SerialNumber, c;
char *s;
SerialNumber = 0;
s = (char*)(RAM_ADDRESS + SERIAL_OFFSET);
while ((c = *s - '0') <= 9){
SerialNumber = 10*SerialNumber + c;
s++;
}
// ...
}
test.c: In function 'ReadSerialNumber':
test.c:40: internal compiler error: in create_mem_ref, at
tree-ssa-address.c:677
Please submit a full bug report,
adding an volatile
volatile char *s;
fixes it but I think the real problem is somewhere else.
thanks for you help
best regards
Michael Fogel
again problems implementing own target
Hi The optimization of my target seems not to work properly. The compiling process works using -O0 but fails with optimization. Small source files with only a few functions are working, but bigger files don't. The compiler stops with an error: internal compiler error: in reload_combine_note_use, at postreload.c:1096 There is a pseudo register without an hard register allocation. I tried to find out which line in my code produces this error. A debug_rtx(x) at the beginning of reload_combine_note_use did the trick. The failing instruction is a call. The compiler loads every symbol reference into a register and calls the function using this. In front of the error this load is missing. In smaller files the compiler uses the reference, which is the way i want him to do it. What did i wrong? Which macros do i have to edit? Thanks for your help. best regards Michael Fogel
Re: again problems implementing own target
Jim Wilson wrote: Michael_fogel wrote: The failing instruction is a call. The compiler loads every symbol reference into a register and calls the function using this. In front of the error this load is missing. In smaller files the compiler uses the reference, which is the way i want him to do it. We need more info in order to determine what is wrong. Some RTL examples would be nice. Also, a copy of your pattern in your md file that matches call instructions. Also, in which pass does the load symbol instruction disappear? If you compile with -da, you will get RTL dumps after each optimization pass. You can look at them to see where problem was introduced. There does appear to be a problem with your port, but there is also a way to work around it. If you define NO_FUNCTION_CSE, then gcc will no longer try to optimize function addresses by loading them into pseudos. See the docs for this macro in the doc/tm.texi file. Thank you for your help. After defining the target hook TARGET_ADDRESS_COST with return 2 the compiler was able to compile it. I took a closer look at the scheduler and found some interesting macros. One of them was NO_FUNCTION_CSE. Now I want to define the costs for every instruction so gcc can make a better optimization. Sometimes I should read the documentation more carefully. In my opinion the compiler ran out of registers and was not able to allocate the pseudo register. In this case the compiler has to spill these registers. How is this done in GCC? Is there a way to control it? Best regards Michael Fogel
own target: combine emits invalid RTL
Hi
There is again a problem i con not solve by my own. I tried to compile
LwIP and discovered following error.
tcp_in.c:1133: internal compiler error: in gen_reg_rtx, at emit-rtl.c:771
Please submit a full bug report,
A full output of all passes showed, that combine seems to make invalid
combinations.
After the life1 pass there are two instructions:
(insn 2058 2053 2059 144 (set (reg:QI 1255 [ .flags ])
(mem/s:QI (reg/f:SI 1250) [0 .flags+0 S1 A32])) 131
{*target.md:2289} (insn_list:REG_DEP_TRUE 2053 (nil))
(nil))
(insn 2059 2058 2060 144 (set (reg:SI 1256)
(ior:SI (subreg:SI (reg:QI 1255 [ .flags ]) 0)
(const_int 2 [0x2]))) 18 {iorsi3_internal1}
(insn_list:REG_DEP_TRUE 2058 (nil))
(expr_list:REG_DEAD (reg:QI 1255 [ .flags ])
(nil)))
but after the combine pass one instruction is deleted and combined with
the second:
(note 2058 2053 2059 144 NOTE_INSN_DELETED)
(insn 2059 2058 2060 144 (set (reg:SI 1256)
(ior:SI (subreg:SI (mem/s:QI (reg/f:SI 1250) [0
.flags+0 S1 A32]) 0)
(const_int 2 [0x2]))) 18 {iorsi3_internal1}
(insn_list:REG_DEP_TRUE 2053 (nil))
(nil))
This instruction is invalid and there is no pattern for a match.
(define_insn "iorsi3_internal1"
[(set (match_operand:SI 0 "gp_reg_operand" "=r,r")
(ior:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ")
(match_operand:SI 2 "uns_arith_operand" "r,K")))]
predicates and constraints are similar to the mips target
How can i stop combine doing this?
What controls the behavior of combine? Only the pattern signatures or is
there a target hook or macro?
Thanks for your help
best regards
Michael Fogel
Re: own target: combine emits invalid RTL
Jim Wilson wrote: > Dave Korn wrote: >> First places to look would be GO_IF_LEGITIMATE_ADDRESS and >> REG_OK_FOR_BASE_P, wouldn't they? Particularly in conjunction with >> REG_OK_STRICT. > > This could be a REG_OK_STRICT issue, but it isn't the usual case of > accepting an unallocated pseudo in reload, as we have a SUBREG MEM here. > > Probably there is code in the backend that assumes SUBREG can only > contain a REG, which is incorrect. SUBREG can also contain a MEM. > You need to check to make sure. Hi A few weeks ago i had a problem during reload pass. So i added a non strict implementation to GO_IF_LEGITIMATE_ADDRESS. So I think thats not the issue. This should now be implemented properly. I tried to define an automaton but this breaks my flow analysis. The flow pass emits no return in some cases. The code generation differs after the scheduler pass. I removed the precompiler commands in combine.c and now it works. The real problem is: I thought a subreg is just a partial reg. My machine has no subregs so i used subregs like usual registers. Maybe i have to redesign my port Thanks for your help Michael Fogel
