own target: combine emits invalid RTL

[Michael_fogel]

Hi

There is again a problem i con not solve by my own. I tried to compile
LwIP and discovered following error.

tcp_in.c:1133: internal compiler error: in gen_reg_rtx, at emit-rtl.c:771
Please submit a full bug report,

A full output of all passes showed, that combine seems to make invalid
combinations.

After the life1 pass there are two instructions:

(insn 2058 2053 2059 144 (set (reg:QI 1255 [ <variable>.flags ])
        (mem/s:QI (reg/f:SI 1250) [0 <variable>.flags+0 S1 A32])) 131
{*target.md:2289} (insn_list:REG_DEP_TRUE 2053 (nil))
    (nil))

(insn 2059 2058 2060 144 (set (reg:SI 1256)
        (ior:SI (subreg:SI (reg:QI 1255 [ <variable>.flags ]) 0)
            (const_int 2 [0x2]))) 18 {iorsi3_internal1}
(insn_list:REG_DEP_TRUE 2058 (nil))
    (expr_list:REG_DEAD (reg:QI 1255 [ <variable>.flags ])
        (nil)))

but after the combine pass one instruction is deleted and combined with
the second:

(note 2058 2053 2059 144 NOTE_INSN_DELETED)

(insn 2059 2058 2060 144 (set (reg:SI 1256)
        (ior:SI (subreg:SI (mem/s:QI (reg/f:SI 1250) [0
<variable>.flags+0 S1 A32]) 0)
            (const_int 2 [0x2]))) 18 {iorsi3_internal1}
(insn_list:REG_DEP_TRUE 2053 (nil))
    (nil))

This instruction is invalid and there is no pattern for a match.

(define_insn "iorsi3_internal1"
  [(set (match_operand:SI 0 "gp_reg_operand" "=r,r")
        (ior:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ")
                (match_operand:SI 2 "uns_arith_operand" "r,K")))]

predicates and constraints are similar to the mips target

How can i stop combine doing this?
What controls the behavior of combine? Only the pattern signatures or is
there a target hook or macro?

Thanks for your help

best regards

Michael Fogel