Re: [PATCH v2 1/3] aarch64: add internal API for secure monitor call (smc)
Everything else looks good. Just one nit below.
On 12/11/2021 10:16, Gedare Bloom wrote:
---
cpukit/score/cpu/aarch64/aarch64-smc.c| 72
.../aarch64/include/rtems/score/aarch64-smc.h | 83 +++
spec/build/cpukit/cpuaarch64.yml | 2 +
3 files changed, 157 insertions(+)
create mode 100644 cpukit/score/cpu/aarch64/aarch64-smc.c
create mode 100644 cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
diff --git a/cpukit/score/cpu/aarch64/aarch64-smc.c
b/cpukit/score/cpu/aarch64/aarch64-smc.c
new file mode 100644
index 00..c531d074d8
--- /dev/null
+++ b/cpukit/score/cpu/aarch64/aarch64-smc.c
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @brief This source file contains the implementation of
+ *_AArch64_SMC_Invoke().
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include
+
+int _AArch64_SMC_Invoke(
+ uint32_t function_id,
+ uintptr_t arg0,
+ uintptr_t arg1,
+ uintptr_t arg2,
+ uintptr_t arg3,
+ uintptr_t arg4,
+ uintptr_t arg5,
+ uintptr_t arg6,
The SMC arguments here should be uint64_t for all AArch64 calls
regardless of ABI.
+ AArch64_SMC_Return *result
+) {
+ int rv;
+
+ /* This only works for SMC that return 4 or fewer results. It may be extended
+ * up to the full 18 return results specified for SMC64, but then we would
+ * need to allocate a callee-saved register for *result */
+ __asm__ volatile(
+"smc #0\n"
+"mov %0, x0\n"
+"ldr x15, [sp]\n"
+"cbz x15, 0f\n"
+"stp x0, x1, [x15]\n"
+"stp x2, x3, [x15, #16]\n"
+"0:\n"
+: "=r" ( rv )
+:
+: "x0", "x1", "x2", "x3", "x15"
+ );
+
+ return rv;
+}
+
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
new file mode 100644
index 00..e80cc1e99b
--- /dev/null
+++ b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUAArch64
+ *
+ * @brief This header file provides API to wrap secure monitor calls (smc).
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_SCORE_AARCH64_SMC_H
+#define _RTEMS_
New validation test suites
Hello, the ESA activity to pre-qualify parts of RTEMS according to ECSS requirements is nearly complete. There is a short presentation available here: https://indico.esa.int/event/374/timetable/ We finished the specification of the pre-qualified RTEMS feature set. The specification is available in an RTEMS Project repository: https://git.rtems.org/rtems-central/tree/spec The validation tests are generated from the specification using the "./spec2modules.py" script and end up in the RTEMS sources of a Git submodule. I think the specification and the generation tool is now sufficiently stable so that the validation test code can be integrated in the RTEMS master branch. The patch set is too big for the mailing list, so you can review it here: https://git.rtems.org/sebh/rtems.git/log/?h=validation https://github.com/sebhub/rtems/tree/validation The patch set is organized so that general support code for the validation tests is added first and then there are commits for each pre-qualified Classic API Manager or subsystem. I did build all BSPs with the patch set. The validation tests use only statically allocated resources. Some low memory targets are not able to link all test suites. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH rtems-tools 5/6] ObjdumpProcessor.h: Fix formatting
---
tester/covoar/ObjdumpProcessor.h | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/tester/covoar/ObjdumpProcessor.h b/tester/covoar/ObjdumpProcessor.h
index 0ca14b8..b3c7262 100644
--- a/tester/covoar/ObjdumpProcessor.h
+++ b/tester/covoar/ObjdumpProcessor.h
@@ -91,7 +91,7 @@ namespace Coverage {
* This method constructs an ObjdumpProcessor instance.
*/
ObjdumpProcessor(
- DesiredSymbols& symbolsToAnalyze,
+ DesiredSymbols& symbolsToAnalyze,
std::shared_ptr& targetInfo
);
@@ -100,24 +100,24 @@ namespace Coverage {
*/
virtual ~ObjdumpProcessor();
-uint32_t determineLoadAddress(
- ExecutableInfo* theExecutable
-);
+uint32_t determineLoadAddress( ExecutableInfo* theExecutable );
/*!
* This method fills a tempfile with the .text section of objdump
* for the given file name.
*/
-void getFile( std::string fileName,
- rld::process::tempfile& dmp,
- rld::process::tempfile& err );
+void getFile(
+ std::string fileName,
+ rld::process::tempfile& dmp,
+ rld::process::tempfile& err
+);
/*!
* This method fills the objdumpList list with all the
* instruction addresses in the object dump file.
*/
void loadAddressTable (
- ExecutableInfo* const executableInformation,
+ ExecutableInfo* const executableInformation,
rld::process::tempfile& dmp,
rld::process::tempfile& err
);
@@ -150,9 +150,7 @@ namespace Coverage {
* the given line in the objdmp file is a branch instruction,
* otherwise it returns false.
*/
-bool isBranchLine(
- const std::string& line
-);
+bool isBranchLine( const std::string& line );
/*!
* This method sets the targetInfo_m variable.
@@ -167,7 +165,7 @@ namespace Coverage {
* This variable consists of a list of all instruction addresses
* extracted from the obj dump file.
*/
-objdumpFile_t objdumpList;
+objdumpFile_t objdumpList;
/*!
* This method determines whether the specified line is a
--
1.8.3.1
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[PATCH rtems-tools 1/6] ObjdumpProcessor.cc: Fix formatting
---
tester/covoar/ObjdumpProcessor.cc | 64 ++-
1 file changed, 36 insertions(+), 28 deletions(-)
diff --git a/tester/covoar/ObjdumpProcessor.cc
b/tester/covoar/ObjdumpProcessor.cc
index 8c0e8dc..92e812d 100644
--- a/tester/covoar/ObjdumpProcessor.cc
+++ b/tester/covoar/ObjdumpProcessor.cc
@@ -38,73 +38,81 @@ namespace Coverage {
) {
// Find the symbol's coverage map.
try {
- CoverageMapBase& coverageMap =
executableInfo->findCoverageMap(symbolName);
+ CoverageMapBase& coverageMap =
+executableInfo->findCoverageMap( symbolName );
uint32_t firstInstructionAddress = UINT32_MAX;
// Find the address of the first instruction.
- for (auto& line : instructions) {
-if (line.isInstruction) {
+ for ( auto& line : instructions ) {
+if ( line.isInstruction ) {
firstInstructionAddress = line.address;
break;
}
}
- if (firstInstructionAddress == UINT32_MAX) {
+ if ( firstInstructionAddress == UINT32_MAX ) {
std::ostringstream what;
what << "Could not find first instruction address for symbol "
- << symbolName << " in " << executableInfo->getFileName();
+ << symbolName << " in " << executableInfo->getFileName();
throw rld::error( what, "Coverage::finalizeSymbol" );
}
- int rangeIndex = -1;
+ int rangeIndex = -1;
uint32_t lowAddress = UINT32_MAX;
do {
rangeIndex++;
-lowAddress = coverageMap.getLowAddressOfRange(rangeIndex);
- } while (firstInstructionAddress != lowAddress);
+lowAddress = coverageMap.getLowAddressOfRange( rangeIndex );
+ } while ( firstInstructionAddress != lowAddress );
- uint32_t sizeWithoutNops = coverageMap.getSizeOfRange(rangeIndex);
- uint32_t size = sizeWithoutNops;
- uint32_t highAddress = lowAddress + size - 1;
+ uint32_t sizeWithoutNops = coverageMap.getSizeOfRange( rangeIndex );
+ uint32_t size= sizeWithoutNops;
+ uint32_t highAddress = lowAddress + size - 1;
uint32_t computedHighAddress = highAddress;
// Find the high address as reported by the address of the last NOP
// instruction. This ensures that NOPs get marked as executed later.
- for (auto instruction = instructions.rbegin();
- instruction != instructions.rend();
- instruction++) {
-if (instruction->isInstruction) {
- if (instruction->isNop) {
+ for (
+auto instruction = instructions.rbegin();
+instruction != instructions.rend();
+instruction++
+ ) {
+if ( instruction->isInstruction ) {
+ if ( instruction->isNop ) {
computedHighAddress = instruction->address + instruction->nopSize;
}
+
break;
}
}
- if (highAddress != computedHighAddress) {
-std::cerr << "Function's high address differs between DWARF and
objdump: "
- << symbolName << " (0x" << std::hex << highAddress << " and 0x"
- << computedHighAddress - 1 << ")" << std::dec << std::endl;
+ if ( highAddress != computedHighAddress ) {
+std::cerr << "Function's high address differs between DWARF and "
+ << "objdump: " << symbolName << " (0x" << std::hex
+ << highAddress << " and 0x"
+ << computedHighAddress - 1 << ")" << std::dec << std::endl;
+
size = computedHighAddress - lowAddress;
}
// If there are NOT already saved instructions, save them.
SymbolInformation* symbolInfo = symbolsToAnalyze.find( symbolName );
- if (symbolInfo->instructions.empty()) {
-symbolInfo->sourceFile = executableInfo;
-symbolInfo->baseAddress = lowAddress;
+ if ( symbolInfo->instructions.empty() ) {
+symbolInfo->sourceFile = executableInfo;
+symbolInfo->baseAddress = lowAddress;
symbolInfo->instructions = instructions;
}
// Add the symbol to this executable's symbol table.
SymbolTable* theSymbolTable = executableInfo->getSymbolTable();
theSymbolTable->addSymbol(
-symbolName, lowAddress, highAddress - lowAddress + 1
+symbolName,
+lowAddress,
+highAddress - lowAddress + 1
);
// Mark the start of each instruction in the coverage map.
- for (auto& instruction : instructions) {
+ for ( auto& instruction : instructions ) {
coverageMap.setIsStartOfInstruction( instruction.address );
}
@@ -116,16 +124,16 @@ namespace Coverage {
sizeWithoutNops,
verbose
);
-} catch (const ExecutableInfo::CoverageMapNotFoundError& e) {
+} catch ( const ExecutableInfo::CoverageMapNotFoundError& e ) {
// Allow execution to continue even if a coverage map could not be
// found.
std::cerr << "Coverage m
[PATCH] TraceConverter.cc: Fix Uncaught exception issue
CID 1471639: Uncaught exception
Closes #4501
---
tester/covoar/TraceConverter.cc | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/tester/covoar/TraceConverter.cc b/tester/covoar/TraceConverter.cc
index 8e30ae5..2c5330a 100644
--- a/tester/covoar/TraceConverter.cc
+++ b/tester/covoar/TraceConverter.cc
@@ -87,14 +87,30 @@ int main(
std::string tracefile;
std::string logname = "/tmp/qemu.log";
Coverage::ExecutableInfo* executableInfo;
- rld::process::tempfile objdumpFile( ".dmp" );
- rld::process::tempfile err( ".err" );
Coverage::DesiredSymbolssymbolsToAnalyze;
boolverbose = false;
std::string dynamicLibrary;
int ec = 0;
std::shared_ptr targetInfo;
+ try
+ {
+rld::process::tempfile objdumpFile( ".dmp" );
+ }
+ catch ( rld::error re )
+ {
+std::cerr << "Failed to make .dmp tempfile " << std::endl;
+ }
+
+ try
+ {
+rld::process::tempfile err( ".err" );
+ }
+ catch ( rld::error re )
+ {
+std::cerr << "Failed to make .err tempfile " << std::endl;
+ }
+
setup_signals();
//
--
1.8.3.1
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[PATCH rtems-tools 2/6] TargetFactory.cc: Fix formatting
---
tester/covoar/TargetFactory.cc | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/tester/covoar/TargetFactory.cc b/tester/covoar/TargetFactory.cc
index fa72f05..0b6be52 100644
--- a/tester/covoar/TargetFactory.cc
+++ b/tester/covoar/TargetFactory.cc
@@ -39,9 +39,7 @@ namespace Target {
//! This is the string found in configuration to match.
std::string theTarget;
//! This is the static wrapper for the constructor.
- TargetBase *(*theCtor)(
- std::string
- );
+ TargetBase *(*theCtor)( std::string );
} FactoryEntry_t;
//!
@@ -60,27 +58,27 @@ namespace Target {
{ "powerpc", Target_powerpc_Constructor },
{ "sparc", Target_sparc_Constructor },
{ "riscv", Target_riscv_Constructor },
-{ "TBD", NULL },
+{ "TBD", NULL }
};
- TargetBase* TargetFactory(
-std::string targetName
- )
+ TargetBase* TargetFactory( std::string targetName )
{
size_t i;
std::string cpu;
i = targetName.find( '-' );
-if ( i == targetName.npos )
+if ( i == targetName.npos ) {
cpu = targetName;
-else
+} else {
cpu = targetName.substr( 0, i );
+}
// std::cerr << targetName << " --> " << cpu << std::endl;
// Iterate over the table trying to find an entry with a matching name
-for ( i=0 ; i < sizeof(FactoryTable) / sizeof(FactoryEntry_t); i++ ) {
- if ( FactoryTable[i].theTarget == cpu )
+for ( i = 0 ; i < sizeof( FactoryTable ) / sizeof( FactoryEntry_t ); i++) {
+ if ( FactoryTable[i].theTarget == cpu ) {
return FactoryTable[i].theCtor( targetName );
+ }
}
std::ostringstream what;
--
1.8.3.1
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[PATCH rtems-tools 6/6] SymbolTable.cc: Fix formatting
---
tester/covoar/SymbolTable.cc | 70
1 file changed, 38 insertions(+), 32 deletions(-)
diff --git a/tester/covoar/SymbolTable.cc b/tester/covoar/SymbolTable.cc
index cfbd7a3..a33a348 100644
--- a/tester/covoar/SymbolTable.cc
+++ b/tester/covoar/SymbolTable.cc
@@ -30,9 +30,9 @@ namespace Coverage {
const uint32_t length
)
{
-uint32_t end = 0;
-symbol_entry_t entry;
-symbolInfo_t symbolData;
+uint32_t end = 0;
+symbol_entry_t entry;
+symbolInfo_t symbolData;
// Add an entry to the address map.
end = start + length - 1;
@@ -45,14 +45,14 @@ namespace Coverage {
symbolData.startingAddress = start;
symbolData.length = length;
-for (auto& symData : info[ symbol ]) {
+for ( auto& symData : info[ symbol ] ) {
// The starting address could differ since we strip any suffixes
beginning
// with a '.'
- if (symData.startingAddress != start) {
+ if ( symData.startingAddress != start ) {
continue;
}
- if (symData.length != length) {
+ if ( symData.length != length ) {
std::ostringstream what;
what << "Different lengths for the symbol "
<< symbol
@@ -66,39 +66,36 @@ namespace Coverage {
info[ symbol ].push_back( symbolData );
}
- SymbolTable::symbolInfo* SymbolTable::getInfo(
-const std::string& symbol
- )
+ SymbolTable::symbolInfo* SymbolTable::getInfo( const std::string& symbol )
{
info_t::iterator it = info.find( symbol );
-if (it == info.end())
+if ( it == info.end() ) {
return NULL;
-else
- return (&(it->second));
+} else {
+ return ( &(it->second) );
+}
}
- uint32_t SymbolTable::getLength(
-const std::string& symbol
- )
+ uint32_t SymbolTable::getLength( const std::string& symbol )
{
info_t::iterator it = info.find( symbol );
-if (it == info.end())
+if ( it == info.end() ) {
return 0;
-else
- return ((*it).second.front().length);
+} else {
+ return ( (*it).second.front().length );
+}
}
- std::string SymbolTable::getSymbol(
-uint32_t address
- )
+ std::string SymbolTable::getSymbol( uint32_t address )
{
contents_t::iterator it;
// Ensure that the symbol table is not empty.
-if ( contents.size() == 0 )
+if ( contents.size() == 0 ) {
return "";
+}
// Find the first entry whose end address is greater
// than the specified address.
@@ -106,23 +103,32 @@ namespace Coverage {
// If an entry was found and its low address is less than or
// equal to the specified address, then return the symbol.
-if ((it != contents.end()) && ((it->second).low <= address ))
+if ( ( it != contents.end() ) && ( ( it->second ).low <= address ) ) {
return (it->second).symbol;
+}
return "";
}
void SymbolTable::dumpSymbolTable( void )
{
-symbolInfosymbolTable;
-symbolInfoIterator_t symbolIterator;
-infoIterator_tinfoIterator;
-
-for (infoIterator = info.begin() ; infoIterator != info.end();
infoIterator++)
-{
- for (symbolIterator = infoIterator->second.begin() ; symbolIterator !=
infoIterator->second.end(); symbolIterator++)
- {
- fprintf( stdout, "%s:\tStarting address = %#x\tLength = %u\n",
infoIterator->first.c_str(), symbolIterator->startingAddress,
symbolIterator->length );
+symbolInfo symbolTable;
+symbolInfoIterator_t symbolIterator;
+infoIterator_t infoIterator;
+
+for (
+ infoIterator = info.begin();
+ infoIterator != info.end();
+ infoIterator++
+) {
+ for (
+symbolIterator = infoIterator->second.begin();
+symbolIterator != infoIterator->second.end();
+symbolIterator++
+ ) {
+ std::cerr << infoIterator->first << ":\tStarting address = 0x"
+ << std::hex << symbolIterator->startingAddress << std::dec
+ << "\tLength = " << symbolIterator->length << std::endl;
}
}
}
--
1.8.3.1
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[PATCH rtems-tools 0/6] Fix formatting patches
Hi, For this patchset I made the formatting more consistent. This included: - adding whitespace - adding curly braces to if statements or loops - fixing the layout of long lists of function parameters Thanks, Ryan Ryan Long (6): ObjdumpProcessor.cc: Fix formatting TargetFactory.cc: Fix formatting ConfigFile: Fix formatting ObjdumpProcessor.cc: Fix formatting ObjdumpProcessor.h: Fix formatting SymbolTable.cc: Fix formatting tester/covoar/ConfigFile.cc | 66 +- tester/covoar/ConfigFile.h| 8 +- tester/covoar/ObjdumpProcessor.cc | 261 +- tester/covoar/ObjdumpProcessor.h | 22 ++-- tester/covoar/SymbolTable.cc | 70 +- tester/covoar/TargetFactory.cc| 20 ++- 6 files changed, 241 insertions(+), 206 deletions(-) -- 1.8.3.1 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH rtems-tools 3/6] ConfigFile: Fix formatting
---
tester/covoar/ConfigFile.cc | 66 +++--
tester/covoar/ConfigFile.h | 8 +++---
2 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/tester/covoar/ConfigFile.cc b/tester/covoar/ConfigFile.cc
index 7109b2c..1fbefd1 100644
--- a/tester/covoar/ConfigFile.cc
+++ b/tester/covoar/ConfigFile.cc
@@ -21,9 +21,7 @@ static void print_invalid_line_number( const std::string&
file, int line_no )
namespace Configuration {
- FileReader::FileReader(
-Options_t *options
- )
+ FileReader::FileReader( Options_t *options )
{
options_m = options;
}
@@ -32,19 +30,18 @@ namespace Configuration {
{
}
- bool FileReader::processFile(
-const std::string& file
- )
+ bool FileReader::processFile( const std::string& file )
{
#define METHOD "FileReader::processFile - "
#define MAX_LENGTH 256
+
std::ifstream in;
std::string line;
char option[MAX_LENGTH];
char value[MAX_LENGTH];
-int line_no;
-int i;
-int j;
+int line_no;
+int i;
+int j;
if ( file.empty() ) {
std::cerr << METHOD << "Empty filename" << std::endl;
@@ -78,7 +75,7 @@ namespace Configuration {
*
* LHS = RHS # comment
*/
- for (i=0 ; i=0 && isspace(line[i]) ; i-- )
+ for ( i = length - 1; i >= 0 && isspace( line[i] ); i-- )
;
line[i+1] = '\0';
- length = i+1;
+ length = i + 1;
/* Ignore empty lines. We have stripped
* all comments and blanks therefore, only
* an empty string needs to be checked.
*/
- if (line[0] == '\0')
+ if ( line[0] == '\0' ) {
continue;
+ }
- if (std::sscanf(line.c_str(), "%s", option) != 1) {
-print_invalid_line_number(file, line_no);
+ if ( std::sscanf( line.c_str(), "%s", option ) != 1 ) {
+print_invalid_line_number( file, line_no );
continue;
}
- for (i=0; ((line[i] != '=') && (ioption ; o++ ) {
+for ( o = options_m; o->option; o++ ) {
if ( !strcmp( o->option, option ) ) {
o->value = strdup( value );
return true;
}
}
+
return false;
}
- const char *FileReader::getOption(
-const char* const option
- )
+ const char *FileReader::getOption( const char* const option )
{
Options_t *o;
-for ( o=options_m ; o->option ; o++ ) {
+for ( o = options_m; o->option; o++ ) {
if ( !strcmp( o->option, option ) ) {
return o->value;
}
}
+
return NULL;
}
- void FileReader::printOptions(void)
+ void FileReader::printOptions()
{
Options_t *o;
-for ( o=options_m ; o->option ; o++ ) {
+for ( o = options_m; o->option; o++ ) {
std::cerr << '(' << o->option << ")=(" << o->value << ')' << std::endl;
}
}
diff --git a/tester/covoar/ConfigFile.h b/tester/covoar/ConfigFile.h
index f8bd9c5..0339c12 100644
--- a/tester/covoar/ConfigFile.h
+++ b/tester/covoar/ConfigFile.h
@@ -53,9 +53,7 @@ namespace Configuration {
*
* @return Returns TRUE if the method succeeded and FALSE if it failed.
*/
-virtual bool processFile(
- const std::string& file
-);
+virtual bool processFile( const std::string& file );
bool setOption(
const char* const option,
@@ -66,7 +64,7 @@ namespace Configuration {
const char* const option
);
-void printOptions(void);
+void printOptions();
private:
/*!
@@ -78,7 +76,7 @@ namespace Configuration {
*
* @return Returns TRUE if the method succeeded and FALSE if it failed.
*/
-Options_t *options_m;
+Options_t* options_m;
};
--
1.8.3.1
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[PATCH rtems-tools 4/6] ObjdumpProcessor.cc: Fix formatting
---
tester/covoar/ObjdumpProcessor.cc | 197 +-
1 file changed, 111 insertions(+), 86 deletions(-)
diff --git a/tester/covoar/ObjdumpProcessor.cc
b/tester/covoar/ObjdumpProcessor.cc
index 92e812d..0aef978 100644
--- a/tester/covoar/ObjdumpProcessor.cc
+++ b/tester/covoar/ObjdumpProcessor.cc
@@ -150,12 +150,13 @@ namespace Coverage {
{
#define METHOD "ERROR: ObjdumpProcessor::determineLoadAddress - "
std::ifstream loadAddressFile;
-uint32_t offset;
-char inputBuffer[MAX_LINE_LENGTH];
+uint32_t offset;
+char inputBuffer[ MAX_LINE_LENGTH ];
// This method should only be call for a dynamic library.
-if (!theExecutable->hasDynamicLibrary())
+if ( !theExecutable->hasDynamicLibrary() ) {
return 0;
+}
std::string dlinfoName = theExecutable->getFileName();
uint32_t address;
@@ -165,7 +166,7 @@ namespace Coverage {
dlinfoName += ".dlinfo";
// Read load address.
loadAddressFile.open( dlinfoName );
-if (!loadAddressFile.is_open()) {
+if ( !loadAddressFile.is_open() ) {
std::ostringstream what;
what << "Unable to open " << dlinfoName;
throw rld::error( what, METHOD );
@@ -182,6 +183,7 @@ namespace Coverage {
what << "library " << Library << " not found in " << dlinfoName;
throw rld::error( what, METHOD );
}
+
sscanf( inputBuffer, "%s %x", inLibName, &offset );
std::string tmp = inLibName;
if ( tmp.find( Library ) != tmp.npos ) {
@@ -206,23 +208,21 @@ namespace Coverage {
stderr,
"ERROR: ObjdumpProcessor::IsBranch - unknown architecture\n"
);
- assert(0);
+ assert( 0 );
return false;
}
return targetInfo_m->isBranch( instruction );
}
- bool ObjdumpProcessor::isBranchLine(
-const std::string& line
- )
+ bool ObjdumpProcessor::isBranchLine( const std::string& line )
{
if ( !targetInfo_m ) {
fprintf(
stderr,
"ERROR: ObjdumpProcessor::isBranchLine - unknown architecture\n"
);
- assert(0);
+ assert( 0 );
return false;
}
@@ -234,7 +234,7 @@ namespace Coverage {
int& size
)
{
-if ( !targetInfo_m ){
+if ( !targetInfo_m ) {
fprintf(
stderr,
"ERROR: ObjdumpProcessor::isNop - unknown architecture\n"
@@ -247,21 +247,32 @@ namespace Coverage {
}
void ObjdumpProcessor::getFile(
-std::string fileName,
+std::string fileName,
rld::process::tempfile& objdumpFile,
rld::process::tempfile& err
-)
+ )
{
rld::process::statusstatus;
-rld::process::arg_container args = { targetInfo_m->getObjdump(),
- "-Cda", "--section=.text", "--source",
- fileName };
+rld::process::arg_container args = {
+ targetInfo_m->getObjdump(),
+ "-Cda",
+ "--section=.text",
+ "--source",
+ fileName
+};
+
try
{
- status = rld::process::execute( targetInfo_m->getObjdump(),
- args, objdumpFile.name(), err.name() );
- if ( (status.type != rld::process::status::normal)
- || (status.code != 0) ) {
+ status = rld::process::execute(
+targetInfo_m->getObjdump(),
+args,
+objdumpFile.name(),
+err.name()
+ );
+ if (
+( status.type != rld::process::status::normal ) ||
+( status.code != 0 )
+ ) {
throw rld::error( "Objdump error", "generating objdump" );
}
} catch( rld::error& err )
@@ -280,12 +291,12 @@ namespace Coverage {
objdumpFile_t::iterator itr;
itr = find ( objdumpList.begin(), objdumpList.end(), address );
-if (itr == objdumpList.end()) {
+if ( itr == objdumpList.end() ) {
return 0;
}
itr++;
-if (itr == objdumpList.end()) {
+if ( itr == objdumpList.end() ) {
return 0;
}
@@ -294,21 +305,22 @@ namespace Coverage {
}
void ObjdumpProcessor::loadAddressTable (
-ExecutableInfo* constexecutableInformation,
-rld::process::tempfile& objdumpFile,
-rld::process::tempfile& err
+ExecutableInfo* const executableInformation,
+rld::process::tempfile& objdumpFile,
+rld::process::tempfile& err
)
{
-int items;
-uint32_t offset;
-char terminator;
-std::string line;
+int items;
+uint32_toffset;
+charterminator;
+std::string line;
// Obtain the objdump file.
-if ( !executableInformation->hasDynamicLibrary() )
+if ( !executableInformation->hasDynamicLibrary() ) {
getFile( executableInformation->getFileName(), objdumpFile, err );
-else
+} else {
getFile( executableInformation->getLibraryName(), objdumpFile, err );
+}
// Process all lines from th
Re: [PATCH rtems-tools 0/6] Fix formatting patches
OK and thanks for the split. Thanks Chris On 14/12/21 3:09 am, Ryan Long wrote: > Hi, > > For this patchset I made the formatting more consistent. > > This included: > > - adding whitespace > - adding curly braces to if statements or loops > - fixing the layout of long lists of function parameters > > Thanks, > Ryan > > Ryan Long (6): > ObjdumpProcessor.cc: Fix formatting > TargetFactory.cc: Fix formatting > ConfigFile: Fix formatting > ObjdumpProcessor.cc: Fix formatting > ObjdumpProcessor.h: Fix formatting > SymbolTable.cc: Fix formatting > > tester/covoar/ConfigFile.cc | 66 +- > tester/covoar/ConfigFile.h| 8 +- > tester/covoar/ObjdumpProcessor.cc | 261 > +- > tester/covoar/ObjdumpProcessor.h | 22 ++-- > tester/covoar/SymbolTable.cc | 70 +- > tester/covoar/TargetFactory.cc| 20 ++- > 6 files changed, 241 insertions(+), 206 deletions(-) > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: New validation test suites
On 14/12/21 1:53 am, Sebastian Huber wrote: > Hello, > > the ESA activity to pre-qualify parts of RTEMS according to ECSS requirements > is > nearly complete. There is a short presentation available here: > > https://indico.esa.int/event/374/timetable/ Was the change in memory usage for 4.8 of 23812 bytes to 68896 explained? > We finished the specification of the pre-qualified RTEMS feature set. The > specification is available in an RTEMS Project repository: > > https://git.rtems.org/rtems-central/tree/spec I had a quick look. Is there a more user friendly view of this data? I think the term "specification" is a little bit misleading because the data files are not easily read by a person. I understand this is the specification data set however it is not what I am traditionally use to seeing. > The validation tests are generated from the specification using the > "./spec2modules.py" script and end up in the RTEMS sources of a Git > submodule. I > think the specification and the generation tool is now sufficiently stable so > that the validation test code can be integrated in the RTEMS master branch. > The > patch set is too big for the mailing list, so you can review it here: > > https://git.rtems.org/sebh/rtems.git/log/?h=validation The link failed. > https://github.com/sebhub/rtems/tree/validation The header in a test says the regeneration instructions are in the engineering manual but I could not quickly find them? > The patch set is organized so that general support code for the validation > tests > is added first and then there are commits for each pre-qualified Classic API > Manager or subsystem. > > I did build all BSPs with the patch set. The validation tests use only > statically allocated resources. Are the validation tests compatible with rtems-test? How many test executables does this add to the testsuite? What hardware have the validation tests been run on? Any tier 1 archs? Is there anything that interprets the new test output format? It looks like lots of great info but a little difficult to read. > Some low memory targets are not able to link all test suites. Are these excluded in the normal way? Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH] TraceConverter.cc: Fix Uncaught exception issue
OK
On 14/12/21 12:47 am, Ryan Long wrote:
> CID 1471639: Uncaught exception
>
> Closes #4501
> ---
> tester/covoar/TraceConverter.cc | 20 ++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/tester/covoar/TraceConverter.cc b/tester/covoar/TraceConverter.cc
> index 8e30ae5..2c5330a 100644
> --- a/tester/covoar/TraceConverter.cc
> +++ b/tester/covoar/TraceConverter.cc
> @@ -87,14 +87,30 @@ int main(
>std::string tracefile;
>std::string logname = "/tmp/qemu.log";
>Coverage::ExecutableInfo* executableInfo;
> - rld::process::tempfile objdumpFile( ".dmp" );
> - rld::process::tempfile err( ".err" );
>Coverage::DesiredSymbolssymbolsToAnalyze;
>boolverbose = false;
>std::string dynamicLibrary;
>int ec = 0;
>std::shared_ptr targetInfo;
>
> + try
> + {
> +rld::process::tempfile objdumpFile( ".dmp" );
> + }
> + catch ( rld::error re )
> + {
> +std::cerr << "Failed to make .dmp tempfile " << std::endl;
> + }
> +
> + try
> + {
> +rld::process::tempfile err( ".err" );
> + }
> + catch ( rld::error re )
> + {
> +std::cerr << "Failed to make .err tempfile " << std::endl;
> + }
> +
>setup_signals();
>
> //
>
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Re: New validation test suites
What tasks can I do that can help with ECSS compliance? Zack On Mon, 13 Dec 2021 at 21:40, Chris Johns wrote: > On 14/12/21 1:53 am, Sebastian Huber wrote: > > Hello, > > > > the ESA activity to pre-qualify parts of RTEMS according to ECSS > requirements is > > nearly complete. There is a short presentation available here: > > > > https://indico.esa.int/event/374/timetable/ > > Was the change in memory usage for 4.8 of 23812 bytes to 68896 explained? > > We finished the specification of the pre-qualified RTEMS feature set. The > > specification is available in an RTEMS Project repository: > > > > https://git.rtems.org/rtems-central/tree/spec > > I had a quick look. Is there a more user friendly view of this data? > > I think the term "specification" is a little bit misleading because the > data > files are not easily read by a person. I understand this is the > specification > data set however it is not what I am traditionally use to seeing. > > > The validation tests are generated from the specification using the > > "./spec2modules.py" script and end up in the RTEMS sources of a Git > submodule. I > > think the specification and the generation tool is now sufficiently > stable so > > that the validation test code can be integrated in the RTEMS master > branch. The > > patch set is too big for the mailing list, so you can review it here: > > > > https://git.rtems.org/sebh/rtems.git/log/?h=validation > > The link failed. > > > https://github.com/sebhub/rtems/tree/validation > > The header in a test says the regeneration instructions are in the > engineering > manual but I could not quickly find them? > > > The patch set is organized so that general support code for the > validation tests > > is added first and then there are commits for each pre-qualified Classic > API > > Manager or subsystem. > > > > I did build all BSPs with the patch set. The validation tests use only > > statically allocated resources. > > Are the validation tests compatible with rtems-test? > > How many test executables does this add to the testsuite? > > What hardware have the validation tests been run on? Any tier 1 archs? > > Is there anything that interprets the new test output format? It looks > like lots > of great info but a little difficult to read. > > > Some low memory targets are not able to link all test suites. > > Are these excluded in the normal way? > > Chris > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v2 1/3] aarch64: add internal API for secure monitor call (smc)
On Mon, Dec 13, 2021 at 9:55 AM Kinsey Moore wrote:
>
> Everything else looks good. Just one nit below.
>
> On 12/11/2021 10:16, Gedare Bloom wrote:
> > ---
> > cpukit/score/cpu/aarch64/aarch64-smc.c| 72
> > .../aarch64/include/rtems/score/aarch64-smc.h | 83 +++
> > spec/build/cpukit/cpuaarch64.yml | 2 +
> > 3 files changed, 157 insertions(+)
> > create mode 100644 cpukit/score/cpu/aarch64/aarch64-smc.c
> > create mode 100644
> > cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> >
> > diff --git a/cpukit/score/cpu/aarch64/aarch64-smc.c
> > b/cpukit/score/cpu/aarch64/aarch64-smc.c
> > new file mode 100644
> > index 00..c531d074d8
> > --- /dev/null
> > +++ b/cpukit/score/cpu/aarch64/aarch64-smc.c
> > @@ -0,0 +1,72 @@
> > +/* SPDX-License-Identifier: BSD-2-Clause */
> > +
> > +/**
> > + * @file
> > + *
> > + * @brief This source file contains the implementation of
> > + *_AArch64_SMC_Invoke().
> > + */
> > +
> > +/*
> > + * Copyright (C) 2021 Gedare Bloom
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + *notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + *notice, this list of conditions and the following disclaimer in the
> > + *documentation and/or other materials provided with the distribution.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> > IS"
> > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
> > THE
> > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> > PURPOSE
> > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
> > THE
> > + * POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +#ifdef HAVE_CONFIG_H
> > +#include "config.h"
> > +#endif
> > +
> > +#include
> > +
> > +int _AArch64_SMC_Invoke(
> > + uint32_t function_id,
> > + uintptr_t arg0,
> > + uintptr_t arg1,
> > + uintptr_t arg2,
> > + uintptr_t arg3,
> > + uintptr_t arg4,
> > + uintptr_t arg5,
> > + uintptr_t arg6,
>
> The SMC arguments here should be uint64_t for all AArch64 calls
> regardless of ABI.
>
This shouldn't matter, since AArch64 calls will have LP64? I guess I
can change it. My thinking was that if we want to later add
_AArch32_SMC_Invoke() it can have almost the exact same prototype as
this function (except the return type but even that is a pointer),
which might simplify some programming.
>
> > + AArch64_SMC_Return *result
> > +) {
> > + int rv;
> > +
> > + /* This only works for SMC that return 4 or fewer results. It may be
> > extended
> > + * up to the full 18 return results specified for SMC64, but then we
> > would
> > + * need to allocate a callee-saved register for *result */
> > + __asm__ volatile(
> > +"smc #0\n"
> > +"mov %0, x0\n"
> > +"ldr x15, [sp]\n"
> > +"cbz x15, 0f\n"
> > +"stp x0, x1, [x15]\n"
> > +"stp x2, x3, [x15, #16]\n"
> > +"0:\n"
> > +: "=r" ( rv )
> > +:
> > +: "x0", "x1", "x2", "x3", "x15"
> > + );
> > +
> > + return rv;
> > +}
> > +
> > diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > new file mode 100644
> > index 00..e80cc1e99b
> > --- /dev/null
> > +++ b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > @@ -0,0 +1,83 @@
> > +/* SPDX-License-Identifier: BSD-2-Clause */
> > +
> > +/**
> > + * @file
> > + *
> > + * @ingroup RTEMSScoreCPUAArch64
> > + *
> > + * @brief This header file provides API to wrap secure monitor calls (smc).
> > + */
> > +
> > +/*
> > + * Copyright (C) 2021 Gedare Bloom
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + *notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + *notice, this list of conditions and the following disclaimer in the
> > + *documentation and/or other materials provided with the distribution.
>
Re: [PATCH v2 1/3] aarch64: add internal API for secure monitor call (smc)
On 12/13/2021 19:56, Gedare Bloom wrote:
On Mon, Dec 13, 2021 at 9:55 AM Kinsey Moore wrote:
Everything else looks good. Just one nit below.
On 12/11/2021 10:16, Gedare Bloom wrote:
---
cpukit/score/cpu/aarch64/aarch64-smc.c| 72
.../aarch64/include/rtems/score/aarch64-smc.h | 83 +++
spec/build/cpukit/cpuaarch64.yml | 2 +
3 files changed, 157 insertions(+)
create mode 100644 cpukit/score/cpu/aarch64/aarch64-smc.c
create mode 100644 cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
diff --git a/cpukit/score/cpu/aarch64/aarch64-smc.c
b/cpukit/score/cpu/aarch64/aarch64-smc.c
new file mode 100644
index 00..c531d074d8
--- /dev/null
+++ b/cpukit/score/cpu/aarch64/aarch64-smc.c
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @brief This source file contains the implementation of
+ *_AArch64_SMC_Invoke().
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include
+
+int _AArch64_SMC_Invoke(
+ uint32_t function_id,
+ uintptr_t arg0,
+ uintptr_t arg1,
+ uintptr_t arg2,
+ uintptr_t arg3,
+ uintptr_t arg4,
+ uintptr_t arg5,
+ uintptr_t arg6,
The SMC arguments here should be uint64_t for all AArch64 calls
regardless of ABI.
This shouldn't matter, since AArch64 calls will have LP64? I guess I
can change it. My thinking was that if we want to later add
_AArch32_SMC_Invoke() it can have almost the exact same prototype as
this function (except the return type but even that is a pointer),
which might simplify some programming.
The problem is that AArch64 has the LP64 and ILP32 ABIs which both use
SMC64 since ILP32 is really just normal AArch64 instructions, memory
space, and 64-bit registers under the hood. AArch32/ARMv7 has the same
data model as AArch64/ILP32, but AArch32/ARMv7 uses SMC32 calls since
it's 32-bit registers. This all assumes that I've read/remember the
specs correctly.
+ AArch64_SMC_Return *result
+) {
+ int rv;
+
+ /* This only works for SMC that return 4 or fewer results. It may be extended
+ * up to the full 18 return results specified for SMC64, but then we would
+ * need to allocate a callee-saved register for *result */
+ __asm__ volatile(
+"smc #0\n"
+"mov %0, x0\n"
+"ldr x15, [sp]\n"
+"cbz x15, 0f\n"
+"stp x0, x1, [x15]\n"
+"stp x2, x3, [x15, #16]\n"
+"0:\n"
+: "=r" ( rv )
+:
+: "x0", "x1", "x2", "x3", "x15"
+ );
+
+ return rv;
+}
+
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
new file mode 100644
index 00..e80cc1e99b
--- /dev/null
+++ b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUAArch64
+ *
+ * @brief This header file provides API to wrap secure monitor calls (smc).
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+
Re: [PATCH v2 1/3] aarch64: add internal API for secure monitor call (smc)
On Mon, Dec 13, 2021 at 7:18 PM Kinsey Moore wrote:
>
> On 12/13/2021 19:56, Gedare Bloom wrote:
> > On Mon, Dec 13, 2021 at 9:55 AM Kinsey Moore
> > wrote:
> >> Everything else looks good. Just one nit below.
> >>
> >> On 12/11/2021 10:16, Gedare Bloom wrote:
> >>> ---
> >>>cpukit/score/cpu/aarch64/aarch64-smc.c| 72
> >>>.../aarch64/include/rtems/score/aarch64-smc.h | 83 +++
> >>>spec/build/cpukit/cpuaarch64.yml | 2 +
> >>>3 files changed, 157 insertions(+)
> >>>create mode 100644 cpukit/score/cpu/aarch64/aarch64-smc.c
> >>>create mode 100644
> >>> cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> >>>
> >>> diff --git a/cpukit/score/cpu/aarch64/aarch64-smc.c
> >>> b/cpukit/score/cpu/aarch64/aarch64-smc.c
> >>> new file mode 100644
> >>> index 00..c531d074d8
> >>> --- /dev/null
> >>> +++ b/cpukit/score/cpu/aarch64/aarch64-smc.c
> >>> @@ -0,0 +1,72 @@
> >>> +/* SPDX-License-Identifier: BSD-2-Clause */
> >>> +
> >>> +/**
> >>> + * @file
> >>> + *
> >>> + * @brief This source file contains the implementation of
> >>> + *_AArch64_SMC_Invoke().
> >>> + */
> >>> +
> >>> +/*
> >>> + * Copyright (C) 2021 Gedare Bloom
> >>> + *
> >>> + * Redistribution and use in source and binary forms, with or without
> >>> + * modification, are permitted provided that the following conditions
> >>> + * are met:
> >>> + * 1. Redistributions of source code must retain the above copyright
> >>> + *notice, this list of conditions and the following disclaimer.
> >>> + * 2. Redistributions in binary form must reproduce the above copyright
> >>> + *notice, this list of conditions and the following disclaimer in the
> >>> + *documentation and/or other materials provided with the
> >>> distribution.
> >>> + *
> >>> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> >>> "AS IS"
> >>> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
> >>> THE
> >>> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> >>> PURPOSE
> >>> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
> >>> BE
> >>> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> >>> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> >>> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
> >>> BUSINESS
> >>> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
> >>> IN
> >>> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
> >>> OTHERWISE)
> >>> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
> >>> OF THE
> >>> + * POSSIBILITY OF SUCH DAMAGE.
> >>> + */
> >>> +
> >>> +#ifdef HAVE_CONFIG_H
> >>> +#include "config.h"
> >>> +#endif
> >>> +
> >>> +#include
> >>> +
> >>> +int _AArch64_SMC_Invoke(
> >>> + uint32_t function_id,
> >>> + uintptr_t arg0,
> >>> + uintptr_t arg1,
> >>> + uintptr_t arg2,
> >>> + uintptr_t arg3,
> >>> + uintptr_t arg4,
> >>> + uintptr_t arg5,
> >>> + uintptr_t arg6,
> >> The SMC arguments here should be uint64_t for all AArch64 calls
> >> regardless of ABI.
> >>
> > This shouldn't matter, since AArch64 calls will have LP64? I guess I
> > can change it. My thinking was that if we want to later add
> > _AArch32_SMC_Invoke() it can have almost the exact same prototype as
> > this function (except the return type but even that is a pointer),
> > which might simplify some programming.
> The problem is that AArch64 has the LP64 and ILP32 ABIs which both use
> SMC64 since ILP32 is really just normal AArch64 instructions, memory
> space, and 64-bit registers under the hood. AArch32/ARMv7 has the same
> data model as AArch64/ILP32, but AArch32/ARMv7 uses SMC32 calls since
> it's 32-bit registers. This all assumes that I've read/remember the
> specs correctly.
I see. I will change it to uint64_t, it won't hurt anything for me.
I'll probably check these in tomorrow.
> >
> >>> + AArch64_SMC_Return *result
> >>> +) {
> >>> + int rv;
> >>> +
> >>> + /* This only works for SMC that return 4 or fewer results. It may be
> >>> extended
> >>> + * up to the full 18 return results specified for SMC64, but then we
> >>> would
> >>> + * need to allocate a callee-saved register for *result */
> >>> + __asm__ volatile(
> >>> +"smc #0\n"
> >>> +"mov %0, x0\n"
> >>> +"ldr x15, [sp]\n"
> >>> +"cbz x15, 0f\n"
> >>> +"stp x0, x1, [x15]\n"
> >>> +"stp x2, x3, [x15, #16]\n"
> >>> +"0:\n"
> >>> +: "=r" ( rv )
> >>> +:
> >>> +: "x0", "x1", "x2", "x3", "x15"
> >>> + );
> >>> +
> >>> + return rv;
> >>> +}
> >>> +
> >>> diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> >>> b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> >>> new file mode 100644
> >>> index 00..e80cc1e99b
> >>> --- /dev/null
> >>> +++ b/cpukit/score/cpu/aarch64/include/rtems/score/aa
Re: New validation test suites
Hello Chris, On 13/12/2021 22:01, Chris Johns wrote: On 14/12/21 1:53 am, Sebastian Huber wrote: Hello, the ESA activity to pre-qualify parts of RTEMS according to ECSS requirements is nearly complete. There is a short presentation available here: https://indico.esa.int/event/374/timetable/ Was the change in memory usage for 4.8 of 23812 bytes to 68896 explained? The foot print increase has mainly five reasons: * General GCC code generation * Chip errata workarounds done by GCC * More features used from RTEMS (for example uniprocessor synchronization done via task priorities vs. mutex synchronization) * SMP support of RTEMS * New RTEMS features such as transitive priority inheritance We finished the specification of the pre-qualified RTEMS feature set. The specification is available in an RTEMS Project repository: https://git.rtems.org/rtems-central/tree/spec I had a quick look. Is there a more user friendly view of this data? I think the term "specification" is a little bit misleading because the data files are not easily read by a person. I understand this is the specification data set however it is not what I am traditionally use to seeing. You can use the "./specview.py" script to get views of the specification. For example, this command displays the transition map for the rtems_signal_send() directive: ./specview.py --filter=action-table /rtems/signal/req/send .. table:: :class: longtable = == = === === == == = = Entry Descriptor Task Set Handler ASR Nested Status Handler Recursive = == = === === == == = = 0 0 NoObj ZeroInvalid Enabled YesInvNum NoCallNo 1 0 NoObj ZeroInvalid Enabled No InvNum NoCallNo 2 0 NoObj ZeroInvalid Disabled YesInvNum NoCallNo 3 0 NoObj ZeroInvalid Disabled No InvNum NoCallNo 4 0 NoObj ZeroValid Enabled YesInvNum NoCallNo 5 0 NoObj ZeroValid Enabled No InvNum NoCallNo 6 0 NoObj ZeroValid Disabled YesInvNum NoCallNo 7 0 NoObj ZeroValid Disabled No InvNum NoCallNo 8 1 NoObj NonZero Invalid Enabled YesInvId NoCallNo 9 1 NoObj NonZero Invalid Enabled No InvId NoCallNo 101 NoObj NonZero Invalid Disabled YesInvId NoCallNo 111 NoObj NonZero Invalid Disabled No InvId NoCallNo 121 NoObj NonZero Valid Enabled YesInvId NoCallNo 131 NoObj NonZero Valid Enabled No InvId NoCallNo 141 NoObj NonZero Valid Disabled YesInvId NoCallNo 151 NoObj NonZero Valid Disabled No InvId NoCallNo 160 Self ZeroInvalid Enabled YesInvNum NoCallNo 170 Self ZeroInvalid Enabled No InvNum NoCallNo 180 Self ZeroInvalid Disabled YesInvNum NoCallNo 190 Self ZeroInvalid Disabled No InvNum NoCallNo 200 Self ZeroValid Enabled YesInvNum NoCallNo 210 Self ZeroValid Enabled No InvNum NoCallNo 220 Self ZeroValid Disabled YesInvNum NoCallNo 230 Self ZeroValid Disabled No InvNum NoCallNo 242 Self NonZero Invalid Enabled YesNotDef NoCallNo 252 Self NonZero Invalid Enabled No NotDef NoCallNo 262 Self NonZero Invalid Disabled YesNotDef NoCallNo 272 Self NonZero Invalid Disabled No NotDef NoCallNo 286 Self NonZero Valid Enabled YesOk DuringSendYes 294 Self NonZero Valid Enabled No Ok DuringSendNo 303 Self NonZero Valid Disabled YesOk AfterEnable No 313 Self NonZero Valid Disabled No Ok AfterEnable No 320 Other ZeroInvalid Enabled YesInvNum NoCallNo 330 Other ZeroInvalid Enabled No InvNum NoCallNo 340 Other ZeroInvalid Disabled YesInvNum NoCallNo 350 Other ZeroInvalid Disabled No InvNum NoCallNo 360 Other ZeroValid Enabled YesInvNum NoCallNo 370 Other ZeroValid Enabled No InvNum NoCallNo 380 Other ZeroValid Disabled YesInvNum NoCallNo 390
