On Mon, Dec 13, 2021 at 9:55 AM Kinsey Moore <kinsey.mo...@oarcorp.com> wrote:
>
> Everything else looks good. Just one nit below.
>
> On 12/11/2021 10:16, Gedare Bloom wrote:
> > ---
> > cpukit/score/cpu/aarch64/aarch64-smc.c | 72 ++++++++++++++++
> > .../aarch64/include/rtems/score/aarch64-smc.h | 83 +++++++++++++++++++
> > spec/build/cpukit/cpuaarch64.yml | 2 +
> > 3 files changed, 157 insertions(+)
> > create mode 100644 cpukit/score/cpu/aarch64/aarch64-smc.c
> > create mode 100644
> > cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> >
> > diff --git a/cpukit/score/cpu/aarch64/aarch64-smc.c
> > b/cpukit/score/cpu/aarch64/aarch64-smc.c
> > new file mode 100644
> > index 0000000000..c531d074d8
> > --- /dev/null
> > +++ b/cpukit/score/cpu/aarch64/aarch64-smc.c
> > @@ -0,0 +1,72 @@
> > +/* SPDX-License-Identifier: BSD-2-Clause */
> > +
> > +/**
> > + * @file
> > + *
> > + * @brief This source file contains the implementation of
> > + * _AArch64_SMC_Invoke().
> > + */
> > +
> > +/*
> > + * Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + * notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + * notice, this list of conditions and the following disclaimer in the
> > + * documentation and/or other materials provided with the distribution.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> > IS"
> > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
> > THE
> > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> > PURPOSE
> > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
> > THE
> > + * POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +#ifdef HAVE_CONFIG_H
> > +#include "config.h"
> > +#endif
> > +
> > +#include <rtems/score/aarch64-smc.h>
> > +
> > +int _AArch64_SMC_Invoke(
> > + uint32_t function_id,
> > + uintptr_t arg0,
> > + uintptr_t arg1,
> > + uintptr_t arg2,
> > + uintptr_t arg3,
> > + uintptr_t arg4,
> > + uintptr_t arg5,
> > + uintptr_t arg6,
>
> The SMC arguments here should be uint64_t for all AArch64 calls
> regardless of ABI.
>
This shouldn't matter, since AArch64 calls will have LP64? I guess I
can change it. My thinking was that if we want to later add
_AArch32_SMC_Invoke() it can have almost the exact same prototype as
this function (except the return type but even that is a pointer),
which might simplify some programming.
>
> > + AArch64_SMC_Return *result
> > +) {
> > + int rv;
> > +
> > + /* This only works for SMC that return 4 or fewer results. It may be
> > extended
> > + * up to the full 18 return results specified for SMC64, but then we
> > would
> > + * need to allocate a callee-saved register for *result */
> > + __asm__ volatile(
> > + "smc #0\n"
> > + "mov %0, x0\n"
> > + "ldr x15, [sp]\n"
> > + "cbz x15, 0f\n"
> > + "stp x0, x1, [x15]\n"
> > + "stp x2, x3, [x15, #16]\n"
> > + "0:\n"
> > + : "=r" ( rv )
> > + :
> > + : "x0", "x1", "x2", "x3", "x15"
> > + );
> > +
> > + return rv;
> > +}
> > +
> > diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > new file mode 100644
> > index 0000000000..e80cc1e99b
> > --- /dev/null
> > +++ b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > @@ -0,0 +1,83 @@
> > +/* SPDX-License-Identifier: BSD-2-Clause */
> > +
> > +/**
> > + * @file
> > + *
> > + * @ingroup RTEMSScoreCPUAArch64
> > + *
> > + * @brief This header file provides API to wrap secure monitor calls (smc).
> > + */
> > +
> > +/*
> > + * Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + * notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + * notice, this list of conditions and the following disclaimer in the
> > + * documentation and/or other materials provided with the distribution.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> > IS"
> > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
> > THE
> > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> > PURPOSE
> > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
> > THE
> > + * POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +#ifndef _RTEMS_SCORE_AARCH64_SMC_H
> > +#define _RTEMS_SCORE_AARCH64_SMC_H
> > +
> > +#include <rtems/score/basedefs.h>
> > +
> > +#ifdef __cplusplus
> > +extern "C" {
> > +#endif
> > +
> > +/**
> > + * @defgroup RTEMSScoreCPUAArch64SMC Secure Monitor Call Support
> > + *
> > + * @ingroup RTEMSScoreCPUAArch64
> > + *
> > + * @brief This group provides functions to invoke secure monitor mode.
> > + *
> > + * @{
> > + */
> > +
> > +/*
> > + * @brief The return result from smc invocation.
> > + */
> > +typedef struct {
> > + uintptr_t x0;
> > + uintptr_t x1;
> > + uintptr_t x2;
> > + uintptr_t x3;
> > +} AArch64_SMC_Return;
> > +
> > +int _AArch64_SMC_Invoke(
> > + uint32_t function_id,
> > + uintptr_t arg0,
> > + uintptr_t arg1,
> > + uintptr_t arg2,
> > + uintptr_t arg3,
> > + uintptr_t arg4,
> > + uintptr_t arg5,
> > + uintptr_t arg6,
> > + AArch64_SMC_Return *result
> > +);
> > +
> > +/** @} */
> > +
> > +#ifdef __cplusplus
> > +}
> > +#endif
> > +
> > +#endif /* _RTEMS_SCORE_AARCH64_SMC_H */
> > diff --git a/spec/build/cpukit/cpuaarch64.yml
> > b/spec/build/cpukit/cpuaarch64.yml
> > index 70d80f0b6c..1f3f07f0a2 100644
> > --- a/spec/build/cpukit/cpuaarch64.yml
> > +++ b/spec/build/cpukit/cpuaarch64.yml
> > @@ -19,6 +19,7 @@ install:
> > - destination: ${BSP_INCLUDEDIR}/rtems/score
> > source:
> > -
> > cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h
> > + - cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> > - cpukit/score/cpu/aarch64/include/rtems/score/cpu.h
> > - cpukit/score/cpu/aarch64/include/rtems/score/cpuatomic.h
> > - cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
> > @@ -32,6 +33,7 @@ source:
> > - cpukit/score/cpu/aarch64/aarch64-exception-default.c
> > - cpukit/score/cpu/aarch64/aarch64-exception-frame-print.c
> > - cpukit/score/cpu/aarch64/aarch64-exception-interrupt.S
> > +- cpukit/score/cpu/aarch64/aarch64-smc.c
> > - cpukit/score/cpu/aarch64/aarch64-thread-idle.c
> > - cpukit/score/cpu/aarch64/cpu.c
> > - cpukit/score/cpu/aarch64/cpu_asm.S
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