Basic RISC-V 32-bit tool chain
Hello, I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess for this we have to update to GDB 8.0. I didn't test this tool chain. Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
Denis, Please confirm if this works for you. On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber wrote: > Hello, > > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess for > this we have to update to GDB 8.0. I didn't test this tool chain. > > > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
Ok, I will try today 2017-08-22 16:44 GMT+02:00 Gedare Bloom : > Denis, > > Please confirm if this works for you. > > On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber > wrote: > > Hello, > > > > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the > > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess for > > this we have to update to GDB 8.0. I didn't test this tool chain. > > > > > > Sebastian Huber, embedded brains GmbH > > > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > > Phone : +49 89 189 47 41-16 > > Fax : +49 89 189 47 41-09 > > E-Mail : sebastian.hu...@embedded-brains.de > > PGP : Public key available on request. > > > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > > > ___ > > devel mailing list > > devel@rtems.org > > http://lists.rtems.org/mailman/listinfo/devel > -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 4/7] Port strnstr.c to FreeBSD.
On 17/08/17 15:17, Gedare Bloom wrote: To our C-library experts: What would be the right way of handling this? It is best to bring it in to newlib. It can temporarily come into the libbsd if needed, but a note should be made to port it to newlib. Yes, this should move to Newlib. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 4/7] Port strnstr.c to FreeBSD.
On Tue, Aug 22, 2017 at 10:49 AM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On 17/08/17 15:17, Gedare Bloom wrote: > > To our C-library experts: What would be the right way of handling this? >>> >>> It is best to bring it in to newlib. It can temporarily come into the >> libbsd if needed, but a note should be made to port it to newlib. >> >> > Yes, this should move to Newlib. Agreed. Much better if newlib grows. It makes it generally easier to port other packages even when they are not part of libbsd. --joel > > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] Testsuites for inttypes methods
--- testsuites/psxtests/Makefile.am| 6 ++ testsuites/psxtests/configure.ac | 6 ++ testsuites/psxtests/psxinttypes01/Makefile.am | 22 ++ testsuites/psxtests/psxinttypes01/init.c | 58 ++ .../psxtests/psxinttypes01/psxinttypes01.scn | 3 + testsuites/psxtests/psxinttypes02/Makefile.am | 22 ++ testsuites/psxtests/psxinttypes02/init.c | 68 .../psxtests/psxinttypes02/psxinttypes02.scn | 4 + testsuites/psxtests/psxinttypes03/Makefile.am | 22 ++ testsuites/psxtests/psxinttypes03/init.c | 90 ++ .../psxtests/psxinttypes03/psxinttypes03.scn | 10 +++ testsuites/psxtests/psxinttypes04/Makefile.am | 22 ++ testsuites/psxtests/psxinttypes04/init.c | 73 ++ .../psxtests/psxinttypes04/psxinttypes04.scn | 4 + testsuites/psxtests/psxinttypes05/Makefile.am | 22 ++ testsuites/psxtests/psxinttypes05/init.c | 70 + .../psxtests/psxinttypes05/psxinttypes05.scn | 3 + testsuites/psxtests/psxinttypes06/Makefile.am | 22 ++ testsuites/psxtests/psxinttypes06/init.c | 70 + .../psxtests/psxinttypes06/psxinttypes06.scn | 3 + 20 files changed, 600 insertions(+) create mode 100644 testsuites/psxtests/psxinttypes01/Makefile.am create mode 100644 testsuites/psxtests/psxinttypes01/init.c create mode 100644 testsuites/psxtests/psxinttypes01/psxinttypes01.scn create mode 100644 testsuites/psxtests/psxinttypes02/Makefile.am create mode 100644 testsuites/psxtests/psxinttypes02/init.c create mode 100644 testsuites/psxtests/psxinttypes02/psxinttypes02.scn create mode 100644 testsuites/psxtests/psxinttypes03/Makefile.am create mode 100644 testsuites/psxtests/psxinttypes03/init.c create mode 100644 testsuites/psxtests/psxinttypes03/psxinttypes03.scn create mode 100644 testsuites/psxtests/psxinttypes04/Makefile.am create mode 100644 testsuites/psxtests/psxinttypes04/init.c create mode 100644 testsuites/psxtests/psxinttypes04/psxinttypes04.scn create mode 100644 testsuites/psxtests/psxinttypes05/Makefile.am create mode 100644 testsuites/psxtests/psxinttypes05/init.c create mode 100644 testsuites/psxtests/psxinttypes05/psxinttypes05.scn create mode 100644 testsuites/psxtests/psxinttypes06/Makefile.am create mode 100644 testsuites/psxtests/psxinttypes06/init.c create mode 100644 testsuites/psxtests/psxinttypes06/psxinttypes06.scn diff --git a/testsuites/psxtests/Makefile.am b/testsuites/psxtests/Makefile.am index cccdb39..cda0061 100644 --- a/testsuites/psxtests/Makefile.am +++ b/testsuites/psxtests/Makefile.am @@ -58,6 +58,12 @@ _SUBDIRS += psxhdrs _SUBDIRS += psxintrcritical01 _SUBDIRS += psxitimer endif +_SUBDIRS += psxinttypes01 +_SUBDIRS += psxinttypes02 +_SUBDIRS += psxinttypes03 +_SUBDIRS += psxinttypes04 +_SUBDIRS += psxinttypes05 +_SUBDIRS += psxinttypes06 _SUBDIRS += psxkey01 _SUBDIRS += psxkey02 _SUBDIRS += psxkey03 diff --git a/testsuites/psxtests/configure.ac b/testsuites/psxtests/configure.ac index 96a0149..dd5f23f 100644 --- a/testsuites/psxtests/configure.ac +++ b/testsuites/psxtests/configure.ac @@ -162,6 +162,12 @@ psxid01/Makefile psximfs01/Makefile psximfs02/Makefile psxintrcritical01/Makefile +psxinttypes01/Makefile +psxinttypes02/Makefile +psxinttypes03/Makefile +psxinttypes04/Makefile +psxinttypes05/Makefile +psxinttypes06/Makefile psxitimer/Makefile psxkey01/Makefile psxkey02/Makefile diff --git a/testsuites/psxtests/psxinttypes01/Makefile.am b/testsuites/psxtests/psxinttypes01/Makefile.am new file mode 100644 index 000..90608d4 --- /dev/null +++ b/testsuites/psxtests/psxinttypes01/Makefile.am @@ -0,0 +1,22 @@ + +rtems_tests_PROGRAMS = psxinttypes01 +psxinttypes01_SOURCES = init.c + +dist_rtems_tests_DATA = psxinttypes01.scn + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(top_srcdir)/../automake/compile.am +include $(top_srcdir)/../automake/leaf.am + + +#AM_CPPFLAGS = -I$(top_srcdir)/include +#AM_CPPFLAGS = -I$(top_srcdir)/../support/include$(psxinttypes01_LDADD) + +LINK_OBJS = $(psxinttypes01_OBJECTS) +LINK_LIBS = $(psxinttypes01_LDLIBS) + +psxinttypes01$(EXEEXT): $(psxinttypes01_OBJECTS) $(psxinttypes01_DEPENDENCIES) + @rm -f psxinttypes01$(EXEEXT) + $(make-exe) + +include $(top_srcdir)/../automake/local.am diff --git a/testsuites/psxtests/psxinttypes01/init.c b/testsuites/psxtests/psxinttypes01/init.c new file mode 100644 index 000..ad41a6d --- /dev/null +++ b/testsuites/psxtests/psxinttypes01/init.c @@ -0,0 +1,58 @@ +/* + * This is the test for inttypes imaxabs method. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* forward declarations to avoid warnings */ + +rtems_task Init(rtems_task_argument argument); +const char rtems_test_name[] =
Re: [PATCH v2 10/15] HiFive1: set up oscillators
Ok, I fixed it.
2017-08-22 3:48 GMT+02:00 Gedare Bloom :
> On Mon, Aug 21, 2017 at 7:56 PM, Denis Obrezkov
> wrote:
> > ---
> > c/src/lib/libbsp/riscv32/hifive1/include/prci.h | 9 +
> > c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c | 23 +
> > c/src/lib/libbsp/riscv32/hifive1/start/prci.c | 40
> +++
> > 3 files changed, 72 insertions(+)
> > create mode 100644 c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c
> >
> > diff --git a/c/src/lib/libbsp/riscv32/hifive1/include/prci.h
> b/c/src/lib/libbsp/riscv32/hifive1/include/prci.h
> > index c71edbc..3a4ea15 100644
> > --- a/c/src/lib/libbsp/riscv32/hifive1/include/prci.h
> > +++ b/c/src/lib/libbsp/riscv32/hifive1/include/prci.h
> > @@ -56,6 +56,10 @@
> > #define HFROSC_TRIM_OFFSET 16
> > #define HFROSC_EN_OFFSET 30
> > #define HFROSC_RDY_OFFSET 31
> > +#define HFROSC_DIV_MASK 0x2F
> > +#define HFROSC_TRIM_MASK 0x1F
> > +#define HFROSC_EN_MASK 0x1
> > +
> >
> > /*
> > * HFXOSCCFG configuration register values
> > @@ -69,7 +73,12 @@
> > * PLLCFG configuration register
> > */
> > #define PLL_SEL_OFFSET 16
> > +#define PLL_REF_SEL_OFFSET 17
> > +#define PLL_BYPASS_OFFSET 18
> > +#define PLL_LOCK_OFFSET 31
> >
> > uint32_t hifive1_current_freq();
> >
> > +void initialize_oscills();
> This function is in the application namespace. It should probably be
> hifive1_initialize_oscillators() to be a bit more distinct.
>
> > +
> > #endif /* PRCI_H */
> > diff --git a/c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c
> b/c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c
> > new file mode 100644
> > index 000..bb04a22
> > --- /dev/null
> > +++ b/c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c
> > @@ -0,0 +1,23 @@
> > +/*
> > + * Copyright (c) 2017
> > + * Denis Obrezkov
> > + *
> > + * The license and distribution terms for this file may be
> > + * found in the file LICENSE in this distribution or at
> > + * http://www.rtems.org/license/LICENSE.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +/*
> > + * This routine make initialization of HiFive1 (FE310) counters.
> > + */
> > +
> > +void bsp_start( void )
> > +{
> > + initialize_oscills();
> > + bsp_interrupt_initialize();
> > +}
> > diff --git a/c/src/lib/libbsp/riscv32/hifive1/start/prci.c
> b/c/src/lib/libbsp/riscv32/hifive1/start/prci.c
> > index bf3d288..1f3abb6 100644
> > --- a/c/src/lib/libbsp/riscv32/hifive1/start/prci.c
> > +++ b/c/src/lib/libbsp/riscv32/hifive1/start/prci.c
> > @@ -26,7 +26,47 @@
> > */
> >
> > #include
> > +#include
> >
> > uint32_t hifive1_current_freq() {
> >return hifive1_default_freq;
> > }
> > +
> > +void initialize_oscills() {
> > + volatile uint32_t * pll_reg = (volatile uint32_t *) PRCI_PLLCFG;
> > + volatile uint32_t * high_freq_reg = (volatile uint32_t *)
> PRCI_HFROSCCFG;
> > +
> > +#ifdef USE_HFROSC
> > + /* Setting up osc frequency */
> > + uint32_t tmp_reg = 0;
> > + /* Install divider in high frequency oscillator */
> > + tmp_reg |= (HFROSC_DIV_VAL & HFROSC_DIV_MASK) << HFROSC_DIV_OFFSET;
> > + tmp_reg |= (HFROSC_TRIM_VAL & HFROSC_TRIM_MASK) << HFROSC_TRIM_OFFSET;
> > + tmp_reg |= (HFROSC_EN_VAL & HFROSC_EN_MASK) << HFROSC_EN_OFFSET;
> > + (*high_freq_reg) = tmp_reg;
> > + while (( (*high_freq_reg) & ((HFROSC_RDY_VAL & 0x1) \
> > + << HFROSC_RDY_OFFSET)) == 0 ) {
> > +;
> > + }
> > +#endif /* USE_HFROSC */
> > +
> > +#ifdef USE_HFXOSC
> > + volatile uint32_t * ext_freq_reg = (volatile uint32_t *)
> PRCI_HFXOSCCFG;
> > + (*ext_freq_reg) |= ((HFXOSC_EN_VAL & 0x1) << HFXOSC_EN_OFFSET);
> > + while (( (*ext_freq_reg) & ((HFXOSC_RDY_VAL & 0x1) \
> > + << HFXOSC_RDY_OFFSET)) == 0 ) {
> > +;
> > + }
> > + (*pll_reg) |= (0x1 << PLL_BYPASS_OFFSET);
> > + (*pll_reg) |= (0x1 << PLL_REF_SEL_OFFSET);
> > + (*pll_reg) |= (0x1 << PLL_SEL_OFFSET);
> > + (*high_freq_reg) &= ~(0x1 << HFROSC_EN_OFFSET);
> > +
> > +#endif /* USE_HFXOSC */
> > +#ifndef USE_PLL
> > + /* Disable PLL */
> > + (*pll_reg) &= ~(0x1 << PLL_SEL_OFFSET);
> > +#else
> > +
> > +#endif
> > +}
> > --
> > 2.1.4
> >
> > ___
> > devel mailing list
> > devel@rtems.org
> > http://lists.rtems.org/mailman/listinfo/devel
>
--
Regards, Denis Obrezkov
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
Sebastian, Did you consciously not add riscv do rtems-all.bset? Or was it an oversight? Thanks for doing this. I was building on the master of the tools and I haven't checked gdb for riscv but all targets did build. --joel On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov wrote: > Ok, I will try today > > 2017-08-22 16:44 GMT+02:00 Gedare Bloom : > >> Denis, >> >> Please confirm if this works for you. >> >> On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber >> wrote: >> > Hello, >> > >> > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the >> > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess for >> > this we have to update to GDB 8.0. I didn't test this tool chain. >> > >> > >> > Sebastian Huber, embedded brains GmbH >> > >> > Address : Dornierstr. 4, D-82178 Puchheim, Germany >> > Phone : +49 89 189 47 41-16 >> > Fax : +49 89 189 47 41-09 >> > E-Mail : sebastian.hu...@embedded-brains.de >> > PGP : Public key available on request. >> > >> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. >> > >> > ___ >> > devel mailing list >> > devel@rtems.org >> > http://lists.rtems.org/mailman/listinfo/devel >> > > > > -- > Regards, Denis Obrezkov > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
2017-08-22 22:09 GMT+02:00 Joel Sherrill : > Sebastian, > > Did you consciously not add riscv do rtems-all.bset? Or was it an > oversight? > > Thanks for doing this. I was building on the master of the tools and > I haven't checked gdb for riscv but all targets did build. > > --joel > > On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov > wrote: > >> Ok, I will try today >> >> 2017-08-22 16:44 GMT+02:00 Gedare Bloom : >> >>> Denis, >>> >>> Please confirm if this works for you. >>> >>> On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber >>> wrote: >>> > Hello, >>> > >>> > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the >>> > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess >>> for >>> > this we have to update to GDB 8.0. I didn't test this tool chain. >>> > >>> > >>> > Sebastian Huber, embedded brains GmbH >>> > >>> > Address : Dornierstr. 4, D-82178 Puchheim, Germany >>> > Phone : +49 89 189 47 41-16 >>> > Fax : +49 89 189 47 41-09 >>> > E-Mail : sebastian.hu...@embedded-brains.de >>> > PGP : Public key available on request. >>> > >>> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. >>> > >>> > ___ >>> > devel mailing list >>> > devel@rtems.org >>> > http://lists.rtems.org/mailman/listinfo/devel >>> >> >> >> >> -- >> Regards, Denis Obrezkov >> >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel >> > > I have the error: riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. -I../../cpukit/../../../hifive1/lib/include -march=rv32imac -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs -MT src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo -c -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/../../cpukit/score/'`src/kern_tc.c In file included from /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, from /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/types.h:239, from /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/time.h:43, from ../../cpukit/../../../hifive1/lib/include/rtems/score/timecounter.h:26, from ../../cpukit/../../../hifive1/lib/include/rtems/score/timecounterimpl.h:26, from /home/reprofy/development/rtems/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: fatal error: machine/_kernel_cpuset.h: No such file or directory #include ^~ compilation terminated. -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov wrote: > 2017-08-22 22:09 GMT+02:00 Joel Sherrill : > >> Sebastian, >> >> Did you consciously not add riscv do rtems-all.bset? Or was it an >> oversight? >> >> Thanks for doing this. I was building on the master of the tools and >> I haven't checked gdb for riscv but all targets did build. >> >> --joel >> >> On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov >> wrote: >> >>> Ok, I will try today >>> >>> 2017-08-22 16:44 GMT+02:00 Gedare Bloom : >>> Denis, Please confirm if this works for you. On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber wrote: > Hello, > > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess for > this we have to update to GDB 8.0. I didn't test this tool chain. > > > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel >>> >>> >>> >>> -- >>> Regards, Denis Obrezkov >>> >>> ___ >>> devel mailing list >>> devel@rtems.org >>> http://lists.rtems.org/mailman/listinfo/devel >>> >> >> > I have the error: > riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. > -I../../cpukit/../../../hifive1/lib/include -march=rv32imac -mabi=ilp32 > -DFE3XX -Os -g -Wall -Wmissing-prototypes -Wimplicit-function-declaration > -Wstrict-prototypes -Wnested-externs -MT src/libscore_a-kern_tc.o -MD -MP > -MF src/.deps/libscore_a-kern_tc.Tpo -c -o src/libscore_a-kern_tc.o `test > -f 'src/kern_tc.c' || echo '/home/reprofy/development/ > rtems/kernel/rtems-riscv/c/src/../../cpukit/score/'`src/kern_tc.c > In file included from /home/reprofy/development/ > rtems/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, > from /home/reprofy/development/ > rtems/4.12/riscv32-rtems4.12/include/sys/types.h:239, > from /home/reprofy/development/ > rtems/4.12/riscv32-rtems4.12/include/sys/time.h:43, > from ../../cpukit/../../../hifive1/ > lib/include/rtems/score/timecounter.h:26, > from ../../cpukit/../../../hifive1/ > lib/include/rtems/score/timecounterimpl.h:26, > from /home/reprofy/development/ > rtems/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: > /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: > fatal error: machine/_kernel_cpuset.h: No such file or directory > #include > ^~ > compilation terminated. > Is this file in your RTEMS source tree? It is a shared file across all ports and should always be there. --joel > > > -- > Regards, Denis Obrezkov > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
2017-08-22 23:49 GMT+02:00 Joel Sherrill : > > > On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov > wrote: > >> 2017-08-22 22:09 GMT+02:00 Joel Sherrill : >> >>> Sebastian, >>> >>> Did you consciously not add riscv do rtems-all.bset? Or was it an >>> oversight? >>> >>> Thanks for doing this. I was building on the master of the tools and >>> I haven't checked gdb for riscv but all targets did build. >>> >>> --joel >>> >>> On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov >> > wrote: >>> Ok, I will try today 2017-08-22 16:44 GMT+02:00 Gedare Bloom : > Denis, > > Please confirm if this works for you. > > On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber > wrote: > > Hello, > > > > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on > the > > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess > for > > this we have to update to GDB 8.0. I didn't test this tool chain. > > > > > > Sebastian Huber, embedded brains GmbH > > > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > > Phone : +49 89 189 47 41-16 > > Fax : +49 89 189 47 41-09 > > E-Mail : sebastian.hu...@embedded-brains.de > > PGP : Public key available on request. > > > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > > > ___ > > devel mailing list > > devel@rtems.org > > http://lists.rtems.org/mailman/listinfo/devel > -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel >>> >>> >> I have the error: >> riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. >> -I../../cpukit/../../../hifive1/lib/include -march=rv32imac >> -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes >> -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs -MT >> src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo -c >> -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo >> '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/.. >> /../cpukit/score/'`src/kern_tc.c >> In file included from /home/reprofy/development/rtem >> s/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, >> from /home/reprofy/development/rtem >> s/4.12/riscv32-rtems4.12/include/sys/types.h:239, >> from /home/reprofy/development/rtem >> s/4.12/riscv32-rtems4.12/include/sys/time.h:43, >> from ../../cpukit/../../../hifive1/ >> lib/include/rtems/score/timecounter.h:26, >> from ../../cpukit/../../../hifive1/ >> lib/include/rtems/score/timecounterimpl.h:26, >> from /home/reprofy/development/rtem >> s/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: >> /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: >> fatal error: machine/_kernel_cpuset.h: No such file or directory >> #include >> ^~ >> compilation terminated. >> > > Is this file in your RTEMS source tree? It is a shared file across all > ports and > should always be there. > > --joel > > >> >> >> -- >> Regards, Denis Obrezkov >> > > No, I can't find it. Here are my build instructions: https://docs.google.com/document/d/13_qoWGmQ4N3Sqgb9dvaX27Dn_npZX6IkedyvImBcKfo/edit?usp=sharing in "Build instructions" section. Did I miss something? -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
2017-08-23 0:02 GMT+02:00 Denis Obrezkov : > 2017-08-22 23:49 GMT+02:00 Joel Sherrill : > >> >> >> On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov >> wrote: >> >>> 2017-08-22 22:09 GMT+02:00 Joel Sherrill : >>> Sebastian, Did you consciously not add riscv do rtems-all.bset? Or was it an oversight? Thanks for doing this. I was building on the master of the tools and I haven't checked gdb for riscv but all targets did build. --joel On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov < denisobrez...@gmail.com> wrote: > Ok, I will try today > > 2017-08-22 16:44 GMT+02:00 Gedare Bloom : > >> Denis, >> >> Please confirm if this works for you. >> >> On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber >> wrote: >> > Hello, >> > >> > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on >> the >> > latest Newlib snapshot and GCC 7.2. The GDB is not included. I >> guess for >> > this we have to update to GDB 8.0. I didn't test this tool chain. >> > >> > >> > Sebastian Huber, embedded brains GmbH >> > >> > Address : Dornierstr. 4, D-82178 Puchheim, Germany >> > Phone : +49 89 189 47 41-16 >> > Fax : +49 89 189 47 41-09 >> > E-Mail : sebastian.hu...@embedded-brains.de >> > PGP : Public key available on request. >> > >> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des >> EHUG. >> > >> > ___ >> > devel mailing list >> > devel@rtems.org >> > http://lists.rtems.org/mailman/listinfo/devel >> > > > > -- > Regards, Denis Obrezkov > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > >>> I have the error: >>> riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. >>> -I../../cpukit/../../../hifive1/lib/include -march=rv32imac >>> -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes >>> -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs >>> -MT src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo >>> -c -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo >>> '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/.. >>> /../cpukit/score/'`src/kern_tc.c >>> In file included from /home/reprofy/development/rtem >>> s/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, >>> from /home/reprofy/development/rtem >>> s/4.12/riscv32-rtems4.12/include/sys/types.h:239, >>> from /home/reprofy/development/rtem >>> s/4.12/riscv32-rtems4.12/include/sys/time.h:43, >>> from ../../cpukit/../../../hifive1/ >>> lib/include/rtems/score/timecounter.h:26, >>> from ../../cpukit/../../../hifive1/ >>> lib/include/rtems/score/timecounterimpl.h:26, >>> from /home/reprofy/development/rtem >>> s/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: >>> /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: >>> fatal error: machine/_kernel_cpuset.h: No such file or directory >>> #include >>> ^~ >>> compilation terminated. >>> >> >> Is this file in your RTEMS source tree? It is a shared file across all >> ports and >> should always be there. >> >> --joel >> >> >>> >>> >>> -- >>> Regards, Denis Obrezkov >>> >> >> No, I can't find it. > > Here are my build instructions: > https://docs.google.com/document/d/13_qoWGmQ4N3Sqgb9dvaX27Dn_ > npZX6IkedyvImBcKfo/edit?usp=sharing > in "Build instructions" section. > > Did I miss something? > -- > Regards, Denis Obrezkov > I work with Hesham's git tree and may be it's a bit outdated. -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
I would guess that's the case: $ cd rtems [joel@localhost rtems]$ find . -name "_kernel*.h" ./cpukit/libcsupport/include/machine/_kernel_time.h ./cpukit/libcsupport/include/machine/_kernel_types.h ./cpukit/libcsupport/include/machine/_kernel_cpuset.h ./cpukit/libcsupport/include/machine/_kernel_param.h ./cpukit/libnetworking/machine/_kernel_lock.h On Tue, Aug 22, 2017 at 5:38 PM, Denis Obrezkov wrote: > 2017-08-23 0:02 GMT+02:00 Denis Obrezkov : > >> 2017-08-22 23:49 GMT+02:00 Joel Sherrill : >> >>> >>> >>> On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov >> > wrote: >>> 2017-08-22 22:09 GMT+02:00 Joel Sherrill : > Sebastian, > > Did you consciously not add riscv do rtems-all.bset? Or was it an > oversight? > > Thanks for doing this. I was building on the master of the tools and > I haven't checked gdb for riscv but all targets did build. > > --joel > > On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov < > denisobrez...@gmail.com> wrote: > >> Ok, I will try today >> >> 2017-08-22 16:44 GMT+02:00 Gedare Bloom : >> >>> Denis, >>> >>> Please confirm if this works for you. >>> >>> On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber >>> wrote: >>> > Hello, >>> > >>> > I added a basic RISC-V 32-bit tool chain to the RSB. It is based >>> on the >>> > latest Newlib snapshot and GCC 7.2. The GDB is not included. I >>> guess for >>> > this we have to update to GDB 8.0. I didn't test this tool chain. >>> > >>> > >>> > Sebastian Huber, embedded brains GmbH >>> > >>> > Address : Dornierstr. 4, D-82178 Puchheim, Germany >>> > Phone : +49 89 189 47 41-16 >>> > Fax : +49 89 189 47 41-09 >>> > E-Mail : sebastian.hu...@embedded-brains.de >>> > PGP : Public key available on request. >>> > >>> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des >>> EHUG. >>> > >>> > ___ >>> > devel mailing list >>> > devel@rtems.org >>> > http://lists.rtems.org/mailman/listinfo/devel >>> >> >> >> >> -- >> Regards, Denis Obrezkov >> >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel >> > > I have the error: riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. -I../../cpukit/../../../hifive1/lib/include -march=rv32imac -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs -MT src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo -c -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/.. /../cpukit/score/'`src/kern_tc.c In file included from /home/reprofy/development/rtem s/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, from /home/reprofy/development/rtem s/4.12/riscv32-rtems4.12/include/sys/types.h:239, from /home/reprofy/development/rtem s/4.12/riscv32-rtems4.12/include/sys/time.h:43, from ../../cpukit/../../../hifive1/ lib/include/rtems/score/timecounter.h:26, from ../../cpukit/../../../hifive1/ lib/include/rtems/score/timecounterimpl.h:26, from /home/reprofy/development/rtem s/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: fatal error: machine/_kernel_cpuset.h: No such file or directory #include ^~ compilation terminated. >>> >>> Is this file in your RTEMS source tree? It is a shared file across all >>> ports and >>> should always be there. >>> >>> --joel >>> >>> -- Regards, Denis Obrezkov >>> >>> No, I can't find it. >> >> Here are my build instructions: >> https://docs.google.com/document/d/13_qoWGmQ4N3Sqgb9dvaX27Dn >> _npZX6IkedyvImBcKfo/edit?usp=sharing >> in "Build instructions" section. >> >> Did I miss something? >> -- >> Regards, Denis Obrezkov >> > > I work with Hesham's git tree and may be it's a bit outdated. > > -- > Regards, Denis Obrezkov > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
2017-08-23 0:58 GMT+02:00 Joel Sherrill : > I would guess that's the case: > > $ cd rtems > [joel@localhost rtems]$ find . -name "_kernel*.h" > ./cpukit/libcsupport/include/machine/_kernel_time.h > ./cpukit/libcsupport/include/machine/_kernel_types.h > ./cpukit/libcsupport/include/machine/_kernel_cpuset.h > ./cpukit/libcsupport/include/machine/_kernel_param.h > ./cpukit/libnetworking/machine/_kernel_lock.h > > > On Tue, Aug 22, 2017 at 5:38 PM, Denis Obrezkov > wrote: > >> 2017-08-23 0:02 GMT+02:00 Denis Obrezkov : >> >>> 2017-08-22 23:49 GMT+02:00 Joel Sherrill : >>> On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov < denisobrez...@gmail.com> wrote: > 2017-08-22 22:09 GMT+02:00 Joel Sherrill : > >> Sebastian, >> >> Did you consciously not add riscv do rtems-all.bset? Or was it an >> oversight? >> >> Thanks for doing this. I was building on the master of the tools and >> I haven't checked gdb for riscv but all targets did build. >> >> --joel >> >> On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov < >> denisobrez...@gmail.com> wrote: >> >>> Ok, I will try today >>> >>> 2017-08-22 16:44 GMT+02:00 Gedare Bloom : >>> Denis, Please confirm if this works for you. On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber wrote: > Hello, > > I added a basic RISC-V 32-bit tool chain to the RSB. It is based on the > latest Newlib snapshot and GCC 7.2. The GDB is not included. I guess for > this we have to update to GDB 8.0. I didn't test this tool chain. > > > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel >>> >>> >>> >>> -- >>> Regards, Denis Obrezkov >>> >>> ___ >>> devel mailing list >>> devel@rtems.org >>> http://lists.rtems.org/mailman/listinfo/devel >>> >> >> > I have the error: > riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. > -I../../cpukit/../../../hifive1/lib/include -march=rv32imac > -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes > -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs > -MT src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo > -c -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo > '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/.. > /../cpukit/score/'`src/kern_tc.c > In file included from /home/reprofy/development/rtem > s/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, > from /home/reprofy/development/rtem > s/4.12/riscv32-rtems4.12/include/sys/types.h:239, > from /home/reprofy/development/rtem > s/4.12/riscv32-rtems4.12/include/sys/time.h:43, > from ../../cpukit/../../../hifive1/ > lib/include/rtems/score/timecounter.h:26, > from ../../cpukit/../../../hifive1/ > lib/include/rtems/score/timecounterimpl.h:26, > from /home/reprofy/development/rtem > s/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: > /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: > fatal error: machine/_kernel_cpuset.h: No such file or directory > #include > ^~ > compilation terminated. > Is this file in your RTEMS source tree? It is a shared file across all ports and should always be there. --joel > > > -- > Regards, Denis Obrezkov > No, I can't find it. >>> >>> Here are my build instructions: >>> https://docs.google.com/document/d/13_qoWGmQ4N3Sqgb9dvaX27Dn >>> _npZX6IkedyvImBcKfo/edit?usp=sharing >>> in "Build instructions" section. >>> >>> Did I miss something? >>> -- >>> Regards, Denis Obrezkov >>> >> >> I work with Hesham's git tree and may be it's a bit outdated. >> >> -- >> Regards, Denis Obrezkov >> > > My output: $ find . -name "_kernel*.h" ./rtems-riscv/cpukit/libcsupport/include/machine/_kernel_time.h ./rtems-riscv/cpukit/libcsupport/include/machine/_kernel_types.h ./rtems-riscv/cpukit/libnetworking/machine/_kernel_lock.h -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.
Re: Basic RISC-V 32-bit tool chain
Definitely looks like that tree is out of date a bit. Looks like Heshams's tree needs to be rebased. Even better would be merging it to rtems.org if it is ready now. :) --joel On Tue, Aug 22, 2017 at 6:01 PM, Denis Obrezkov wrote: > 2017-08-23 0:58 GMT+02:00 Joel Sherrill : > >> I would guess that's the case: >> >> $ cd rtems >> [joel@localhost rtems]$ find . -name "_kernel*.h" >> ./cpukit/libcsupport/include/machine/_kernel_time.h >> ./cpukit/libcsupport/include/machine/_kernel_types.h >> ./cpukit/libcsupport/include/machine/_kernel_cpuset.h >> ./cpukit/libcsupport/include/machine/_kernel_param.h >> ./cpukit/libnetworking/machine/_kernel_lock.h >> >> >> On Tue, Aug 22, 2017 at 5:38 PM, Denis Obrezkov >> wrote: >> >>> 2017-08-23 0:02 GMT+02:00 Denis Obrezkov : >>> 2017-08-22 23:49 GMT+02:00 Joel Sherrill : > > > On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov < > denisobrez...@gmail.com> wrote: > >> 2017-08-22 22:09 GMT+02:00 Joel Sherrill : >> >>> Sebastian, >>> >>> Did you consciously not add riscv do rtems-all.bset? Or was it an >>> oversight? >>> >>> Thanks for doing this. I was building on the master of the tools and >>> I haven't checked gdb for riscv but all targets did build. >>> >>> --joel >>> >>> On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov < >>> denisobrez...@gmail.com> wrote: >>> Ok, I will try today 2017-08-22 16:44 GMT+02:00 Gedare Bloom : > Denis, > > Please confirm if this works for you. > > On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber > wrote: > > Hello, > > > > I added a basic RISC-V 32-bit tool chain to the RSB. It is based > on the > > latest Newlib snapshot and GCC 7.2. The GDB is not included. I > guess for > > this we have to update to GDB 8.0. I didn't test this tool chain. > > > > > > Sebastian Huber, embedded brains GmbH > > > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > > Phone : +49 89 189 47 41-16 > > Fax : +49 89 189 47 41-09 > > E-Mail : sebastian.hu...@embedded-brains.de > > PGP : Public key available on request. > > > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des > EHUG. > > > > ___ > > devel mailing list > > devel@rtems.org > > http://lists.rtems.org/mailman/listinfo/devel > -- Regards, Denis Obrezkov ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel >>> >>> >> I have the error: >> riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. >> -I../../cpukit/../../../hifive1/lib/include -march=rv32imac >> -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes >> -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs >> -MT src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo >> -c -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo >> '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/.. >> /../cpukit/score/'`src/kern_tc.c >> In file included from /home/reprofy/development/rtem >> s/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, >> from /home/reprofy/development/rtem >> s/4.12/riscv32-rtems4.12/include/sys/types.h:239, >> from /home/reprofy/development/rtem >> s/4.12/riscv32-rtems4.12/include/sys/time.h:43, >> from ../../cpukit/../../../hifive1/ >> lib/include/rtems/score/timecounter.h:26, >> from ../../cpukit/../../../hifive1/ >> lib/include/rtems/score/timecounterimpl.h:26, >> from /home/reprofy/development/rtem >> s/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: >> /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: >> fatal error: machine/_kernel_cpuset.h: No such file or directory >> #include >> ^~ >> compilation terminated. >> > > Is this file in your RTEMS source tree? It is a shared file across all > ports and > should always be there. > > --joel > > >> >> >> -- >> Regards, Denis Obrezkov >> > > No, I can't find it. Here are my build instructions: https://docs.google.com/document/d/13_qoWGmQ4N3Sqgb9dvaX27Dn _npZX6IkedyvImBcKfo/edit?usp=sharing in "Build instructions" section. Did I miss something? -- Regards, Denis Obrezkov >>> >>> I work with Hesham's git tree and may be it's a bit outdated
Re: Basic RISC-V 32-bit tool chain
I propose Hesham to rebase his tree so I can rebase my tree against his one and send a pull request till the end of GSoC. 2017-08-23 1:07 GMT+02:00 Joel Sherrill : > Definitely looks like that tree is out of date a bit. > > Looks like Heshams's tree needs to be rebased. Even better would > be merging it to rtems.org if it is ready now. :) > > --joel > > > On Tue, Aug 22, 2017 at 6:01 PM, Denis Obrezkov > wrote: > >> 2017-08-23 0:58 GMT+02:00 Joel Sherrill : >> >>> I would guess that's the case: >>> >>> $ cd rtems >>> [joel@localhost rtems]$ find . -name "_kernel*.h" >>> ./cpukit/libcsupport/include/machine/_kernel_time.h >>> ./cpukit/libcsupport/include/machine/_kernel_types.h >>> ./cpukit/libcsupport/include/machine/_kernel_cpuset.h >>> ./cpukit/libcsupport/include/machine/_kernel_param.h >>> ./cpukit/libnetworking/machine/_kernel_lock.h >>> >>> >>> On Tue, Aug 22, 2017 at 5:38 PM, Denis Obrezkov >> > wrote: >>> 2017-08-23 0:02 GMT+02:00 Denis Obrezkov : > 2017-08-22 23:49 GMT+02:00 Joel Sherrill : > >> >> >> On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov < >> denisobrez...@gmail.com> wrote: >> >>> 2017-08-22 22:09 GMT+02:00 Joel Sherrill : >>> Sebastian, Did you consciously not add riscv do rtems-all.bset? Or was it an oversight? Thanks for doing this. I was building on the master of the tools and I haven't checked gdb for riscv but all targets did build. --joel On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov < denisobrez...@gmail.com> wrote: > Ok, I will try today > > 2017-08-22 16:44 GMT+02:00 Gedare Bloom : > >> Denis, >> >> Please confirm if this works for you. >> >> On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber >> wrote: >> > Hello, >> > >> > I added a basic RISC-V 32-bit tool chain to the RSB. It is >> based on the >> > latest Newlib snapshot and GCC 7.2. The GDB is not included. I >> guess for >> > this we have to update to GDB 8.0. I didn't test this tool >> chain. >> > >> > >> > Sebastian Huber, embedded brains GmbH >> > >> > Address : Dornierstr. 4, D-82178 Puchheim, Germany >> > Phone : +49 89 189 47 41-16 >> > Fax : +49 89 189 47 41-09 >> > E-Mail : sebastian.hu...@embedded-brains.de >> > PGP : Public key available on request. >> > >> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des >> EHUG. >> > >> > ___ >> > devel mailing list >> > devel@rtems.org >> > http://lists.rtems.org/mailman/listinfo/devel >> > > > > -- > Regards, Denis Obrezkov > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > >>> I have the error: >>> riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. >>> -I../../cpukit/../../../hifive1/lib/include -march=rv32imac >>> -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes >>> -Wimplicit-function-declaration -Wstrict-prototypes >>> -Wnested-externs -MT src/libscore_a-kern_tc.o -MD -MP -MF >>> src/.deps/libscore_a-kern_tc.Tpo -c -o src/libscore_a-kern_tc.o >>> `test -f 'src/kern_tc.c' || echo '/home/reprofy/development/rte >>> ms/kernel/rtems-riscv/c/src/../../cpukit/score/'`src/kern_tc.c >>> In file included from /home/reprofy/development/rtem >>> s/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, >>> from /home/reprofy/development/rtem >>> s/4.12/riscv32-rtems4.12/include/sys/types.h:239, >>> from /home/reprofy/development/rtem >>> s/4.12/riscv32-rtems4.12/include/sys/time.h:43, >>> from ../../cpukit/../../../hifive1/ >>> lib/include/rtems/score/timecounter.h:26, >>> from ../../cpukit/../../../hifive1/ >>> lib/include/rtems/score/timecounterimpl.h:26, >>> from /home/reprofy/development/rtem >>> s/kernel/rtems-riscv/c/src/../../cpukit/score/src/kern_tc.c:36: >>> /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/cpuset.h:227:10: >>> fatal error: machine/_kernel_cpuset.h: No such file or directory >>> #include >>> ^~ >>> compilation terminated. >>> >> >> Is this file in your RTEMS source tree? It is a shared file across >> all ports and >> should always be there. >> >> --joel >> >> >>> >>> >>> -- >>> Regards, Denis Obrezkov >>> >> >> No, I can't find it. >
Re: [PATCH v2 07/15] HiFive1: add irq dispatching function
On Tue, Aug 22, 2017 at 9:56 AM, Denis Obrezkov wrote:
> ---
> c/src/lib/libbsp/riscv32/hifive1/include/irq.h | 12 +++
> c/src/lib/libbsp/riscv32/hifive1/irq/irq.c | 86
> ++
> c/src/lib/libbsp/riscv32/hifive1/start/start.S | 3 +-
> .../score/cpu/riscv32/rtems/score/riscv-utility.h | 26 +++
> 4 files changed, 126 insertions(+), 1 deletion(-)
> create mode 100644 c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
>
> diff --git a/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> b/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> index 67a781f..46d29c7 100644
> --- a/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> +++ b/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> @@ -11,6 +11,8 @@
> * Copyright (c) 2015 University of York.
> * Hesham ALMatary
> *
> + * Copyright (c) 2017 Denis Obrezkov
> + *
> * Redistribution and use in source and binary forms, with or without
> * modification, are permitted provided that the following conditions
> * are met:
> @@ -52,6 +54,16 @@
> #define MCAUSE_MTIME 0x7
> #define MCAUSE_MEXT 0xB
>
> +#define MIE_MSWI (1 << MCAUSE_MSWI)
> +#define MIE_MTIME (1 << MCAUSE_MTIME)
> +#define MIE_MEXT (1 << MCAUSE_MEXT)
> +
> +/*
> + * Memory mapped timer, timer comparator and software interrupt registers.
> + */
> +#define MTIMECMP ((volatile uint64_t *)0x02004000)
> +#define MTIME ((volatile uint64_t *)0x0200bff8)
> +#define MSIP_REG ((volatile uint32_t *) 0x0200)
>
> #endif /* ASM */
> #endif /* LIBBSP_GENERIC_RISCV_IRQ_H */
> diff --git a/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> b/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> new file mode 100644
> index 000..fadfdb7
> --- /dev/null
> +++ b/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> @@ -0,0 +1,86 @@
> +/**
> + * @file
> + *
> + * @ingroup riscv_interrupt
> + *
> + * @brief Interrupt support.
> + */
> +
> +/*
> + * RISCV CPU Dependent Source
> + *
> + * Copyright (c) 2015 University of York.
> + * Hesham ALMatary
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + *notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + *notice, this list of conditions and the following disclaimer in the
> + *documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
> + * SUCH DAMAGE.
> + */
> +
> +#include
> +#include
> +#include
> +
> +/* Almost all of the jobs that the following functions should
> + * do are implemented in cpukit
> + */
> +
> +void bsp_interrupt_handler_default(rtems_vector_number vector)
> +{
> +printk("spurious interrupt: %u\n", vector);
> +}
> +
> +rtems_status_code bsp_interrupt_facility_initialize()
> +{
> + return 0;
> +}
> +
> +rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
> +{
> + return 0;
> +}
> +
> +rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
> +{
> + return 0;
> +}
> +
> +/*
> + * FIXME: only timer intrrupt is handled
> + */
> +void handle_trap (uint32_t cause)
> +{
> +if (cause & MCAUSE_INT) {
> + /* an interrupt occurred */
> + if ((cause & MCAUSE_MTIME) == MCAUSE_MTIME) {
> + /* Timer interrupt */
> +(*MTIMECMP) = (*MTIME) + FE310_CLOCK_PERIOD;
> +
> bsp_interrupt_handler_table[1].handler(bsp_interrupt_handler_table[1].arg);
> + } else if ((cause & MCAUSE_MEXT) == MCAUSE_MEXT) {
> + /*External interrupt */
> + } else if ((cause & MCAUSE_MSWI) == MCAUSE_MSWI) {
> + /* Software interrupt */
> + *MSIP_REG = 0;
> + }
> +} else {
> + /* an exception occurred */
> +}
> +
> +}
> diff --git a/c/src/lib/libbsp/riscv32/hifive1/start/start.S
> b/c/src/lib/libbsp/riscv32/hifive1/start/start.S
> index 5d0899c..b3fb3f3 100644
> --- a/c/src/lib/libbsp/riscv32/hifive1/start/start.S
> +++ b/c/src/lib/libbsp/riscv32/hifive1/start/start.S
> @@ -209,7 +209,8 @@ trap_entry:
>csrr t0, mcause
>SREG t0, 33*REGBYTES(sp)
Re: [PATCH v2 07/15] HiFive1: add irq dispatching function
If that is the 2-paragraph BSD, then it is the newly preferred license.
The RTEMS GPLv2 has an exception which allows linking and eliminates the
viral characteristic. In practice and intent, the two licenses are the same
but the 2-paragraph BSD is simpler and better recognized for our intent.
Thank you for trying to use the BSD style license.
Depending on the author(s) of the original code, it might be easy to get
their permission for this one file on the list.
--joel
On Tue, Aug 22, 2017 at 7:41 PM, Hesham Almatary
wrote:
> On Tue, Aug 22, 2017 at 9:56 AM, Denis Obrezkov
> wrote:
> > ---
> > c/src/lib/libbsp/riscv32/hifive1/include/irq.h | 12 +++
> > c/src/lib/libbsp/riscv32/hifive1/irq/irq.c | 86
> ++
> > c/src/lib/libbsp/riscv32/hifive1/start/start.S | 3 +-
> > .../score/cpu/riscv32/rtems/score/riscv-utility.h | 26 +++
> > 4 files changed, 126 insertions(+), 1 deletion(-)
> > create mode 100644 c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> >
> > diff --git a/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> b/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> > index 67a781f..46d29c7 100644
> > --- a/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> > +++ b/c/src/lib/libbsp/riscv32/hifive1/include/irq.h
> > @@ -11,6 +11,8 @@
> > * Copyright (c) 2015 University of York.
> > * Hesham ALMatary
> > *
> > + * Copyright (c) 2017 Denis Obrezkov
> > + *
> > * Redistribution and use in source and binary forms, with or without
> > * modification, are permitted provided that the following conditions
> > * are met:
> > @@ -52,6 +54,16 @@
> > #define MCAUSE_MTIME 0x7
> > #define MCAUSE_MEXT 0xB
> >
> > +#define MIE_MSWI (1 << MCAUSE_MSWI)
> > +#define MIE_MTIME (1 << MCAUSE_MTIME)
> > +#define MIE_MEXT (1 << MCAUSE_MEXT)
> > +
> > +/*
> > + * Memory mapped timer, timer comparator and software interrupt
> registers.
> > + */
> > +#define MTIMECMP ((volatile uint64_t *)0x02004000)
> > +#define MTIME ((volatile uint64_t *)0x0200bff8)
> > +#define MSIP_REG ((volatile uint32_t *) 0x0200)
> >
> > #endif /* ASM */
> > #endif /* LIBBSP_GENERIC_RISCV_IRQ_H */
> > diff --git a/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> b/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> > new file mode 100644
> > index 000..fadfdb7
> > --- /dev/null
> > +++ b/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c
> > @@ -0,0 +1,86 @@
> > +/**
> > + * @file
> > + *
> > + * @ingroup riscv_interrupt
> > + *
> > + * @brief Interrupt support.
> > + */
> > +
> > +/*
> > + * RISCV CPU Dependent Source
> > + *
> > + * Copyright (c) 2015 University of York.
> > + * Hesham ALMatary
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + *notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + *notice, this list of conditions and the following disclaimer in
> the
> > + *documentation and/or other materials provided with the
> distribution.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
> AND
> > + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> PURPOSE
> > + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
> LIABLE
> > + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL
> > + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
> GOODS
> > + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> > + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
> STRICT
> > + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
> ANY WAY
> > + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
> OF
> > + * SUCH DAMAGE.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +
> > +/* Almost all of the jobs that the following functions should
> > + * do are implemented in cpukit
> > + */
> > +
> > +void bsp_interrupt_handler_default(rtems_vector_number vector)
> > +{
> > +printk("spurious interrupt: %u\n", vector);
> > +}
> > +
> > +rtems_status_code bsp_interrupt_facility_initialize()
> > +{
> > + return 0;
> > +}
> > +
> > +rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number
> vector)
> > +{
> > + return 0;
> > +}
> > +
> > +rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number
> vector)
> > +{
> > + return 0;
> > +}
> > +
> > +/*
> > + * FIXME: only timer intrrupt is handled
> > + */
> > +void handle_trap (uint32_t cause)
> > +{
> > +if (cause & MCAUSE_INT) {
> > + /* an interrupt occurred */
> > + if ((cause & MCAUSE_MTIME) == MCAUSE_MTIME) {
> > + /* Timer interrupt */
> >
Re: Basic RISC-V 32-bit tool chain
Hi all, I am reporting my efforts on this thread: * RSB/master/vanilla: riscv32 tested and builds just fine with no changes from my side. * RTEMS/riscv32: priv-1.10 branch - rebased with rtems/master, fixed errors, and pushed to GitHub [1]. * RTEMS/Spike: BSP builds sample tests and tested hello/ticker on Spike simulator. Thanks for your efforts all. [1] https://github.com/heshamelmatary/rtems-riscv/tree/priv-1.10 Cheers, Hesham On Wed, Aug 23, 2017 at 9:12 AM, Denis Obrezkov wrote: > I propose Hesham to rebase his tree so I can rebase my tree against his one > and send a pull request till the end of GSoC. > > 2017-08-23 1:07 GMT+02:00 Joel Sherrill : >> >> Definitely looks like that tree is out of date a bit. >> >> Looks like Heshams's tree needs to be rebased. Even better would >> be merging it to rtems.org if it is ready now. :) >> >> --joel >> >> >> On Tue, Aug 22, 2017 at 6:01 PM, Denis Obrezkov >> wrote: >>> >>> 2017-08-23 0:58 GMT+02:00 Joel Sherrill : I would guess that's the case: $ cd rtems [joel@localhost rtems]$ find . -name "_kernel*.h" ./cpukit/libcsupport/include/machine/_kernel_time.h ./cpukit/libcsupport/include/machine/_kernel_types.h ./cpukit/libcsupport/include/machine/_kernel_cpuset.h ./cpukit/libcsupport/include/machine/_kernel_param.h ./cpukit/libnetworking/machine/_kernel_lock.h On Tue, Aug 22, 2017 at 5:38 PM, Denis Obrezkov wrote: > > 2017-08-23 0:02 GMT+02:00 Denis Obrezkov : >> >> 2017-08-22 23:49 GMT+02:00 Joel Sherrill : >>> >>> >>> >>> On Tue, Aug 22, 2017 at 4:25 PM, Denis Obrezkov >>> wrote: 2017-08-22 22:09 GMT+02:00 Joel Sherrill : > > Sebastian, > > Did you consciously not add riscv do rtems-all.bset? Or was it an > oversight? > > Thanks for doing this. I was building on the master of the tools > and > I haven't checked gdb for riscv but all targets did build. > > --joel > > On Tue, Aug 22, 2017 at 9:55 AM, Denis Obrezkov > wrote: >> >> Ok, I will try today >> >> 2017-08-22 16:44 GMT+02:00 Gedare Bloom : >>> >>> Denis, >>> >>> Please confirm if this works for you. >>> >>> On Tue, Aug 22, 2017 at 9:17 AM, Sebastian Huber >>> wrote: >>> > Hello, >>> > >>> > I added a basic RISC-V 32-bit tool chain to the RSB. It is >>> > based on the >>> > latest Newlib snapshot and GCC 7.2. The GDB is not included. I >>> > guess for >>> > this we have to update to GDB 8.0. I didn't test this tool >>> > chain. >>> > >>> > >>> > Sebastian Huber, embedded brains GmbH >>> > >>> > Address : Dornierstr. 4, D-82178 Puchheim, Germany >>> > Phone : +49 89 189 47 41-16 >>> > Fax : +49 89 189 47 41-09 >>> > E-Mail : sebastian.hu...@embedded-brains.de >>> > PGP : Public key available on request. >>> > >>> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des >>> > EHUG. >>> > >>> > ___ >>> > devel mailing list >>> > devel@rtems.org >>> > http://lists.rtems.org/mailman/listinfo/devel >> >> >> >> >> -- >> Regards, Denis Obrezkov >> >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel > > I have the error: riscv32-rtems4.12-gcc --pipe -DHAVE_CONFIG_H -I.. -I../../cpukit/../../../hifive1/lib/include -march=rv32imac -mabi=ilp32 -DFE3XX -Os -g -Wall -Wmissing-prototypes -Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs -MT src/libscore_a-kern_tc.o -MD -MP -MF src/.deps/libscore_a-kern_tc.Tpo -c -o src/libscore_a-kern_tc.o `test -f 'src/kern_tc.c' || echo '/home/reprofy/development/rtems/kernel/rtems-riscv/c/src/../../cpukit/score/'`src/kern_tc.c In file included from /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/_pthreadtypes.h:24:0, from /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/types.h:239, from /home/reprofy/development/rtems/4.12/riscv32-rtems4.12/include/sys/time.h:43, from ../../cpukit/../../../hifive1/lib/include/rtems/score/timecounter.h:26, from ../../cpukit/../../../hifive1/lib/include/rtems/score/timecounterimpl.h:26, from /home/reprofy/dev
Re: Basic RISC-V 32-bit tool chain
On 23/08/2017 11:34, Hesham Almatary wrote: > Hi all, > > I am reporting my efforts on this thread: > > * RSB/master/vanilla: riscv32 tested and builds just fine with no > changes from my side. Hesham, can you please update rtems-all.bset to add RISC-V? The change is OK'ed by me so please just push it. > * RTEMS/riscv32: priv-1.10 branch - rebased with rtems/master, fixed > errors, and pushed to GitHub [1]. > * RTEMS/Spike: BSP builds sample tests and tested hello/ticker on > Spike simulator. Hesham, once you are happy with the changes and the reviews have finished please push to master. Is there a ticket for adding the RISC-V to RTEMS? If not please create a ticket and please reference it in a patch or patches so the release notes have an entry. > > Thanks for your efforts all. > > [1] https://github.com/heshamelmatary/rtems-riscv/tree/priv-1.10 > Thank you to all who have made this happen. Awesome effort and great result. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Basic RISC-V 32-bit tool chain
On 23/08/17 04:16, Chris Johns wrote: On 23/08/2017 11:34, Hesham Almatary wrote: Hi all, I am reporting my efforts on this thread: * RSB/master/vanilla: riscv32 tested and builds just fine with no changes from my side. Hesham, can you please update rtems-all.bset to add RISC-V? The change is OK'ed by me so please just push it. Sorry for forgetting this, I updated the RSB. * RTEMS/riscv32: priv-1.10 branch - rebased with rtems/master, fixed errors, and pushed to GitHub [1]. * RTEMS/Spike: BSP builds sample tests and tested hello/ticker on Spike simulator. Hesham, once you are happy with the changes and the reviews have finished please push to master. Is there a ticket for adding the RISC-V to RTEMS? If not please create a ticket and please reference it in a patch or patches so the release notes have an entry. I added a ticket: http://devel.rtems.org/ticket/3109 -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
