Ok, I fixed it. 2017-08-22 3:48 GMT+02:00 Gedare Bloom <ged...@rtems.org>:
> On Mon, Aug 21, 2017 at 7:56 PM, Denis Obrezkov <denisobrez...@gmail.com> > wrote: > > --- > > c/src/lib/libbsp/riscv32/hifive1/include/prci.h | 9 +++++ > > c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c | 23 +++++++++++++ > > c/src/lib/libbsp/riscv32/hifive1/start/prci.c | 40 > +++++++++++++++++++++++ > > 3 files changed, 72 insertions(+) > > create mode 100644 c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c > > > > diff --git a/c/src/lib/libbsp/riscv32/hifive1/include/prci.h > b/c/src/lib/libbsp/riscv32/hifive1/include/prci.h > > index c71edbc..3a4ea15 100644 > > --- a/c/src/lib/libbsp/riscv32/hifive1/include/prci.h > > +++ b/c/src/lib/libbsp/riscv32/hifive1/include/prci.h > > @@ -56,6 +56,10 @@ > > #define HFROSC_TRIM_OFFSET 16 > > #define HFROSC_EN_OFFSET 30 > > #define HFROSC_RDY_OFFSET 31 > > +#define HFROSC_DIV_MASK 0x2F > > +#define HFROSC_TRIM_MASK 0x1F > > +#define HFROSC_EN_MASK 0x1 > > + > > > > /* > > * HFXOSCCFG configuration register values > > @@ -69,7 +73,12 @@ > > * PLLCFG configuration register > > */ > > #define PLL_SEL_OFFSET 16 > > +#define PLL_REF_SEL_OFFSET 17 > > +#define PLL_BYPASS_OFFSET 18 > > +#define PLL_LOCK_OFFSET 31 > > > > uint32_t hifive1_current_freq(); > > > > +void initialize_oscills(); > This function is in the application namespace. It should probably be > hifive1_initialize_oscillators() to be a bit more distinct. > > > + > > #endif /* PRCI_H */ > > diff --git a/c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c > b/c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c > > new file mode 100644 > > index 0000000..bb04a22 > > --- /dev/null > > +++ b/c/src/lib/libbsp/riscv32/hifive1/start/bspstart.c > > @@ -0,0 +1,23 @@ > > +/* > > + * Copyright (c) 2017 > > + * Denis Obrezkov <denisobrez...@gmail.com> > > + * > > + * The license and distribution terms for this file may be > > + * found in the file LICENSE in this distribution or at > > + * http://www.rtems.org/license/LICENSE. > > + */ > > + > > +#include <bsp.h> > > +#include <bsp/bootcard.h> > > +#include <bsp/prci.h> > > +#include <bsp/fe310.h> > > + > > +/* > > + * This routine make initialization of HiFive1 (FE310) counters. > > + */ > > + > > +void bsp_start( void ) > > +{ > > + initialize_oscills(); > > + bsp_interrupt_initialize(); > > +} > > diff --git a/c/src/lib/libbsp/riscv32/hifive1/start/prci.c > b/c/src/lib/libbsp/riscv32/hifive1/start/prci.c > > index bf3d288..1f3abb6 100644 > > --- a/c/src/lib/libbsp/riscv32/hifive1/start/prci.c > > +++ b/c/src/lib/libbsp/riscv32/hifive1/start/prci.c > > @@ -26,7 +26,47 @@ > > */ > > > > #include <bsp/prci.h> > > +#include <bsp/fe310.h> > > > > uint32_t hifive1_current_freq() { > > return hifive1_default_freq; > > } > > + > > +void initialize_oscills() { > > + volatile uint32_t * pll_reg = (volatile uint32_t *) PRCI_PLLCFG; > > + volatile uint32_t * high_freq_reg = (volatile uint32_t *) > PRCI_HFROSCCFG; > > + > > +#ifdef USE_HFROSC > > + /* Setting up osc frequency */ > > + uint32_t tmp_reg = 0; > > + /* Install divider in high frequency oscillator */ > > + tmp_reg |= (HFROSC_DIV_VAL & HFROSC_DIV_MASK) << HFROSC_DIV_OFFSET; > > + tmp_reg |= (HFROSC_TRIM_VAL & HFROSC_TRIM_MASK) << HFROSC_TRIM_OFFSET; > > + tmp_reg |= (HFROSC_EN_VAL & HFROSC_EN_MASK) << HFROSC_EN_OFFSET; > > + (*high_freq_reg) = tmp_reg; > > + while (( (*high_freq_reg) & ((HFROSC_RDY_VAL & 0x1) \ > > + << HFROSC_RDY_OFFSET)) == 0 ) { > > + ; > > + } > > +#endif /* USE_HFROSC */ > > + > > +#ifdef USE_HFXOSC > > + volatile uint32_t * ext_freq_reg = (volatile uint32_t *) > PRCI_HFXOSCCFG; > > + (*ext_freq_reg) |= ((HFXOSC_EN_VAL & 0x1) << HFXOSC_EN_OFFSET); > > + while (( (*ext_freq_reg) & ((HFXOSC_RDY_VAL & 0x1) \ > > + << HFXOSC_RDY_OFFSET)) == 0 ) { > > + ; > > + } > > + (*pll_reg) |= (0x1 << PLL_BYPASS_OFFSET); > > + (*pll_reg) |= (0x1 << PLL_REF_SEL_OFFSET); > > + (*pll_reg) |= (0x1 << PLL_SEL_OFFSET); > > + (*high_freq_reg) &= ~(0x1 << HFROSC_EN_OFFSET); > > + > > +#endif /* USE_HFXOSC */ > > +#ifndef USE_PLL > > + /* Disable PLL */ > > + (*pll_reg) &= ~(0x1 << PLL_SEL_OFFSET); > > +#else > > + > > +#endif > > +} > > -- > > 2.1.4 > > > > _______________________________________________ > > devel mailing list > > devel@rtems.org > > http://lists.rtems.org/mailman/listinfo/devel > -- Regards, Denis Obrezkov
_______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
