date:20170503

Re: [PATCH] cpukit: Fix __RTEMS_REVISION__ define

2017-05-03 Thread Chris Johns

On 3/5/17 4:28 pm, Sebastian Huber wrote:
> On 03/05/17 08:17, Chris Johns wrote:
>> On 3/5/17 3:40 pm, Sebastian Huber wrote:
>>> On 03/05/17 07:28, Chris Johns wrote:
 On 3/5/17 3:09 pm, Sebastian Huber wrote:
> On 02/05/17 23:30, Chris Johns wrote:
>> On 2/5/17 6:20 pm, Sebastian Huber wrote:
>> [...]
>> If you want to add this test please extract the version details from
>> the
>> build system
> Can we trust the build system?
>
 Given the header file with the values it created by the build system
 yes
 we can.
>>> I don't think we can trust the build system. The requirement for a
>>> release is that the version macros should have specific values. We
>>> should test that this is the case.
>> We have to trust the build system for a clean or fresh build and if we
>> cannot not it is a bug. To state otherwise expands the scope of
>> uncertainty and I do not believe we need too.
>>
>> I will state again, doing this breaks the release process. I am sorry
>> but this is just now the release model and supporting configuration
>> control structures exist.
> 
> I still don't see how this breaks the release process. One task of it is
> surly to change the version from N to N + 1. This requires to modify
> some files (with a script). This test would be just one of these files.
> Some are *.m4 files, some *.c files, it doesn't matter.

It is not that simple. The details are in the rtems-release.git repo.
There are a number of ways this can be done, I have settled on this
release model and I do not wish to revisit it. It has been like this for
while now and given I am the only one doing any of this it is reasonable
to have the major say. All efforts have been unfunded.

A release is defined as the compressed tar file and the release
signature is the SHA512 hash. A release defined this way is unique and
this is important. You cannot clone it, you can only clone an equivalent
and that equivalent will have the branch's version numbering not the
release's version numbers, again this is important. The cloned version
and the real release are not able to be mixed without direct
intervention by someone and that invalidates the configuration. The
release's tar file contains file system's meta data which effects the
SHA512 hash and that makes replication difficult.

The version.m4 file are modified during the release process to the
release specific details and the build system files are generated. This
is understood and accepted and that part of the release can be
separately audited and checked. The RSB, docs and rtems-tools have a
different method where a VERSION file is added to the archived cloned
repo files.

The release branch version tested is the version released and tagged. It
does not contain extra commits to fiddle embedded version numbers such
as this test. There is also no need to perform any post release commits
on a release branch to put back the release branch version numbers which
is needed to make the repo meet the release branch requirements for the
next dot release. I wanted to avoid this type of repo noise and the
complexity created if any of the commits needed fail requiring recovery
processes. Any time manual actions are needed auditing demands increase.
It is not enough to have requirements, you need to prove it happened.

I do not want the release process touching .c, .h etc type files. I am
touching the version.m4 files because I have too. I would prefer to add
a file.

The release process runs without intervention from the start to the end
across a number of repos and packages. Once created a separate process
runs to tag the repos and the release hash.

I hope this helps explain what is happening.

> 
>>
>>> Maybe we have some time in the future something like this:
>>>
>>> Requirement 2341: There shall be a C pre-processor define
>>> __RTEMS_MAJOR__ available via #include  defined to 123.
>> I doubt this would be in the RTEMS Project's requirements. It might be
>> in a qualification package for the specific qualification effort.
> 
> It is a RTEMS Project's requirement. Its just not explicitly stated. If
> you release RTEMS 3.4.531 a user expects to have
> 
> #define __RTEMS_MAJOR__ 3
> #define __RTEMS_MINOR__ 4
> #define __RTEMS_REVISION__ 531
> 

Yes but the requirement does not state exact version numbers, rather it
would define the release number fields, what they mean, how and why they
change, and how they can be used in software via the defines.

>> How
>> that define it created is for the RTEMS Project to determine.
> 
> Yes, but somehow the define must exist with the right value and this is
> what needs to be tested.
> 

Is this a cat in a box type issue?

I am happy for a test to check the macros are suitably formed and meet
the needs of the compiler, language etc.

I feel any specific version check is something a user needs to wrap
around RTEMS once installed. They could grep, sed and check the values
because the test confirms they are correc

[PATCH v2 0/2] Zynq7000 series device configuration driver

2017-05-03 Thread Patrick Gauvin

v2 Change Summary (primarily from Chris's feedback):

SLCR:
- Clean up register accesses.
- Add mask for FPGA clock resets.

Device Config:
- Remove DMA buffer static global.
- Remove register map as an argument (only one instance ever).
- Remove bitfile length related code.
- Add bitfile header check.
- Default the write behavior to writing an entire bitfile.
- Add BIN file header check in default write mode.
- Added ioctl to switch write mode to to unrestricted.
- Remove non-symbolic '| 1' for DMA source and destination addresses.
- Use RTEMS system events instead of semaphores for interrupt waits.
- Fix PCAP init failure when the PL is already programmed.

General:
- More documentation and error values.

These changes do not include a secure loading check. The check I saw was
to use the PCAP to read the PART_SECURED bit in the internal STAT register
after the PL is programmed. I still need to test if that sort of access is
allowed when a secure bitfile is loaded. For now I just have warnings in
comments that secure loading is not supported.

Please let me know if I've missed anything or you spot anything new.

Patrick Gauvin (2):
  bsp/xilinx-zynq: Add SLCR driver
  bsp/xilinx-zynq: Add device configuration driver

 c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am   |  10 +
 .../libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c| 896 +
 .../arm/xilinx-zynq/include/zynq-devcfg-regs.h | 197 +
 .../libbsp/arm/xilinx-zynq/include/zynq-devcfg.h   | 152 
 .../arm/xilinx-zynq/include/zynq-slcr-regs.h   | 111 +++
 .../lib/libbsp/arm/xilinx-zynq/include/zynq-slcr.h |  91 +++
 c/src/lib/libbsp/arm/xilinx-zynq/preinstall.am |  16 +
 c/src/lib/libbsp/arm/xilinx-zynq/slcr/zynq-slcr.c  | 101 +++
 8 files changed, 1574 insertions(+)
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-devcfg-regs.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-devcfg.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr-regs.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/slcr/zynq-slcr.c

-- 
2.7.4

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[PATCH v2 2/2] bsp/xilinx-zynq: Add device configuration driver

2017-05-03 Thread Patrick Gauvin

---
 c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am   |   5 +
 .../libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c| 896 +
 .../arm/xilinx-zynq/include/zynq-devcfg-regs.h | 197 +
 .../libbsp/arm/xilinx-zynq/include/zynq-devcfg.h   | 152 
 c/src/lib/libbsp/arm/xilinx-zynq/preinstall.am |   8 +
 5 files changed, 1258 insertions(+)
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-devcfg-regs.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-devcfg.h

diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am 
b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
index 08024b9..439399b 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
@@ -49,6 +49,8 @@ include_bsp_HEADERS += include/i2c.h
 include_bsp_HEADERS += include/irq.h
 include_bsp_HEADERS += include/zynq-uart.h
 include_bsp_HEADERS += include/zynq-uart-regs.h
+include_bsp_HEADERS += include/zynq-devcfg.h
+include_bsp_HEADERS += include/zynq-devcfg-regs.h
 include_bsp_HEADERS += include/zynq-slcr.h
 include_bsp_HEADERS += include/zynq-slcr-regs.h
 
@@ -120,6 +122,9 @@ libbsp_a_SOURCES += ../shared/arm-a9mpcore-clock-config.c
 # I2C
 libbsp_a_SOURCES += i2c/cadence-i2c.c
 
+# Device Config
+libbsp_a_SOURCES += devcfg/zynq-devcfg.c
+
 # System Level Control Registers
 libbsp_a_SOURCES += slcr/zynq-slcr.c
 
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c 
b/c/src/lib/libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c
new file mode 100644
index 000..df59609
--- /dev/null
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/devcfg/zynq-devcfg.c
@@ -0,0 +1,896 @@
+/*
+ * Xilinx Zynq7000 Device Configuration Driver Implementation
+ *
+ * Notes:
+ * - There will only ever be 1 of these controllers in the Zynq, so this driver
+ *   is designed to be run as a single instance.
+ * - Even if an interrupt bit is already asserted, unmasking it will lead to
+ *   triggering the interrupt. In several areas operations are started before
+ *   unmasking an interrupt which could be triggered by those operations; this
+ *   interrupt behavior allows for such code to not be racy.
+ * - Secure loading is not supported.
+ *
+ * Copyright (c) 2016
+ *  NSF Center for High-Performance Reconfigurable Computing (CHREC),
+ *  University of Florida.  All rights reserved.
+ * Copyright (c) 2017
+ *  NSF Center for High-Performance Reconfigurable Computing (CHREC),
+ *  University of Pittsburgh.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * The views and conclusions contained in the software and documentation
+ * are those of the authors and should not be interpreted as representing
+ * official policies, either expressed or implied, of CHREC.
+ *
+ * Author: Patrick Gauvin 
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define WARN( msg ) printf( "%s:%s: %s", __FILE__, __func__, msg )
+/* Timeout for interrupt waits, 2 seconds should be enough for any operation.
+ */
+#define INT_TIMEOUT ( 2 * rtems_clock_get_ticks_per_second() )
+#define ZYNQ_DEVCFG_EVENT_SET RTEMS_EVENT_0
+
+typedef struct {
+  volatile zynq_devcfg_regs *regs;
+  /* Used to restrict the device to being opened once at a time. */
+  rtems_id   sem_id_open;
+  /* Used for mutual exclusion between read/write/ioctl. */
+  rtems_id   sem_id_internal;
+  /* Indicates if the PCAP will be used for a secure bitstream. Secure
+   * bitstreams are untested with this driver. Defaults to false.
+   */
+  bool

[PATCH v2 1/2] bsp/xilinx-zynq: Add SLCR driver

2017-05-03 Thread Patrick Gauvin

---
 c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am   |   5 +
 .../arm/xilinx-zynq/include/zynq-slcr-regs.h   | 111 +
 .../lib/libbsp/arm/xilinx-zynq/include/zynq-slcr.h |  91 +
 c/src/lib/libbsp/arm/xilinx-zynq/preinstall.am |   8 ++
 c/src/lib/libbsp/arm/xilinx-zynq/slcr/zynq-slcr.c  | 101 +++
 5 files changed, 316 insertions(+)
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr-regs.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr.h
 create mode 100644 c/src/lib/libbsp/arm/xilinx-zynq/slcr/zynq-slcr.c

diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am 
b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
index 1f9ed59..08024b9 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
@@ -49,6 +49,8 @@ include_bsp_HEADERS += include/i2c.h
 include_bsp_HEADERS += include/irq.h
 include_bsp_HEADERS += include/zynq-uart.h
 include_bsp_HEADERS += include/zynq-uart-regs.h
+include_bsp_HEADERS += include/zynq-slcr.h
+include_bsp_HEADERS += include/zynq-slcr-regs.h
 
 include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/arm-cp15.h
 
@@ -118,6 +120,9 @@ libbsp_a_SOURCES += ../shared/arm-a9mpcore-clock-config.c
 # I2C
 libbsp_a_SOURCES += i2c/cadence-i2c.c
 
+# System Level Control Registers
+libbsp_a_SOURCES += slcr/zynq-slcr.c
+
 # Cache
 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr-regs.h 
b/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr-regs.h
new file mode 100644
index 000..9759fd0
--- /dev/null
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-slcr-regs.h
@@ -0,0 +1,111 @@
+/**
+ * @file
+ * @ingroup zynq_slcr
+ * @brief SLCR register definitions.
+ */
+
+/*
+ * Copyright (c) 2017
+ *  NSF Center for High-Performance Reconfigurable Computing (CHREC),
+ *  University of Pittsburgh.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * The views and conclusions contained in the software and documentation
+ * are those of the authors and should not be interpreted as representing
+ * official policies, either expressed or implied, of CHREC.
+ *
+ * Author: Patrick Gauvin 
+ */
+
+/**
+ * @defgroup zynq_slcr_regs SLCR Register Definitions
+ * @ingroup zynq_slcr
+ * @brief SLCR Register Definitions
+ */
+
+#ifndef LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H
+#define LIBBSP_ARM_XILINX_ZYNQ_SLCR_REGS_H
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define ZYNQ_SLCR_BASE_ADDR ( 0xF800 )
+
+#define ZYNQ_SLCR_LOCK_OFF ( 0x4 )
+#define ZYNQ_SLCR_UNLOCK_OFF ( 0x8 )
+#define ZYNQ_SLCR_FPGA_RST_CTRL_OFF ( 0x240 )
+#define ZYNQ_SLCR_PSS_IDCODE_OFF ( 0x530 )
+#define ZYNQ_SLCR_LVL_SHFTR_EN_OFF ( 0x900 )
+
+#define ZYNQ_SLCR_LOCK_KEY ( 0x767b )
+#define ZYNQ_SLCR_UNLOCK_KEY ( 0xdf0d )
+
+/** \brief Get FPGA0_OUT_RST (bit 0) through FPGA3_OUT_RST fields (bit 3). */
+#define ZYNQ_SLCR_FPGA_RST_CTRL_FPGA_OUT_RST_GET( reg ) \
+  BSP_FLD32GET( reg, 0, 3 )
+#define ZYNQ_SLCR_FPGA_RST_CTRL_FPGA_OUT_RST( val ) BSP_FLD32( val, 0, 3 )
+
+/* NOTE: QEMU gives a value of 0 for the pss_idcode. */
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_GET( reg ) BSP_FLD32GET( reg, 12, 16 )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z007s ( 0x03 )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z012s ( 0x1c )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z014s ( 0x08 )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z010 ( 0x02 )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z015 ( 0x1b )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z020 ( 0x07 )
+#define ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z030 ( 0x0c )

Execution Time of Whetstone on LEON3

2017-05-03 Thread Joel Sherrill

Hi

Has anyone run the whetstone benchmark on real leon3 HW?
I'm almost at 20 minutes of simulated CPU time on tsim so
am suspicious something is wrong.

Any ideas?

--joel
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[PATCH] sptests/spversion01: New test

2017-05-03 Thread Sebastian Huber

---
 testsuites/sptests/Makefile.am |  1 +
 testsuites/sptests/configure.ac|  1 +
 testsuites/sptests/spversion01/Makefile.am | 19 +
 testsuites/sptests/spversion01/init.c  | 55 ++
 testsuites/sptests/spversion01/spversion01.doc | 11 ++
 testsuites/sptests/spversion01/spversion01.scn |  2 +
 6 files changed, 89 insertions(+)
 create mode 100644 testsuites/sptests/spversion01/Makefile.am
 create mode 100644 testsuites/sptests/spversion01/init.c
 create mode 100644 testsuites/sptests/spversion01/spversion01.doc
 create mode 100644 testsuites/sptests/spversion01/spversion01.scn

diff --git a/testsuites/sptests/Makefile.am b/testsuites/sptests/Makefile.am
index c50e757..d47bbca 100644
--- a/testsuites/sptests/Makefile.am
+++ b/testsuites/sptests/Makefile.am
@@ -33,6 +33,7 @@ _SUBDIRS = \
 spsignal_err01 spport_err01 spmsgq_err01 spmsgq_err02 spsem_err01 \
 spsem_err02 sptask_err01 spevent_err03 sptask_err03 sptask_err02 \
 sptask_err04 spclock_err01
+_SUBDIRS += spversion01
 _SUBDIRS += spfatal29
 _SUBDIRS += spmutex01
 _SUBDIRS += spextensions01
diff --git a/testsuites/sptests/configure.ac b/testsuites/sptests/configure.ac
index e14c937..a797d91 100644
--- a/testsuites/sptests/configure.ac
+++ b/testsuites/sptests/configure.ac
@@ -36,6 +36,7 @@ AM_CONDITIONAL(HAS_SMP,test "$rtems_cv_RTEMS_SMP" = "yes")
 
 # Explicitly list all Makefiles here
 AC_CONFIG_FILES([Makefile
+spversion01/Makefile
 spmutex01/Makefile
 spextensions01/Makefile
 sptimerserver01/Makefile
diff --git a/testsuites/sptests/spversion01/Makefile.am 
b/testsuites/sptests/spversion01/Makefile.am
new file mode 100644
index 000..73134d8
--- /dev/null
+++ b/testsuites/sptests/spversion01/Makefile.am
@@ -0,0 +1,19 @@
+rtems_tests_PROGRAMS = spversion01
+spversion01_SOURCES = init.c
+
+dist_rtems_tests_DATA = spversion01.scn spversion01.doc
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../automake/compile.am
+include $(top_srcdir)/../automake/leaf.am
+
+AM_CPPFLAGS += -I$(top_srcdir)/../support/include
+
+LINK_OBJS = $(spversion01_OBJECTS)
+LINK_LIBS = $(spversion01_LDLIBS)
+
+spversion01$(EXEEXT): $(spversion01_OBJECTS) $(spversion01_DEPENDENCIES)
+   @rm -f spversion01$(EXEEXT)
+   $(make-exe)
+
+include $(top_srcdir)/../automake/local.am
diff --git a/testsuites/sptests/spversion01/init.c 
b/testsuites/sptests/spversion01/init.c
new file mode 100644
index 000..820feee
--- /dev/null
+++ b/testsuites/sptests/spversion01/init.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+
+#include "tmacros.h"
+
+const char rtems_test_name[] = "SPVERSION 1";
+
+#ifndef __RTEMS_MAJOR__
+#error "__RTEMS_MAJOR__ not defined"
+#endif
+
+#ifndef __RTEMS_MINOR__
+#error "__RTEMS_MINOR__ not defined"
+#endif
+
+#ifndef __RTEMS_REVISION__
+#error "__RTEMS_REVISION__ not defined"
+#endif
+
+static void Init(rtems_task_argument arg)
+{
+  TEST_BEGIN();
+  TEST_END();
+  rtems_test_exit(0);
+}
+
+#define CONFIGURE_APPLICATION_DOES_NOT_NEED_CLOCK_DRIVER
+#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+
+#define CONFIGURE_MAXIMUM_TASKS 1
+
+#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_INIT
+
+#include 
diff --git a/testsuites/sptests/spversion01/spversion01.doc 
b/testsuites/sptests/spversion01/spversion01.doc
new file mode 100644
index 000..d72e20b
--- /dev/null
+++ b/testsuites/sptests/spversion01/spversion01.doc
@@ -0,0 +1,11 @@
+This file describes the directives and concepts tested by this test set.
+
+test set name: spversion01
+
+directives:
+
+  None.
+
+concepts:
+
+  Ensure that the RTEMS version macros are defined.
diff --git a/testsuites/sptests/spversion01/spversion01.scn 
b/testsuites/sptests/spversion01/spversion01.scn
new file mode 100644
index 000..735ed11
--- /dev/null
+++ b/testsuites/sptests/spversion01/spversion01.scn
@@ -0,0 +1,2 @@
+*** BEGIN OF TEST SPVERSION 1 ***
+*** END OF TEST SPVERSION 1 ***
-- 
1.8.4.5

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Re: Execution Time of Whetstone on LEON3

2017-05-03 Thread Sebastian Huber


On 03/05/17 22:52, Joel Sherrill wrote:

Has anyone run the whetstone benchmark on real leon3 HW?
I'm almost at 20 minutes of simulated CPU time on tsim so
am suspicious something is wrong.

Any ideas?


Maybe soft-float plus a low CPU frequency? Do you have a function 
profiling histogram of the execution?


--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
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Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

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Re: [PATCH] sptests/spversion01: New test

2017-05-03 Thread Chris Johns


On 04/05/2017 15:31, Sebastian Huber wrote:

---
 testsuites/sptests/Makefile.am |  1 +
 testsuites/sptests/configure.ac|  1 +
 testsuites/sptests/spversion01/Makefile.am | 19 +
 testsuites/sptests/spversion01/init.c  | 55 ++
 testsuites/sptests/spversion01/spversion01.doc | 11 ++
 testsuites/sptests/spversion01/spversion01.scn |  2 +
 6 files changed, 89 insertions(+)
 create mode 100644 testsuites/sptests/spversion01/Makefile.am
 create mode 100644 testsuites/sptests/spversion01/init.c
 create mode 100644 testsuites/sptests/spversion01/spversion01.doc
 create mode 100644 testsuites/sptests/spversion01/spversion01.scn

diff --git a/testsuites/sptests/Makefile.am b/testsuites/sptests/Makefile.am
index c50e757..d47bbca 100644
--- a/testsuites/sptests/Makefile.am
+++ b/testsuites/sptests/Makefile.am
@@ -33,6 +33,7 @@ _SUBDIRS = \
 spsignal_err01 spport_err01 spmsgq_err01 spmsgq_err02 spsem_err01 \
 spsem_err02 sptask_err01 spevent_err03 sptask_err03 sptask_err02 \
 sptask_err04 spclock_err01
+_SUBDIRS += spversion01
 _SUBDIRS += spfatal29
 _SUBDIRS += spmutex01
 _SUBDIRS += spextensions01
diff --git a/testsuites/sptests/configure.ac b/testsuites/sptests/configure.ac
index e14c937..a797d91 100644
--- a/testsuites/sptests/configure.ac
+++ b/testsuites/sptests/configure.ac
@@ -36,6 +36,7 @@ AM_CONDITIONAL(HAS_SMP,test "$rtems_cv_RTEMS_SMP" = "yes")

 # Explicitly list all Makefiles here
 AC_CONFIG_FILES([Makefile
+spversion01/Makefile
 spmutex01/Makefile
 spextensions01/Makefile
 sptimerserver01/Makefile
diff --git a/testsuites/sptests/spversion01/Makefile.am 
b/testsuites/sptests/spversion01/Makefile.am
new file mode 100644
index 000..73134d8
--- /dev/null
+++ b/testsuites/sptests/spversion01/Makefile.am
@@ -0,0 +1,19 @@
+rtems_tests_PROGRAMS = spversion01
+spversion01_SOURCES = init.c
+
+dist_rtems_tests_DATA = spversion01.scn spversion01.doc
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../automake/compile.am
+include $(top_srcdir)/../automake/leaf.am
+
+AM_CPPFLAGS += -I$(top_srcdir)/../support/include
+
+LINK_OBJS = $(spversion01_OBJECTS)
+LINK_LIBS = $(spversion01_LDLIBS)
+
+spversion01$(EXEEXT): $(spversion01_OBJECTS) $(spversion01_DEPENDENCIES)
+   @rm -f spversion01$(EXEEXT)
+   $(make-exe)
+
+include $(top_srcdir)/../automake/local.am
diff --git a/testsuites/sptests/spversion01/init.c 
b/testsuites/sptests/spversion01/init.c
new file mode 100644
index 000..820feee
--- /dev/null
+++ b/testsuites/sptests/spversion01/init.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+
+#include "tmacros.h"
+
+const char rtems_test_name[] = "SPVERSION 1";
+
+#ifndef __RTEMS_MAJOR__
+#error "__RTEMS_MAJOR__ not defined"
+#endif
+
+#ifndef __RTEMS_MINOR__
+#error "__RTEMS_MINOR__ not defined"
+#endif
+
+#ifndef __RTEMS_REVISION__
+#error "__RTEMS_REVISION__ not defined"
+#endif
+
+static void Init(rtems_task_argument arg)
+{
+  TEST_BEGIN();


Would adding this help verify number are used and nothing extra has been 
added by the build system?


  printf("major = %d\n",__RTEMS_MAJOR__);
  printf("minor = %d\n",__RTEMS_MINOR__);
  printf("revision = %d\n", __RTEMS_REVISION__);

Chris


+  TEST_END();
+  rtems_test_exit(0);
+}
+
+#define CONFIGURE_APPLICATION_DOES_NOT_NEED_CLOCK_DRIVER
+#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+
+#define CONFIGURE_MAXIMUM_TASKS 1
+
+#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_INIT
+
+#include 
diff --git a/testsuites/sptests/spversion01/spversion01.doc 
b/testsuites/sptests/spversion01/spversion01.doc
new file mode 100644
index 000..d72e20b
--- /dev/null
+++ b/testsuites/sptests/spversion01/spversion01.doc
@@ -0,0 +1,11 @@
+This file describes the directives and concepts tested by this test set.
+
+test set name: spversion01
+
+directives:
+
+  None.
+
+concepts:
+
+  Ensure that the RTEMS version macros are defined.
diff --git a/testsuites/sptests/spversion01/spversion01.scn 
b/testsuites/sptests/spversion01/spversion01.scn
new file mode 100644
index 000..735ed11
--- /dev/null
+++ b/testsuites/sptests/spversion01/spversion01.scn
@@ -0,0 +1,2 @@
+*** BEGIN OF TEST SPVERSION 1 ***
+*** END OF TEST SPVERSION 1 ***


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Re: [PATCH] cpukit: Fix __RTEMS_REVISION__ define

[PATCH v2 0/2] Zynq7000 series device configuration driver

[PATCH v2 2/2] bsp/xilinx-zynq: Add device configuration driver

[PATCH v2 1/2] bsp/xilinx-zynq: Add SLCR driver

Execution Time of Whetstone on LEON3

[PATCH] sptests/spversion01: New test

Re: Execution Time of Whetstone on LEON3

Re: [PATCH] sptests/spversion01: New test

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