Re: ARM Invalid Code Review Request
Hello Joel,
this is not a GCC bug. There is no BSP that uses the -mthumb
-march=armv6-m yet, so this option is untested. You do you build the
RTEMS multilibs?
On 08/01/15 17:57, Joel Sherrill wrote:
Hi
I think this is actually an RTEMS conditional issue but filed it as
a GCC PR anyway for review.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64542
This was generated building arm-rtems multilib. The PR has a preprocessed
file and can easily reproduce the error.
Feedback appreciated. I suspect we have selected the wrong code based on
the compilation flags or have an invalid multilib combination.
arm-rtems4.11-gcc --pipe -mthumb -march=armv6-m --pipe -DHAVE_CONFIG_H
-I../../.. -I../../../../../../lib/include -g -O2 -Wall
-Wimplicit-function-declaration -Wstrict-prototypes -Wnested-externs -MT
libscorecpu_a-cpu.o -MD -MP -MF .deps/libscorecpu_a-cpu.Tpo -c -o
libscorecpu_a-cpu.o `test -f 'cpu.c' || echo
'/users/joel/test-gcc/rtems/cpukit/score/cpu/arm/'`cpu.c
{standard input}: Assembler messages:
{standard input}:187: Error: selected processor does not support ARM opcodes
{standard input}:188: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `mrsr3 ,cpsr'
{standard input}:189: Error: attempt to use an ARM instruction on a Thumb-only processor --
`bicr3 ,#(1<<7)'
{standard input}:190: Error: attempt to use an ARM instruction on a Thumb-only processor -- `orrr3
,r0
'
{standard input}:191: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `msr cpsr,r3 '
{standard input}:192: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `addr3 ,pc,#1'
{standard input}:193: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `bxr3 '
{standard input}:218: Error: selected processor does not support ARM opcodes
{standard input}:219: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `mrsr0 ,cpsr'
{standard input}:220: Error: attempt to use an ARM instruction on a Thumb-only processor --
`andr0 ,#(1<<7)'
{standard input}:221: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `addr3 ,pc,#1'
{standard input}:222: Error: attempt to use an ARM instruction on a Thumb-only processor
-- `bxr3 '
--
Joel Sherrill, Ph.D. Director of Research & Development
joel.sherr...@oarcorp.com On-Line Applications Research
Ask me about RTEMS: a free RTOS Huntsville AL 35805
Support Available(256) 722-9985
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--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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Re: ARM Invalid Code Review Request
On January 9, 2015 3:05:11 AM CST, Sebastian Huber
wrote:
>Hello Joel,
>
>this is not a GCC bug. There is no BSP that uses the -mthumb
>-march=armv6-m yet, so this option is untested. You do you build the
>RTEMS multilibs?
This turned up building rtems in multilib mode.
So there is at least one GCC multilib which we don't really support.
>
>On 08/01/15 17:57, Joel Sherrill wrote:
>> Hi
>>
>> I think this is actually an RTEMS conditional issue but filed it as
>> a GCC PR anyway for review.
>>
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64542
>>
>> This was generated building arm-rtems multilib. The PR has a
>preprocessed
>> file and can easily reproduce the error.
>>
>> Feedback appreciated. I suspect we have selected the wrong code based
>on
>> the compilation flags or have an invalid multilib combination.
>> arm-rtems4.11-gcc --pipe -mthumb -march=armv6-m --pipe
>-DHAVE_CONFIG_H -I../../.. -I../../../../../../lib/include -g -O2
>-Wall -Wimplicit-function-declaration -Wstrict-prototypes
>-Wnested-externs -MT libscorecpu_a-cpu.o -MD -MP -MF
>.deps/libscorecpu_a-cpu.Tpo -c -o libscorecpu_a-cpu.o `test -f 'cpu.c'
>|| echo '/users/joel/test-gcc/rtems/cpukit/score/cpu/arm/'`cpu.c
>> {standard input}: Assembler messages:
>> {standard input}:187: Error: selected processor does not support ARM
>opcodes
>> {standard input}:188: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `mrsr3
>,cpsr'
>> {standard input}:189: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `bicr3
>,#(1<<7)'
>> {standard input}:190: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `orrr3
>,r0
>'
>> {standard input}:191: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `msr cpsr,r3
>'
>> {standard input}:192: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `addr3
>,pc,#1'
>> {standard input}:193: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `bxr3
>'
>> {standard input}:218: Error: selected processor does not support ARM
>opcodes
>> {standard input}:219: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `mrsr0
>,cpsr'
>> {standard input}:220: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `andr0
>,#(1<<7)'
>> {standard input}:221: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `addr3
>,pc,#1'
>> {standard input}:222: Error: attempt to use an ARM instruction on a
>Thumb-only processor -- `bxr3
>'
>>
>> --
>> Joel Sherrill, Ph.D. Director of Research & Development
>> joel.sherr...@oarcorp.com On-Line Applications Research
>> Ask me about RTEMS: a free RTOS Huntsville AL 35805
>> Support Available(256) 722-9985
>>
>>
>> ___
>> devel mailing list
>> devel@rtems.org
>> http://lists.rtems.org/mailman/listinfo/devel
--joel
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Re: [rtems-tools commit] Add PowerPC patches for GCC 4.9.2
Is this patch on the gcc 4.9 branch and head?
--joel
On 1/9/2015 8:37 AM, Sebastian Huber wrote:
> Module:rtems-tools
> Branch:master
> Commit:3f4717852dddcf8ba56478ba98b9dbda32d87182
> Changeset:
> http://git.rtems.org/rtems-tools/commit/?id=3f4717852dddcf8ba56478ba98b9dbda32d87182
>
> Author:Sebastian Huber
> Date: Fri Jan 9 15:37:25 2015 +0100
>
> Add PowerPC patches for GCC 4.9.2
>
> ---
>
> ...9.2-RTEMS-Add-e6500-multilibs-for-PowerPC.patch | 71 ++
> ...2-RTEMS-Fix-MPC8540-multilibs-for-PowerPC.patch | 45 +
> ...2-RTEMS-Use-MULTILIB_REQUIRED-for-PowerPC.patch | 102
> +
> 3 files changed, 218 insertions(+)
>
> diff --git
> a/tools/4.11/gcc/powerpc/gcc-4.9.2-RTEMS-Add-e6500-multilibs-for-PowerPC.patch
>
> b/tools/4.11/gcc/powerpc/gcc-4.9.2-RTEMS-Add-e6500-multilibs-for-PowerPC.patch
> new file mode 100644
> index 000..440e05d
> --- /dev/null
> +++
> b/tools/4.11/gcc/powerpc/gcc-4.9.2-RTEMS-Add-e6500-multilibs-for-PowerPC.patch
> @@ -0,0 +1,71 @@
> +From febe0c54031b437f713716251d6788dd481d5229 Mon Sep 17 00:00:00 2001
> +From: sh
> +Date: Fri, 9 Jan 2015 14:19:47 +
> +Subject: [PATCH 3/3] RTEMS: Add e6500 multilibs for PowerPC
> +
> +Use 32-bit instructions only since currently there is no demand for a
> +larger address space. Provide one multilib with FPU and AltiVec support
> +and one without.
> +
> +gcc/ChangeLog
> +
> + * config/rs6000/rtems.h (CPP_OS_RTEMS_SPEC): Define __PPC_CPU_E6500__
> + for -mcpu=e6500.
> + * config/rs6000/t-rtems: Add e6500 multilibs.
> +
> +
> +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@219391
> 138bc75d-0d04-0410-961f-82ee72b054a4
> +---
> + gcc/config/rs6000/rtems.h | 3 ++-
> + gcc/config/rs6000/t-rtems | 13 +
> + 3 files changed, 20 insertions(+), 5 deletions(-)
> +
> +diff --git a/gcc/config/rs6000/rtems.h b/gcc/config/rs6000/rtems.h
> +index 2402d53..0464880 100644
> +--- a/gcc/config/rs6000/rtems.h
> b/gcc/config/rs6000/rtems.h
> +@@ -52,7 +52,8 @@
> + %{mcpu=750: %{!Dppc*: %{!Dmpc*: -Dmpc750} } } \
> + %{mcpu=821: %{!Dppc*: %{!Dmpc*: -Dmpc821} } } \
> + %{mcpu=860: %{!Dppc*: %{!Dmpc*: -Dmpc860} } } \
> +-%{mcpu=8540: %{!Dppc*: %{!Dmpc*: -Dppc8540} } }"
> ++%{mcpu=8540: %{!Dppc*: %{!Dmpc*: -Dppc8540} } } \
> ++%{mcpu=e6500: -D__PPC_CPU_E6500__}"
> +
> + #undef SUBSUBTARGET_EXTRA_SPECS
> + #define SUBSUBTARGET_EXTRA_SPECS \
> +diff --git a/gcc/config/rs6000/t-rtems b/gcc/config/rs6000/t-rtems
> +index e935947..eadda0d 100644
> +--- a/gcc/config/rs6000/t-rtems
> b/gcc/config/rs6000/t-rtems
> +@@ -24,14 +24,17 @@ MULTILIB_MATCHES =
> + MULTILIB_EXCEPTIONS =
> + MULTILIB_REQUIRED =
> +
> +-MULTILIB_OPTIONS +=
> mcpu=403/mcpu=505/mcpu=603e/mcpu=604/mcpu=860/mcpu=7400/mcpu=8540
> +-MULTILIB_DIRNAMES += m403 m505 m603e m604 m860 m7400 m8540
> ++MULTILIB_OPTIONS +=
> mcpu=403/mcpu=505/mcpu=603e/mcpu=604/mcpu=860/mcpu=7400/mcpu=8540/mcpu=e6500
> ++MULTILIB_DIRNAMES += m403 m505 m603e m604 m860 m7400 m8540 me6500
> ++
> ++MULTILIB_OPTIONS += m32
> ++MULTILIB_DIRNAMES += m32
> +
> + MULTILIB_OPTIONS += msoft-float/mfloat-gprs=double
> + MULTILIB_DIRNAMES += nof gprsdouble
> +
> +-MULTILIB_OPTIONS += mno-spe
> +-MULTILIB_DIRNAMES += nospe
> ++MULTILIB_OPTIONS += mno-spe/mno-altivec
> ++MULTILIB_DIRNAMES += nospe noaltivec
> +
> + MULTILIB_MATCHES+= ${MULTILIB_MATCHES_ENDIAN}
> + MULTILIB_MATCHES+= ${MULTILIB_MATCHES_SYSV}
> +@@ -72,3 +75,5 @@ MULTILIB_REQUIRED += mcpu=8540
> + MULTILIB_REQUIRED += mcpu=8540/msoft-float/mno-spe
> + MULTILIB_REQUIRED += mcpu=8540/mfloat-gprs=double
> + MULTILIB_REQUIRED += mcpu=860
> ++MULTILIB_REQUIRED += mcpu=e6500/m32
> ++MULTILIB_REQUIRED += mcpu=e6500/m32/msoft-float/mno-altivec
> +--
> +1.8.4.5
> +
> diff --git
> a/tools/4.11/gcc/powerpc/gcc-4.9.2-RTEMS-Fix-MPC8540-multilibs-for-PowerPC.patch
>
> b/tools/4.11/gcc/powerpc/gcc-4.9.2-RTEMS-Fix-MPC8540-multilibs-for-PowerPC.patch
> new file mode 100644
> index 000..7dd5fd0
> --- /dev/null
> +++
> b/tools/4.11/gcc/powerpc/gcc-4.9.2-RTEMS-Fix-MPC8540-multilibs-for-PowerPC.patch
> @@ -0,0 +1,45 @@
> +From c2c78a7d98b9349ea96e860e094e4a97ba0b5842 Mon Sep 17 00:00:00 2001
> +From: sh
> +Date: Fri, 9 Jan 2015 14:18:35 +
> +Subject: [PATCH 2/3] RTEMS: Fix MPC8540 multilibs for PowerPC
> +
> +GCC generates SPE instructions even if -msoft-float is specified.
> +Explicitly add -mno-spe to prevent generation of SPE instructions. This
> +multilib variant must not lead to a usage of the SPE.
> +
> +gcc/ChangeLog
> +
> + * config/rs6000/t-rtems: Add -mno-spe to soft-float multilib for
> + MPC8540.
> +
> +
> +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@219390
> 138bc75d-0d04-0410-961f-82ee72b054a4
> +---
> + gcc/config/rs6000/t-rtems | 5 -
> + 2 files changed, 12 insertions(+), 1 deletion(-)
> +
> +diff --git a/gcc/config/rs6000/t-rtems b/gcc/config/rs6000/t-rtems
> +index 3ebcfaa..e935947 10064
Re: [rtems-tools commit] Add PowerPC patches for GCC 4.9.2
On 01/09/2015 04:34 PM, Joel Sherrill wrote: Is this patch on the gcc 4.9 branch and head? Yes, I committed this today. It is for the e6500 processor support used by the Freescale T-Series (e.g. T4240). It is a 64-bit PowerPC core with an AltiVec unit and FPU. We use currently only the 32-bit mode, since we don't need more than 4GiB RAM. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [rtems-tools commit] Add PowerPC patches for GCC 4.9.2
On 1/9/2015 11:04 AM, Sebastian Huber wrote: > On 01/09/2015 04:34 PM, Joel Sherrill wrote: >> Is this patch on the gcc 4.9 branch and head? > Yes, I committed this today. It is for the e6500 processor support used > by the Freescale T-Series (e.g. T4240). It is a 64-bit PowerPC core with > an AltiVec unit and FPU. We use currently only the 32-bit mode, since we > don't need more than 4GiB RAM. > Thanks. I am just trying to make sure we are on a path to settling the tools for 4.11 soon. I did a lot of gcc building and PR filing over the holidays. :( -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] dtc: Update to dtc 1.4.1 and use it on moxie
The site referenced in the 1.2.x configuration is no longer accessible.
The new configuration gives both an updated version and a more
permanent location.
---
bare/config/devel/dtc-1.4.1.cfg | 18 ++
rtems/config/4.11/rtems-moxie.bset | 2 +-
rtems/config/unstable/4.11/rtems-moxie.bset | 2 +-
3 files changed, 20 insertions(+), 2 deletions(-)
create mode 100644 bare/config/devel/dtc-1.4.1.cfg
diff --git a/bare/config/devel/dtc-1.4.1.cfg b/bare/config/devel/dtc-1.4.1.cfg
new file mode 100644
index 000..eb6cb13
--- /dev/null
+++ b/bare/config/devel/dtc-1.4.1.cfg
@@ -0,0 +1,18 @@
+#
+# DTC (Device Tree Compiler) 1.4.1
+#
+
+%if %{release} == %{nil}
+%define release 1
+%endif
+
+%include %{_configdir}/base.cfg
+
+%define dtc_version 1.4.1
+
+%hash md5 dtc-%{dtc_version}.tar.gz 629851794f9fc494067d3c02e33068c3
+
+#
+# The DTC build instructions. We use 1.x.x Release 1.
+#
+%include %{_configdir}/dtc-1-1.cfg
diff --git a/rtems/config/4.11/rtems-moxie.bset
b/rtems/config/4.11/rtems-moxie.bset
index d4f7a45..ed3fed2 100644
--- a/rtems/config/4.11/rtems-moxie.bset
+++ b/rtems/config/4.11/rtems-moxie.bset
@@ -21,7 +21,7 @@
#
4.11/rtems-autotools
devel/expat-2.1.0-1
-devel/dtc-1.2.0
+devel/dtc-1.4.1
tools/rtems-binutils-2.24-1
tools/rtems-gcc-4.9.2-newlib-git-1
tools/rtems-gdb-7.7-1
diff --git a/rtems/config/unstable/4.11/rtems-moxie.bset
b/rtems/config/unstable/4.11/rtems-moxie.bset
index 51fde47..be78b0d 100644
--- a/rtems/config/unstable/4.11/rtems-moxie.bset
+++ b/rtems/config/unstable/4.11/rtems-moxie.bset
@@ -15,7 +15,7 @@
# Tools configuration.
#
expat-2.1.0-1
-dtc-1.2.0
+dtc-1.4.1
tools/rtems-binutils-2.22-1
tools/rtems-gcc-4.8-ss-newlib-2.0.0-1
tools/rtems-gdb-7.5.1-1
--
1.9.3
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