On January 9, 2015 3:05:11 AM CST, Sebastian Huber <sebastian.hu...@embedded-brains.de> wrote: >Hello Joel, > >this is not a GCC bug. There is no BSP that uses the -mthumb >-march=armv6-m yet, so this option is untested. You do you build the >RTEMS multilibs?
This turned up building rtems in multilib mode. So there is at least one GCC multilib which we don't really support. > >On 08/01/15 17:57, Joel Sherrill wrote: >> Hi >> >> I think this is actually an RTEMS conditional issue but filed it as >> a GCC PR anyway for review. >> >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64542 >> >> This was generated building arm-rtems multilib. The PR has a >preprocessed >> file and can easily reproduce the error. >> >> Feedback appreciated. I suspect we have selected the wrong code based >on >> the compilation flags or have an invalid multilib combination. >> arm-rtems4.11-gcc --pipe -mthumb -march=armv6-m --pipe >-DHAVE_CONFIG_H -I../../.. -I../../../../../../lib/include -g -O2 >-Wall -Wimplicit-function-declaration -Wstrict-prototypes >-Wnested-externs -MT libscorecpu_a-cpu.o -MD -MP -MF >.deps/libscorecpu_a-cpu.Tpo -c -o libscorecpu_a-cpu.o `test -f 'cpu.c' >|| echo '/users/joel/test-gcc/rtems/cpukit/score/cpu/arm/'`cpu.c >> {standard input}: Assembler messages: >> {standard input}:187: Error: selected processor does not support ARM >opcodes >> {standard input}:188: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `mrsr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>,cpsr' >> {standard input}:189: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `bicr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>,#(1<<7)' >> {standard input}:190: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `orrr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>,r0 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=0>' >> {standard input}:191: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `msr cpsr,r3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>' >> {standard input}:192: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `addr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>,pc,#1' >> {standard input}:193: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `bxr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>' >> {standard input}:218: Error: selected processor does not support ARM >opcodes >> {standard input}:219: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `mrsr0 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=0>,cpsr' >> {standard input}:220: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `andr0 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=0>,#(1<<7)' >> {standard input}:221: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `addr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>,pc,#1' >> {standard input}:222: Error: attempt to use an ARM instruction on a >Thumb-only processor -- `bxr3 ><http://gcc.gnu.org/viewcvs/gcc?view=revision&revision=3>' >> >> -- >> Joel Sherrill, Ph.D. Director of Research & Development >> joel.sherr...@oarcorp.com On-Line Applications Research >> Ask me about RTEMS: a free RTOS Huntsville AL 35805 >> Support Available (256) 722-9985 >> >> >> _______________________________________________ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel --joel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
