[PATCH 1/2] dosfs: Support ctime and mtime
Implement ctime and mtime updates according to POSIX as far as possible.
The ctime is mapped to the FAT create time and date. The mtime is
mapped to the FAT last modified time and date. For the atime use the
mtime.
---
cpukit/libfs/src/dosfs/fat_file.c| 34 +
cpukit/libfs/src/dosfs/fat_file.h| 33 +
cpukit/libfs/src/dosfs/msdos.h | 22 +-
cpukit/libfs/src/dosfs/msdos_create.c| 12 ++--
cpukit/libfs/src/dosfs/msdos_dir.c | 2 +
cpukit/libfs/src/dosfs/msdos_file.c | 76 +++-
cpukit/libfs/src/dosfs/msdos_handlers_file.c | 2 +-
cpukit/libfs/src/dosfs/msdos_init.c | 18 -
cpukit/libfs/src/dosfs/msdos_misc.c | 100 ---
9 files changed, 166 insertions(+), 133 deletions(-)
diff --git a/cpukit/libfs/src/dosfs/fat_file.c
b/cpukit/libfs/src/dosfs/fat_file.c
index 2899f1b..a1f77fa 100644
--- a/cpukit/libfs/src/dosfs/fat_file.c
+++ b/cpukit/libfs/src/dosfs/fat_file.c
@@ -165,6 +165,38 @@ fat_file_reopen(fat_file_fd_t *fat_fd)
return RC_OK;
}
+int
+fat_file_update(fat_fs_info_t *fs_info, fat_file_fd_t *fat_fd)
+{
+int ret_rc = RC_OK;
+
+/*
+ * if fat-file descriptor is not marked as "removed", synchronize
+ * size, first cluster number, write time and date fields of the file
+ */
+if (!FAT_FILE_IS_REMOVED(fat_fd))
+{
+int rc;
+
+if (fat_fd->fat_file_type == FAT_FILE)
+{
+rc = fat_file_set_first_cluster_num(fs_info, fat_fd);
+if (rc != RC_OK)
+ret_rc = rc;
+
+rc = fat_file_set_file_size(fs_info, fat_fd);
+if (rc != RC_OK)
+ret_rc = rc;
+}
+
+rc = fat_file_set_time_and_date(fs_info, fat_fd);
+if (rc != RC_OK)
+ret_rc = rc;
+}
+
+return ret_rc;
+}
+
/* fat_file_close --
* Close fat-file. If count of links to fat-file
* descriptor is greater than 1 (i.e. somebody esle holds pointer
@@ -204,6 +236,8 @@ fat_file_close(
{
uint32_t key = fat_construct_key(fs_info, &fat_fd->dir_pos.sname);
+fat_file_update(fs_info, fat_fd);
+
if (fat_fd->flags & FAT_FILE_REMOVED)
{
rc = fat_file_truncate(fs_info, fat_fd, 0);
diff --git a/cpukit/libfs/src/dosfs/fat_file.h
b/cpukit/libfs/src/dosfs/fat_file.h
index 79af62a..fa177f6 100644
--- a/cpukit/libfs/src/dosfs/fat_file.h
+++ b/cpukit/libfs/src/dosfs/fat_file.h
@@ -22,6 +22,7 @@
#include
#include
+#include
#include
#include "fat.h"
@@ -88,6 +89,7 @@ typedef struct fat_file_fd_s
fat_dir_pos_tdir_pos;
uint8_t flags;
fat_file_map_t map;
+time_t ctime;
time_t mtime;
} fat_file_fd_t;
@@ -139,6 +141,17 @@ fat_construct_key(
((pos->ofs >> 5) & (FAT_DIRENTRIES_PER_SEC512 - 1)) );
}
+static inline void fat_file_update_ctime(fat_file_fd_t *fat_fd, time_t t)
+{
+ fat_fd->ctime = t;
+}
+
+static inline void fat_file_update_ctime_mtime(fat_file_fd_t *fat_fd, time_t t)
+{
+ fat_fd->ctime = t;
+ fat_fd->mtime = t;
+}
+
/* Prototypes for "fat-file" operations */
int
fat_file_open(fat_fs_info_t *fs_info,
@@ -192,6 +205,26 @@ void
fat_file_mark_removed(fat_fs_info_t*fs_info,
fat_file_fd_t*fat_fd);
+int
+fat_file_size(fat_fs_info_t*fs_info,
+ fat_file_fd_t*fat_fd);
+
+int
+fat_file_set_first_cluster_num(fat_fs_info_t *fs_info,
+ fat_file_fd_t *fat_fd);
+
+int
+fat_file_set_file_size(fat_fs_info_t *fs_info,
+ fat_file_fd_t *fat_fd);
+
+int
+fat_file_set_time_and_date(fat_fs_info_t *fs_info,
+ fat_file_fd_t *fat_fd);
+
+int
+fat_file_update(fat_fs_info_t *fs_info,
+fat_file_fd_t *fat_fd);
+
#ifdef __cplusplus
}
#endif
diff --git a/cpukit/libfs/src/dosfs/msdos.h b/cpukit/libfs/src/dosfs/msdos.h
index bb191fe..baa34d7 100644
--- a/cpukit/libfs/src/dosfs/msdos.h
+++ b/cpukit/libfs/src/dosfs/msdos.h
@@ -134,6 +134,8 @@ typedef rtems_filesystem_node_types_t msdos_node_type_t;
#define MSDOS_FILE_WDATE_OFFSET 24
#define MSDOS_FILE_WTIME_OFFSET 22
#define MSDOS_FILE_ADATE_OFFSET 18
+#define MSDOS_FILE_CDATE_OFFSET 16
+#define MSDOS_FILE_CTIME_OFFSET 14
/*
* Possible values of DIR_Attr field of 32 bytes long FAT Directory Entry
@@ -333,8 +335,6 @@ int msdos_initialize_support(
rtems_dosfs_convert_control *converter
);
-int msdos_file_close(rtems_libio_t *iop /* IN */);
-
ssize_t msdos_file_read(
rtems_libio_t *iop, /* IN */
void *buffer, /* IN */
@@ -360,8 +360,6 @@ msdos_file_ftruncate(
int msdos_file_sync(rtems_libio_t *iop);
-int msdos_file_da
[PATCH 2/2] Revert "fstests/mdosfs_fstime: Remove test"
This reverts commit bdcf4102f71d1bc2a50f23d2d425d85c24ec0900. --- testsuites/fstests/Makefile.am | 1 + testsuites/fstests/configure.ac | 1 + testsuites/fstests/mdosfs_fstime/Makefile.am | 33 3 files changed, 35 insertions(+) create mode 100644 testsuites/fstests/mdosfs_fstime/Makefile.am diff --git a/testsuites/fstests/Makefile.am b/testsuites/fstests/Makefile.am index 9540256..404966c 100644 --- a/testsuites/fstests/Makefile.am +++ b/testsuites/fstests/Makefile.am @@ -24,6 +24,7 @@ _SUBDIRS += mdosfs_fserror _SUBDIRS += mdosfs_fspatheval _SUBDIRS += mdosfs_fsrdwr _SUBDIRS += mdosfs_fsstatvfs +_SUBDIRS += mdosfs_fstime _SUBDIRS += mimfs_fserror _SUBDIRS += mimfs_fslink _SUBDIRS += mimfs_fspatheval diff --git a/testsuites/fstests/configure.ac b/testsuites/fstests/configure.ac index e1337cb..4ad8b78 100644 --- a/testsuites/fstests/configure.ac +++ b/testsuites/fstests/configure.ac @@ -100,6 +100,7 @@ mdosfs_fserror/Makefile mdosfs_fspatheval/Makefile mdosfs_fsrdwr/Makefile mdosfs_fsstatvfs/Makefile +mdosfs_fstime/Makefile mimfs_fserror/Makefile mimfs_fslink/Makefile mimfs_fspatheval/Makefile diff --git a/testsuites/fstests/mdosfs_fstime/Makefile.am b/testsuites/fstests/mdosfs_fstime/Makefile.am new file mode 100644 index 000..14f58c5 --- /dev/null +++ b/testsuites/fstests/mdosfs_fstime/Makefile.am @@ -0,0 +1,33 @@ + +rtems_tests_PROGRAMS = mdosfs_fstime +mdosfs_fstime_SOURCES = ../fstime/test.c +mdosfs_fstime_SOURCES += ../support/ramdisk_support.c +mdosfs_fstime_SOURCES += ../support/fstest_support.c +mdosfs_fstime_SOURCES += ../support/fstest_support.h +mdosfs_fstime_SOURCES += ../support/ramdisk_support.h +mdosfs_fstime_SOURCES += ../support/fstest.h +mdosfs_fstime_SOURCES += ../../psxtests/include/pmacros.h +mdosfs_fstime_SOURCES += ../mdosfs_support/fs_support.c +mdosfs_fstime_SOURCES += ../mdosfs_support/fs_config.h + +#dist_rtems_tests_DATA = mdosfs_fstime.scn +#dist_rtems_tests_DATA += mdosfs_fstime.doc + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(top_srcdir)/../automake/compile.am +include $(top_srcdir)/../automake/leaf.am + + +AM_CPPFLAGS += -I$(top_srcdir)/support +AM_CPPFLAGS += -I$(top_srcdir)/mdosfs_support +AM_CPPFLAGS += -I$(top_srcdir)/../support/include +AM_CPPFLAGS += -I$(top_srcdir)/../psxtests/include + +LINK_OBJS = $(mdosfs_fstime_OBJECTS) +LINK_LIBS = $(mdosfs_fstime_LDLIBS) + +mdosfs_fstime$(EXEEXT): $(mdosfs_fstime_OBJECTS) $(mdosfs_fstime_DEPENDENCIES) + @rm -f mdosfs_fstime$(EXEEXT) + $(make-exe) + +include $(top_srcdir)/../automake/local.am -- 1.8.4.5 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
PowerPC Cache Warning Help Request
Hi This is a plea to get folks with PowerPC experience to look at a single file and see if they can improve the conditionals. The change will be easy. It is just a matter of knowing the answer or having a manual handy. The way my script counts unique warnings, it looks like 29 of the 168 unique warnings are actually from one file!!! ./powerpc/shared/src/cache_.h has conditional logic which matches a lot of PowerPC's but misses a lot. My suspicion is that most of the following BSPs have CPUs which are really covered by one of the cache method implementations but no one has updated the file to catch the CPU models. The list of 56 BSP's [1] looks longer than the number of CPU variants. Doing some grep's, the list of CPU models not covered by the conditionals is only 10. e500 mpc555 mpc55xx mpc604 mpc7400 mpc7455 mpc750 ppc405 ppc440 qoriq FWIW the powerpc/t32mppc does not set RTEMS_CPU_MODEL. That is another problem since that doesn't trip the cache logic either. It would be really appreciated if the various people using PowerPC BSPs would take a look at this. Thanks. [1] The full BSP list is: powerpc-beatnik powerpc-gwlcfm powerpc-haleakala powerpc-mcp750 powerpc-mpc5566evb powerpc-mpc5566evb_spe powerpc-mpc5643l_dpu powerpc-mpc5643l_evb powerpc-mpc5668g powerpc-mpc5674f_ecu508_app powerpc-mpc5674f_ecu508_boot powerpc-mpc5674fevb powerpc-mpc5674fevb_spe powerpc-mpc5674f_rsm6 powerpc-mvme2307 powerpc-mvme3100 powerpc-mvme5500 powerpc-phycore_mpc5554 powerpc-qemuprep-altivec powerpc-qemuprep powerpc-qoriq_core_0 powerpc-qoriq_core_1 powerpc-qoriq_p1020rdb powerpc-ss555 powerpc-t32mppc powerpc-virtex4 powerpc-virtex5 powerpc-virtex -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
Since nobody missed the unimplemented cache manager functions in several years it should be safe so simply remove this #warning. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: STM32F4 register definitions and PLL settings patch
Hello Chris, I have currently no time to review this or follow your discussion. Please ping me if you have something final to commit. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: x86 interpreter and NOVA hypervisor - Was: [PATCH] do_it
Hello Gedare and others, On Sunday 19 of October 2014 15:01:08 Gedare Bloom wrote: > On Sun, Oct 19, 2014 at 7:48 AM, Pavel Pisa ... > >set interpreter in RTEMS which would allow to run BIOS x86 > >real code sandboxed and with additional memory ranges protection > >and with minimal impact on other RT code running in parallel. > >This would be nice to do, allows to use x86 PCI VESA BIOS cards > >on other PCI enabled architectures but it is above our current > >capabilities and time constraints. On the other hand we can provide > >example from NOVA microkernel which achieved and uses this goal. > > This last option seems quite interesting. Can you link to the example > or any doc on how it is done? The x86 interpreter used for BIOS, VBE and other untrusted HW related code indirect execution is part of NOVA hypervisor. The source code of the executor is there https://github.com/TUD-OS/seoul/tree/master/executor The executor is written in C++ and significant part of source code for x86 instruction decoding is build with use of python script and GNU binutils. The code is GPL licensed but there is some chance to negotiate RTEMS required exception. My colleague - Michal Sojka - has worked with these people and have contact to them. As for the related hypervisor and kernel project, it would be interresting to combine RTEMS and NOVA hypervisor http://hypervisor.org/ for some kinds of applications. My colleague looks for some research project which would allow to cooperate on porting NOVA to ARM/AArch64 and or to combine NOVA with RTEMS. RTEMS porting to AArch 64 would be interresting for me as well. But these are kinds of projects which we cannot start from enthusiasm only. They require funding - i.e. larger research project, consortium, strong company contract etc. to pay required man years of work. Best wishes, Pavel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
On October 20, 2014 9:41:57 AM CDT, Sebastian Huber wrote: >Since nobody missed the unimplemented cache manager functions in >several years >it should be safe so simply remove this #warning. You didn't notice it for qoriq or e500 so years is an exaggeration for some models. Take a look at the BSPs impacted. I don't care particularly about older CPU models but some are recent and should be addressed. After that dropping the warning is OK by me. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
On 20/10/14 16:58, Joel Sherrill wrote: On October 20, 2014 9:41:57 AM CDT, Sebastian Huber wrote: Since nobody missed the unimplemented cache manager functions in several years it should be safe so simply remove this #warning. You didn't notice it for qoriq or e500 so years is an exaggeration for some models. The QorIQ BSP is from 2011. Take a look at the BSPs impacted. I don't care particularly about older CPU models but some are recent and should be addressed. After that dropping the warning is OK by me. The useful functions are implemented and in case someone really needs the exotic ones he should notice it if the function is a simple "blr". -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
On 10/20/2014 10:08 AM, Sebastian Huber wrote: > On 20/10/14 16:58, Joel Sherrill wrote: >> >> On October 20, 2014 9:41:57 AM CDT, Sebastian Huber >> wrote: >>> Since nobody missed the unimplemented cache manager functions in >>> several years >>> it should be safe so simply remove this #warning. >> You didn't notice it for qoriq or e500 so years is an exaggeration for some >> models. > The QorIQ BSP is from 2011. > >> Take a look at the BSPs impacted. I don't care particularly about older CPU >> models but some are recent and should be addressed. >> >> After that dropping the warning is OK by me. >> > The useful functions are implemented and in case someone really needs the > exotic ones he should notice it if the function is a simple "blr". > OK. I will just remove the warning. Do we want to add a PR or Open Project idea for this? -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
Cache manager implementations are a perennial open project. On Mon, Oct 20, 2014 at 11:19 AM, Joel Sherrill wrote: > > On 10/20/2014 10:08 AM, Sebastian Huber wrote: >> On 20/10/14 16:58, Joel Sherrill wrote: >>> >>> On October 20, 2014 9:41:57 AM CDT, Sebastian Huber >>> wrote: Since nobody missed the unimplemented cache manager functions in several years it should be safe so simply remove this #warning. >>> You didn't notice it for qoriq or e500 so years is an exaggeration for some >>> models. >> The QorIQ BSP is from 2011. >> >>> Take a look at the BSPs impacted. I don't care particularly about older CPU >>> models but some are recent and should be addressed. >>> >>> After that dropping the warning is OK by me. >>> >> The useful functions are implemented and in case someone really needs the >> exotic ones he should notice it if the function is a simple "blr". >> > OK. I will just remove the warning. > > Do we want to add a PR or Open Project idea for this? > > -- > Joel Sherrill, Ph.D. Director of Research & Development > joel.sherr...@oarcorp.comOn-Line Applications Research > Ask me about RTEMS: a free RTOS Huntsville AL 35805 > Support Available(256) 722-9985 > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/2] dosfs: Support ctime and mtime
What does it mean "as far as possible"?
On Mon, Oct 20, 2014 at 10:24 AM, Sebastian Huber
wrote:
> Implement ctime and mtime updates according to POSIX as far as possible.
> The ctime is mapped to the FAT create time and date. The mtime is
> mapped to the FAT last modified time and date. For the atime use the
> mtime.
> ---
> cpukit/libfs/src/dosfs/fat_file.c| 34 +
> cpukit/libfs/src/dosfs/fat_file.h| 33 +
> cpukit/libfs/src/dosfs/msdos.h | 22 +-
> cpukit/libfs/src/dosfs/msdos_create.c| 12 ++--
> cpukit/libfs/src/dosfs/msdos_dir.c | 2 +
> cpukit/libfs/src/dosfs/msdos_file.c | 76 +++-
> cpukit/libfs/src/dosfs/msdos_handlers_file.c | 2 +-
> cpukit/libfs/src/dosfs/msdos_init.c | 18 -
> cpukit/libfs/src/dosfs/msdos_misc.c | 100
> ---
> 9 files changed, 166 insertions(+), 133 deletions(-)
>
> diff --git a/cpukit/libfs/src/dosfs/fat_file.c
> b/cpukit/libfs/src/dosfs/fat_file.c
> index 2899f1b..a1f77fa 100644
> --- a/cpukit/libfs/src/dosfs/fat_file.c
> +++ b/cpukit/libfs/src/dosfs/fat_file.c
> @@ -165,6 +165,38 @@ fat_file_reopen(fat_file_fd_t *fat_fd)
> return RC_OK;
> }
>
> +int
> +fat_file_update(fat_fs_info_t *fs_info, fat_file_fd_t *fat_fd)
> +{
> +int ret_rc = RC_OK;
> +
> +/*
> + * if fat-file descriptor is not marked as "removed", synchronize
> + * size, first cluster number, write time and date fields of the file
> + */
> +if (!FAT_FILE_IS_REMOVED(fat_fd))
> +{
> +int rc;
> +
> +if (fat_fd->fat_file_type == FAT_FILE)
> +{
> +rc = fat_file_set_first_cluster_num(fs_info, fat_fd);
> +if (rc != RC_OK)
> +ret_rc = rc;
> +
> +rc = fat_file_set_file_size(fs_info, fat_fd);
> +if (rc != RC_OK)
> +ret_rc = rc;
> +}
> +
> +rc = fat_file_set_time_and_date(fs_info, fat_fd);
> +if (rc != RC_OK)
> +ret_rc = rc;
> +}
> +
> +return ret_rc;
> +}
> +
> /* fat_file_close --
> * Close fat-file. If count of links to fat-file
> * descriptor is greater than 1 (i.e. somebody esle holds pointer
> @@ -204,6 +236,8 @@ fat_file_close(
> {
> uint32_t key = fat_construct_key(fs_info, &fat_fd->dir_pos.sname);
>
> +fat_file_update(fs_info, fat_fd);
> +
> if (fat_fd->flags & FAT_FILE_REMOVED)
> {
> rc = fat_file_truncate(fs_info, fat_fd, 0);
> diff --git a/cpukit/libfs/src/dosfs/fat_file.h
> b/cpukit/libfs/src/dosfs/fat_file.h
> index 79af62a..fa177f6 100644
> --- a/cpukit/libfs/src/dosfs/fat_file.h
> +++ b/cpukit/libfs/src/dosfs/fat_file.h
> @@ -22,6 +22,7 @@
> #include
> #include
>
> +#include
> #include
>
> #include "fat.h"
> @@ -88,6 +89,7 @@ typedef struct fat_file_fd_s
> fat_dir_pos_tdir_pos;
> uint8_t flags;
> fat_file_map_t map;
> +time_t ctime;
> time_t mtime;
>
> } fat_file_fd_t;
> @@ -139,6 +141,17 @@ fat_construct_key(
>((pos->ofs >> 5) & (FAT_DIRENTRIES_PER_SEC512 - 1)) );
> }
>
> +static inline void fat_file_update_ctime(fat_file_fd_t *fat_fd, time_t t)
> +{
> + fat_fd->ctime = t;
> +}
> +
> +static inline void fat_file_update_ctime_mtime(fat_file_fd_t *fat_fd, time_t
> t)
> +{
> + fat_fd->ctime = t;
> + fat_fd->mtime = t;
> +}
> +
> /* Prototypes for "fat-file" operations */
> int
> fat_file_open(fat_fs_info_t *fs_info,
> @@ -192,6 +205,26 @@ void
> fat_file_mark_removed(fat_fs_info_t*fs_info,
>fat_file_fd_t*fat_fd);
>
> +int
> +fat_file_size(fat_fs_info_t*fs_info,
> + fat_file_fd_t*fat_fd);
> +
> +int
> +fat_file_set_first_cluster_num(fat_fs_info_t *fs_info,
> + fat_file_fd_t *fat_fd);
> +
> +int
> +fat_file_set_file_size(fat_fs_info_t *fs_info,
> + fat_file_fd_t *fat_fd);
> +
> +int
> +fat_file_set_time_and_date(fat_fs_info_t *fs_info,
> + fat_file_fd_t *fat_fd);
> +
> +int
> +fat_file_update(fat_fs_info_t *fs_info,
> +fat_file_fd_t *fat_fd);
> +
> #ifdef __cplusplus
> }
> #endif
> diff --git a/cpukit/libfs/src/dosfs/msdos.h b/cpukit/libfs/src/dosfs/msdos.h
> index bb191fe..baa34d7 100644
> --- a/cpukit/libfs/src/dosfs/msdos.h
> +++ b/cpukit/libfs/src/dosfs/msdos.h
> @@ -134,6 +134,8 @@ typedef rtems_filesystem_node_types_t msdos_node_type_t;
> #define MSDOS_FILE_WDATE_OFFSET 24
> #define MSDOS_FILE_WTIME_OFFSET 22
> #define MSDOS_FILE_ADATE_OFFSET 18
> +#define MSDOS_FILE_CDATE_OFFSET 16
> +#define MSDOS_FILE_CTIME_OFFSET 14
>
> /*
> * Possible values of DIR_Attr field of 32 bytes long FAT Directory Entry
> @@
Re: PowerPC Cache Warning Help Request
On 10/20/2014 12:09 PM, Gedare Bloom wrote: > Cache manager implementations are a perennial open project. +1 In this case,we only have ten RTEMS_CPU_MODELs which are not addressed. There are currently two blocks of code in the file. One is protected by this: #if defined(ppc603) || defined(ppc603e) || defined(mpc8260) And the other by this: #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) ) My guess with no research is that the first block of code is also appropriate for these RTEMS_CPU_MODELs: e500 mpc604 mpc7400 mpc7455 mpc750 qoriq mpc55xx A quick google makes me pretty confident that the mpc690 and mpc7* models belong in the ppc603 HID0 block. I do not have a guess about these ppc405 ppc440 mpc555 If we have to implement code to support something new, then I don't want to do it. If we have the code and just need to check to see if more needs to be added to the conditional, then we should. --joel > On Mon, Oct 20, 2014 at 11:19 AM, Joel Sherrill > wrote: >> On 10/20/2014 10:08 AM, Sebastian Huber wrote: >>> On 20/10/14 16:58, Joel Sherrill wrote: On October 20, 2014 9:41:57 AM CDT, Sebastian Huber wrote: > Since nobody missed the unimplemented cache manager functions in > several years > it should be safe so simply remove this #warning. You didn't notice it for qoriq or e500 so years is an exaggeration for some models. >>> The QorIQ BSP is from 2011. >>> Take a look at the BSPs impacted. I don't care particularly about older CPU models but some are recent and should be addressed. After that dropping the warning is OK by me. >>> The useful functions are implemented and in case someone really needs the >>> exotic ones he should notice it if the function is a simple "blr". >>> >> OK. I will just remove the warning. >> >> Do we want to add a PR or Open Project idea for this? >> >> -- >> Joel Sherrill, Ph.D. Director of Research & Development >> joel.sherr...@oarcorp.comOn-Line Applications Research >> Ask me about RTEMS: a free RTOS Huntsville AL 35805 >> Support Available(256) 722-9985 >> >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
If you do the legwork now, they could make reasonable GCI tasks if we decide to participate and are accepted. -Gedare On Mon, Oct 20, 2014 at 1:20 PM, Joel Sherrill wrote: > > On 10/20/2014 12:09 PM, Gedare Bloom wrote: >> Cache manager implementations are a perennial open project. > +1 > > In this case,we only have ten RTEMS_CPU_MODELs which are not > addressed. There are currently two blocks of code in the file. One > is protected by this: > > #if defined(ppc603) || defined(ppc603e) || defined(mpc8260) > > And the other by this: > > #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) ) > > My guess with no research is that the first block of code is also > appropriate for these RTEMS_CPU_MODELs: > > e500 > mpc604 > mpc7400 mpc7455 mpc750 > qoriq > mpc55xx > > A quick google makes me pretty confident that the mpc690 and mpc7* models > belong in the ppc603 HID0 block. > > I do not have a guess about these > > ppc405 ppc440 mpc555 > > If we have to implement code to support something new, then I don't want > to do it. If we have the code and just need to check to see if more needs to > be added to the conditional, then we should. > > --joel > >> On Mon, Oct 20, 2014 at 11:19 AM, Joel Sherrill >> wrote: >>> On 10/20/2014 10:08 AM, Sebastian Huber wrote: On 20/10/14 16:58, Joel Sherrill wrote: > On October 20, 2014 9:41:57 AM CDT, Sebastian Huber > wrote: >> Since nobody missed the unimplemented cache manager functions in >> several years >> it should be safe so simply remove this #warning. > You didn't notice it for qoriq or e500 so years is an exaggeration for > some models. The QorIQ BSP is from 2011. > Take a look at the BSPs impacted. I don't care particularly about older > CPU models but some are recent and should be addressed. > > After that dropping the warning is OK by me. > The useful functions are implemented and in case someone really needs the exotic ones he should notice it if the function is a simple "blr". >>> OK. I will just remove the warning. >>> >>> Do we want to add a PR or Open Project idea for this? >>> >>> -- >>> Joel Sherrill, Ph.D. Director of Research & Development >>> joel.sherr...@oarcorp.comOn-Line Applications Research >>> Ask me about RTEMS: a free RTOS Huntsville AL 35805 >>> Support Available(256) 722-9985 >>> >>> ___ >>> devel mailing list >>> devel@rtems.org >>> http://lists.rtems.org/mailman/listinfo/devel > > -- > Joel Sherrill, Ph.D. Director of Research & Development > joel.sherr...@oarcorp.comOn-Line Applications Research > Ask me about RTEMS: a free RTOS Huntsville AL 35805 > Support Available(256) 722-9985 > > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
On 10/20/2014 12:29 PM, Gedare Bloom wrote: > If you do the legwork now, they could make reasonable GCI tasks if we > decide to participate and are accepted. And in this case, by the time I did the legwork, I could fix them. The legwork is 97.5% of this. :) Find the manual for the CPU, look up HID0. If the cache bits match, it is in block 1. Check caching against the other block. If a match, it is in block 2. If not a match, then it either doesn't have cache methods or you have to write code. And the last one is likely beyond GCI. :( --joel > -Gedare > > On Mon, Oct 20, 2014 at 1:20 PM, Joel Sherrill > wrote: >> On 10/20/2014 12:09 PM, Gedare Bloom wrote: >>> Cache manager implementations are a perennial open project. >> +1 >> >> In this case,we only have ten RTEMS_CPU_MODELs which are not >> addressed. There are currently two blocks of code in the file. One >> is protected by this: >> >> #if defined(ppc603) || defined(ppc603e) || defined(mpc8260) >> >> And the other by this: >> >> #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) ) >> >> My guess with no research is that the first block of code is also >> appropriate for these RTEMS_CPU_MODELs: >> >> e500 >> mpc604 >> mpc7400 mpc7455 mpc750 >> qoriq >> mpc55xx >> >> A quick google makes me pretty confident that the mpc690 and mpc7* models >> belong in the ppc603 HID0 block. >> >> I do not have a guess about these >> >> ppc405 ppc440 mpc555 >> >> If we have to implement code to support something new, then I don't want >> to do it. If we have the code and just need to check to see if more needs to >> be added to the conditional, then we should. >> >> --joel >> >>> On Mon, Oct 20, 2014 at 11:19 AM, Joel Sherrill >>> wrote: On 10/20/2014 10:08 AM, Sebastian Huber wrote: > On 20/10/14 16:58, Joel Sherrill wrote: >> On October 20, 2014 9:41:57 AM CDT, Sebastian Huber >> wrote: >>> Since nobody missed the unimplemented cache manager functions in >>> several years >>> it should be safe so simply remove this #warning. >> You didn't notice it for qoriq or e500 so years is an exaggeration for >> some models. > The QorIQ BSP is from 2011. > >> Take a look at the BSPs impacted. I don't care particularly about older >> CPU models but some are recent and should be addressed. >> >> After that dropping the warning is OK by me. >> > The useful functions are implemented and in case someone really needs the > exotic ones he should notice it if the function is a simple "blr". > OK. I will just remove the warning. Do we want to add a PR or Open Project idea for this? -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel >> -- >> Joel Sherrill, Ph.D. Director of Research & Development >> joel.sherr...@oarcorp.comOn-Line Applications Research >> Ask me about RTEMS: a free RTOS Huntsville AL 35805 >> Support Available(256) 722-9985 >> >> -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 04/34] lm32/milkymist/startup/bspclean.c: Include to fix warning
---
c/src/lib/libbsp/lm32/milkymist/startup/bspclean.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/c/src/lib/libbsp/lm32/milkymist/startup/bspclean.c
b/c/src/lib/libbsp/lm32/milkymist/startup/bspclean.c
index 4041b77..d4ff09b 100644
--- a/c/src/lib/libbsp/lm32/milkymist/startup/bspclean.c
+++ b/c/src/lib/libbsp/lm32/milkymist/startup/bspclean.c
@@ -1,7 +1,8 @@
-/* bspclean.c
- *
+/*
* Milkymist shutdown routine
- *
+ */
+
+/*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*
* The license and distribution terms for this file may be
@@ -9,6 +10,7 @@
* http://www.rtems.org/license/LICENSE.
*/
+#include
#include
#include "../include/system_conf.h"
@@ -25,6 +27,7 @@ static void icap_write(int val, unsigned int w)
w |= ICAP_CE|ICAP_WRITE;
MM_WRITE(MM_ICAP, w);
}
+
static void reconf(void)
{
icap_write(0, 0x); /* dummy word */
--
1.9.3
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[PATCH 01/34] libcpu/powerpc configure logic: Do not built e500 components unused by qoriq
--- c/src/lib/libcpu/powerpc/Makefile.am | 10 +++--- c/src/lib/libcpu/powerpc/configure.ac | 8 +++- c/src/lib/libcpu/powerpc/preinstall.am | 5 +++-- 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/c/src/lib/libcpu/powerpc/Makefile.am b/c/src/lib/libcpu/powerpc/Makefile.am index 15501de..5b83288 100644 --- a/c/src/lib/libcpu/powerpc/Makefile.am +++ b/c/src/lib/libcpu/powerpc/Makefile.am @@ -249,22 +249,26 @@ mpc6xx_altivec_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) endif EXTRA_DIST += mpc6xx/altivec/README -if e500 -# mpc6xx/clock +# e500/clock +if e500_clock include_libcpu_HEADERS += mpc6xx/clock/c_clock.h noinst_PROGRAMS += e500/clock.rel e500_clock_rel_SOURCES = mpc6xx/clock/c_clock.c mpc6xx/clock/c_clock.h e500_clock_rel_CPPFLAGS = $(AM_CPPFLAGS) e500_clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) +endif -# mpc6xx/timer +# e500/timer +if e500_timer noinst_PROGRAMS += e500/timer.rel e500_timer_rel_SOURCES = mpc6xx/timer/timer.c e500_timer_rel_CPPFLAGS = $(AM_CPPFLAGS) e500_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) +endif # e500/mmu +if e500_mmu include_libcpu_HEADERS += e500/mmu/e500_mmu.h noinst_PROGRAMS += e500/mmu.rel e500_mmu_rel_SOURCES = e500/mmu/mmu.c e500/mmu/e500_mmu.h diff --git a/c/src/lib/libcpu/powerpc/configure.ac b/c/src/lib/libcpu/powerpc/configure.ac index 86fb4f4..c107e22 100644 --- a/c/src/lib/libcpu/powerpc/configure.ac +++ b/c/src/lib/libcpu/powerpc/configure.ac @@ -72,7 +72,13 @@ AM_CONDITIONAL(ppc440, test "$RTEMS_CPU_MODEL" = "ppc440") AM_CONDITIONAL(ppc4xx, test "$RTEMS_CPU_MODEL" = "ppc403" \ || test "$RTEMS_CPU_MODEL" = "ppc405") -AM_CONDITIONAL(e500, test "$RTEMS_CPU_MODEL" = "e500" \ +AM_CONDITIONAL(e500_clock, test "$RTEMS_CPU_MODEL" = "e500" \ +|| test "$RTEMS_CPU_MODEL" = "ppc440") + +AM_CONDITIONAL(e500_timer, test "$RTEMS_CPU_MODEL" = "e500" \ +|| test "$RTEMS_CPU_MODEL" = "ppc440") + +AM_CONDITIONAL(e500_mmu, test "$RTEMS_CPU_MODEL" = "e500" \ || test "$RTEMS_CPU_MODEL" = "ppc440" \ || test "$RTEMS_CPU_MODEL" = "qoriq" ) diff --git a/c/src/lib/libcpu/powerpc/preinstall.am b/c/src/lib/libcpu/powerpc/preinstall.am index 129855e..948cb3c 100644 --- a/c/src/lib/libcpu/powerpc/preinstall.am +++ b/c/src/lib/libcpu/powerpc/preinstall.am @@ -160,11 +160,12 @@ $(PROJECT_INCLUDE)/libcpu/c_clock.h: mpc6xx/clock/c_clock.h $(PROJECT_INCLUDE)/l $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/c_clock.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/c_clock.h endif -if e500 +if e500_clock $(PROJECT_INCLUDE)/libcpu/c_clock.h: mpc6xx/clock/c_clock.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/c_clock.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/c_clock.h - +endif +if e500_mmu $(PROJECT_INCLUDE)/libcpu/e500_mmu.h: e500/mmu/e500_mmu.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/e500_mmu.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/e500_mmu.h -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 09/34] cpukit/score/cpu/lm32/irq.c: Fix warning
---
cpukit/score/cpu/lm32/irq.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c
index 5ea3b04..1c50b11 100644
--- a/cpukit/score/cpu/lm32/irq.c
+++ b/cpukit/score/cpu/lm32/irq.c
@@ -29,6 +29,12 @@ void *_exception_stack_frame;
register unsigned long *stack_ptr __asm__ ("sp");
+/*
+ * Prototypes for routines called from assembly that we don't want in
+ * the public name space.
+ */
+void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr);
+
void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
{
register uint32_t level;
--
1.9.3
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[PATCH 06/34] m68k/csb360: Fix warnings
---
c/src/lib/libbsp/m68k/csb360/include/bsp.h | 5 +
c/src/lib/libbsp/m68k/csb360/start/start.S | 4 +-
c/src/lib/libbsp/m68k/csb360/startup/init5272.c | 130 +++-
3 files changed, 69 insertions(+), 70 deletions(-)
diff --git a/c/src/lib/libbsp/m68k/csb360/include/bsp.h
b/c/src/lib/libbsp/m68k/csb360/include/bsp.h
index 073295c..7a18974 100644
--- a/c/src/lib/libbsp/m68k/csb360/include/bsp.h
+++ b/c/src/lib/libbsp/m68k/csb360/include/bsp.h
@@ -178,6 +178,11 @@ rtems_isr_entry set_vector(
int type
);
+/*
+ * Prototypes for BSP methods which cross file boundaries
+ */
+void init5272(void);
+
#ifdef __cplusplus
}
#endif
diff --git a/c/src/lib/libbsp/m68k/csb360/start/start.S
b/c/src/lib/libbsp/m68k/csb360/start/start.S
index 82a834b..299c8da 100644
--- a/c/src/lib/libbsp/m68k/csb360/start/start.S
+++ b/c/src/lib/libbsp/m68k/csb360/start/start.S
@@ -5,7 +5,9 @@
* The name of this entry point is compiler dependent.
* It jumps to the BSP which is responsible for performing
* all initialization.
- *
+ */
+
+/*
* Copyright (C) 2004 Cogent Computer Systems
* Author: Jay Monkman
*
diff --git a/c/src/lib/libbsp/m68k/csb360/startup/init5272.c
b/c/src/lib/libbsp/m68k/csb360/startup/init5272.c
index 0e7617c..267fd55 100644
--- a/c/src/lib/libbsp/m68k/csb360/startup/init5272.c
+++ b/c/src/lib/libbsp/m68k/csb360/startup/init5272.c
@@ -8,7 +8,9 @@
* This initialization code based on hardware settings of dBUG
* monitor. This must be changed if you like to run it immediately
* after reset.
- *
+ */
+
+/*
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
* Author: Victor V. Vengerov
*
@@ -25,7 +27,6 @@
* http://www.rtems.org/license/LICENSE.
*/
-#include
#include
#include
@@ -71,84 +72,75 @@ usb_regs_t *g_usb_regs= (void *)
MCF5272_USB_BASE(BSP_MBAR);
"nop\n\t" \
: : "d" (MCF5272_CACR_CINV) )
-/* init5272 --
- * Initialize MCF5272 on-chip modules
- *
- * PARAMETERS:
- * none
- *
- * RETURNS:
- * none
+/*
+ * Initialize MCF5272 on-chip modules
*/
-void
-init5272(void)
+void init5272(void)
{
-/* Invalidate the cache - WARNING: It won't complete for 64 clocks */
-m68k_set_cacr(MCF5272_CACR_CINV);
-
-/* Set Module Base Address register */
-m68k_set_mbar((BSP_MBAR & MCF5272_MBAR_BA) | MCF5272_MBAR_V);
-
-/* Set RAM Base Address register */
-m68k_set_srambar((BSP_RAMBAR & MCF5272_RAMBAR_BA) | MCF5272_RAMBAR_V);
-
-/* Set System Control Register:
- * Enet has highest priority, 16384 bus cycles before timeout
- */
-g_sim_regs->scr = (MCF5272_SCR_HWR_16384);
-
-/* System Protection Register:
- * Enable Hardware watchdog timer.
- */
-g_sim_regs->spr = MCF5272_SPR_HWTEN;
-
-/* Clear and mask all interrupts */
-g_intctrl_regs->icr1 = 0x;
-g_intctrl_regs->icr2 = 0x;
-g_intctrl_regs->icr3 = 0x;
-g_intctrl_regs->icr4 = 0x;
-
-/* Copy the interrupt vector table to SRAM */
-{
-uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR;
-uint32_t *intvec = (uint32_t *)BSP_RAMBAR;
-register int i;
-for (i = 0; i < 256; i++)
-{
-*(intvec++) = *(inttab++);
-}
-}
-m68k_set_vbr(BSP_RAMBAR);
+ /* Invalidate the cache - WARNING: It won't complete for 64 clocks */
+ m68k_set_cacr(MCF5272_CACR_CINV);
+ /* Set Module Base Address register */
+ m68k_set_mbar((BSP_MBAR & MCF5272_MBAR_BA) | MCF5272_MBAR_V);
-/*
- * Setup ACRs so that if cache turned on, periphal accesses
- * are not messed up. (Non-cacheable, serialized)
- */
+ /* Set RAM Base Address register */
+ m68k_set_srambar((BSP_RAMBAR & MCF5272_RAMBAR_BA) | MCF5272_RAMBAR_V);
-m68k_set_acr0(MCF5272_ACR_BASE(BSP_MEM_ADDR_SDRAM)|
- MCF5272_ACR_MASK(BSP_MEM_MASK_SDRAM)|
- MCF5272_ACR_EN |
- MCF5272_ACR_SM_ANY);
+ /* Set System Control Register:
+ * Enet has highest priority, 16384 bus cycles before timeout
+ */
+ g_sim_regs->scr = (MCF5272_SCR_HWR_16384);
-/*
-m68k_set_acr1 (MCF5206E_ACR_BASE(BSP_MEM_ADDR_FLASH) |
- MCF5206E_ACR_MASK(BSP_MEM_MASK_FLASH) |
- MCF5206E_ACR_EN |
- MCF5206E_ACR_SM_ANY);
-*/
+ /* System Protection Register:
+ * Enable Hardware watchdog timer.
+ */
+ g_sim_regs->spr = MCF5272_SPR_HWTEN;
+
+ /* Clear and mask all interrupts */
+ g_intctrl_regs->icr1 = 0x;
+ g_intctrl_regs->icr2 = 0x;
+ g_intctrl_regs->icr3 = 0x;
+ g_intctrl_regs->icr4 = 0x;
+
+ /* Copy the interrupt vector table to SRAM */
+ {
+uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR;
+uint32_t *intvec = (uint32_t *)BSP_RAMBAR;
+register int i;
+for (i = 0; i < 256; i++) {
+ *(intvec++) = *(in
[PATCH 12/34] libcpu/arm/at91rm9200/dbgu/dbgu.c: Fix warning
---
c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c
b/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c
index e8d3b33..fa14a8e 100644
--- a/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c
+++ b/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c
@@ -198,7 +198,7 @@ static int dbgu_set_attributes(int minor, const struct
termios *t)
* Read from UART. This is used in the exit code, and can't
* rely on interrupts.
*/
-int dbgu_poll_read(int minor)
+static int dbgu_poll_read(int minor)
{
return dbgu_read(minor);
}
@@ -217,7 +217,7 @@ static void _BSP_put_char( char c ) {
BSP_output_char_function_type BSP_output_char = _BSP_put_char;
-int _BSP_poll_char(void)
+static int _BSP_poll_char(void)
{
return dbgu_poll_read(0);
}
--
1.9.3
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[PATCH 07/34] score/cpu/i386/rtems/score/cpu.h: Fix set but not used warning
---
cpukit/score/cpu/i386/rtems/score/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h
b/cpukit/score/cpu/i386/rtems/score/cpu.h
index e0ab037..13d31a4 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -472,6 +472,7 @@ uint32_t _CPU_ISR_Get_level( void );
do { \
uint32_t _stack; \
\
+(void) _is_fp; /* avoid warning for being unused */ \
if ( (_isr) ) (_the_context)->eflags = CPU_EFLAGS_INTERRUPTS_OFF; \
else (_the_context)->eflags = CPU_EFLAGS_INTERRUPTS_ON; \
\
--
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[PATCH 05/34] m68k/av5282: Fix warning
---
c/src/lib/libbsp/m68k/av5282/include/bsp.h | 24 +---
c/src/lib/libbsp/m68k/av5282/start/start.S | 7 ++-
c/src/lib/libbsp/m68k/av5282/startup/init5282.c | 76 -
3 files changed, 58 insertions(+), 49 deletions(-)
diff --git a/c/src/lib/libbsp/m68k/av5282/include/bsp.h
b/c/src/lib/libbsp/m68k/av5282/include/bsp.h
index 2068bb1..6741fda 100644
--- a/c/src/lib/libbsp/m68k/av5282/include/bsp.h
+++ b/c/src/lib/libbsp/m68k/av5282/include/bsp.h
@@ -10,9 +10,19 @@
* av5282 BSP header file
*/
+/**
+ * @defgroup m68k_av5282 AV5282 Support
+ *
+ * @ingroup bsp_m68k
+ *
+ * @brief AV5282 support.
+ */
+
#ifndef __SBav5282_BSP_H
#define __SBav5282_BSP_H
+#ifndef ASM
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -78,16 +88,14 @@ rtems_isr_entry set_vector(
#define UART2_IRQ_LEVEL 3
#define UART2_IRQ_PRIORITY 5
+/*
+ * Prototypes for methods called from .S to alow dependency tracking
+ */
+void Init5282(void);
+
#ifdef __cplusplus
}
#endif
+#endif /* !ASM */
#endif
-
-/**
- * @defgroup m68k_av5282 AV5282 Support
- *
- * @ingroup bsp_m68k
- *
- * @brief AV5282 support.
- */
diff --git a/c/src/lib/libbsp/m68k/av5282/start/start.S
b/c/src/lib/libbsp/m68k/av5282/start/start.S
index d9b255a..5075851 100644
--- a/c/src/lib/libbsp/m68k/av5282/start/start.S
+++ b/c/src/lib/libbsp/m68k/av5282/start/start.S
@@ -5,8 +5,10 @@
* The name of this entry point is compiler dependent.
* It jumps to the BSP which is responsible for performing
* all initialization.
- *
- * COPYRIGHT (c) 1989-1998.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -14,6 +16,7 @@
* http://www.rtems.org/license/LICENSE.
*/
+#include
#include
#define SRAM_SIZE (64*1024)
diff --git a/c/src/lib/libbsp/m68k/av5282/startup/init5282.c
b/c/src/lib/libbsp/m68k/av5282/startup/init5282.c
index 2898295..df5eedb 100644
--- a/c/src/lib/libbsp/m68k/av5282/startup/init5282.c
+++ b/c/src/lib/libbsp/m68k/av5282/startup/init5282.c
@@ -7,12 +7,15 @@
* work has been done by the bootstrap dBUG code.
*/
-#include
#include
-#define m68k_set_cacr(_cacr) __asm__ volatile ("movec %0,%%cacr" : : "d"
(_cacr))
-#define m68k_set_acr0(_acr0) __asm__ volatile ("movec %0,%%acr0" : : "d"
(_acr0))
-#define m68k_set_acr1(_acr1) __asm__ volatile ("movec %0,%%acr1" : : "d"
(_acr1))
-#define MM_SDRAM_BASE (0x)
+
+#define m68k_set_cacr(_cacr) \
+__asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr))
+#define m68k_set_acr0(_acr0) \
+__asm__ volatile ("movec %0,%%acr0" : : "d" (_acr0))
+#define m68k_set_acr1(_acr1) \
+__asm__ volatile ("movec %0,%%acr1" : : "d" (_acr1))
+#define MM_SDRAM_BASE(0x)
/*
* External methods used by this file
@@ -41,49 +44,44 @@ void Init5282 (void)
MCF5282_CS0_CSMR = 0x007f0001;
MCF5282_CS0_CSCR =(((0xf)&0x0F)<<10)|(1<<8)|(0x80);
- /*Setup the SDRAM */
- for(x=0; x<2; x++)
- {
- temp +=1;
- }
- MCF5282_SDRAMC_DCR = 0x0239;
- MCF5282_SDRAMC_DACR0 = 0x1320;
- MCF5282_SDRAMC_DMR0 = (0x00FC) | (0x0001);
- for(x=0; x<2; x++)
- {
- temp +=1;
- }
- /* set ip ( bit 3 ) in dacr */
- MCF5282_SDRAMC_DACR0 |= (0x0008) ;
- /* init precharge */
- *((short *)MM_SDRAM_BASE) = 0;
- /* set RE in dacr */
- MCF5282_SDRAMC_DACR0 |= (0x8000);
- /* wait */
- for(x=0; x<2; x++)
- {
- temp +=1;
- }
- /* issue IMRS */
- MCF5282_SDRAMC_DACR0 |= (0x0040);
- *((short *)MM_SDRAM_BASE) = 0x;
- for(x=0; x<6; x++)
- {
- temp +=1;
- }
- *((unsigned long*)MM_SDRAM_BASE)=0x12345678;
+ /*Setup the SDRAM */
+ for(x=0; x<2; x++) {
+temp +=1;
+ }
+ MCF5282_SDRAMC_DCR = 0x0239;
+ MCF5282_SDRAMC_DACR0 = 0x1320;
+ MCF5282_SDRAMC_DMR0 = (0x00FC) | (0x0001);
+ for(x=0; x<2; x++) {
+temp +=1;
+ }
+ /* set ip ( bit 3 ) in dacr */
+ MCF5282_SDRAMC_DACR0 |= (0x0008) ;
+ /* init precharge */
+ *((short *)MM_SDRAM_BASE) = 0;
+ /* set RE in dacr */
+ MCF5282_SDRAMC_DACR0 |= (0x8000);
+ /* wait */
+ for(x=0; x<2; x++) {
+temp +=1;
+ }
+ /* issue IMRS */
+ MCF5282_SDRAMC_DACR0 |= (0x0040);
+ *((short *)MM_SDRAM_BASE) = 0x;
+ for(x=0; x<6; x++) {
+temp +=1;
+ }
+ *((unsigned long*)MM_SDRAM_BASE)=0x12345678;
/* Copy the interrupt vector table to address 0x0 in SDRAM */
{
uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR;
uint32_t *intvec = (uint32_t *)0x0;
register int i;
-for (i = 0; i < 256; i++)
-{
+for (i = 0; i < 256; i++) {
*(intvec++) = *(inttab++);
}
}
-/*
+/*
* Copy data, clear BSS and call
[PATCH 16/34] m68k/gen68360: Fix warnings
--- c/src/lib/libbsp/m68k/gen68360/include/bsp.h | 5 + c/src/lib/libbsp/m68k/gen68360/startup/init68360.c | 11 --- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/c/src/lib/libbsp/m68k/gen68360/include/bsp.h b/c/src/lib/libbsp/m68k/gen68360/include/bsp.h index c51a906..cb9c1a3 100644 --- a/c/src/lib/libbsp/m68k/gen68360/include/bsp.h +++ b/c/src/lib/libbsp/m68k/gen68360/include/bsp.h @@ -102,6 +102,11 @@ rtems_isr_entry set_vector( #define PGH360_PB_SPI_EEP_CE_MSK (1<< 0) #endif /* defined(PGH360) */ +/* + * Prototypes for BSP methods which cross file boundaries + */ +void _Init68360(void); + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c index b39a9e1..67fed27 100644 --- a/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c +++ b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c @@ -1,6 +1,8 @@ /* * MC68360 support routines - * + */ + +/* * W. Eric Norum * Saskatchewan Accelerator Laboratory * University of Saskatchewan @@ -8,7 +10,6 @@ * e...@skatter.usask.ca */ -#include #include #include @@ -45,11 +46,12 @@ void _Init68360 (void) int i; rtems_isr_entry *vbr; unsigned long ramSize; + +#if (defined (__mc68040__)) volatile unsigned long *RamBase_p; RamBase_p = (volatile unsigned long *)&RamBase; -#if (defined (__mc68040__)) /* *** * Motorola 68040 and companion-mode 68360 * @@ -645,6 +647,9 @@ void _Init68360 (void) m360.mcr = 0x4C7F; #else + volatile unsigned long *RamBase_p; + + RamBase_p = (volatile unsigned long *)&RamBase; /* *** * Generic Standalone Motorola 68360 * -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 15/34] lm32 BSP shared and lm32_evr: Fix BSPs
---
c/src/lib/libbsp/lm32/lm32_evr/include/bsp.h | 7 +++
c/src/lib/libbsp/lm32/shared/console/console.c | 6 --
c/src/lib/libbsp/lm32/shared/console/uart.c| 9 ++---
3 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/c/src/lib/libbsp/lm32/lm32_evr/include/bsp.h
b/c/src/lib/libbsp/lm32/lm32_evr/include/bsp.h
index e63e9fe..facfc2d 100644
--- a/c/src/lib/libbsp/lm32/lm32_evr/include/bsp.h
+++ b/c/src/lib/libbsp/lm32/lm32_evr/include/bsp.h
@@ -76,6 +76,13 @@ rtems_isr_entry set_vector( /* returns
old vector */
int type /* RTEMS or RAW intr */
);
+/*
+ * Prototypes for BSP methods that cross file boundaries
+ */
+void BSP_uart_polled_write(char ch);
+int BSP_uart_polled_read( void );
+char BSP_uart_is_character_ready(char *ch);
+
#ifdef __cplusplus
}
#endif
diff --git a/c/src/lib/libbsp/lm32/shared/console/console.c
b/c/src/lib/libbsp/lm32/shared/console/console.c
index 233555c..e2741fc 100644
--- a/c/src/lib/libbsp/lm32/shared/console/console.c
+++ b/c/src/lib/libbsp/lm32/shared/console/console.c
@@ -16,14 +16,9 @@
#define NO_BSP_INIT
-#include
#include
#include
-void BSP_uart_polled_write(char ch);
-int BSP_uart_polled_read( void );
-char BSP_uart_is_character_ready(char *ch);
-
/* console_initialize
*
* This routine initializes the console IO driver.
@@ -59,7 +54,6 @@ static int inbyte( void )
/*
* If polling, wait until a character is available.
*/
-
return BSP_uart_polled_read();
}
diff --git a/c/src/lib/libbsp/lm32/shared/console/uart.c
b/c/src/lib/libbsp/lm32/shared/console/uart.c
index 1ce5c87..9adbd40 100644
--- a/c/src/lib/libbsp/lm32/shared/console/uart.c
+++ b/c/src/lib/libbsp/lm32/shared/console/uart.c
@@ -1,6 +1,8 @@
/*
* Uart driver for Lattice Mico32 (lm32) UART
- *
+ */
+
+/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
@@ -14,6 +16,7 @@
#include "../include/system_conf.h"
#include "uart.h"
+#include
#include
static inline int uartread(unsigned int reg)
@@ -51,11 +54,11 @@ void BSP_uart_polled_write(char ch)
uartwrite(LM32_UART_RBR, ch);
}
-char BSP_uart_polled_read( void )
+int BSP_uart_polled_read( void )
{
/* Wait until there is a byte in RBR */
while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_DR));
- return (char) uartread(LM32_UART_RBR);
+ return (int) uartread(LM32_UART_RBR);
}
char BSP_uart_is_character_ready(char *ch)
--
1.9.3
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[PATCH 03/34] jffs2: Add casts and constant designators to address warnings on 16-bit targets
---
cpukit/libfs/src/jffs2/include/linux/kernel.h | 2 +-
cpukit/libfs/src/jffs2/src/nodelist.h | 2 +-
cpukit/libfs/src/jffs2/src/os-rtems.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cpukit/libfs/src/jffs2/include/linux/kernel.h
b/cpukit/libfs/src/jffs2/include/linux/kernel.h
index 3dc0ba1..4aa7702 100644
--- a/cpukit/libfs/src/jffs2/include/linux/kernel.h
+++ b/cpukit/libfs/src/jffs2/include/linux/kernel.h
@@ -9,7 +9,7 @@
#define jiffies ((unsigned long)rtems_clock_get_ticks_since_boot())
-#define ERR_PTR(err) ((void*)(err))
+#define ERR_PTR(err) ((void*)((intptr_t)(err)))
#define PTR_ERR(err) ((unsigned long)(err))
#define IS_ERR(err) ((unsigned long)err > (unsigned long)-1000L)
static inline void *ERR_CAST(const void *ptr)
diff --git a/cpukit/libfs/src/jffs2/src/nodelist.h
b/cpukit/libfs/src/jffs2/src/nodelist.h
index 1e09f4b..001ac31 100644
--- a/cpukit/libfs/src/jffs2/src/nodelist.h
+++ b/cpukit/libfs/src/jffs2/src/nodelist.h
@@ -291,7 +291,7 @@ struct jffs2_eraseblock
static inline int jffs2_blocks_use_vmalloc(struct jffs2_sb_info *c)
{
- return ((c->flash_size / c->sector_size) * sizeof (struct
jffs2_eraseblock)) > (128 * 1024);
+ return ((c->flash_size / c->sector_size) * sizeof (struct
jffs2_eraseblock)) > (128L * 1024L);
}
#define ref_totlen(a, b, c) __jffs2_ref_totlen((a), (b), (c))
diff --git a/cpukit/libfs/src/jffs2/src/os-rtems.h
b/cpukit/libfs/src/jffs2/src/os-rtems.h
index 78e2c6c..7946f85 100644
--- a/cpukit/libfs/src/jffs2/src/os-rtems.h
+++ b/cpukit/libfs/src/jffs2/src/os-rtems.h
@@ -42,7 +42,7 @@ struct super_block;
static inline unsigned int full_name_hash(const unsigned char * name, size_t
len) {
- unsigned hash = 0;
+ uint32_t hash = 0;
while (len--) {
hash = (hash << 4) | (hash >> 28);
hash ^= *(name++);
--
1.9.3
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[PATCH 10/34] arm/edb7312: Fix warnings
---
c/src/lib/libbsp/arm/edb7312/include/bsp.h | 9 +
c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S | 6 +-
c/src/lib/libbsp/arm/edb7312/irq/irq.c | 4 +++-
3 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/c/src/lib/libbsp/arm/edb7312/include/bsp.h
b/c/src/lib/libbsp/arm/edb7312/include/bsp.h
index 60793c2..00e8d40 100644
--- a/c/src/lib/libbsp/arm/edb7312/include/bsp.h
+++ b/c/src/lib/libbsp/arm/edb7312/include/bsp.h
@@ -16,6 +16,8 @@
#ifndef _BSP_H
#define _BSP_H
+#ifndef ASM
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -57,10 +59,17 @@ int cs8900_driver_attach (struct rtems_bsdnet_ifconfig
*config,
/** @} */
+/*
+ * Prototypes for methods called from .S but implemented in C
+ */
+void edb7312_interrupt_dispatch(rtems_vector_number vector);
+
/** @} */
#ifdef __cplusplus
}
#endif
+#endif /* !ASM */
+
#endif /* _BSP_H */
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
index 2cc3b38..cabd419 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
+++ b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
@@ -1,6 +1,8 @@
/*
* Cirrus EP7312 Intererrupt handler
- *
+ */
+
+/*
* Copyright (c) 2002 by Jay Monkman
*
* Copyright (c) 2002 by Charlie Steader
@@ -9,7 +11,9 @@
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
+
#define __asm__
+#include
#include "irq.h"
.extern edb7312_interrupt_dispatch
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.c
b/c/src/lib/libbsp/arm/edb7312/irq/irq.c
index 327edce..8c18ea7 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/irq.c
+++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.c
@@ -1,6 +1,8 @@
/*
* Cirrus EP7312 Intererrupt handler
- *
+ */
+
+/*
* Copyright (c) 2010 embedded brains GmbH.
*
* Copyright (c) 2002 by Jay Monkman
--
1.9.3
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[PATCH 02/34] m68k/mrm332: Move include of
This file defines at least the POW() macro which pollutes the
public name space and causes warnings in at least the paranoia
sample application.
---
c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c | 1 +
c/src/lib/libbsp/m68k/mrm332/include/bsp.h | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c
b/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c
index b650275..718301b 100644
--- a/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c
+++ b/c/src/lib/libbsp/m68k/mrm332/clock/ckinit.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#define CLOCK_VECTOR MRM_PIV
diff --git a/c/src/lib/libbsp/m68k/mrm332/include/bsp.h
b/c/src/lib/libbsp/m68k/mrm332/include/bsp.h
index 721e45e..15549a4 100644
--- a/c/src/lib/libbsp/m68k/mrm332/include/bsp.h
+++ b/c/src/lib/libbsp/m68k/mrm332/include/bsp.h
@@ -28,7 +28,6 @@ extern "C" {
#include
#include
#include
-#include
#define CONSOLE_SCI
--
1.9.3
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[PATCH 22/34] m68k/mrm332: Fix warnings
---
c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c
b/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c
index ac435cb..8f71b5e 100644
--- a/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c
+++ b/c/src/lib/libbsp/m68k/mrm332/spurious/spinit.c
@@ -1,11 +1,8 @@
-/* Spurious_driver
- *
+/*
* This routine installs spurious interrupt handlers for the mrm.
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
+ */
+
+/*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993.
* On-Line Applications Research Corporation (OAR).
*
@@ -28,7 +25,7 @@ const char * const _Spurious_Error_[] = {"Reset","Bus
Error","Address Error",
"AVec7","Trap Instruction","Debug","Reboot","Reserved Coprocessor",
"Reserved Unassigned","User Defined"};
-rtems_isr Spurious_Isr(
+static rtems_isr Spurious_Isr(
rtems_vector_number vector
)
{
--
1.9.3
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[PATCH 21/34] m68k/mcf5329: Fix warnings
--- c/src/lib/libbsp/m68k/mcf5329/include/bsp.h | 5 + c/src/lib/libbsp/m68k/mcf5329/startup/init5329.c | 1 + 2 files changed, 6 insertions(+) diff --git a/c/src/lib/libbsp/m68k/mcf5329/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5329/include/bsp.h index 719c5f9..4ba7f0f 100644 --- a/c/src/lib/libbsp/m68k/mcf5329/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mcf5329/include/bsp.h @@ -62,6 +62,11 @@ rtems_isr_entry set_vector( #define UART1_IRQ_LEVEL 3 #define UART2_IRQ_LEVEL 3 +/* + * Prototypes for BSP methods which cross file boundaries + */ +void Init5329(void); + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/m68k/mcf5329/startup/init5329.c b/c/src/lib/libbsp/m68k/mcf5329/startup/init5329.c index ffc71c8..8719514 100644 --- a/c/src/lib/libbsp/m68k/mcf5329/startup/init5329.c +++ b/c/src/lib/libbsp/m68k/mcf5329/startup/init5329.c @@ -4,6 +4,7 @@ * functions can be called from here. */ +#include #include extern void _wr_vbr(uint32_t); -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 13/34] libcpu/arm/pxa255/ffuart/ffuart.c: Fix warning
---
c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c
b/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c
index 1604f1d..335fc6f 100644
--- a/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c
+++ b/c/src/lib/libcpu/arm/pxa255/ffuart/ffuart.c
@@ -204,7 +204,7 @@ static int ffuart_set_attributes(int minor, const struct
termios *t)
* Read from UART. This is used in the exit code, and can't
* rely on interrupts.
*/
-int ffuart_poll_read(int minor)
+static int ffuart_poll_read(int minor)
{
return ffuart_read(minor);
}
--
1.9.3
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[PATCH 19/34] m68k/mcf5225x: Fix warnings
--- c/src/lib/libbsp/m68k/mcf5225x/include/bsp.h | 5 + c/src/lib/libbsp/m68k/mcf5225x/startup/init5225x.c | 1 + 2 files changed, 6 insertions(+) diff --git a/c/src/lib/libbsp/m68k/mcf5225x/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5225x/include/bsp.h index 5ee6fe3..e5701ed 100644 --- a/c/src/lib/libbsp/m68k/mcf5225x/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mcf5225x/include/bsp.h @@ -82,6 +82,11 @@ rtems_isr_entry set_vector( #define UART2_IRQ_LEVEL 3 #define UART2_IRQ_PRIORITY 5 +/* + * Prototypes for BSP methods which cross file boundaries + */ +void Init5225x(void); + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/m68k/mcf5225x/startup/init5225x.c b/c/src/lib/libbsp/m68k/mcf5225x/startup/init5225x.c index c5bd9fd..caf7db1 100644 --- a/c/src/lib/libbsp/m68k/mcf5225x/startup/init5225x.c +++ b/c/src/lib/libbsp/m68k/mcf5225x/startup/init5225x.c @@ -8,6 +8,7 @@ * functions can be called from here. */ +#include #include extern void _wr_vbr(uint32_t); -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 20/34] m68k/mcf5235: Fix warnings
--- c/src/lib/libbsp/m68k/mcf5235/include/bsp.h | 5 + 1 file changed, 5 insertions(+) diff --git a/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h index 66d0c70..96355e2 100644 --- a/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mcf5235/include/bsp.h @@ -62,6 +62,11 @@ rtems_isr_entry set_vector( #define UART2_IRQ_LEVEL 3 #define UART2_IRQ_PRIORITY 5 +/* + * Prototypes for BSP methods which cross file boundaries + */ +void Init5235(void); + #ifdef __cplusplus } #endif -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 08/34] score/cpu/lm32/rtems/score/cpu.h: Fix set but not used warning
---
cpukit/score/cpu/lm32/rtems/score/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h
b/cpukit/score/cpu/lm32/rtems/score/cpu.h
index 17fa33c..67d7ebe 100644
--- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
@@ -826,6 +826,9 @@ extern char _gp[];
_isr, _entry_point, _is_fp, _tls_area ) \
do { \
uint32_t _stack = (uint32_t)(_stack_base) + (_size) - 4; \
+ \
+ (void) _is_fp; /* avoid warning for being unused */ \
+ (void) _isr; /* avoid warning for being unused */ \
(_the_context)->gp = (uint32_t)_gp; \
(_the_context)->fp = (uint32_t)_stack; \
(_the_context)->sp = (uint32_t)_stack; \
--
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[PATCH 17/34] m68k/idp: Fix warnings
--- c/src/lib/libbsp/m68k/idp/console/mc68ec.c | 1 + 1 file changed, 1 insertion(+) diff --git a/c/src/lib/libbsp/m68k/idp/console/mc68ec.c b/c/src/lib/libbsp/m68k/idp/console/mc68ec.c index 3063af8..9041ca5 100644 --- a/c/src/lib/libbsp/m68k/idp/console/mc68ec.c +++ b/c/src/lib/libbsp/m68k/idp/console/mc68ec.c @@ -3,6 +3,7 @@ * Written by r...@cygnus.com (Rob Savoye) */ +#include #include "leds.h" /* -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 18/34] m68k/mcf52235: Fix warnings
--- c/src/lib/libbsp/m68k/mcf52235/include/bsp.h | 5 + c/src/lib/libbsp/m68k/mcf52235/startup/init52235.c | 1 + 2 files changed, 6 insertions(+) diff --git a/c/src/lib/libbsp/m68k/mcf52235/include/bsp.h b/c/src/lib/libbsp/m68k/mcf52235/include/bsp.h index 1e6cb95..fd3f851 100644 --- a/c/src/lib/libbsp/m68k/mcf52235/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mcf52235/include/bsp.h @@ -63,6 +63,11 @@ rtems_isr_entry set_vector( #define UART2_IRQ_LEVEL 3 #define UART2_IRQ_PRIORITY 5 +/* + * Prototypes for BSP methods which cross file boundaries + */ +void Init52235(void); + #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/m68k/mcf52235/startup/init52235.c b/c/src/lib/libbsp/m68k/mcf52235/startup/init52235.c index 3769b75..d54b624 100644 --- a/c/src/lib/libbsp/m68k/mcf52235/startup/init52235.c +++ b/c/src/lib/libbsp/m68k/mcf52235/startup/init52235.c @@ -4,6 +4,7 @@ * functions can be called from here. */ +#include #include extern void _wr_vbr(uint32_t); -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 26/34] ep1a/startup/bspstart.c: BSP does not use SPRG0
--- c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c index 47b6312..dc675e2 100644 --- a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c @@ -11,8 +11,6 @@ * http://www.rtems.org/license/LICENSE. */ -#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). - #include #include #include -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 14/34] arm/csb337/console/fbcons.c: Fix warning
---
c/src/lib/libbsp/arm/csb337/console/fbcons.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/c/src/lib/libbsp/arm/csb337/console/fbcons.c
b/c/src/lib/libbsp/arm/csb337/console/fbcons.c
index 87067ca..62e8409 100644
--- a/c/src/lib/libbsp/arm/csb337/console/fbcons.c
+++ b/c/src/lib/libbsp/arm/csb337/console/fbcons.c
@@ -1,7 +1,9 @@
/*
* LCD Console Output Driver for CSBx37
- *
- * COPYRIGHT (c) 1989-2009.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* Modified by Fernando Nicodemos
@@ -121,19 +123,3 @@ static int fbcons_set_attributes(int minor, const struct
termios *t)
/* printk( "frame buffer -- set attributes\n" ); */
return 0;
}
-
-/***/
-/*
- * The following functions are not used by TERMIOS, but other RTEMS
- * functions use them instead.
- */
-/***/
-/*
- * Read from UART. This is used in the exit code, and can't
- * rely on interrupts.
- */
-int fbcons_poll_read(int minor)
-{
- /* printk( "frame buffer -- poll read\n" ); */
- return -1;
-}
--
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[PATCH 11/34] arm/gba/console/conio.c: Fix warning
---
c/src/lib/libbsp/arm/gba/console/conio.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/c/src/lib/libbsp/arm/gba/console/conio.c
b/c/src/lib/libbsp/arm/gba/console/conio.c
index 1027b2a..c53793a 100644
--- a/c/src/lib/libbsp/arm/gba/console/conio.c
+++ b/c/src/lib/libbsp/arm/gba/console/conio.c
@@ -87,6 +87,10 @@ int _wherex;/**< Screen X coordinate */
int _wherey;/**< Screen Y coordinate */
int _textattr; /**< Text attribute */
+/*
+ * Forward reference
+ */
+static void gba_initconio(void);
/*---*
* Defaultfont *
@@ -318,7 +322,7 @@ int gba_printf(const char *_format, ...)
* @param None
* @return None
*/
-void gba_initconio(void)
+static void gba_initconio(void)
{
GBA_REG_DISPCNT = GBA_DISP_MODE_4 | GBA_DISP_BG2_ON;/* 256 color
bitmapped mode */
const BgAffineDestData bgAffineReset = {256,0,0,256,0,-256*2};
--
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[PATCH 27/34] ss555/startup/bspstart.c: BSP does not use SPRG0
--- c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c index f27df69..4016c61 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c @@ -19,8 +19,6 @@ * Copyright (c) 1999, National Research Council of Canada */ -#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). - #include #include #include -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 32/34] shared/clockdrv_shell.h: Always include to avoid warnings
---
c/src/lib/libbsp/shared/clockdrv_shell.h | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/c/src/lib/libbsp/shared/clockdrv_shell.h
b/c/src/lib/libbsp/shared/clockdrv_shell.h
index 324e1e5..5dbea13 100644
--- a/c/src/lib/libbsp/shared/clockdrv_shell.h
+++ b/c/src/lib/libbsp/shared/clockdrv_shell.h
@@ -7,7 +7,7 @@
*/
/*
- * COPYRIGHT (c) 1989-2012.
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -18,6 +18,7 @@
#include
#include
+#include
/**
* @defgroup bsp_clock Clock Support
@@ -58,10 +59,6 @@ void Clock_exit( void );
* This is the clock tick interrupt handler.
*
* @param vector Vector number.
- *
- * Output parameters: NONE
- *
- * Return values: NONE
*/
#if defined(BSP_FEATURE_IRQ_EXTENSION) || \
(CPU_SIMPLE_VECTORED_INTERRUPTS != TRUE)
@@ -123,15 +120,7 @@ rtems_isr Clock_isr(
*
* This routine allows the clock driver to exit by masking the interrupt and
* disabling the clock's counter.
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
- * Return values: NONE
- *
*/
-
void Clock_exit( void )
{
Clock_driver_support_shutdown_hardware();
@@ -150,7 +139,6 @@ void Clock_exit( void )
*
* @retval rtems_device_driver status code
*/
-
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
--
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[PATCH 31/34] powerpc/qoriq/include/bsp.h: Add prototypes to fix warnings
--- c/src/lib/libbsp/powerpc/qoriq/include/bsp.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h b/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h index a4be2e2..0876060 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h @@ -51,6 +51,16 @@ int qoriq_if_intercom_attach_detach( int attaching ); +#if defined(HAS_UBOOT) + /* Routine to obtain U-Boot environment variables */ + const char *bsp_uboot_getenv( +const char *name + ); +#endif + +void *bsp_idle_thread( uintptr_t ignored ); +#define BSP_IDLE_TASK_BODY bsp_idle_thread + #define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_tsec_attach #define RTEMS_BSP_NETWORK_DRIVER_ATTACH4 qoriq_if_intercom_attach_detach -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 29/34] powerpc/shared/startup/bspstart.c: Fix warning for mvme2100
---
c/src/lib/libbsp/powerpc/shared/startup/bspstart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
index 1d5d5d5..08dc12b 100644
--- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
@@ -123,7 +123,7 @@ unsigned int EUMBBAR;
* Register (EUMBBAR) as read from the processor configuration register using
* Processor Address Map B (CHRP).
*/
-unsigned int get_eumbbar(void) {
+static unsigned int get_eumbbar(void) {
out_le32( (volatile unsigned *)0xfec0, 0x8078 );
return in_le32( (volatile unsigned *)0xfee0 );
}
--
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[PATCH 33/34] arm/raspberrypi: Fix warnings
---
c/src/lib/libbsp/arm/raspberrypi/console/usart.c | 126 +++
c/src/lib/libbsp/arm/raspberrypi/include/bsp.h | 2 +
2 files changed, 64 insertions(+), 64 deletions(-)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/console/usart.c
b/c/src/lib/libbsp/arm/raspberrypi/console/usart.c
index 638b857..13186b0 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/console/usart.c
+++ b/c/src/lib/libbsp/arm/raspberrypi/console/usart.c
@@ -25,65 +25,71 @@
static void usart_delay(uint32_t n)
{
- volatile uint32_t i = 0;
- for(i = 0; i < n; i++);
+ volatile uint32_t i = 0;
+
+ for(i = 0; i < n; i++)
+ ;
}
+#if 0
+/*
+ * These will be useful when the driver supports interrupt driven IO.
+ */
static rtems_vector_number usart_get_irq_number(const console_tbl *ct)
{
- return ct->ulIntVector;
+ return ct->ulIntVector;
}
static uint32_t usart_get_baud(const console_tbl *ct)
{
- return ct->ulClock;
+ return ct->ulClock;
}
+#endif
static void usart_set_baud(int minor, int baud)
{
- /*
- ** Nothing for now
- */
- return;
+ /*
+ * Nothing for now
+ */
+ return;
}
static void usart_initialize(int minor)
{
- unsigned int gpio_reg;
-
- /*
- ** Program GPIO pins for UART 0
- */
- gpio_reg = BCM2835_REG(BCM2835_GPIO_GPFSEL1);
- gpio_reg &= ~(7<<12);/* gpio14 */
- gpio_reg |= (4<<12);/* alt0 */
- gpio_reg &= ~(7<<15);/* gpio15 */
- gpio_reg |= (4<<15);/* alt0 */
- BCM2835_REG(BCM2835_GPIO_GPFSEL1) = gpio_reg;
-
- BCM2835_REG(BCM2835_GPIO_GPPUD) = 0;
- usart_delay(150);
- BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = (1<<14)|(1<<15);
- usart_delay(150);
- BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = 0;
-
- /*
- ** Init the PL011 UART
- */
- BCM2835_REG(BCM2835_UART0_CR) = 0;
- BCM2835_REG(BCM2835_UART0_ICR) = 0x7FF;
- BCM2835_REG(BCM2835_UART0_IMSC) = 0;
- BCM2835_REG(BCM2835_UART0_IBRD) = 1;
- BCM2835_REG(BCM2835_UART0_FBRD) = 40;
- BCM2835_REG(BCM2835_UART0_LCRH) = 0x70;
- BCM2835_REG(BCM2835_UART0_RSRECR) = 0;
-
- BCM2835_REG(BCM2835_UART0_CR) = 0x301;
-
- BCM2835_REG(BCM2835_UART0_IMSC) = BCM2835_UART0_IMSC_RX;
-
- usart_set_baud(minor, 115000);
-
+ unsigned int gpio_reg;
+
+ /*
+ ** Program GPIO pins for UART 0
+ */
+ gpio_reg = BCM2835_REG(BCM2835_GPIO_GPFSEL1);
+ gpio_reg &= ~(7<<12);/* gpio14 */
+ gpio_reg |= (4<<12);/* alt0 */
+ gpio_reg &= ~(7<<15);/* gpio15 */
+ gpio_reg |= (4<<15);/* alt0 */
+ BCM2835_REG(BCM2835_GPIO_GPFSEL1) = gpio_reg;
+
+ BCM2835_REG(BCM2835_GPIO_GPPUD) = 0;
+ usart_delay(150);
+ BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = (1<<14)|(1<<15);
+ usart_delay(150);
+ BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = 0;
+
+ /*
+ ** Init the PL011 UART
+ */
+ BCM2835_REG(BCM2835_UART0_CR) = 0;
+ BCM2835_REG(BCM2835_UART0_ICR) = 0x7FF;
+ BCM2835_REG(BCM2835_UART0_IMSC) = 0;
+ BCM2835_REG(BCM2835_UART0_IBRD) = 1;
+ BCM2835_REG(BCM2835_UART0_FBRD) = 40;
+ BCM2835_REG(BCM2835_UART0_LCRH) = 0x70;
+ BCM2835_REG(BCM2835_UART0_RSRECR) = 0;
+
+ BCM2835_REG(BCM2835_UART0_CR) = 0x301;
+
+ BCM2835_REG(BCM2835_UART0_IMSC) = BCM2835_UART0_IMSC_RX;
+
+ usart_set_baud(minor, 115000);
}
static int usart_first_open(int major, int minor, void *arg)
@@ -106,30 +112,23 @@ static int usart_last_close(int major, int minor, void
*arg)
static int usart_read_polled(int minor)
{
- if (minor == 0)
- {
- if(((BCM2835_REG(BCM2835_UART0_FR)) & BCM2835_UART0_FR_RXFE) == 0)
- {
- return((BCM2835_REG(BCM2835_UART0_DR)) & 0xFF );
- }
- else
- {
- return -1;
- }
- }
- else
- {
- printk("Unknown console minor number: %d\n", minor);
+ if (minor == 0) {
+if (((BCM2835_REG(BCM2835_UART0_FR)) & BCM2835_UART0_FR_RXFE) == 0) {
+ return((BCM2835_REG(BCM2835_UART0_DR)) & 0xFF );
+} else {
return -1;
- }
-
+}
+ } else {
+printk("Unknown console minor number: %d\n", minor);
+return -1;
+ }
}
static void usart_write_polled(int minor, char c)
{
- while (1)
- {
- if ((BCM2835_REG(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF) == 0) break;
+ while (1) {
+ if ((BCM2835_REG(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF) == 0)
+ break;
}
BCM2835_REG(BCM2835_UART0_DR) = c;
}
@@ -142,8 +141,7 @@ static ssize_t usart_write_support_polled(
{
ssize_t i = 0;
- for (i = 0; i < n; ++i)
- {
+ for (i = 0; i < n; ++i) {
usart_write_polled(minor, s [i]);
}
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h
b/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h
index 5c507ae..c05a410 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h
+++ b/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h
@@ -20,6 +20,8 @@
#define LIBBSP_ARM_RASPBERRYPI_BSP_H
#include
+#include
+
#include
#include
#include
--
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[PATCH 30/34] powerpc/qemuppc/startup/cmain.c: Fix warnings
---
c/src/lib/libbsp/powerpc/qemuppc/startup/cmain.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/c/src/lib/libbsp/powerpc/qemuppc/startup/cmain.c
b/c/src/lib/libbsp/powerpc/qemuppc/startup/cmain.c
index 21a02e0..fd59ed8 100644
--- a/c/src/lib/libbsp/powerpc/qemuppc/startup/cmain.c
+++ b/c/src/lib/libbsp/powerpc/qemuppc/startup/cmain.c
@@ -37,6 +37,13 @@ extern unsigned char __sbss2_start[], __sbss2_end[];
extern unsigned char __sbss_start[], __sbss_end[];
extern unsigned char __bss_start[], __bss_end[];
+
+/*
+ * Prototype this here because it is just the entry symbol and
+ * not referenced from any compileable code.
+ */
+void cmain (void);
+
void cmain (void)
{
/*
--
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[PATCH 23/34] cpukit/libfs/src/imfs/ioman.c: Fix typo
--- cpukit/libfs/src/imfs/ioman.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpukit/libfs/src/imfs/ioman.c b/cpukit/libfs/src/imfs/ioman.c index 112a788..140d9e2 100644 --- a/cpukit/libfs/src/imfs/ioman.c +++ b/cpukit/libfs/src/imfs/ioman.c @@ -1,7 +1,7 @@ /** * @file * - * @brief RTMES Register IO Name + * @brief RTEMS Register IO Name * @ingroup ClassicIO */ -- 1.9.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 25/34] libcpu/sh/sh7045/sci/sci.c: Eliminate use of obsolete method
---
c/src/lib/libcpu/sh/sh7045/sci/sci.c | 32 +---
1 file changed, 9 insertions(+), 23 deletions(-)
diff --git a/c/src/lib/libcpu/sh/sh7045/sci/sci.c
b/c/src/lib/libcpu/sh/sh7045/sci/sci.c
index e6c54e2..690035a 100644
--- a/c/src/lib/libcpu/sh/sh7045/sci/sci.c
+++ b/c/src/lib/libcpu/sh/sh7045/sci/sci.c
@@ -39,7 +39,7 @@
* by the authors or by TGA Technologies.
*/
-#include
+#include
#include
@@ -93,13 +93,6 @@ struct scidev_t {
static sci_setup_t sio_param[2];
#endif
-/* imported from scitab.rel */
-extern int _sci_get_brparms(
- tcflag_t cflag,
- unsigned char *smr,
- unsigned char *brr
-);
-
/* Translate termios' tcflag_t into sci settings */
static int _sci_set_cflags(
struct scidev_t *sci_dev,
@@ -291,7 +284,6 @@ rtems_device_driver sh_sci_initialize(
{
rtems_device_driver status;
rtems_device_minor_number i;
- rtems_driver_name_t driver;
/*
* register all possible devices.
@@ -301,23 +293,17 @@ rtems_device_driver sh_sci_initialize(
* initialization therefore we check it everytime
*/
for ( i = 0 ; i < SCI_MINOR_DEVICES ; i++ ) {
-status = rtems_io_lookup_name(
-sci_device[i].name,
-&driver);
-if ( status != RTEMS_SUCCESSFUL ) {
-/* OK. We assume it is not registered yet. */
-status = rtems_io_register_name(
-sci_device[i].name,
-major,
-sci_device[i].minor
-);
-if (status != RTEMS_SUCCESSFUL)
-rtems_fatal_error_occurred(status);
-}
+/* OK. We assume it is not registered yet. */
+status = rtems_io_register_name(
+ sci_device[i].name,
+ major,
+ sci_device[i].minor
+);
+if (status != RTEMS_SUCCESSFUL)
+ rtems_fatal_error_occurred(status);
}
/* non-default hardware setup occurs in sh_sci_open() */
-
return RTEMS_SUCCESSFUL;
}
--
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[PATCH 24/34] libbsp/sh/shared/console.c: Eliminate use of obsolete method
---
c/src/lib/libbsp/sh/shared/console.c | 67 +++-
1 file changed, 21 insertions(+), 46 deletions(-)
diff --git a/c/src/lib/libbsp/sh/shared/console.c
b/c/src/lib/libbsp/sh/shared/console.c
index 8217e26..3c39217 100644
--- a/c/src/lib/libbsp/sh/shared/console.c
+++ b/c/src/lib/libbsp/sh/shared/console.c
@@ -1,14 +1,11 @@
/*
* /dev/console for Hitachi SH 703X
*
- * The SH doesn't have a designated console device. Therefore we "alias"
- * another device as /dev/console and revector all calls to /dev/console
- * to this device.
- *
- * This approach is similar to installing a sym-link from one device to
- * another device. If rtems once will support sym-links for devices files,
- * this implementation could be dropped.
- *
+ * This driver installs an alternate device name (e.g. /dev/console for
+ * the designated console device /dev/console.
+ */
+
+/*
* Author: Ralf Corsepius (corse...@faw.uni-ulm.de)
*
* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
@@ -17,8 +14,7 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
- *
- * COPYRIGHT (c) 1998.
+ * COPYRIGHT (c) 1998, 2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -31,23 +27,16 @@
#include
#include
+#include
+
#ifndef BSP_CONSOLE_DEVNAME
#error Missing BSP_CONSOLE_DEVNAME
#endif
-static rtems_driver_name_t low_level_device_info;
-
/* console_initialize
*
* This routine initializes the console IO driver.
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
- * Return values:
*/
-
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -55,17 +44,18 @@ rtems_device_driver console_initialize(
)
{
rtems_device_driver status;
+ struct stat st;
+ int rv;
+
+ rv = stat( BSP_CONSOLE_DEVNAME, &st );
+ if ( rv != 0 )
+rtems_fatal_error_occurred(rv);
status = rtems_io_register_name(
"/dev/console",
-major,
-(rtems_device_minor_number) 0
+rtems_filesystem_dev_major_t( st.st_rdev ),
+rtems_filesystem_dev_minor_t( st.st_rdev )
);
-
- if (status != RTEMS_SUCCESSFUL)
-rtems_fatal_error_occurred(status);
-
- status = rtems_io_lookup_name( BSP_CONSOLE_DEVNAME, &low_level_device_info );
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
@@ -75,74 +65,59 @@ rtems_device_driver console_initialize(
/*
* Open entry point
*/
-
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void* arg
)
{
- return rtems_io_open( low_level_device_info.major,
-low_level_device_info.minor,
-arg );
+ rtems_fatal_error_occurred(-1);
}
/*
* Close entry point
*/
-
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void* arg
)
{
- return rtems_io_close( low_level_device_info.major,
-low_level_device_info.minor,
-arg );
+ rtems_fatal_error_occurred(-1);
}
/*
* read bytes from the serial port. We only have stdin.
*/
-
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void* arg
)
{
- return rtems_io_read( low_level_device_info.major,
-low_level_device_info.minor,
-arg );
+ rtems_fatal_error_occurred(-1);
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
-
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void* arg
)
{
- return rtems_io_write( low_level_device_info.major,
-low_level_device_info.minor,
-arg );
+ rtems_fatal_error_occurred(-1);
}
/*
* IO Control entry point
*/
-
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void* arg
)
{
- return rtems_io_control( low_level_device_info.major,
-low_level_device_info.minor,
-arg );
+ rtems_fatal_error_occurred(-1);
}
--
1.9.3
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[PATCH 34/34] or1k/or1ksim: Fix warnings
---
c/src/lib/libbsp/or1k/or1ksim/console/uart.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
b/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
index 31cdce6..bb86bae 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
+++ b/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
@@ -29,15 +29,20 @@ static ssize_t uart_write(int minor, const char *buf,
size_t len);
static void uart_write_polled(int minor, char c);
static int uart_set_attributes(int minor, const struct termios *t);
+#if 0
+/*
+ * These will be useful when the driver supports interrupt driven IO.
+ */
static rtems_vector_number uart_get_irq_number(const console_tbl *ct)
{
- return ct->ulIntVector;
+ return ct->ulIntVector;
}
static uint32_t uart_get_baud(const console_tbl *ct)
{
- return ct->ulClock;
+ return ct->ulClock;
}
+#endif
static void uart_set_baud(int baud)
{
@@ -60,11 +65,11 @@ static void uart_initialize(int minor)
OR1KSIM_REG(OR1KSIM_BSP_UART_REG_INT_ENABLE) = 0x00;
/* Reset receiver and transmitter */
- OR1KSIM_REG(OR1KSIM_BSP_UART_REG_FIFO_CTRL) =
- OR1KSIM_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO |
- OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR |
- OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT |
- OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_14;
+ OR1KSIM_REG(OR1KSIM_BSP_UART_REG_FIFO_CTRL) =
+OR1KSIM_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO |
+OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR |
+OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT |
+OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_14;
/* Set data pattern configuration */
OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_CTRL) =
--
1.9.3
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[PATCH 28/34] nios2/nios2_iss: Fix warnings
---
c/src/lib/libbsp/nios2/nios2_iss/console/console.c | 54 ++
.../lib/libbsp/nios2/nios2_iss/startup/bspstart.c | 5 +-
c/src/lib/libbsp/nios2/nios2_iss/timer/timer.c | 20
3 files changed, 28 insertions(+), 51 deletions(-)
diff --git a/c/src/lib/libbsp/nios2/nios2_iss/console/console.c
b/c/src/lib/libbsp/nios2/nios2_iss/console/console.c
index 7e50874..9197c64 100644
--- a/c/src/lib/libbsp/nios2/nios2_iss/console/console.c
+++ b/c/src/lib/libbsp/nios2/nios2_iss/console/console.c
@@ -20,36 +20,28 @@
#include
#include
-/* #define JTAG_UART_REGS
((altera_avalon_jtag_uart_regs*)NIOS2_IO_BASE(JTAG_UART_BASE)) */
+/* #define JTAG_UART_REGS \
+((altera_avalon_jtag_uart_regs*)NIOS2_IO_BASE(JTAG_UART_BASE)) */
/* is_character_ready
*
* If a character is available, this routine reads it and stores
- * it in
- * reads the character and stores
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
- * Return values:
+ * it in reads the character and stores
*/
-
-bool is_character_ready(
+static bool is_character_ready(
char *ch
)
{
-altera_avalon_jtag_uart_regs *ajur = NIOS2_IO_BASE(JTAG_UART_BASE);
-unsigned int data = ajur->data;
+ altera_avalon_jtag_uart_regs *ajur = NIOS2_IO_BASE(JTAG_UART_BASE);
+ unsigned int data = ajur->data;
-if (data & ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK)
-{
-*ch = (data & ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK)
- >> ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST;
-return true;
-};
+ if (data & ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK) {
+*ch = (data & ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK)
+ >> ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST;
+return true;
+ }
-return false;
+ return false;
}
void console_initialize_hardware(void)
@@ -58,51 +50,36 @@ void console_initialize_hardware(void)
/*
* This routine reads a character from the SOURCE.
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
- * Return values:
- *character read from SOURCE
*/
-
int console_inbyte_nonblocking(
int port
)
{
char ch;
+
/*
* Wait until a character is available.
*/
-
if (is_character_ready(&ch))
return ch;
return -1;
}
/*
- * This routine transmits a character out the SOURCE. It may support
- * XON/XOFF flow control.
- *
- * Input parameters:
- *ch - character to be transmitted
- *
- * Output parameters: NONE
+ * This routine transmits a character out the SOURCE.
*/
-
void console_outbyte_polled(
int port,
char ch
)
{
altera_avalon_jtag_uart_regs *ajur = NIOS2_IO_BASE(JTAG_UART_BASE);
+
/*
* Wait for the transmitter to be ready.
* Check for flow control requests and process.
* Then output the character.
*/
-
while ((ajur->control & ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK) == 0);
ajur->data = ch;
@@ -114,7 +91,6 @@ void console_outbyte_polled(
#include
-
static void ISS_output_char(char c) { console_outbyte_polled( 0, c ); }
BSP_output_char_function_type BSP_output_char = ISS_output_char;
diff --git a/c/src/lib/libbsp/nios2/nios2_iss/startup/bspstart.c
b/c/src/lib/libbsp/nios2/nios2_iss/startup/bspstart.c
index a465506..c619e58 100644
--- a/c/src/lib/libbsp/nios2/nios2_iss/startup/bspstart.c
+++ b/c/src/lib/libbsp/nios2/nios2_iss/startup/bspstart.c
@@ -16,10 +16,9 @@
#include
-#include
-#include
-
#include
+#include
+#include
void bsp_start( void )
{
diff --git a/c/src/lib/libbsp/nios2/nios2_iss/timer/timer.c
b/c/src/lib/libbsp/nios2/nios2_iss/timer/timer.c
index e37c821..fbb20d8 100644
--- a/c/src/lib/libbsp/nios2/nios2_iss/timer/timer.c
+++ b/c/src/lib/libbsp/nios2/nios2_iss/timer/timer.c
@@ -1,13 +1,15 @@
-/* timer.c
- *
- * This file manages the benchmark timer used by the RTEMS Timing Test
- * Suite. Each measured time period is demarcated by calls to
- * benchmark_timer_initialize() and benchmark_timer_read().
benchmark_timer_read() usually returns
- * the number of microseconds since benchmark_timer_initialize() exitted.
+/*
+ * This file manages the benchmark timer used by the RTEMS Timing Test
+ * Suite. Each measured time period is demarcated by calls to
+ * benchmark_timer_initialize() and benchmark_timer_read().
+ * benchmark_timer_read() usually returns the number of microseconds
+ * since benchmark_timer_initialize() exitted.
*
* NOTE: It is important that the timer start/stop overhead be
*determined when porting or modifying this code.
- *
+ */
+
+/*
* COPYRIGHT (c) 2005-2006 Kolja Waschk rtemsdev/ixo.de
* Derived from no_cpu/no_bsp/timer/timer.c 1.9,
* COPYRIGHT (c) 1989-1999.
@@ -30,7 +32,7 @@ bool benchmark_timer_find_average_overhead;
#define TIMER_REGS ((altera_avalon_timer_regs*)NIOS2_IO_BASE(TIMER_BASE))
-void timerisr( void )
+static rtems_isr timerisr(rtems_vector_number vector)
{
TIMER_REGS->status = 0;
Timer_interrupts++;
@@
Re: PowerPC Cache Warning Help Request
> On Oct 20, 2014, at 13:20 , Joel Sherrill wrote: > > > On 10/20/2014 12:09 PM, Gedare Bloom wrote: >> Cache manager implementations are a perennial open project. > +1 > > In this case,we only have ten RTEMS_CPU_MODELs which are not > addressed. There are currently two blocks of code in the file. One > is protected by this: > > #if defined(ppc603) || defined(ppc603e) || defined(mpc8260) > > And the other by this: > > #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) ) > > My guess with no research is that the first block of code is also > appropriate for these RTEMS_CPU_MODELs: > > e500 > mpc604 > mpc7400 mpc7455 mpc750 > qoriq > mpc55xx > > A quick google makes me pretty confident that the mpc690 and mpc7* models > belong in the ppc603 HID0 block. > > I do not have a guess about these > > ppc405 ppc440 mpc555 > > If we have to implement code to support something new, then I don't want > to do it. If we have the code and just need to check to see if more needs to > be added to the conditional, then we should. > > --joel > I'm not sure. I looked at this briefly today. The MPC55XX has a unified cache, a lot of the unimplemented entry points had to to do with operations specifically on either the instruction or data cache. I agree you could implement a unified method where accessing either would affect the other, but I also agree with Sebastian that I'm not sure it matters if someone is trying to use one of those for good reason. However, should unimplemented versions return an error instead of being a NOP? That would force one to visit code that makes assumptions. Peter - Peter Dufault HD Associates, Inc. Software and System Engineering ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Warning Report 20 Oct 2014
Hi I just submitted my latest round of patches. With those applied, things are in pretty good shape but help is needed to wrap up the remaining issues. The biggest things to note are that: + the only warnings left in libcpu code is the PowerPC cache issue. + Only the following BSPs have warnings left in BSP specific code: 2 arm-nds (inBSP=1 inLibCPU=0) 5 sparc-erc32 (inBSP=1 inLibCPU=0) 5 sparc-sis (inBSP=1 inLibCPU=0) 3 arm-raspberrypi (inBSP=2 inLibCPU=0) 6 arm-rtl22xx_t (inBSP=2 inLibCPU=0) 7 arm-rtl22xx (inBSP=2 inLibCPU=0) 7 sparc-leon2 (inBSP=3 inLibCPU=0) 9 powerpc-t32mppc (inBSP=4 inLibCPU=2) 21 powerpc-mbx821_001 (inBSP=18 inLibCPU=0) 21 powerpc-mbx821_002b (inBSP=18 inLibCPU=0) 21 powerpc-mbx821_002 (inBSP=18 inLibCPU=0) 21 powerpc-mbx860_001b (inBSP=18 inLibCPU=0) 21 powerpc-mbx860_002 (inBSP=18 inLibCPU=0) 21 powerpc-mbx860_1b (inBSP=18 inLibCPU=0) 21 powerpc-pghplus (inBSP=18 inLibCPU=0) 21 powerpc-tqm8xx_stk8xx (inBSP=18 inLibCPU=0) 25 powerpc-mbx860_005b (inBSP=22 inLibCPU=0) + The arm BSP warnings are all for do_data_abort() and I am hoping someone will step up and address that per Sebastian's suggestion of just fix them properly. + The sparc BSP warnings appear to be things that have been addressed in the leon3 but I don't know what was done. If someone would look at those, it would be appreciated. + Thomas/Sebastian have committed to addressing the mpx8xx based BSPs. I am stepping back from addressing code in warnings in RTEMS code for at least a week. I have a patch to newlib which might address some of the printf() format warnings in shared and test code. I want to make some progress on that. Community help is required to wrap this up. Thanks. -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
On October 20, 2014 3:41:06 PM CDT, Peter Dufault wrote: > >> On Oct 20, 2014, at 13:20 , Joel Sherrill >wrote: >> >> >> On 10/20/2014 12:09 PM, Gedare Bloom wrote: >>> Cache manager implementations are a perennial open project. >> +1 >> >> In this case,we only have ten RTEMS_CPU_MODELs which are not >> addressed. There are currently two blocks of code in the file. One >> is protected by this: >> >> #if defined(ppc603) || defined(ppc603e) || defined(mpc8260) >> >> And the other by this: >> >> #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) ) >> >> My guess with no research is that the first block of code is also >> appropriate for these RTEMS_CPU_MODELs: >> >> e500 >> mpc604 >> mpc7400 mpc7455 mpc750 >> qoriq >> mpc55xx >> >> A quick google makes me pretty confident that the mpc690 and mpc7* >models >> belong in the ppc603 HID0 block. >> >> I do not have a guess about these >> >> ppc405 ppc440 mpc555 >> >> If we have to implement code to support something new, then I don't >want >> to do it. If we have the code and just need to check to see if more >needs to >> be added to the conditional, then we should. >> >> --joel >> > >I'm not sure. I looked at this briefly today. The MPC55XX has a >unified cache, a lot of the unimplemented entry points had to to do >with operations specifically on either the instruction or data cache. >I agree you could implement a unified method where accessing either >would affect the other, but I also agree with Sebastian that I'm not >sure it matters if someone is trying to use one of those for good >reason. > >However, should unimplemented versions return an error instead of being >a NOP? That would force one to visit code that makes assumptions. If this is OK for the mpc55xx, feel free to submit a patch turning the warning off for it. I tend to agree that if I had a generic drive that wanted to flush data cache and all we can do on a target is flush all, then that's preferable to flushing nothing. If these are called from a cache test then we would end up with a hard error instead of a warning in that test which makes the issue worse. >Peter >- >Peter Dufault >HD Associates, Inc. Software and System Engineering ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Warning Report 20 Oct 2014
Should have provided reports as attachments. To repeat, help finishing this off is really appreciated. On 10/20/2014 3:42 PM, Joel Sherrill wrote: > Hi > > I just submitted my latest round of patches. With those applied, > things are in pretty good shape but help is needed to wrap up > the remaining issues. The biggest things to note are that: > > + the only warnings left in libcpu code is the PowerPC cache issue. > > + Only the following BSPs have warnings left in BSP specific code: > > 2 arm-nds (inBSP=1 inLibCPU=0) > 5 sparc-erc32 (inBSP=1 inLibCPU=0) > 5 sparc-sis (inBSP=1 inLibCPU=0) > 3 arm-raspberrypi (inBSP=2 inLibCPU=0) > 6 arm-rtl22xx_t (inBSP=2 inLibCPU=0) > 7 arm-rtl22xx (inBSP=2 inLibCPU=0) > 7 sparc-leon2 (inBSP=3 inLibCPU=0) > 9 powerpc-t32mppc (inBSP=4 inLibCPU=2) > 21 powerpc-mbx821_001 (inBSP=18 inLibCPU=0) > 21 powerpc-mbx821_002b (inBSP=18 inLibCPU=0) > 21 powerpc-mbx821_002 (inBSP=18 inLibCPU=0) > 21 powerpc-mbx860_001b (inBSP=18 inLibCPU=0) > 21 powerpc-mbx860_002 (inBSP=18 inLibCPU=0) > 21 powerpc-mbx860_1b (inBSP=18 inLibCPU=0) > 21 powerpc-pghplus (inBSP=18 inLibCPU=0) > 21 powerpc-tqm8xx_stk8xx (inBSP=18 inLibCPU=0) > 25 powerpc-mbx860_005b (inBSP=22 inLibCPU=0) > > + The arm BSP warnings are all for do_data_abort() and I am > hoping someone will step up and address that per Sebastian's > suggestion of just fix them properly. > > + The sparc BSP warnings appear to be things that have been > addressed in the leon3 but I don't know what was done. If > someone would look at those, it would be appreciated. > > + Thomas/Sebastian have committed to addressing the > mpx8xx based BSPs. > > I am stepping back from addressing code in warnings in RTEMS > code for at least a week. I have a patch to newlib which might > address some of the printf() format warnings in shared and test > code. I want to make some progress on that. > > Community help is required to wrap this up. > > Thanks. > > -- > Joel Sherrill, Ph.D. Director of Research & Development > joel.sherr...@oarcorp.comOn-Line Applications Research > Ask me about RTEMS: a free RTOS Huntsville AL 35805 > Support Available(256) 722-9985 -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985 Unique Warnings : 138 BSPs: 183 BSPs with Zero : 0 BSPs with only in shared: 139 Warnings by Class 2 cpp 20 format= 3 int-to-pointer-cast 2 maybe-uninitialized 46 missing-prototypes 1 overflow 7 pointer-to-int-cast 5 unused-but-set-variable 10 unused-function Top Ten BSPs with Warnings 9 powerpc-t32mppc (inBSP=4 inLibCPU=2) 21 powerpc-mbx821_001 (inBSP=18 inLibCPU=0) 21 powerpc-mbx821_002b (inBSP=18 inLibCPU=0) 21 powerpc-mbx821_002 (inBSP=18 inLibCPU=0) 21 powerpc-mbx860_001b (inBSP=18 inLibCPU=0) 21 powerpc-mbx860_002 (inBSP=18 inLibCPU=0) 21 powerpc-mbx860_1b (inBSP=18 inLibCPU=0) 21 powerpc-pghplus (inBSP=18 inLibCPU=0) 21 powerpc-tqm8xx_stk8xx (inBSP=18 inLibCPU=0) 25 powerpc-mbx860_005b (inBSP=22 inLibCPU=0) 200 c/src/../../cpukit/libmisc/shell/hexdump-conv.c:145:4: warning: format '%lc' expects argument of type 'wint_t', but argument 4 has type 'wchar_t' [-Wformat=] 180 c/src/../../cpukit/libfs/src/rfs/rtems-rfs-rtems.c:524:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] 78 c/src/../../cpukit/libmisc/shell/main_lsof.c:88:5: warning: format '%x' expects argument of type 'unsigned int', but argument 8 has type 'long unsigned int' [-Wformat=] 78 c/src/../../cpukit/libmisc/shell/main_lsof.c:67:3: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'long unsigned int' [-Wformat=] 78 c/src/../../cpukit/libmisc/shell/main_lsof.c:36:3: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'long unsigned int' [-Wformat=] 78 c/src/../../cpukit/libmisc/shell/main_lsof.c:36:3: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'long unsigned int' [-Wformat=] 78 c/src/../../cpukit/libmisc/shell/main_lsof.c:36:3: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'long unsigned int' [-Wformat=] 78 c/src/../../cpukit/libmisc/shell/main_lsof.c:36:3: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'long unsigned int' [-Wformat=] 78 c/src/../../cpukit/libmisc/capture/capture-cli.c:1424:18: warning: format '%x' expects argument of type
Re: PowerPC Cache Warning Help Request
> On Oct 20, 2014, at 16:47 , Joel Sherrill wrote: > >> However, should unimplemented versions return an error instead of being >> a NOP? That would force one to visit code that makes assumptions. > > If this is OK for the mpc55xx, feel free to submit a patch turning the > warning off for it. > > I tend to agree that if I had a generic drive that wanted to flush data cache > and all we can do on a target is flush all, then that's preferable to > flushing nothing. > > If these are called from a cache test then we would end up with a hard error > instead of a warning in that test which makes the issue worse. > I'm flat-out, I can't do a proper job on this. I couldn't have told you that the MPC55XX had a unified cache before I checked this morning, but I would have gotten the answer correct on a multiple-choice question. I think that unimplemented operations should return errors and not OK, forcing one to add an implementation when it is OK. But the MPC55XX and its cache works fine as long as you keep cache-flushing in mind and flush it when you should, so I don't recommend anything be changed in the next RTEMS release. Peter - Peter Dufault HD Associates, Inc. Software and System Engineering ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: x86 interpreter and NOVA hypervisor - Was: [PATCH] do_it
On Mon, Oct 20, 2014 at 10:55 AM, Pavel Pisa wrote: > Hello Gedare and others, > > On Sunday 19 of October 2014 15:01:08 Gedare Bloom wrote: >> On Sun, Oct 19, 2014 at 7:48 AM, Pavel Pisa > ... >> >set interpreter in RTEMS which would allow to run BIOS x86 >> >real code sandboxed and with additional memory ranges protection >> >and with minimal impact on other RT code running in parallel. >> >This would be nice to do, allows to use x86 PCI VESA BIOS cards >> >on other PCI enabled architectures but it is above our current >> >capabilities and time constraints. On the other hand we can provide >> >example from NOVA microkernel which achieved and uses this goal. >> >> This last option seems quite interesting. Can you link to the example >> or any doc on how it is done? > > The x86 interpreter used for BIOS, VBE and other untrusted HW related > code indirect execution is part of NOVA hypervisor. The source code > of the executor is there > > https://github.com/TUD-OS/seoul/tree/master/executor > > The executor is written in C++ and significant part of source > code for x86 instruction decoding is build with use of python > script and GNU binutils. > > The code is GPL licensed but there is some chance to negotiate > RTEMS required exception. My colleague - Michal Sojka - has > worked with these people and have contact to them. > > As for the related hypervisor and kernel project, it would > be interresting to combine RTEMS and NOVA hypervisor > http://hypervisor.org/ for some kinds of applications. > My colleague looks for some research project which would > allow to cooperate on porting NOVA to ARM/AArch64 and or > to combine NOVA with RTEMS. RTEMS porting to AArch 64 > would be interresting for me as well. But these are kinds > of projects which we cannot start from enthusiasm only. > They require funding - i.e. larger research project, consortium, > strong company contract etc. to pay required man years of work. > Thanks Pavel, perhaps any of these could make decent GSoC if we get in again. The paravirtualization of RTEMS slowly moves toward a steady staet I feel, but there are lingering problems with the bsp-centric nature of RTEMS that make the existing solutions less than satisfactory to me. (All proposals so far require linking some blob for the hypercall interface. We should perhaps invest in something else like pvops.) Are there good boards for aarch64 that motivate using RTEMS on it? -Gedare > Best wishes, > >Pavel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: __assert.c Wpointer-to-int-cast
On Tue, Oct 14, 2014 at 2:21 AM, Sebastian Huber wrote: > On 14/10/14 04:21, Gedare Bloom wrote: >> >> cpukit/libcsupport/src/__assert.c52:43: >> warning: cast from pointer to integer of different size >> [-Wpointer-to-int-cast] >> rtems_fatal( RTEMS_FATAL_SOURCE_ASSERT, (rtems_fatal_code) >> &assert_context ); >> >> This code casts the address of assert_control into an >> rtems_fatal_code, which is uint32_t. I assume it was done so one can >> find the context while debugging, but it is non-portable behavior for >> 64-bit addresses. >> >> We could fix this a few ways: >> 1) Make rtems_fatal_code a uintptr_t type so it gets the same width as a >> pointer >> 2) Make rtems_fatal accept a uintptr_t type so it can get a wider int >> than rtems_fatal_code >> 3) Don't allow this abuse of rtems_fatal. A workaround could be to >> pass the offset in the frame of the assert_control. Less clean for >> debugging though. > > > 4) use "unsigned long" for Internal_errors_t since this type has at least > 32-bits in contrast to uintptr_t. This is already used for > RBTree_Compare_result. See also static assertions in > cpukit/score/src/rbtreeinsert.c. The rtems_task_argument has similar > issues. Maybe we should add a base integer type suitable for pointer storage > which is at least 32-bits wide. > It makes sense to me that there should be a ulongptr_t > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: PowerPC Cache Warning Help Request
On Mon, Oct 20, 2014 at 5:11 PM, Peter Dufault wrote: > >> On Oct 20, 2014, at 16:47 , Joel Sherrill wrote: >> >>> However, should unimplemented versions return an error instead of being >>> a NOP? That would force one to visit code that makes assumptions. >> >> If this is OK for the mpc55xx, feel free to submit a patch turning the >> warning off for it. >> >> I tend to agree that if I had a generic drive that wanted to flush data >> cache and all we can do on a target is flush all, then that's preferable to >> flushing nothing. >> >> If these are called from a cache test then we would end up with a hard error >> instead of a warning in that test which makes the issue worse. >> > > I'm flat-out, I can't do a proper job on this. I couldn't have told you that > the MPC55XX had a unified cache before I checked this morning, but I would > have gotten the answer correct on a multiple-choice question. > > I think that unimplemented operations should return errors and not OK, > forcing one to add an implementation when it is OK. But the MPC55XX and its > cache works fine as long as you keep cache-flushing in mind and flush it when > you should, so I don't recommend anything be changed in the next RTEMS > release. > +1 What we should do is make sure any generic cache mgr functions that get called within RTEMS are all implemented (I recall there being some, they may be in score/cpu code though.) Then make the unimplemented calls be errors. If someone uses it without checking, they should get slapped for it. -Gedare > Peter > - > Peter Dufault > HD Associates, Inc. Software and System Engineering > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
