[PATCH] D45045: [DebugInfo] Generate debug information for labels.
tyb0807 reopened this revision. tyb0807 added a comment. Hello all, This commit has been reverted by https://reviews.llvm.org/rC345026. It was reported that this broke the Chromium build (again). Have you had a look to fix this, @HsiangKai? Repository: rC Clang https://reviews.llvm.org/D45045 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D120864: [AArch64] Avoid scanning feature list for target parsing
tyb0807 updated this revision to Diff 419866.
tyb0807 added a comment.
Herald added a subscriber: MaskRay.
Refactor fp16 feature handling and add more fp16 tests for v8.5 and later
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120864/new/
https://reviews.llvm.org/D120864
Files:
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-cpus-2.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -294,7 +294,7 @@
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fp16fml" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
Index: clang/test/Driver/aarch64-cpus-2.c
===
--- clang/test/Driver/aarch64-cpus-2.c
+++ clang/test/Driver/aarch64-cpus-2.c
@@ -193,6 +193,122 @@
// RUN: %clang -target aarch64 -march=armv8.4-a+nofp16+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV84A-NO-FP16-FP16FML %s
// GENERICV84A-NO-FP16-FP16FML: "-target-feature" "+fp16fml" "-target-feature" "+fullfp16"
+// RUN: %clang -target aarch64 -march=armv8.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML %s
+// RUN: %clang -target aarch64 -march=armv8.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML %s
+// GENERICV85A-NO-FP16FML-NOT: "-target-feature" "{{[+-]}}fp16fml"
+// GENERICV85A-NO-FP16FML-NOT: "-target-feature" "{{[+-]}}fullfp16"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16 %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16 %s
+// GENERICV85A-FP16: "-target-feature" "+fullfp16" "-target-feature" "+fp16fml"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16FML %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16FML %s
+// GENERICV85A-FP16FML: "-target-feature" "+fp16fml" "-target-feature" "+fullfp16"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+fp16+nofp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16-NO-FP16FML %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+fp16+nofp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16-NO-FP16FML %s
+// GENERICV85A-FP16-NO-FP16FML: "-target-feature" "+fullfp16" "-target-feature" "-fp16fml"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+nofp16fml+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML-FP16 %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+nofp16fml+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML-FP16 %s
+// GENERICV85A-NO-FP16FML-FP16: "-target-feature" "+fullfp16" "-target-feature" "+fp16fml"
+
+// RUN: %clang -tar
[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGb93893e60f0c: [AArch64] Default HBC/MOPS features in clang (authored by tyb0807). Herald added a subscriber: MaskRay. Herald added a project: All. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120111/new/ https://reviews.llvm.org/D120111 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Driver/ToolChains/Arch/AArch64.cpp clang/test/Driver/aarch64-hbc.c clang/test/Driver/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -524,14 +524,18 @@ // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 // == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s // CHECK-MOPS: __ARM_FEATURE_MOPS 1 // CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/Driver/aarch64-mops.c === --- clang/test/Driver/aarch64-mops.c +++ clang/test/Driver/aarch64-mops.c @@ -1,6 +1,12 @@ // Test that target feature mops is implemented and available correctly -// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s -// CHECK: "-target-feature" "+mops" - +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.7-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s // RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nomops %s 2>&1 | FileCheck %s --check-prefix=NO_MOPS +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.2-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none
[PATCH] D120864: [AArch64] Avoid scanning feature list for target parsing
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9a015ee1f948: [AArch64] Avoid scanning feature list for
target parsing (authored by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120864/new/
https://reviews.llvm.org/D120864
Files:
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-cpus-2.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -294,7 +294,7 @@
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fp16fml" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
Index: clang/test/Driver/aarch64-cpus-2.c
===
--- clang/test/Driver/aarch64-cpus-2.c
+++ clang/test/Driver/aarch64-cpus-2.c
@@ -193,6 +193,122 @@
// RUN: %clang -target aarch64 -march=armv8.4-a+nofp16+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV84A-NO-FP16-FP16FML %s
// GENERICV84A-NO-FP16-FP16FML: "-target-feature" "+fp16fml" "-target-feature" "+fullfp16"
+// RUN: %clang -target aarch64 -march=armv8.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML %s
+// RUN: %clang -target aarch64 -march=armv8.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML %s
+// GENERICV85A-NO-FP16FML-NOT: "-target-feature" "{{[+-]}}fp16fml"
+// GENERICV85A-NO-FP16FML-NOT: "-target-feature" "{{[+-]}}fullfp16"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16 %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16 %s
+// GENERICV85A-FP16: "-target-feature" "+fullfp16" "-target-feature" "+fp16fml"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16FML %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16FML %s
+// GENERICV85A-FP16FML: "-target-feature" "+fp16fml" "-target-feature" "+fullfp16"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+fp16+nofp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16-NO-FP16FML %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+fp16+nofp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-FP16-NO-FP16FML %s
+// GENERICV85A-FP16-NO-FP16FML: "-target-feature" "+fullfp16" "-target-feature" "-fp16fml"
+
+// RUN: %clang -target aarch64 -march=armv8.5a+nofp16fml+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML-FP16 %s
+// RUN: %clang -target aarch64 -march=armv8.5-a+nofp16fml+fp16 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV85A-NO-FP16FML-FP16 %s
+// GENERICV85A-NO-FP16FML-FP16: "-target-feature" "+
[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
tyb0807 updated this revision to Diff 405786.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Add more tests
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116153/new/
https://reviews.llvm.org/D116153
Files:
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -294,7 +294,7 @@
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon"
"-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature"
"+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature"
"+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 |
FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a"
"-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature"
"+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod"
"-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse"
"-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm"
"-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature"
"+sha2" "-target-feature" "+aes"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a"
"-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature"
"+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod"
"-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse"
"-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm"
"-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 |
FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a"
"-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature"
"+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16"
"-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm"
"-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz"
"-target-feature" "+sha2" "-target-feature" "+aes"
@@ -390,7 +390,13 @@
// Check +crypto:
//
// RUN: %clang -target aarch64 -march=armv8.4a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO84 %s
-// CHECK-CRYPTO84: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.4a" "-target-feature" "+crypto" "-target-feature" "+sm4" "-target-feature"
"+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// RUN: %clang -target aarch64 -march=armv8.5a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO85 %s
+// RUN: %clang -target aarch64 -march=armv8.6a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO86 %s
+// RUN: %clang -target aarch64 -march=armv8.7a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO87 %s
+// CHECK-CRYPTO84: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.4a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO85: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.5a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO86: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.6a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO87: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.7a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
//
// Check -crypto:
//
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -394,6 +394,9 @@
}
if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.5a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.6a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.7a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v8.8a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9.1a") != ItEnd ||
Index: clang/lib/Basic/Targets/ARM.cpp
=
[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
tyb0807 marked 2 inline comments as done. tyb0807 added inline comments. Comment at: clang/lib/Basic/Targets/ARM.cpp:937 case llvm::ARM::ArchKind::ARMV9_2A: getTargetDefinesARMV83A(Opts, Builder); break; SjoerdMeijer wrote: > Perhaps unrelated to this patch, but I am surprised to see that from v 8.3 > and up we only include `getTargetDefinesARMV83A`, so no other target defines > were introduced or are necessary? This is not rhetorical questionI > haven't paid attention to this since v8.4. It seems that most of the time, `getTargetDefinesARMV8(x)A` only includes `getTargetDefinesARMV8(x-1)A` (see `AArch64TargetInfo::getTargetDefines`). What we have here is a equivalent way to do that, with less boilerplate code. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116153/new/ https://reviews.llvm.org/D116153 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D116160: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 abandoned this revision. tyb0807 added a comment. This is superseded by https://reviews.llvm.org/D118199. Comments have been addressed in the new patch. I should have commandeered this patch instead (did not know about this, sorry...). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116160/new/ https://reviews.llvm.org/D116160 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd379ec99085e: [AArch64] ACLE feature macro for Armv8.8-A
MOPS (authored by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118199/new/
https://reviews.llvm.org/D118199
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/test/CodeGen/aarch64-mops.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -510,9 +510,21 @@
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// == Check Largse System Extensions (LSE)
+// == Check Large System Extensions (LSE)
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// CHECK-LSE: __ARM_FEATURE_ATOMICS 1
+
+// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS)
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// CHECK-MOPS: __ARM_FEATURE_MOPS 1
+// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1
Index: clang/test/CodeGen/aarch64-mops.c
===
--- clang/test/CodeGen/aarch64-mops.c
+++ clang/test/CodeGen/aarch64-mops.c
@@ -1,8 +1,18 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -verify %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -Xclang -verify -S -emit-llvm %s -o -
-#define __ARM_FEATURE_MOPS 1
#include
#include
@@ -13,9 +23,9 @@
// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
// CHECK-NEXT:ret i8* [[TMP1]]
-//
void *bzero_0(void *dst) {
- return __arm_mops_memset_tag(dst, 0, 0);
+ // expected-warning@+1 {{incompatible integer to pointer conversion returning 'int' from a function with result type 'void *'}}
+ return __arm_mops_memset_tag(dst, 0, 0); // expected-warning{{implicit declaration of function '__arm_mops_memset_tag' is invalid in C99}}
}
// CHECK-LABEL: @b
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 reopened this revision. tyb0807 added a comment. This revision is now accepted and ready to land. Reverted due to buildbots failures Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 407155.
tyb0807 added a comment.
Fix buildbots failures
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118199/new/
https://reviews.llvm.org/D118199
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/test/CodeGen/aarch64-mops.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -510,9 +510,21 @@
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// == Check Largse System Extensions (LSE)
+// == Check Large System Extensions (LSE)
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// CHECK-LSE: __ARM_FEATURE_ATOMICS 1
+
+// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS)
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// CHECK-MOPS: __ARM_FEATURE_MOPS 1
+// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1
Index: clang/test/CodeGen/aarch64-mops.c
===
--- clang/test/CodeGen/aarch64-mops.c
+++ clang/test/CodeGen/aarch64-mops.c
@@ -1,153 +1,77 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi-S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
-// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
-
-#define __ARM_FEATURE_MOPS 1
#include
#include
-// CHECK-LABEL: @bzero_0(
-// CHECK-NEXT: entry:
-// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
-// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
-// CHECK-NEXT:ret i8* [[TMP1]]
-//
+// CHECK-LABEL: @bzero_0(
+// CHECK-MOPS:@llvm.aarch64.mops.memset.tag
+// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_0(void *dst) {
return __arm_mops_memset_tag(dst, 0, 0);
}
-// CHECK-LABEL: @bzero_1(
-// CHECK-NEXT: entry:
-// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
-// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
-// CHECK-NEXT:ret i8* [[TMP1]]
-//
+// CHECK-LABEL: @bzero_1(
+// CHECK-MOPS:@llvm.aarch64.mops.memset.tag
+// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_1(void *dst) {
return __arm_mops_memset_tag(dst, 0, 1);
}
-// CHECK-LABEL: @bzero_10(
-
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 407159.
tyb0807 added a comment.
Turn off warnings for negative tests
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118199/new/
https://reviews.llvm.org/D118199
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/test/CodeGen/aarch64-mops.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -510,9 +510,21 @@
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// == Check Largse System Extensions (LSE)
+// == Check Large System Extensions (LSE)
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// CHECK-LSE: __ARM_FEATURE_ATOMICS 1
+
+// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS)
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// CHECK-MOPS: __ARM_FEATURE_MOPS 1
+// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1
Index: clang/test/CodeGen/aarch64-mops.c
===
--- clang/test/CodeGen/aarch64-mops.c
+++ clang/test/CodeGen/aarch64-mops.c
@@ -1,153 +1,77 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mte -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi-w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
-// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
-
-#define __ARM_FEATURE_MOPS 1
#include
#include
-// CHECK-LABEL: @bzero_0(
-// CHECK-NEXT: entry:
-// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
-// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
-// CHECK-NEXT:ret i8* [[TMP1]]
-//
+// CHECK-LABEL: @bzero_0(
+// CHECK-MOPS:@llvm.aarch64.mops.memset.tag
+// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_0(void *dst) {
return __arm_mops_memset_tag(dst, 0, 0);
}
-// CHECK-LABEL: @bzero_1(
-// CHECK-NEXT: entry:
-// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
-// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
-// CHECK-NEXT:ret i8* [[TMP1]]
-//
+// CHECK-LABEL: @bzero_1(
+// CHECK-MOPS:@llvm.aarch64.mops.memset.tag
+// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_1(void *dst) {
return __arm_mops_memset_tag(dst, 0, 1);
}
-//
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc70b93508901: [AArch64] ACLE feature macro for Armv8.8-A
MOPS (authored by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118199/new/
https://reviews.llvm.org/D118199
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/test/CodeGen/aarch64-mops.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -510,9 +510,21 @@
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// == Check Largse System Extensions (LSE)
+// == Check Large System Extensions (LSE)
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// CHECK-LSE: __ARM_FEATURE_ATOMICS 1
+
+// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS)
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// CHECK-MOPS: __ARM_FEATURE_MOPS 1
+// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1
Index: clang/test/CodeGen/aarch64-mops.c
===
--- clang/test/CodeGen/aarch64-mops.c
+++ clang/test/CodeGen/aarch64-mops.c
@@ -1,153 +1,77 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mte -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi-w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
-// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
-
-#define __ARM_FEATURE_MOPS 1
#include
#include
-// CHECK-LABEL: @bzero_0(
-// CHECK-NEXT: entry:
-// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
-// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
-// CHECK-NEXT:ret i8* [[TMP1]]
-//
+// CHECK-LABEL: @bzero_0(
+// CHECK-MOPS:@llvm.aarch64.mops.memset.tag
+// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_0(void *dst) {
return __arm_mops_memset_tag(dst, 0, 0);
}
-// CHECK-LABEL: @bzero_1(
-// CHECK-NEXT: entry:
-// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
-// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
-// CHECK-NEXT:ret i8* [[TMP1]]
-//
+// CHECK-LABEL: @bzero_1(
+// CHECK-MOPS:@llvm.aarch64.mops.memset.tag
+// CHEC
[PATCH] D127798: [AArch64] Define __ARM_FEATURE_RCPC
tyb0807 added a comment. The patch looks correct to me, but looking at https://github.com/ARM-software/acle/blob/main/main/acle.md where all the ACLE macros are defined, I'm not sure that `__ARM_FEATURE_RCPC` is there currently. Maybe you also want to submit a patch there, or at least explain the context of this change please? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D127798/new/ https://reviews.llvm.org/D127798 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 created this revision.
Herald added a subscriber: kristof.beyls.
tyb0807 requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.
This introduces a new ACLE intrinsic for memset tagged (see
https://github.com/ARM-software/acle/pull/38).
void *__builtin_arm_mops_memset_tag(void *, int, size_t)
A corresponding LLVM intrinsic is introduced:
i8* llvm.aarch64.mops.memset.tag(i8*, i8, i64)
The types match llvm.memset but the return type is not void.
Patch by Tomas Matheson
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -890,6 +890,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,152 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -O0 -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VA
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 updated this revision to Diff 401534.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Update commit message to clarify context.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117753/new/
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -890,6 +890,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,152 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -O0 -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VALUE:%.*]], i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+// CHECK-NEXT:[[TMP3:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i
[PATCH] D117405: [AArch64] CodeGen for Armv8.8/9.3 MOPS
tyb0807 added a comment. Following Dave's comments above, this patch is now split to 4 different patches https://reviews.llvm.org/D117753 https://reviews.llvm.org/D117757 https://reviews.llvm.org/D117763 https://reviews.llvm.org/D117764 and may now be abandoned. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117405/new/ https://reviews.llvm.org/D117405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D117405: [AArch64] CodeGen for Armv8.8/9.3 MOPS
tyb0807 marked 8 inline comments as done.
tyb0807 added inline comments.
Comment at: llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp:836
+ // inside a bundle to prevent other passes to moving things in between.
+ MIBundleBuilder Bundler(MBB, MBBI);
+ auto &MF = *MBB.getParent();
dmgreen wrote:
> It is probably better to expand the instruction later than to create a bundle.
Please see https://reviews.llvm.org/D117763, the instruction is now expanded as
late as possible in the pipeline (i.e. during code emission)
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:940
+ if (Subtarget->hasMOPS()) {
+// If we have MOPS, always use them
+MaxStoresPerMemsetOptSize = 0;
dmgreen wrote:
> Are you sure we should _always_ be using them? I would expect a `ldr+str` to
> be better than a `mov #4; cpyfp; cpyfm; cpyfe`, for example.
Please see https://reviews.llvm.org/D117764, we are now conservative on when to
use MOPS instructions instead of `ldr+str`
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11875
+Info.opc = ISD::INTRINSIC_W_CHAIN;
+Info.memVT = MVT::getVT(Val->getType());
+Info.ptrVal = Dst;
dmgreen wrote:
> Can this safely set memVT to the size of a single element? That would need to
> be multiplied by the size of the memory being set, and if this is being used
> for aliasing info will be too small.
Please see https://reviews.llvm.org/D117764, the size is set to unknown.
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:8350
+ let mayLoad = 1 in {
+def MOPSMemoryCopy : Pseudo<(outs GPR64common:$Rd_wb, GPR64common:$Rs_wb,
GPR64:$Rn_wb),
+(ins GPR64common:$Rd, GPR64common:$Rs,
GPR64:$Rn),
dmgreen wrote:
> These need to be marked as 96bit pseudos. They should also clobber NZCV (as
> should the real instructions above, but that doesn't look like it was ever
> changed after D116157)
Changes to make real instructions NZCV clobbering here
https://reviews.llvm.org/D117757
Changes to make pseudos NZCV clobbering (and specifying their size) here
https://reviews.llvm.org/D117764
Comment at: llvm/test/CodeGen/AArch64/aarch64-mops-mte.ll:3
+
+; RUN: llc %s -o - -mtriple=aarch64-arm-none-eabi -O2 -mattr=+mops,+mte |
FileCheck %s --check-prefix=SDAG
+; RUN: llc %s -o - -mtriple=aarch64-arm-none-eabi -O0 -global-isel=1
-global-isel-abort=1 -mattr=+mops,+mte | FileCheck %s --check-prefix=GISel
dmgreen wrote:
> You likely don't need the -O2 and -O0 for llc run commands.
Agreed, we can do this without. However, this will change the generated code
(thus the strings that these tests are looking for), hence I'm leaving those
options. Please lmk if this is _really_ unwanted and I'll try to fix these
tests
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117405/new/
https://reviews.llvm.org/D117405
___
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[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 marked 3 inline comments as done. tyb0807 added inline comments. Comment at: clang/lib/Headers/arm_acle.h:734 +/* Memory Operations Intrinsics */ +#if __ARM_FEATURE_MOPS && __ARM_FEATURE_MEMORY_TAGGING +#define __arm_mops_memset_tag(tagged_address, value, size) \ SjoerdMeijer wrote: > Why does this also need MTE? I think the ACLE specifies this intrinsic to be > available when __ARM_FEATURE_MOPS is defined? Yes you are right, thanks for spotting this. Comment at: clang/lib/Headers/arm_acle.h:736 +#define __arm_mops_memset_tag(tagged_address, value, size) \ + __builtin_arm_mops_memset_tag(tagged_address, value, size) +#endif dmgreen wrote: > dmgreen wrote: > > The arguments are better named __value and __size, etc. That way they only > > use reserved names and uses won't run into trouble if they `#define value > > 42` before the include. > Oh, I mean `__value` and `__size`, etc :) Yes, thanks for the review Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117753/new/ https://reviews.llvm.org/D117753 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 updated this revision to Diff 401851.
tyb0807 marked 2 inline comments as done.
tyb0807 added a comment.
`__ARM_FEATURE_MEMORY_TAGGING` not needed to enable
`__builtin_arm_mops_memset_tag`.
Follow variable naming convention.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117753/new/
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -890,6 +890,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,153 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VALUE:%.*]], i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+// CHECK-NEXT:[[TMP3:%.*]] =
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 updated this revision to Diff 401973.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Update reference to ACLE specification
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117753/new/
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -890,6 +890,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,153 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VALUE:%.*]], i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+// CHECK-NEXT:[[TMP3:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 [[TMP2]], i64 0)
+// CHE
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 marked an inline comment as done. tyb0807 added inline comments. Comment at: clang/test/CodeGen/aarch64-mops.c:3 + +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -S -emit-llvm -o - %s | FileCheck %s + SjoerdMeijer wrote: > I forgot if we add negative tests for these things, i.e. check if we error if > we don't have `+mops` or `__ARM_FEATURE_MOPS` set? I guess so? Currently this only tests if the support for memset tagged intrinsic is in clang, how to enable the memset tagged intrinsic is implemented (and tested) in a separate patch (https://reviews.llvm.org/D116160). Note how we set `__ARM_FEATURE_MOPS` manually in line 5. This test will thus be updated with negative tests in https://reviews.llvm.org/D116160 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D117753/new/ https://reviews.llvm.org/D117753 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 created this revision. Herald added a subscriber: kristof.beyls. tyb0807 requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This introduces the new __ARM_FEATURE_MOPS ACLE feature test macro, which signals the availability of the new Armv8.8-A/Armv9.3-A instructions for standardising memcpy, memset and memmove operations. This patch supersedes the one from https://reviews.llvm.org/D116160. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D118199 Files: clang/lib/Basic/Targets/AArch64.cpp clang/test/CodeGen/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -516,3 +516,15 @@ // RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 + +// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// CHECK-MOPS: __ARM_FEATURE_MOPS 1 +// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/CodeGen/aarch64-mops.c === --- clang/test/CodeGen/aarch64-mops.c +++ clang/test/CodeGen/aarch64-mops.c @@ -1,152 +1,277 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -#define __ARM_FEATURE_MOPS 1 #include #include -// CHECK-LABEL: @bzero_0( -// CHECK-NEXT: entry: -// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 -// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0) -// CHECK-NEXT:ret i8* [[TMP1]] +// CHECK-MOPS-LABEL: @bzero_0( +// CHECK-MOPS: entry: +// CHECK-MOPS-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 +// CHECK-MOPS-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 +// CHECK-MOPS-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 +// CHECK-MOPS-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0) +// CHECK-MOPS-NEXT:ret i8* [[TMP1]] +// +// CHECK-NOMOPS-LABEL: @bzero_0( +// CHECK-NOMOPS: entry: +// CHECK-NOMOPS-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 +// CHECK-NOMOPS-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 +// CHECK-NOMOPS-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 +// CHECK-NOMOPS-NEXT:[[CALL:%.*]] = call i32 bitcast (i32 (...)* @__arm_mops_memset_tag to i32 (i8*, i32, i32)*)(i8* noundef [[TMP0]], i32 noundef 0, i32 noundef 0) +// CHECK-NOMOPS-NEXT:[[CONV:%.*]] = sext i32 [[CALL]] to i64 +// C
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 added a comment. Yes, https://reviews.llvm.org/D116160 is deprecated and will be abandoned. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 updated this revision to Diff 403686.
tyb0807 marked an inline comment as done.
tyb0807 added a comment.
Update accordingly to change from ACLE specification:
`__builtin_arm_mops_memset_tag` required _both_ MOPS and MTE features
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117753/new/
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -890,6 +890,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,153 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VALUE:%.*]], i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+// CHECK-N
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
tyb0807 updated this revision to Diff 403687.
tyb0807 marked 3 inline comments as done.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Update link to the relevant section of ACLE specification
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117753/new/
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -890,6 +890,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,153 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VALUE:%.*]], i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+// CHECK-NEXT:[[TMP3:%.*]]
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 404347. tyb0807 added a comment. Add more tests and update accordingly to change from ACLE specification: `__builtin_arm_mops_memset_tag` requires _both_ MOPS and MTE features Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 Files: clang/lib/Basic/Targets/AArch64.cpp clang/test/CodeGen/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -516,3 +516,15 @@ // RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 + +// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// CHECK-MOPS: __ARM_FEATURE_MOPS 1 +// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/CodeGen/aarch64-mops.c === --- clang/test/CodeGen/aarch64-mops.c +++ clang/test/CodeGen/aarch64-mops.c @@ -1,152 +1,281 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi-S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -#define __ARM_FEATURE_MOPS 1 #include #include -// CHECK-LABEL: @bzero_0( -// CHECK-NEXT: entry: -// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 -// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0) -// CHECK-NEXT:ret i8* [[TMP1]] +// CHECK-MOPS-LABEL: @bzero_0( +// CHECK-MOPS: entry: +// CHECK-MOPS-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 +// CHECK-MOPS-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 +// CHECK-MOPS-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 +// CHECK-MOPS-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0) +// CHECK-MOPS-NEXT:ret i8* [[TMP1]] +// +// CHECK-NOMOPS-LABEL: @bzero_0( +// CHECK-NOMOPS:
[PATCH] D117753: [AArch64] Support for memset tagged intrinsic
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG51e188d079f6: [AArch64] Support for memset tagged intrinsic
(authored by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117753/new/
https://reviews.llvm.org/D117753
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -897,6 +897,14 @@
[IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
}
+//===--===//
+// Memory Operations (MOPS) Intrinsics
+let TargetPrefix = "aarch64" in {
+ // Sizes are chosen to correspond to the llvm.memset intrinsic: ptr, i8, i64
+ def int_aarch64_mops_memset_tag : DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_ptr_ty, llvm_i8_ty, llvm_i64_ty],
+ [IntrWriteMem, IntrArgMemOnly, NoCapture>, WriteOnly>]>;
+}
+
// Transactional Memory Extension (TME) Intrinsics
let TargetPrefix = "aarch64" in {
def int_aarch64_tstart : GCCBuiltin<"__builtin_arm_tstart">,
Index: clang/test/CodeGen/aarch64-mops.c
===
--- /dev/null
+++ clang/test/CodeGen/aarch64-mops.c
@@ -0,0 +1,153 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
+
+#define __ARM_FEATURE_MOPS 1
+#include
+#include
+
+// CHECK-LABEL: @bzero_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_0(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 0);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_10(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 10)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_10(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 10);
+}
+
+// CHECK-LABEL: @bzero_1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 1)
+// CHECK-NEXT:ret i8* [[TMP1]]
+//
+void *bzero_1(void *dst) {
+ return __arm_mops_memset_tag(dst, 0, 1);
+}
+
+// CHECK-LABEL: @bzero_n(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[SIZE_ADDR:%.*]] = alloca i64, align 8
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i64 [[SIZE:%.*]], i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i64, i64* [[SIZE_ADDR]], align 8
+// CHECK-NEXT:[[TMP2:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 [[TMP1]])
+// CHECK-NEXT:ret i8* [[TMP2]]
+//
+void *bzero_n(void *dst, size_t size) {
+ return __arm_mops_memset_tag(dst, 0, size);
+}
+
+// CHECK-LABEL: @memset_0(
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8
+// CHECK-NEXT:[[VALUE_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:store i32 [[VALUE:%.*]], i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* [[VALUE_ADDR]], align 4
+// CHECK-NEXT:[[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+// CHECK-NEXT:
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 404854. tyb0807 added a comment. Add support for `+nomops` Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 Files: clang/lib/Basic/Targets/AArch64.cpp clang/test/CodeGen/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -510,9 +510,25 @@ // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS -// == Check Largse System Extensions (LSE) +// == Check Large System Extensions (LSE) // RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 + +// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// CHECK-MOPS: __ARM_FEATURE_MOPS 1 +// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/CodeGen/aarch64-mops.c === --- clang/test/CodeGen/aarch64-mops.c +++ clang/test/CodeGen/aarch64-mops.c @@ -1,152 +1,281 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi-S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -marc
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 404897. tyb0807 added a comment. Revert latest patchset, as it should be put into a separate commit for clarity Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 Files: clang/lib/Basic/Targets/AArch64.cpp clang/test/CodeGen/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -510,9 +510,21 @@ // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS -// == Check Largse System Extensions (LSE) +// == Check Large System Extensions (LSE) // RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 + +// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// CHECK-MOPS: __ARM_FEATURE_MOPS 1 +// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/CodeGen/aarch64-mops.c === --- clang/test/CodeGen/aarch64-mops.c +++ clang/test/CodeGen/aarch64-mops.c @@ -1,152 +1,281 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi-S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -#define __ARM_FEATURE_MOPS 1 #include #include -// CHECK-LABEL: @bzero_0( -// CHECK-NEXT: entry: -// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 -// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0) -// CHECK-NEXT:ret i8* [[TMP1]] +// CHECK-MOPS-LABEL: @bzero_0( +// CHECK-M
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 405080. tyb0807 marked an inline comment as done. tyb0807 added a comment. Update tests with `clang_cc1 -verify` Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 Files: clang/lib/Basic/Targets/AArch64.cpp clang/test/CodeGen/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -510,9 +510,21 @@ // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS -// == Check Largse System Extensions (LSE) +// == Check Large System Extensions (LSE) // RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 + +// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// CHECK-MOPS: __ARM_FEATURE_MOPS 1 +// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/CodeGen/aarch64-mops.c === --- clang/test/CodeGen/aarch64-mops.c +++ clang/test/CodeGen/aarch64-mops.c @@ -1,153 +1,294 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -verify %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -w -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -w -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -w -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -w -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -w -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -w -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -#define __ARM_FEATURE_MOPS 1 #include #include -// CHECK-LABEL: @bzero_0( -// CHECK-NEXT: entry: -// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 -// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], alig
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 added inline comments.
Comment at: clang/lib/Basic/Targets/AArch64.cpp:229
MacroBuilder &Builder) const {
+ // FIXME: this does not handle the case where MOPS is disabled using +nomops
+ Builder.defineMacro("__ARM_FEATURE_MOPS", "1");
chill wrote:
> What's the deal with `"+nomops"` ? This FIXME sort of contradicts with an
> earlier comment
>
>
> > Add support for +nomops
>
>
I wanted to add support for `+nomops`, but I think it is advisable to keep that
in a separate commit to not block this review, so I reverted it with a FIXME
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118199/new/
https://reviews.llvm.org/D118199
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[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 405083. tyb0807 added a comment. Update tests with `clang -Xclang -verify` Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118199/new/ https://reviews.llvm.org/D118199 Files: clang/lib/Basic/Targets/AArch64.cpp clang/test/CodeGen/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -510,9 +510,21 @@ // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS // CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS -// == Check Largse System Extensions (LSE) +// == Check Large System Extensions (LSE) // RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 + +// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// CHECK-MOPS: __ARM_FEATURE_MOPS 1 +// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/CodeGen/aarch64-mops.c === --- clang/test/CodeGen/aarch64-mops.c +++ clang/test/CodeGen/aarch64-mops.c @@ -1,153 +1,163 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -verify %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -Xclang -verify -S -emit-llvm %s -o - +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -Xclang -verify -S -emit-llvm %s -o - +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -Xclang -verify -S -emit-llvm %s -o - +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -Xclang -verify -S -emit-llvm %s -o - +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -Xclang -verify -S -emit-llvm %s -o - +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -Xclang -verify -S -emit-llvm %s -o - -#define __ARM_FEATURE_MOPS 1 #include #include -// CHECK-LABEL: @bzero_0( -// CHECK-NEXT: entry: -// CHECK-NEXT:[[DST_ADDR:%.*]] = alloca i8*, align 8 -// CHECK-NEXT:store i8* [[DST:%.*]], i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8 -// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0) -// CHECK-NEXT:ret i8* [[TMP1]] -// +// CHECK-MOPS-LABEL: @bzero_0( +// CHECK-MOPS-NEXT: entry: +
[PATCH] D118199: [AArch64] ACLE feature macro for Armv8.8-A MOPS
tyb0807 updated this revision to Diff 405085.
tyb0807 added a comment.
Remove prefix from tests
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118199/new/
https://reviews.llvm.org/D118199
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/test/CodeGen/aarch64-mops.c
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -510,9 +510,21 @@
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_BITS
// CHECK-NO-SVE-VECTOR-BITS-NOT: __ARM_FEATURE_SVE_VECTOR_OPERATORS
-// == Check Largse System Extensions (LSE)
+// == Check Large System Extensions (LSE)
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+lse -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-LSE %s
// CHECK-LSE: __ARM_FEATURE_ATOMICS 1
+
+// == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS)
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s
+// CHECK-MOPS: __ARM_FEATURE_MOPS 1
+// CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1
Index: clang/test/CodeGen/aarch64-mops.c
===
--- clang/test/CodeGen/aarch64-mops.c
+++ clang/test/CodeGen/aarch64-mops.c
@@ -1,8 +1,18 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -target-feature +mops -target-feature +mte -S -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -verify %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+memtag -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -Xclang -verify -S -emit-llvm %s -o -
+// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -Xclang -verify -S -emit-llvm %s -o -
-#define __ARM_FEATURE_MOPS 1
#include
#include
@@ -13,9 +23,9 @@
// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
// CHECK-NEXT:[[TMP1:%.*]] = call i8* @llvm.aarch64.mops.memset.tag(i8* [[TMP0]], i8 0, i64 0)
// CHECK-NEXT:ret i8* [[TMP1]]
-//
void *bzero_0(void *dst) {
- return __arm_mops_memset_tag(dst, 0, 0);
+ // expected-warning@+1 {{incompatible integer to pointer conversion returning 'int' from a function with result type 'void *'}}
+ return __arm_mops_memset_tag(dst, 0, 0); // expected-warning{{implicit declaration of function '__arm_mops_memset_tag' is invalid in C99}}
}
// CHECK-LABEL: @bzero_1(
@@ -25,9 +35,9 @@
// CHECK-NEXT:[[TMP0:%.*]] = load i8*, i8** [[DST_ADDR]], align 8
// CHECK-NEXT:[[TMP1:%.*]] = call i
[PATCH] D118757: [AArch64] Remove unused feature flags from AArch64TargetInfo
tyb0807 created this revision.
Herald added a subscriber: kristof.beyls.
tyb0807 requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
This removes two feature flags from `AArch64TargetInfo` class:
- `HasHBC`: this feature does not involve generating any IR intrinsics,
so clang does not need to know about whether it is set
- `HasCrypto`: this feature is deprecated in favor of finer grained
features such as AES, SHA2, SHA3 and SM4
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D118757
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -525,7 +525,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +547,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +597,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +661,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -525,7 +525,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +547,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +597,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +661,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
___
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[PATCH] D118757: [AArch64] Remove unused feature flags from AArch64TargetInfo
tyb0807 added a comment. TL;DR, I think these `Has*` flags have different meaning in different places of the code base. IIUC, these `Has*` flags from `clang/lib/Basic/Targets/AArch64.cpp` are used to correctly set various macros from the processed command line options, notable ones from ACLE, whereas the `Has*` flags from `lib/Driver/ToolChains/Arch/AArch64.cpp` are used to set the target features CL options. As for the ones in llvm, the original flags are from `AArch64Subtarget` flag, and they are used to describe the architecture features, used in various places in the back-end itself. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118757/new/ https://reviews.llvm.org/D118757 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D118757: [AArch64] Remove unused feature flags from AArch64TargetInfo
tyb0807 updated this revision to Diff 409796.
tyb0807 added a comment.
Remove reference to unused ACLE macro `__ARM_FEATURE_CRYPTO`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118757/new/
https://reviews.llvm.org/D118757
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Preprocessor/aarch64-target-features.c
clang/test/Preprocessor/arm-acle-6.5.c
Index: clang/test/Preprocessor/arm-acle-6.5.c
===
--- clang/test/Preprocessor/arm-acle-6.5.c
+++ clang/test/Preprocessor/arm-acle-6.5.c
@@ -91,14 +91,12 @@
// RUN: %clang -target armv7-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-EXTENSIONS
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_CRC32
-// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_CRYPTO
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_DIRECTED_ROUNDING
// CHECK-NO-EXTENSIONS-NOT: __ARM_FEATURE_NUMERIC_MAXMIN
// RUN: %clang -target armv8-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-EXTENSIONS
// CHECK-EXTENSIONS: __ARM_FEATURE_CRC32 1
-// CHECK-EXTENSIONS: __ARM_FEATURE_CRYPTO 1
// CHECK-EXTENSIONS: __ARM_FEATURE_DIRECTED_ROUNDING 1
// CHECK-EXTENSIONS: __ARM_FEATURE_NUMERIC_MAXMIN 1
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -19,7 +19,6 @@
// CHECK-NOT: __ARM_FEATURE_BIG_ENDIAN
// CHECK: __ARM_FEATURE_CLZ 1
// CHECK-NOT: __ARM_FEATURE_CRC32 1
-// CHECK-NOT: __ARM_FEATURE_CRYPTO 1
// CHECK: __ARM_FEATURE_DIRECTED_ROUNDING 1
// CHECK: __ARM_FEATURE_DIV 1
// CHECK: __ARM_FEATURE_FMA 1
@@ -72,13 +71,11 @@
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+crypto -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FEAT-CRYPTO %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+crypto -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FEAT-CRYPTO %s
// CHECK-FEAT-CRYPTO: __ARM_FEATURE_AES 1
-// CHECK-FEAT-CRYPTO: __ARM_FEATURE_CRYPTO 1
// CHECK-FEAT-CRYPTO: __ARM_FEATURE_SHA2 1
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.4-a+crypto -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FEAT-CRYPTO-8_4 %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.4-a+crypto -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FEAT-CRYPTO-8_4 %s
// CHECK-FEAT-CRYPTO-8_4: __ARM_FEATURE_AES 1
-// CHECK-FEAT-CRYPTO-8_4: __ARM_FEATURE_CRYPTO 1
// CHECK-FEAT-CRYPTO-8_4: __ARM_FEATURE_SHA2 1
// CHECK-FEAT-CRYPTO-8_4: __ARM_FEATURE_SHA3 1
// CHECK-FEAT-CRYPTO-8_4: __ARM_FEATURE_SHA512 1
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -343,11 +343,6 @@
if (HasCRC)
Builder.defineMacro("__ARM_FEATURE_CRC32", "1");
- // The __ARM_FEATURE_CRYPTO is deprecated in favor of finer grained feature
- // macros for AES, SHA2, SHA3 and SM4
- if (HasAES && HasSHA2)
-Builder.defineMacro("__ARM_FEATURE_CRYPTO", "1");
-
if (HasAES)
Builder.defineMacro("__ARM_FEATURE_AES", "1");
@@ -525,7 +520,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +542,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +592,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +656,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
___
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[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang
tyb0807 created this revision. Herald added a subscriber: kristof.beyls. tyb0807 requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This implements minimum support in clang for default HBC/MOPS features on v8.8-a/v9.3-a or later architectures. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D120111 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Driver/ToolChains/Arch/AArch64.cpp clang/test/Driver/aarch64-hbc.c clang/test/Driver/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -521,13 +521,17 @@ // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 // == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s // CHECK-MOPS: __ARM_FEATURE_MOPS 1 // CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/Driver/aarch64-mops.c === --- clang/test/Driver/aarch64-mops.c +++ clang/test/Driver/aarch64-mops.c @@ -1,6 +1,12 @@ // Test that target feature mops is implemented and available correctly -// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s -// CHECK: "-target-feature" "+mops" - +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.7-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s // RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nomops %s 2>&1 | FileCheck %s --check-prefix=NO_MOPS +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.2-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a+nomops %s 2>&1 | FileCheck %s --check
[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang
tyb0807 updated this revision to Diff 410225. tyb0807 added a comment. Cache architecture feature to avoid scanning the feature list over and over again. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120111/new/ https://reviews.llvm.org/D120111 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Driver/ToolChains/Arch/AArch64.cpp clang/test/Driver/aarch64-hbc.c clang/test/Driver/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -521,13 +521,17 @@ // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 // == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s // CHECK-MOPS: __ARM_FEATURE_MOPS 1 // CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/Driver/aarch64-mops.c === --- clang/test/Driver/aarch64-mops.c +++ clang/test/Driver/aarch64-mops.c @@ -1,6 +1,12 @@ // Test that target feature mops is implemented and available correctly -// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s -// CHECK: "-target-feature" "+mops" - +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.7-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s // RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nomops %s 2>&1 | FileCheck %s --check-prefix=NO_MOPS +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.2-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a+nomops %s 2>&1 | FileCheck %s --check-prefix=NO_MOPS + +// CHECK: "-target-feature" "+mops" // NO_MOPS: "-target-
[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang
tyb0807 marked 2 inline comments as done.
tyb0807 added inline comments.
Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:464-473
+ const char *v8691OrLater[] = {"+v8.6a", "+v8.7a", "+v8.8a",
+ "+v9.1a", "+v9.2a", "+v9.3a"};
auto Pos = std::find_first_of(Features.begin(), Features.end(),
-std::begin(Archs), std::end(Archs));
+std::begin(v8691OrLater),
std::end(v8691OrLater));
if (Pos != std::end(Features))
Pos = Features.insert(std::next(Pos), {"+i8mm", "+bf16"});
nickdesaulniers wrote:
> Is it possible to re-use some of the many calls to std::find (L395-403)?
> Seems like we re-scan the feature list A LOT.
I cached the architecture feature when it is defined to avoid these calls to
std::find.
Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:466-474
auto Pos = std::find_first_of(Features.begin(), Features.end(),
-std::begin(Archs), std::end(Archs));
+std::begin(v8691OrLater),
std::end(v8691OrLater));
if (Pos != std::end(Features))
Pos = Features.insert(std::next(Pos), {"+i8mm", "+bf16"});
+ // For Armv8.8-a/Armv9.3-a or later, FEAT_HBC and FEAT_MOPS are enabled by
+ // default.
nickdesaulniers wrote:
> Can we reuse `ItBegin` and `ItEnd` here rather than `Features.begin()` and
> `Features.end()`?
This is not relevant anymore, but for the initial code, I guess we can't reuse
`ItBegin/End` because `Features` has been changed since then (a lot of
`push_back`). The reason why we need to keep these default features (`+hbc`,
`+mops`, ...) //right after //the architecture feature is that we want to be
able to disable the default features `X` if `+noX` option is given in the
command line, knowing that `+noX` features will come after the architecture
feature in the `Features` list.
Repository:
rG LLVM Github Monorepo
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[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
tyb0807 updated this revision to Diff 410310.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116153/new/
https://reviews.llvm.org/D116153
Files:
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -294,7 +294,7 @@
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon"
"-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature"
"+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature"
"+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 |
FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a"
"-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature"
"+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod"
"-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse"
"-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm"
"-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature"
"+sha2" "-target-feature" "+aes"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a"
"-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature"
"+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod"
"-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse"
"-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm"
"-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 |
FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a"
"-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature"
"+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16"
"-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm"
"-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz"
"-target-feature" "+sha2" "-target-feature" "+aes"
@@ -390,7 +390,13 @@
// Check +crypto:
//
// RUN: %clang -target aarch64 -march=armv8.4a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO84 %s
-// CHECK-CRYPTO84: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.4a" "-target-feature" "+crypto" "-target-feature" "+sm4" "-target-feature"
"+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// RUN: %clang -target aarch64 -march=armv8.5a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO85 %s
+// RUN: %clang -target aarch64 -march=armv8.6a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO86 %s
+// RUN: %clang -target aarch64 -march=armv8.7a+crypto -### -c %s 2>&1 |
FileCheck -check-prefix=CHECK-CRYPTO87 %s
+// CHECK-CRYPTO84: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.4a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO85: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.5a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO86: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.6a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO87: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8.7a"{{.*}} "-target-feature" "+crypto" "-target-feature" "+sm4"
"-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
//
// Check -crypto:
//
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -393,6 +393,9 @@
}
if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.5a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.6a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.7a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v8.8a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9.1a") != ItEnd ||
Index: clang/lib/Basi
[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
tyb0807 added inline comments. Comment at: clang/lib/Basic/Targets/ARM.cpp:958 case llvm::ARM::ArchKind::ARMV8_6A: + case llvm::ARM::ArchKind::ARMV8_7A: case llvm::ARM::ArchKind::ARMV8_8A: SjoerdMeijer wrote: > I see tests for the crypto stuff, but is there or do we need a test for > whatever `getTargetDefinesARMV83A` is setting? I'm not sure that we need a test for this, as none of the other architectures really have this. What do you think @SjoerdMeijer @vhscampos ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116153/new/ https://reviews.llvm.org/D116153 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
tyb0807 added inline comments. Comment at: clang/lib/Basic/Targets/ARM.cpp:958 case llvm::ARM::ArchKind::ARMV8_6A: + case llvm::ARM::ArchKind::ARMV8_7A: case llvm::ARM::ArchKind::ARMV8_8A: SjoerdMeijer wrote: > tyb0807 wrote: > > SjoerdMeijer wrote: > > > I see tests for the crypto stuff, but is there or do we need a test for > > > whatever `getTargetDefinesARMV83A` is setting? > > I'm not sure that we need a test for this, as none of the other > > architectures really have this. What do you think @SjoerdMeijer @vhscampos ? > I am expecting tests for the ACLE macros that this patch defines for v8.7 to > be added to `clang/test/Preprocessor/arm-target-features.c`. In that case, for consistency, I think we should also add tests for ACLE macros for other versions (v8.4/5/6/8) as well. And for AArch64 too. It sounds a bit out of scope, but it ensures consistency IMHO Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116153/new/ https://reviews.llvm.org/D116153 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
tyb0807 updated this revision to Diff 410403.
tyb0807 added a comment.
Add checks for default ACLE macros for different architecture versions
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116153/new/
https://reviews.llvm.org/D116153
Files:
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Preprocessor/aarch64-target-features.c
clang/test/Preprocessor/arm-target-features.c
Index: clang/test/Preprocessor/arm-target-features.c
===
--- clang/test/Preprocessor/arm-target-features.c
+++ clang/test/Preprocessor/arm-target-features.c
@@ -938,3 +938,20 @@
// CHECK-SHA2-NOT: #define __ARM_FEATURE_AES 1
// CHECK-SHA2-NOT: #define __ARM_FEATURE_CRYPTO 1
// CHECK-SHA2: #define __ARM_FEATURE_SHA2 1
+
+// == Check default macros for Armv8.1-A and later
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-BEFORE-V83 %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.2-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-BEFORE-V83 %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.3-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.4-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.6-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9.1-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1
+// CHECK-V81-OR-LATER: __ARM_FEATURE_QRDMX 1
+// CHECK-BEFORE-V83-NOT: __ARM_FEATURE_COMPLEX 1
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -294,7 +294,7 @@
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "
[PATCH] D118757: [AArch64] Remove unused feature flags from AArch64TargetInfo
tyb0807 updated this revision to Diff 410418.
tyb0807 added a comment.
Revert latest change, as it is likely that people still rely on
`ARM_FEATURE_CRYPTO`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118757/new/
https://reviews.llvm.org/D118757
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -525,7 +525,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +547,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +597,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +661,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -525,7 +525,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +547,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +597,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +661,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
___
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[PATCH] D116153: [ARM][AArch64] Add missing v8.x checks
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG650aec687eb5: [ARM][AArch64] Add missing v8.x checks
(authored by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116153/new/
https://reviews.llvm.org/D116153
Files:
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Preprocessor/aarch64-target-features.c
clang/test/Preprocessor/arm-target-features.c
Index: clang/test/Preprocessor/arm-target-features.c
===
--- clang/test/Preprocessor/arm-target-features.c
+++ clang/test/Preprocessor/arm-target-features.c
@@ -938,3 +938,20 @@
// CHECK-SHA2-NOT: #define __ARM_FEATURE_AES 1
// CHECK-SHA2-NOT: #define __ARM_FEATURE_CRYPTO 1
// CHECK-SHA2: #define __ARM_FEATURE_SHA2 1
+
+// == Check default macros for Armv8.1-A and later
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-BEFORE-V83 %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.2-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-BEFORE-V83 %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.3-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.4-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.5-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.6-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9.1-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// RUN: %clang -target arm-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefixes=CHECK-V81-OR-LATER,CHECK-V83-OR-LATER %s
+// CHECK-V83-OR-LATER: __ARM_FEATURE_COMPLEX 1
+// CHECK-V81-OR-LATER: __ARM_FEATURE_QRDMX 1
+// CHECK-BEFORE-V83-NOT: __ARM_FEATURE_COMPLEX 1
Index: clang/test/Preprocessor/aarch64-target-features.c
===
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -294,7 +294,7 @@
// CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.5a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fullfp16" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature"
[PATCH] D118757: [AArch64] Remove unused feature flags from AArch64TargetInfo
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8e10448cbbd9: [AArch64] Remove unused feature flags from
AArch64TargetInfo (authored by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118757/new/
https://reviews.llvm.org/D118757
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -525,7 +525,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +547,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +597,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +661,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -30,7 +30,6 @@
unsigned FPU;
bool HasCRC;
- bool HasCrypto;
bool HasAES;
bool HasSHA2;
bool HasSHA3;
@@ -54,7 +53,6 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
- bool HasHBC;
bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -525,7 +525,6 @@
DiagnosticsEngine &Diags) {
FPU = FPUMode;
HasCRC = false;
- HasCrypto = false;
HasAES = false;
HasSHA2 = false;
HasSHA3 = false;
@@ -548,7 +547,6 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
- HasHBC = false;
HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -599,8 +597,6 @@
}
if (Feature == "+crc")
HasCRC = true;
-if (Feature == "+crypto")
- HasCrypto = true;
if (Feature == "+aes")
HasAES = true;
if (Feature == "+sha2")
@@ -665,8 +661,6 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
-if (Feature == "+hbc")
- HasHBC = true;
if (Feature == "+mops")
HasMOPS = true;
}
___
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[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang
tyb0807 added inline comments. Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:269 success = getAArch64MicroArchFeaturesFromMcpu( -D, getAArch64TargetCPU(Args, Triple, A), Args, Features); +D, getAArch64TargetCPU(Args, Triple, A), Args, Features, AF); tmatheson wrote: > Looks like you could do `AF = Features.back()` below all these if/else > conditions (where it is first used) based on the value of `success`. Maybe > there is no need to pass it into `getAArch64MicroArchFeaturesFromMcpu` and > the other functions? > > Adding an extra output parameter to each of these functions (which duplicates > an existing output parameter) seems unnecessary and makes the interfaces more > complicated. we can't do `AF = Features.back()` below all the if/else conditions because `getAArch64MicroArchFeaturesFromM*` adds (usually) the architecture feature first, followed by a bunch of other features, so when it returns, `Features.back()` is not the architecture feature anymore. I see your point about complicating the interfaces, maybe @nickdesaulniers can help us here? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120111/new/ https://reviews.llvm.org/D120111 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D120111: [AArch64] Default HBC/MOPS features in clang
tyb0807 updated this revision to Diff 412010. tyb0807 added a comment. Taking into account remarks from @tmatheson, I'm reverting my latest changes consisting in caching architecture feature into a variable, which makes the `getAArch64ArchFeaturesFrom*` interfaces more complicated. I'd propose we move forward with this patch, and the performance issue raised by @nickdesaulniers will be addressed properly in a separate one. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120111/new/ https://reviews.llvm.org/D120111 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Driver/ToolChains/Arch/AArch64.cpp clang/test/Driver/aarch64-hbc.c clang/test/Driver/aarch64-mops.c clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -524,14 +524,18 @@ // CHECK-LSE: __ARM_FEATURE_ATOMICS 1 // == Check Armv8.8-A/Armv9.3-A memcpy and memset acceleration instructions (MOPS) -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s -// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.7-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+nomops+mops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8.8-a+mops+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.2-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+nomops -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NOMOPS %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv9.3-a+mops-x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-MOPS %s // CHECK-MOPS: __ARM_FEATURE_MOPS 1 // CHECK-NOMOPS-NOT: __ARM_FEATURE_MOPS 1 Index: clang/test/Driver/aarch64-mops.c === --- clang/test/Driver/aarch64-mops.c +++ clang/test/Driver/aarch64-mops.c @@ -1,6 +1,12 @@ // Test that target feature mops is implemented and available correctly -// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s -// CHECK: "-target-feature" "+mops" - +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.7-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a%s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s 2>&1 | FileCheck %s // RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nomops %s 2>&1 | FileCheck %s --check-prefix=NO_MOPS +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.2-a+mops %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-none-eabi -march=armv9.3-a%s 2>&1 | FileCheck %s +// RUN
[PATCH] D120864: [AArch64] Avoid scanning feature list for target parsing
tyb0807 created this revision.
tyb0807 added reviewers: tmatheson, nickdesaulniers, chill.
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As discussed in https://reviews.llvm.org/D120111, this patch proposes an
alternative implementation to avoid scanning feature list for
architecture version over and over again. The insertion position for
default extensions is also captured during this single scan of the
feature list.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D120864
Files:
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -345,12 +345,68 @@
Features.push_back("-crc");
}
+ int V8Version = -1;
+ int V9Version = -1;
+ bool HasNoSM4 = false;
+ bool HasNoSHA3 = false;
+ bool HasNoSHA2 = false;
+ bool HasNoAES = false;
+ bool HasSM4 = false;
+ bool HasSHA3 = false;
+ bool HasSHA2 = false;
+ bool HasAES = false;
+ bool HasCrypto = false;
+ bool HasNoCrypto = false;
+ bool HasFullFP16 = false;
+ bool HasNoFullFP16 = false;
+ bool HasFP16FML = false;
+ bool HasNoFP16FML = false;
+ int ArchFeatPos = -1;
+
+ for (auto I = Features.begin(), E = Features.end(); I != E; I++) {
+if (*I == "+v8a") V8Version = 0;
+else if (*I == "+v8.1a") V8Version = 1;
+else if (*I == "+v8.2a") V8Version = 2;
+else if (*I == "+v8.3a") V8Version = 3;
+else if (*I == "+v8.4a") V8Version = 4;
+else if (*I == "+v8.5a") V8Version = 5;
+else if (*I == "+v8.6a") V8Version = 6;
+else if (*I == "+v8.7a") V8Version = 7;
+else if (*I == "+v8.8a") V8Version = 8;
+else if (*I == "+v8.9a") V8Version = 9;
+else if (*I == "+v9a") V9Version = 0;
+else if (*I == "+v9.1a") V9Version = 1;
+else if (*I == "+v9.2a") V9Version = 2;
+else if (*I == "+v9.3a") V9Version = 3;
+else if (*I == "+v9.4a") V9Version = 4;
+else if (*I == "+sm4") HasSM4 = true;
+else if (*I == "+sha3") HasSHA3 = true;
+else if (*I == "+sha2") HasSHA2 = true;
+else if (*I == "+aes") HasAES = true;
+else if (*I == "-sm4") HasNoSM4 = true;
+else if (*I == "-sha3") HasNoSHA3 = true;
+else if (*I == "-sha2") HasNoSHA2 = true;
+else if (*I == "-aes") HasNoAES = true;
+// Whichever option comes after (right-most option) will win
+else if (*I == "+crypto") {
+ HasCrypto = true;
+ HasNoCrypto = false;
+}
+else if (*I == "-crypto") {
+ HasCrypto = false;
+ HasNoCrypto = true;
+}
+// Register the iterator position if this is an architecture feature
+if (ArchFeatPos == -1 && (V8Version != -1 || V9Version != -1))
+ ArchFeatPos = I - Features.begin();
+ }
+
// Handle (arch-dependent) fp16fml/fullfp16 relationship.
// FIXME: this fp16fml option handling will be reimplemented after the
// TargetParser rewrite.
const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
- if (llvm::is_contained(Features, "+v8.4a")) {
+ if (V8Version == 4) {
const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
// Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
@@ -375,56 +431,23 @@
// Context sensitive meaning of Crypto:
// 1) For Arch >= ARMv8.4a: crypto = sm4 + sha3 + sha2 + aes
// 2) For Arch <= ARMv8.3a: crypto = sha2 + aes
- const auto ItBegin = Features.begin();
- const auto ItEnd = Features.end();
- const auto ItRBegin = Features.rbegin();
- const auto ItREnd = Features.rend();
- const auto ItRCrypto = std::find(ItRBegin, ItREnd, "+crypto");
- const auto ItRNoCrypto = std::find(ItRBegin, ItREnd, "-crypto");
- const auto HasCrypto = ItRCrypto != ItREnd;
- const auto HasNoCrypto = ItRNoCrypto != ItREnd;
- const ptrdiff_t PosCrypto = ItRCrypto - ItRBegin;
- const ptrdiff_t PosNoCrypto = ItRNoCrypto - ItRBegin;
-
- bool NoCrypto = false;
- if (HasCrypto && HasNoCrypto) {
-if (PosNoCrypto < PosCrypto)
- NoCrypto = true;
- }
-
- if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.5a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.6a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.7a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.8a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9.1a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9.2a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9.3a") != ItEnd) {
-if (HasCrypto && !NoCrypto) {
+ if (V8Version >=
[PATCH] D120864: [AArch64] Avoid scanning feature list for target parsing
tyb0807 updated this revision to Diff 412592.
tyb0807 added a comment.
Update logic to define crypto extensions, strictly following the old
implementation
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D120864/new/
https://reviews.llvm.org/D120864
Files:
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -345,12 +345,68 @@
Features.push_back("-crc");
}
+ int V8Version = -1;
+ int V9Version = -1;
+ bool HasNoSM4 = false;
+ bool HasNoSHA3 = false;
+ bool HasNoSHA2 = false;
+ bool HasNoAES = false;
+ bool HasSM4 = false;
+ bool HasSHA3 = false;
+ bool HasSHA2 = false;
+ bool HasAES = false;
+ bool HasCrypto = false;
+ bool HasNoCrypto = false;
+ bool HasFullFP16 = false;
+ bool HasNoFullFP16 = false;
+ bool HasFP16FML = false;
+ bool HasNoFP16FML = false;
+ int ArchFeatPos = -1;
+
+ for (auto I = Features.begin(), E = Features.end(); I != E; I++) {
+if (*I == "+v8a") V8Version = 0;
+else if (*I == "+v8.1a") V8Version = 1;
+else if (*I == "+v8.2a") V8Version = 2;
+else if (*I == "+v8.3a") V8Version = 3;
+else if (*I == "+v8.4a") V8Version = 4;
+else if (*I == "+v8.5a") V8Version = 5;
+else if (*I == "+v8.6a") V8Version = 6;
+else if (*I == "+v8.7a") V8Version = 7;
+else if (*I == "+v8.8a") V8Version = 8;
+else if (*I == "+v8.9a") V8Version = 9;
+else if (*I == "+v9a") V9Version = 0;
+else if (*I == "+v9.1a") V9Version = 1;
+else if (*I == "+v9.2a") V9Version = 2;
+else if (*I == "+v9.3a") V9Version = 3;
+else if (*I == "+v9.4a") V9Version = 4;
+else if (*I == "+sm4") HasSM4 = true;
+else if (*I == "+sha3") HasSHA3 = true;
+else if (*I == "+sha2") HasSHA2 = true;
+else if (*I == "+aes") HasAES = true;
+else if (*I == "-sm4") HasNoSM4 = true;
+else if (*I == "-sha3") HasNoSHA3 = true;
+else if (*I == "-sha2") HasNoSHA2 = true;
+else if (*I == "-aes") HasNoAES = true;
+// Whichever option comes after (right-most option) will win
+else if (*I == "+crypto") {
+ HasCrypto = true;
+ HasNoCrypto = false;
+}
+else if (*I == "-crypto") {
+ HasCrypto = false;
+ HasNoCrypto = true;
+}
+// Register the iterator position if this is an architecture feature
+if (ArchFeatPos == -1 && (V8Version != -1 || V9Version != -1))
+ ArchFeatPos = I - Features.begin();
+ }
+
// Handle (arch-dependent) fp16fml/fullfp16 relationship.
// FIXME: this fp16fml option handling will be reimplemented after the
// TargetParser rewrite.
const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
- if (llvm::is_contained(Features, "+v8.4a")) {
+ if (V8Version == 4) {
const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
// Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
@@ -375,56 +431,23 @@
// Context sensitive meaning of Crypto:
// 1) For Arch >= ARMv8.4a: crypto = sm4 + sha3 + sha2 + aes
// 2) For Arch <= ARMv8.3a: crypto = sha2 + aes
- const auto ItBegin = Features.begin();
- const auto ItEnd = Features.end();
- const auto ItRBegin = Features.rbegin();
- const auto ItREnd = Features.rend();
- const auto ItRCrypto = std::find(ItRBegin, ItREnd, "+crypto");
- const auto ItRNoCrypto = std::find(ItRBegin, ItREnd, "-crypto");
- const auto HasCrypto = ItRCrypto != ItREnd;
- const auto HasNoCrypto = ItRNoCrypto != ItREnd;
- const ptrdiff_t PosCrypto = ItRCrypto - ItRBegin;
- const ptrdiff_t PosNoCrypto = ItRNoCrypto - ItRBegin;
-
- bool NoCrypto = false;
- if (HasCrypto && HasNoCrypto) {
-if (PosNoCrypto < PosCrypto)
- NoCrypto = true;
- }
-
- if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.5a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.6a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.7a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v8.8a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9.1a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9.2a") != ItEnd ||
- std::find(ItBegin, ItEnd, "+v9.3a") != ItEnd) {
-if (HasCrypto && !NoCrypto) {
+ if (V8Version >= 4 || V9Version >= 0) {
+if (HasCrypto && !HasNoCrypto) {
// Check if we have NOT disabled an algorithm with something like:
// +crypto, -algorithm
// And if "-algorithm" does not occur, we enable that crypto algorithm.
- const bool HasSM4 = (std::find(ItBegin, ItEnd, "-sm4") == ItEnd);
- const bool
[PATCH] D120875: [Driver] Split up huge aarch64-cpus.c test.
tyb0807 added a comment. Thanks for making this change. However, I think a better split would be - List Item `aarch64-cpus.c` which contains cpu-specific test cases (usually with `-mcpu` flag). Roughly this is until line 515, plus some last test cases from line 926 to end. `aarch64-archs.c` which contains architecture-specific test cases (with `-march` flag). Or better yet, we can further break down the `aarch64-archs.c`, with feature-specific test cases going into a feature-specific file, just as what we are doing with new features (`aarch64-hbc.c`, `aarch64-mops.c`, ...). I can submit a separate patch for this if you prefer. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120875/new/ https://reviews.llvm.org/D120875 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D121093: [Driver][AArch64] Split up aarch64-cpus.c test further
tyb0807 created this revision.
tyb0807 added reviewers: dmgreen, lenary, tmatheson, simon_tatham, fhahn.
Herald added a subscriber: kristof.beyls.
Herald added a project: All.
tyb0807 requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
This is the continuation of https://reviews.llvm.org/D120875, where
aarch64-cpus-2.c is further splitted and renamed to better reflect the
tests.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D121093
Files:
clang/test/Driver/aarch64-archs.c
clang/test/Driver/aarch64-bf16.c
clang/test/Driver/aarch64-cpus-1.c
clang/test/Driver/aarch64-cpus-2.c
clang/test/Driver/aarch64-cpus.c
clang/test/Driver/aarch64-fp16.c
clang/test/Driver/aarch64-i8mm.c
clang/test/Driver/aarch64-ls64.c
clang/test/Driver/aarch64-ras.c
clang/test/Driver/aarch64-sve.c
clang/test/Driver/aarch64-sve2.c
Index: clang/test/Driver/aarch64-sve2.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-sve2.c
@@ -0,0 +1,8 @@
+// SVE2 is enabled by default on Armv9-A but it can be disabled
+// RUN: %clang -target aarch64 -march=armv9a+nosve2 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A-NOSVE2 %s
+// RUN: %clang -target aarch64 -march=armv9-a+nosve2 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A-NOSVE2 %s
+// RUN: %clang -target aarch64 -mlittle-endian -march=armv9a+nosve2 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A-NOSVE2 %s
+// RUN: %clang -target aarch64 -mlittle-endian -march=armv9-a+nosve2 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A-NOSVE2 %s
+// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9a+nosve2 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A-NOSVE2 %s
+// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9-a+nosve2 -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A-NOSVE2 %s
+// GENERICV9A-NOSVE2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9a" "-target-feature" "+sve" "-target-feature" "-sve2"
Index: clang/test/Driver/aarch64-sve.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-sve.c
@@ -0,0 +1,27 @@
+// The SVE extension is an optional extension for Armv8-A.
+// RUN: %clang -target aarch64 -march=armv8a+sve -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV8A-SVE %s
+// RUN: %clang -target aarch64 -march=armv8.6a+sve -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV8A-SVE %s
+// GENERICV8A-SVE: "-target-feature" "+sve"
+// RUN: %clang -target aarch64 -march=armv8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV8A-NOSVE %s
+// RUN: %clang -target aarch64 -march=armv8.6a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV8A-NOSVE %s
+// GENERICV8A-NOSVE-NOT: "-target-feature" "+sve"
+
+// The 32-bit floating point matrix multiply extension is enabled by default
+// for armv8.6-a targets (or later) with SVE, and can optionally be enabled for
+// any target from armv8.2a onwards (we don't enforce not using it with earlier
+// targets).
+// RUN: %clang -target aarch64 -march=armv8.6a -### -c %s 2>&1 | FileCheck -check-prefix=NO-F32MM %s
+// RUN: %clang -target aarch64 -march=armv8.6a+sve -### -c %s 2>&1 | FileCheck -check-prefix=F32MM %s
+// RUN: %clang -target aarch64 -march=armv8.5a+f32mm -### -c %s 2>&1 | FileCheck -check-prefix=F32MM %s
+// NO-F32MM-NOT: "-target-feature" "+f32mm"
+// F32MM: "-target-feature" "+f32mm"
+
+// The 64-bit floating point matrix multiply extension is not currently enabled
+// by default for any targets, because it requires an SVE vector length >= 256
+// bits. When we add a CPU which has that, then it can be enabled by default,
+// but for now it can only be used by adding the +f64mm feature.
+// RUN: %clang -target aarch64 -march=armv8.6a -### -c %s 2>&1 | FileCheck -check-prefix=NO-F64MM %s
+// RUN: %clang -target aarch64 -march=armv8.6a+sve -### -c %s 2>&1 | FileCheck -check-prefix=NO-F64MM %s
+// RUN: %clang -target aarch64 -march=armv8.6a+f64mm -### -c %s 2>&1 | FileCheck -check-prefix=F64MM %s
+// NO-F64MM-NOT: "-target-feature" "+f64mm"
+// F64MM: "-target-feature" "+f64mm"
Index: clang/test/Driver/aarch64-ras.c
===
--- clang/test/Driver/aarch64-ras.c
+++ clang/test/Driver/aarch64-ras.c
@@ -1,4 +1,6 @@
+// RAS is off by default for v8a, but can be enabled by +ras (this is not architecturally valid)
// RUN: %clang -target aarch64-none-none-eabi -march=armv8a+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
+// RUN: %clang -target aarch64-none-none-eabi -march=armv8-a+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
// RUN: %clang -target aarch64-none-none-eabi -mcpu=generic+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s
// RUN: %clang -target aarch64-none-none-eabi -mcpu=cortex-a75 -### -c %s 2>&1 | FileCheck --chec
[PATCH] D121093: [Driver][AArch64] Split up aarch64-cpus.c test further
tyb0807 marked an inline comment as done. tyb0807 added inline comments. Comment at: clang/test/Driver/aarch64-cpus.c:2 +// Check target CPUs are correctly passed. +// TODO: The files should be split up by categories, e.g. by architecture versions, to avoid excessive test // times for large single test files. simon_tatham wrote: > Tiniest nit ever: what files is this comment talking about? > > (In the previous version, it followed on from a previous comment that gave > the name of the file containing other half of the tests in question. Now it > doesn't, so the wording is no longer clear.) This is for just in case we want to split up this file (aarch64-cpus.c) further, into smaller files such as aarch64-cortex-a53.c, aarch64-cortex-a57.c, etc. Do you think we still need to do this, or this file looks ok to you in its current state? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121093/new/ https://reviews.llvm.org/D121093 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D121093: [Driver][AArch64] Split up aarch64-cpus.c test further
tyb0807 marked 2 inline comments as done. tyb0807 added inline comments. Comment at: clang/test/Driver/aarch64-archs.c:296 -// NO-LS64-NOT: "-target-feature" "+ls64" -// LS64: "-target-feature" "+ls64" - tmatheson wrote: > Looks like these were duplicate tests? Besides `armv8.7a` vs `armv8.7-a` Hmm, the first one tests that LS64 is not on by default on `armv8.7a`, and the second tests that `armv8.7a+ls64` enables it. Why these are duplicates? If you mean L276/277, I guess the intent is to test both syntaxes that we support Comment at: clang/test/Driver/aarch64-ras.c:14 +// RAS is on by default for v8.2a, but can be disabled by +noras +// FIXME: in the current implementation, RAS is not on by default at all for v8.2a (the test says it all...) +// RUN: %clang -target aarch64 -march=armv8.2a -### -c %s 2>&1 | FileCheck -check-prefix=V82ARAS %s tmatheson wrote: > The RAS test changes are the only functional change to this review, which is > otherwise moving lines around and changing comments. I would keep the > original tests even if they're wrong, so that the history remains clearer. > Alternatively describe the RAS changes in the commit message and description. Actually, I added the FIXME because I don't want to fix the test in this commit. There's no functional change to this review I think Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121093/new/ https://reviews.llvm.org/D121093 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D121093: [Driver][AArch64] Split up aarch64-cpus.c test further
tyb0807 added a comment. > Yeah that sounds good. Maybe aarch64-cortex-cpus.c might be a good start, to > avoid having too many small files. Oops, I went ahead and split to many small cortex test files. Not really sure what would be better. What do you think @simon_tatham @fhahn @tmatheson ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121093/new/ https://reviews.llvm.org/D121093 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
tyb0807 requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.
This introduces clang command line support for new Armv8.8-A and
Armv9.3-A Hinted Conditional Branches instructions.
Change-Id: I2291f8127da671aa31cf68d08ff6cacd9f01e354
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1521,6 +1521,8 @@
{"sme", "nosme", "+sme", "-sme"},
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -114,6 +114,10 @@
Features.push_back("+sme-f64");
if (Extensions & AArch64::AEK_SMEI64)
Features.push_back("+sme-i64");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Features.push_back("+mops");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -69,6 +69,8 @@
AEK_SME = 1ULL << 37,
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
+ AEK_MOPS =1ULL << 40,
+ AEK_HBC = 1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -144,6 +144,8 @@
AARCH64_ARCH_EXT_NAME("sme", AArch64::AEK_SME, "+sme", "-sme")
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
+AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS,"+mops", "-mops")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,8 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
+ bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,8 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
+ HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +660,26 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+if (Feature == "+mops")
+ HasMO
[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 398623.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Remove Change-Id
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1521,6 +1521,8 @@
{"sme", "nosme", "+sme", "-sme"},
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -114,6 +114,10 @@
Features.push_back("+sme-f64");
if (Extensions & AArch64::AEK_SMEI64)
Features.push_back("+sme-i64");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Features.push_back("+mops");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -69,6 +69,8 @@
AEK_SME = 1ULL << 37,
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
+ AEK_MOPS =1ULL << 40,
+ AEK_HBC = 1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -144,6 +144,8 @@
AARCH64_ARCH_EXT_NAME("sme", AArch64::AEK_SME, "+sme", "-sme")
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
+AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS,"+mops", "-mops")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,8 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
+ bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,8 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
+ HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +660,26 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+if (Feature == "+mops")
+ HasMOPS = true;
+ }
+
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ HasMOPS |= ArchKind == llvm::AArch64::Arc
[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 398624.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Add more context to the patch summary
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1521,6 +1521,8 @@
{"sme", "nosme", "+sme", "-sme"},
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -114,6 +114,10 @@
Features.push_back("+sme-f64");
if (Extensions & AArch64::AEK_SMEI64)
Features.push_back("+sme-i64");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Features.push_back("+mops");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -69,6 +69,8 @@
AEK_SME = 1ULL << 37,
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
+ AEK_MOPS =1ULL << 40,
+ AEK_HBC = 1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -144,6 +144,8 @@
AARCH64_ARCH_EXT_NAME("sme", AArch64::AEK_SME, "+sme", "-sme")
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
+AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS,"+mops", "-mops")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,8 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
+ bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,8 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
+ HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +660,26 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+if (Feature == "+mops")
+ HasMOPS = true;
+ }
+
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ HasMOPS |= ArchKind
[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 398638.
tyb0807 added a comment.
Support for MOPS extension should be committed in a separate patch
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1521,6 +1521,7 @@
{"sme", "nosme", "+sme", "-sme"},
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -114,6 +114,8 @@
Features.push_back("+sme-f64");
if (Extensions & AArch64::AEK_SMEI64)
Features.push_back("+sme-i64");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -69,6 +69,7 @@
AEK_SME = 1ULL << 37,
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
+ AEK_HBC = 1ULL << 40,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -144,6 +144,7 @@
AARCH64_ARCH_EXT_NAME("sme", AArch64::AEK_SME, "+sme", "-sme")
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,7 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,7 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +659,19 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+ }
+
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ // Check features that are manually disabled by command line options.
+ // This needs to be checked after architecture-related features are handled,
+ // making sure they are properly disabled when required.
+ for (const auto &Feature : Features) {
+if (Feature == "-hbc")
+ HasHBC = false;
}
setDataLayout();
___
cfe-com
[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 398693.
tyb0807 added a comment.
Rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1518,6 +1518,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"pmuv3p4", "nopmuv3p4", "+perfmon", "-perfmon"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_PERFMON)
Features.push_back("+perfmon");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -70,6 +70,7 @@
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
AEK_PERFMON = 1ULL << 40,
+ AEK_HBC = 1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -145,6 +145,7 @@
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
AARCH64_ARCH_EXT_NAME("pmuv3p4", AArch64::AEK_PERFMON, "+perfmon", "-perfmon")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,7 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,7 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +659,19 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+ }
+
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ // Check features that are manually disabled by command line options.
+ // This needs to be checked after architecture-related features are handled,
+ // making sure they are properly disabled when required.
+ for (const auto &Feature : Features) {
+if (Feature == "-hbc")
+ HasHBC = false;
}
setDataLayout();
___
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[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 398697.
tyb0807 added a comment.
Update patch author in commit message
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1518,6 +1518,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"pmuv3p4", "nopmuv3p4", "+perfmon", "-perfmon"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_PERFMON)
Features.push_back("+perfmon");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -70,6 +70,7 @@
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
AEK_PERFMON = 1ULL << 40,
+ AEK_HBC = 1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -145,6 +145,7 @@
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
AARCH64_ARCH_EXT_NAME("pmuv3p4", AArch64::AEK_PERFMON, "+perfmon", "-perfmon")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,7 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,7 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +659,19 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+ }
+
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ // Check features that are manually disabled by command line options.
+ // This needs to be checked after architecture-related features are handled,
+ // making sure they are properly disabled when required.
+ for (const auto &Feature : Features) {
+if (Feature == "-hbc")
+ HasHBC = false;
}
setDataLayout();
___
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[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 398698.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Update patch author in commit message.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1518,6 +1518,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"pmuv3p4", "nopmuv3p4", "+perfmon", "-perfmon"},
+ {"hbc", "nohbc", "+hbc", "-hbc"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_PERFMON)
Features.push_back("+perfmon");
+ if (Extensions & AArch64::AEK_HBC)
+Features.push_back("+hbc");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -70,6 +70,7 @@
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
AEK_PERFMON = 1ULL << 40,
+ AEK_HBC = 1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -145,6 +145,7 @@
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
AARCH64_ARCH_EXT_NAME("pmuv3p4", AArch64::AEK_PERFMON, "+perfmon", "-perfmon")
+AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-hbc.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-hbc.c
@@ -0,0 +1,12 @@
+// Test that target feature hbc is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+hbc %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nohbc %s 2>&1 | FileCheck %s --check-prefix=NO_HBC
+// NO_HBC: "-target-feature" "-hbc"
+
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a %s 2>&1 | FileCheck %s --check-prefix=ABSENT_HBC
+// ABSENT_HBC-NOT: "-target-feature" "+hbc"
+// ABSENT_HBC-NOT: "-target-feature" "-hbc"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -53,6 +53,7 @@
bool HasMatmulFP32;
bool HasLSE;
bool HasFlagM;
+ bool HasHBC;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -543,6 +543,7 @@
HasMatmulFP64 = false;
HasMatmulFP32 = false;
HasLSE = false;
+ HasHBC = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
@@ -658,6 +659,19 @@
HasRandGen = true;
if (Feature == "+flagm")
HasFlagM = true;
+if (Feature == "+hbc")
+ HasHBC = true;
+ }
+
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ // Check features that are manually disabled by command line options.
+ // This needs to be checked after architecture-related features are handled,
+ // making sure they are properly disabled when required.
+ for (const auto &Feature : Features) {
+if (Feature == "-hbc")
+ HasHBC = false;
}
setDataLayout();
___
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[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 updated this revision to Diff 399341.
tyb0807 marked an inline comment as done.
tyb0807 added a comment.
Removed checks that set HBC flag based on the target architecture and unset it
if command line explicitly disables it. This is because HBC feature does not
require any new intrinsic in the IR, so the frontend does not need to know about
whether HBC flag is set or unset in the command line.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1485,43 +1485,41 @@
}
TEST(TargetParserTest, AArch64ArchExtFeature) {
- const char *ArchExt[][4] = {{"crc", "nocrc", "+crc", "-crc"},
- {"crypto", "nocrypto", "+crypto", "-crypto"},
- {"flagm", "noflagm", "+flagm", "-flagm"},
- {"fp", "nofp", "+fp-armv8", "-fp-armv8"},
- {"simd", "nosimd", "+neon", "-neon"},
- {"fp16", "nofp16", "+fullfp16", "-fullfp16"},
- {"fp16fml", "nofp16fml", "+fp16fml", "-fp16fml"},
- {"profile", "noprofile", "+spe", "-spe"},
- {"ras", "noras", "+ras", "-ras"},
- {"lse", "nolse", "+lse", "-lse"},
- {"rdm", "nordm", "+rdm", "-rdm"},
- {"sve", "nosve", "+sve", "-sve"},
- {"sve2", "nosve2", "+sve2", "-sve2"},
- {"sve2-aes", "nosve2-aes", "+sve2-aes",
- "-sve2-aes"},
- {"sve2-sm4", "nosve2-sm4", "+sve2-sm4",
- "-sve2-sm4"},
- {"sve2-sha3", "nosve2-sha3", "+sve2-sha3",
- "-sve2-sha3"},
- {"sve2-bitperm", "nosve2-bitperm",
- "+sve2-bitperm", "-sve2-bitperm"},
- {"dotprod", "nodotprod", "+dotprod", "-dotprod"},
- {"rcpc", "norcpc", "+rcpc", "-rcpc" },
- {"rng", "norng", "+rand", "-rand"},
- {"memtag", "nomemtag", "+mte", "-mte"},
- {"tme", "notme", "+tme", "-tme"},
- {"pauth", "nopauth", "+pauth", "-pauth"},
- {"ssbs", "nossbs", "+ssbs", "-ssbs"},
- {"sb", "nosb", "+sb", "-sb"},
- {"predres", "nopredres", "+predres", "-predres"},
- {"i8mm", "noi8mm", "+i8mm", "-i8mm"},
- {"f32mm", "nof32mm", "+f32mm", "-f32mm"},
- {"f64mm", "nof64mm", "+f64mm", "-f64mm"},
- {"sme", "nosme", "+sme", "-sme"},
- {"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
- {"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
-};
+ const char *ArchExt[][4] = {
+ {"crc", "nocrc", "+crc", "-crc"},
+ {"crypto", "nocrypto", "+crypto", "-crypto"},
+ {"flagm", "noflagm", "+flagm", "-flagm"},
+ {"fp", "nofp", "+fp-armv8", "-fp-armv8"},
+ {"simd", "nosimd", "+neon", "-neon"},
+ {"fp16", "nofp16", "+fullfp16", "-fullfp16"},
+ {"fp16fml", "nofp16fml", "+fp16fml", "-fp16fml"},
+ {"profile", "noprofile", "+spe", "-spe"},
+ {"ras", "noras", "+ras", "-ras"},
+ {"lse", "nolse", "+lse", "-lse"},
+ {"rdm", "nordm", "+rdm", "-rdm"},
+ {"sve", "nosve", "+sve", "-sve"},
+ {"sve2", "nosve2", "+sve2", "-sve2"},
+ {"sve2-aes", "nosve2-aes", "+sve2-aes", "-sve2-aes"},
+ {"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"},
+ {"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"},
+ {"sve2-bitperm", "nosve2-bitperm", "+sve2-bitperm", "-sve2-bitperm"},
+ {"dotprod", "nodotprod", "+dotprod", "-dotprod"},
+ {"rcpc", "norcpc", "+rcpc", "-rcpc"},
+ {"rng", "norng", "+rand", "-rand"},
+ {"memtag", "nomemtag", "+mte", "-mte"},
+ {"tme", "notme", "+tme", "-tme"},
+ {"pauth", "nopauth", "+pauth", "-pauth"},
+ {"ssbs", "nossbs", "+ssbs", "-ssbs"},
+ {"sb", "nosb", "+sb", "-sb"},
+ {"predres", "nopredres", "+predres", "-predres"},
+ {"i8mm", "noi8mm", "+i8mm", "-i8mm
[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
tyb0807 marked 2 inline comments as done.
tyb0807 added inline comments.
Comment at: clang/lib/Basic/Targets/AArch64.cpp:666-675
+ HasHBC |= ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
+ArchKind == llvm::AArch64::ArchKind::ARMV9_3A;
+
+ // Check features that are manually disabled by command line options.
+ // This needs to be checked after architecture-related features are handled,
+ // making sure they are properly disabled when required.
+ for (const auto &Feature : Features) {
nickdesaulniers wrote:
> this whole block is suspect to me. Why is HBC special with regards to all
> other architectural extensions?
Indeed, HBC does not require the frontend to generate any special intrinsic in
the IR, so the frontend does not need to know about whether HBC is enabled or
disabled in the command line. This can thus be completely handled by the target
parser.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
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[PATCH] D116939: [AArch64] clang support for Armv8.8/9.3 HBC
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
tyb0807 marked an inline comment as done.
Closed by commit rG2db4cf5962de: clang support for Armv8.8/9.3 HBC (authored by
tmatheson, committed by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116939/new/
https://reviews.llvm.org/D116939
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-hbc.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1485,43 +1485,41 @@
}
TEST(TargetParserTest, AArch64ArchExtFeature) {
- const char *ArchExt[][4] = {{"crc", "nocrc", "+crc", "-crc"},
- {"crypto", "nocrypto", "+crypto", "-crypto"},
- {"flagm", "noflagm", "+flagm", "-flagm"},
- {"fp", "nofp", "+fp-armv8", "-fp-armv8"},
- {"simd", "nosimd", "+neon", "-neon"},
- {"fp16", "nofp16", "+fullfp16", "-fullfp16"},
- {"fp16fml", "nofp16fml", "+fp16fml", "-fp16fml"},
- {"profile", "noprofile", "+spe", "-spe"},
- {"ras", "noras", "+ras", "-ras"},
- {"lse", "nolse", "+lse", "-lse"},
- {"rdm", "nordm", "+rdm", "-rdm"},
- {"sve", "nosve", "+sve", "-sve"},
- {"sve2", "nosve2", "+sve2", "-sve2"},
- {"sve2-aes", "nosve2-aes", "+sve2-aes",
- "-sve2-aes"},
- {"sve2-sm4", "nosve2-sm4", "+sve2-sm4",
- "-sve2-sm4"},
- {"sve2-sha3", "nosve2-sha3", "+sve2-sha3",
- "-sve2-sha3"},
- {"sve2-bitperm", "nosve2-bitperm",
- "+sve2-bitperm", "-sve2-bitperm"},
- {"dotprod", "nodotprod", "+dotprod", "-dotprod"},
- {"rcpc", "norcpc", "+rcpc", "-rcpc" },
- {"rng", "norng", "+rand", "-rand"},
- {"memtag", "nomemtag", "+mte", "-mte"},
- {"tme", "notme", "+tme", "-tme"},
- {"pauth", "nopauth", "+pauth", "-pauth"},
- {"ssbs", "nossbs", "+ssbs", "-ssbs"},
- {"sb", "nosb", "+sb", "-sb"},
- {"predres", "nopredres", "+predres", "-predres"},
- {"i8mm", "noi8mm", "+i8mm", "-i8mm"},
- {"f32mm", "nof32mm", "+f32mm", "-f32mm"},
- {"f64mm", "nof64mm", "+f64mm", "-f64mm"},
- {"sme", "nosme", "+sme", "-sme"},
- {"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
- {"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
-};
+ const char *ArchExt[][4] = {
+ {"crc", "nocrc", "+crc", "-crc"},
+ {"crypto", "nocrypto", "+crypto", "-crypto"},
+ {"flagm", "noflagm", "+flagm", "-flagm"},
+ {"fp", "nofp", "+fp-armv8", "-fp-armv8"},
+ {"simd", "nosimd", "+neon", "-neon"},
+ {"fp16", "nofp16", "+fullfp16", "-fullfp16"},
+ {"fp16fml", "nofp16fml", "+fp16fml", "-fp16fml"},
+ {"profile", "noprofile", "+spe", "-spe"},
+ {"ras", "noras", "+ras", "-ras"},
+ {"lse", "nolse", "+lse", "-lse"},
+ {"rdm", "nordm", "+rdm", "-rdm"},
+ {"sve", "nosve", "+sve", "-sve"},
+ {"sve2", "nosve2", "+sve2", "-sve2"},
+ {"sve2-aes", "nosve2-aes", "+sve2-aes", "-sve2-aes"},
+ {"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"},
+ {"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"},
+ {"sve2-bitperm", "nosve2-bitperm", "+sve2-bitperm", "-sve2-bitperm"},
+ {"dotprod", "nodotprod", "+dotprod", "-dotprod"},
+ {"rcpc", "norcpc", "+rcpc", "-rcpc"},
+ {"rng", "norng", "+rand", "-rand"},
+ {"memtag", "nomemtag", "+mte", "-mte"},
+ {"tme", "notme", "+tme", "-tme"},
+ {"pauth", "nopauth", "+pauth", "-pauth"},
+ {"ssbs", "nossbs", "+ssbs", "-ssbs"},
+ {"sb", "nosb", "+sb", "-sb"},
+ {"predres", "nopredres", "+predres", "-predres"},
+ {"i8mm", "noi8mm", "+i8mm", "-i8mm"},
+ {"f32mm", "nof32mm", "+f32mm", "-f32mm"},
+ {"f64mm", "nof64mm", "+f64mm", "-f64mm"},
+ {"sme", "n
[PATCH] D117271: [AArch64] clang support for Armv8.8/9.3 MOPS
tyb0807 created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
tyb0807 requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.
This introduces clang command line support for the new Armv8.8-A and
Armv9.3-A instructions for standardising memcpy, memset and memmove
operations, which was previously introduced into LLVM in
https://reviews.llvm.org/D116157.
Patch by Lucas Prates, Tomas Matheson and Son Tuan Vu.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D117271
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-mops.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1519,6 +1519,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_HBC)
Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Features.push_back("+mops");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -70,6 +70,7 @@
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
AEK_HBC = 1ULL << 40,
+ AEK_MOPS =1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -145,6 +145,7 @@
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64",
"-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64",
"-sme-i64")
AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc",
"-hbc")
+AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS,"+mops",
"-mops")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-mops.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-mops.c
@@ -0,0 +1,6 @@
+// Test that target feature mops is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s
2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+mops"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nomops %s
2>&1 | FileCheck %s --check-prefix=NO_MOPS
+// NO_MOPS: "-target-feature" "-mops"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -54,6 +54,7 @@
bool HasLSE;
bool HasFlagM;
bool HasHBC;
+ bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -544,6 +544,7 @@
HasMatmulFP32 = false;
HasLSE = false;
HasHBC = false;
+ HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1519,6 +1519,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_HBC)
Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Fe
[PATCH] D117271: [AArch64] clang support for Armv8.8/9.3 MOPS
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc84b8be516bc: [AArch64] clang support for Armv8.8/9.3 MOPS
(authored by pratlucas, committed by tyb0807).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117271/new/
https://reviews.llvm.org/D117271
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Driver/aarch64-mops.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/AArch64TargetParser.h
llvm/lib/Support/AArch64TargetParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1519,6 +1519,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_HBC)
Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Features.push_back("+mops");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/include/llvm/Support/AArch64TargetParser.h
+++ llvm/include/llvm/Support/AArch64TargetParser.h
@@ -70,6 +70,7 @@
AEK_SMEF64 = 1ULL << 38,
AEK_SMEI64 = 1ULL << 39,
AEK_HBC = 1ULL << 40,
+ AEK_MOPS =1ULL << 41,
};
enum class ArchKind {
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -145,6 +145,7 @@
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64",
"-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64",
"-sme-i64")
AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc",
"-hbc")
+AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS,"+mops",
"-mops")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
Index: clang/test/Driver/aarch64-mops.c
===
--- /dev/null
+++ clang/test/Driver/aarch64-mops.c
@@ -0,0 +1,6 @@
+// Test that target feature mops is implemented and available correctly
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+mops %s
2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+mops"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.8-a+nomops %s
2>&1 | FileCheck %s --check-prefix=NO_MOPS
+// NO_MOPS: "-target-feature" "-mops"
Index: clang/lib/Basic/Targets/AArch64.h
===
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -54,6 +54,7 @@
bool HasLSE;
bool HasFlagM;
bool HasHBC;
+ bool HasMOPS;
llvm::AArch64::ArchKind ArchKind;
Index: clang/lib/Basic/Targets/AArch64.cpp
===
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -544,6 +544,7 @@
HasMatmulFP32 = false;
HasLSE = false;
HasHBC = false;
+ HasMOPS = false;
ArchKind = llvm::AArch64::ArchKind::INVALID;
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1519,6 +1519,7 @@
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
{"hbc", "nohbc", "+hbc", "-hbc"},
+ {"mops", "nomops", "+mops", "-mops"},
};
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
Index: llvm/lib/Support/AArch64TargetParser.cpp
===
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -116,6 +116,8 @@
Features.push_back("+sme-i64");
if (Extensions & AArch64::AEK_HBC)
Features.push_back("+hbc");
+ if (Extensions & AArch64::AEK_MOPS)
+Features.push_back("+mops");
return true;
}
Index: llvm/include/llvm/Support/AArch64TargetParser.h
===
--- llv
[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.
tyb0807 created this revision.
Herald added subscribers: dexonsmith, hiraditya, kristof.beyls.
tyb0807 requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.
This commit should contain all the necessary boilerplate to make the
8.8-A architecture exist from LLVM and Clang's point of view: it adds
the new arch as a subtarget feature, a definition in TargetParser, a
name on the command line, an appropriate set of predefined macros, and
adds appropriate tests. The new architecture name is supported in both
AArch32 and AArch64.
However, in this commit, no actual _functionality_ is added as part of
the new architecture. If you specify -march=armv8.8a, the compiler
will accept it and set the right predefines, but generate no code any
differently.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D115694
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-cpus.c
clang/test/Driver/arm-cortex-cpus.c
clang/test/Preprocessor/arm-target-features.c
llvm/include/llvm/ADT/Triple.h
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Support/AArch64TargetParser.cpp
llvm/lib/Support/ARMTargetParser.cpp
llvm/lib/Support/Triple.cpp
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/ARM.td
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -29,6 +29,7 @@
"armv8l", "armv8.1-a","armv8.1a","armv8.2-a","armv8.2a",
"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
"armv8.5a","armv8.6-a","armv8.6a","armv8.7-a","armv8.7a",
+"armv8.8-a", "armv8.8a",
"armv8-r", "armv8r", "armv8-m.base","armv8m.base", "armv8-m.main",
"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
"armv9-a", "armv9","armv9a", "armv9.1-a","armv9.1a",
@@ -501,6 +502,9 @@
EXPECT_TRUE(
testARMArch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
+ EXPECT_TRUE(
+ testARMArch("armv8.8-a", "generic", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(
testARMArch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
@@ -771,8 +775,8 @@
"v7", "v7a","v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m",
"v7m", "v7k","v7s", "v7e-m", "v7em", "v8-a", "v8","v8a",
"v8l", "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
- "v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8-r",
- "v8m.base", "v8m.main", "v8.1m.main"
+ "v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8.8-a",
+ "v8.8a", "v8-r", "v8m.base", "v8m.main", "v8.1m.main"
};
for (unsigned i = 0; i < array_lengthof(Arch); i++) {
@@ -839,6 +843,7 @@
case ARM::ArchKind::ARMV8_5A:
case ARM::ArchKind::ARMV8_6A:
case ARM::ArchKind::ARMV8_7A:
+case ARM::ArchKind::ARMV8_8A:
case ARM::ArchKind::ARMV9A:
case ARM::ArchKind::ARMV9_1A:
case ARM::ArchKind::ARMV9_2A:
@@ -1266,6 +1271,8 @@
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
+ EXPECT_TRUE(testAArch64Arch("armv8.8-a", "generic", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv9.1-a", "generic", "v9.1a",
Index: llvm/lib/Target/ARM/ARMSubtarget.h
===
--- llvm/lib/Target/ARM/ARMSubtarget.h
+++ llvm/lib/Target/ARM/ARMSubtarget.h
@@ -121,6 +121,7 @@
ARMv85a,
ARMv86a,
ARMv87a,
+ARMv88a,
ARMv8a,
ARMv8mBaseline,
ARMv8mMainline,
@@ -174,6 +175,7 @@
bool HasV8_4aOps = false;
bool HasV8_5aOps = false;
bool HasV8_6aOps = false;
+ bool HasV8_8aOps = false;
bool HasV8_7aOps = false;
bool HasV9_0aOps = false;
bool HasV9_1aOps = false;
@@ -635,6 +637,7 @@
bool hasV8_5aOps() const { return HasV8_5aOps; }
bool hasV8_6aOps() const { return HasV8_6aOps; }
bool hasV8_7aOps() const { return HasV8_7aOps; }
+ bool hasV8_8aOps() const { return HasV8_8aOps; }
bool hasV9_0aOps() c
[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.
tyb0807 updated this revision to Diff 394116.
tyb0807 added a comment.
Allow linting
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115694/new/
https://reviews.llvm.org/D115694
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-cpus.c
clang/test/Driver/arm-cortex-cpus.c
clang/test/Preprocessor/arm-target-features.c
llvm/include/llvm/ADT/Triple.h
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Support/AArch64TargetParser.cpp
llvm/lib/Support/ARMTargetParser.cpp
llvm/lib/Support/Triple.cpp
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/ARM.td
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -18,21 +18,21 @@
namespace {
const char *ARMArch[] = {
-"armv2", "armv2a", "armv3", "armv3m", "armv4",
-"armv4t", "armv5","armv5t", "armv5e", "armv5te",
-"armv5tej","armv6","armv6j", "armv6k", "armv6hl",
-"armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
-"armv6m", "armv6sm", "armv6s-m","armv7-a", "armv7",
-"armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
-"armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
-"armv7e-m","armv7em", "armv8-a", "armv8","armv8a",
-"armv8l", "armv8.1-a","armv8.1a","armv8.2-a","armv8.2a",
-"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
-"armv8.5a","armv8.6-a","armv8.6a","armv8.7-a","armv8.7a",
-"armv8-r", "armv8r", "armv8-m.base","armv8m.base", "armv8-m.main",
-"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
-"armv9-a", "armv9","armv9a", "armv9.1-a","armv9.1a",
-"armv9.2-a", "armv9.2a",
+"armv2", "armv2a", "armv3", "armv3m","armv4",
+"armv4t", "armv5", "armv5t", "armv5e","armv5te",
+"armv5tej","armv6", "armv6j", "armv6k","armv6hl",
+"armv6t2", "armv6kz","armv6z", "armv6zk", "armv6-m",
+"armv6m", "armv6sm","armv6s-m","armv7-a", "armv7",
+"armv7a", "armv7ve","armv7hl", "armv7l","armv7-r",
+"armv7r", "armv7-m","armv7m", "armv7k","armv7s",
+"armv7e-m","armv7em","armv8-a", "armv8", "armv8a",
+"armv8l", "armv8.1-a", "armv8.1a","armv8.2-a", "armv8.2a",
+"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
+"armv8.5a","armv8.6-a", "armv8.6a","armv8.7-a", "armv8.7a",
+"armv8.8-a", "armv8.8a", "armv8-r", "armv8r","armv8-m.base",
+"armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt","iwmmxt2",
+"xscale", "armv8.1-m.main", "armv9-a", "armv9", "armv9a",
+"armv9.1-a", "armv9.1a", "armv9.2-a", "armv9.2a",
};
template
@@ -501,6 +501,8 @@
EXPECT_TRUE(
testARMArch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
+ EXPECT_TRUE(testARMArch("armv8.8-a", "generic", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(
testARMArch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
@@ -765,15 +767,17 @@
TEST(TargetParserTest, ARMparseArchEndianAndISA) {
const char *Arch[] = {
- "v2", "v2a","v3","v3m","v4","v4t","v5","v5t",
- "v5e", "v5te", "v5tej", "v6", "v6j", "v6k","v6hl", "v6t2",
- "v6kz", "v6z","v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
- "v7", "v7a","v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m",
- "v7m", "v7k","v7s", "v7e-m", "v7em", "v8-a", "v8","v8a",
- "v8l", "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
- "v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8-r",
- "v8m.base", "v8m.main", "v8.1m.main"
- };
+ "v2","v2a","v3","v3m","v4", "v4t",
+ "v5","v5t","v5e", "v5te", "v5tej","v6",
+ "v6j", "v6k","v6hl", "v6t2", "v6kz", "v6z",
+ "v6zk", "v6-m", "v6m", "v6sm", "v6s-m","v7-a",
+ "v7","v7a","v7ve", "v7hl
[PATCH] D115694: [ARM] Introduce an empty "armv8.8-a" architecture.
tyb0807 updated this revision to Diff 394120.
tyb0807 edited the summary of this revision.
tyb0807 added a comment.
Update commit message
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115694/new/
https://reviews.llvm.org/D115694
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-cpus.c
clang/test/Driver/arm-cortex-cpus.c
clang/test/Preprocessor/arm-target-features.c
llvm/include/llvm/ADT/Triple.h
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Support/AArch64TargetParser.cpp
llvm/lib/Support/ARMTargetParser.cpp
llvm/lib/Support/Triple.cpp
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/ARM.td
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -18,21 +18,21 @@
namespace {
const char *ARMArch[] = {
-"armv2", "armv2a", "armv3", "armv3m", "armv4",
-"armv4t", "armv5","armv5t", "armv5e", "armv5te",
-"armv5tej","armv6","armv6j", "armv6k", "armv6hl",
-"armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
-"armv6m", "armv6sm", "armv6s-m","armv7-a", "armv7",
-"armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
-"armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
-"armv7e-m","armv7em", "armv8-a", "armv8","armv8a",
-"armv8l", "armv8.1-a","armv8.1a","armv8.2-a","armv8.2a",
-"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
-"armv8.5a","armv8.6-a","armv8.6a","armv8.7-a","armv8.7a",
-"armv8-r", "armv8r", "armv8-m.base","armv8m.base", "armv8-m.main",
-"armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
-"armv9-a", "armv9","armv9a", "armv9.1-a","armv9.1a",
-"armv9.2-a", "armv9.2a",
+"armv2", "armv2a", "armv3", "armv3m","armv4",
+"armv4t", "armv5", "armv5t", "armv5e","armv5te",
+"armv5tej","armv6", "armv6j", "armv6k","armv6hl",
+"armv6t2", "armv6kz","armv6z", "armv6zk", "armv6-m",
+"armv6m", "armv6sm","armv6s-m","armv7-a", "armv7",
+"armv7a", "armv7ve","armv7hl", "armv7l","armv7-r",
+"armv7r", "armv7-m","armv7m", "armv7k","armv7s",
+"armv7e-m","armv7em","armv8-a", "armv8", "armv8a",
+"armv8l", "armv8.1-a", "armv8.1a","armv8.2-a", "armv8.2a",
+"armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
+"armv8.5a","armv8.6-a", "armv8.6a","armv8.7-a", "armv8.7a",
+"armv8.8-a", "armv8.8a", "armv8-r", "armv8r","armv8-m.base",
+"armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt","iwmmxt2",
+"xscale", "armv8.1-m.main", "armv9-a", "armv9", "armv9a",
+"armv9.1-a", "armv9.1a", "armv9.2-a", "armv9.2a",
};
template
@@ -501,6 +501,8 @@
EXPECT_TRUE(
testARMArch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
+ EXPECT_TRUE(testARMArch("armv8.8-a", "generic", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(
testARMArch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
@@ -765,15 +767,17 @@
TEST(TargetParserTest, ARMparseArchEndianAndISA) {
const char *Arch[] = {
- "v2", "v2a","v3","v3m","v4","v4t","v5","v5t",
- "v5e", "v5te", "v5tej", "v6", "v6j", "v6k","v6hl", "v6t2",
- "v6kz", "v6z","v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
- "v7", "v7a","v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m",
- "v7m", "v7k","v7s", "v7e-m", "v7em", "v8-a", "v8","v8a",
- "v8l", "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
- "v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8-r",
- "v8m.base", "v8m.main", "v8.1m.main"
- };
+ "v2","v2a","v3","v3m","v4", "v4t",
+ "v5","v5t","v5e", "v5te", "v5tej","v6",
+ "v6j", "v6k","v6hl", "v6t2", "v6kz", "v6z",
+ "v6zk", "v6-m", "v6m", "v6sm", "v6s-m",
