[PATCH] D84261: [PGO] Supporting code for always instrumenting entry block

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added inline comments.



Comment at: llvm/include/llvm/ProfileData/InstrProfData.inc:676
 #define VARIANT_MASK_CSIR_PROF (0x1ULL << 57)
+#define VARIANT_MASK_INSTR_ENTRY (0x1ULL << 58)
 #define INSTR_PROF_RAW_VERSION_VAR __llvm_profile_raw_version

This revision is closed, so excuse me for the question: 
Files `./llvm/include/llvm/ProfileData/InstrProfData.inc` and 
`./compiler-rt/include/profile/InstrProfData.inc` should be two identical 
copies, as stated in their description. 
```
 * The file has two identical copies. The master copy lives in LLVM and
 * the other one  sits in compiler-rt/lib/profile directory. To make changes
 * in this file, first modify the master copy and copy it over to compiler-rt.
 * Testing of any change in this file can start only after the two copies are
 * synced up.
```


Should we add `VARIANT_MASK_INSTR_ENTRY` to `compiler-rt` or change description?


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[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

[Pavel Kosov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG910a642c0a5b: [compiler-rt] Implement  ARM atomic operations 
for architectures without SMP… (authored by kpdev42).

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Files:
  compiler-rt/cmake/Modules/CompilerRTUtils.cmake
  compiler-rt/cmake/config-ix.cmake
  compiler-rt/lib/builtins/CMakeLists.txt
  compiler-rt/lib/builtins/arm/sync-ops.h


Index: compiler-rt/lib/builtins/arm/sync-ops.h
===
--- compiler-rt/lib/builtins/arm/sync-ops.h
+++ compiler-rt/lib/builtins/arm/sync-ops.h
@@ -14,6 +14,8 @@
 
 #include "../assembly.h"
 
+#ifdef COMPILER_RT_HAS_SMP_SUPPORT
+
 #define SYNC_OP_4(op)  
\
   .p2align 2;  
\
   .thumb;  
\
@@ -45,6 +47,37 @@
   dmb; 
\
   pop { r4, r5, r6, pc }
 
+#else
+
+#define SYNC_OP_4(op)  
\
+  .p2align 2;  
\
+  DEFINE_COMPILERRT_THUMB_FUNCTION(__sync_fetch_and_##op)  
\
+  LOCAL_LABEL(tryatomic_##op) :
\
+  mov r12, r0; 
\
+  op(r2, r0, r1);  
\
+  str r2, [r12];   
\
+  ldr r12, [r12];  
\
+  cmp r12, r2; 
\
+  bne LOCAL_LABEL(tryatomic_##op); 
\
+  bx lr
+
+#define SYNC_OP_8(op)  
\
+  .p2align 2;  
\
+  DEFINE_COMPILERRT_THUMB_FUNCTION(__sync_fetch_and_##op)  
\
+  push {r4, r5, r6, lr};   
\
+  LOCAL_LABEL(tryatomic_##op) :
\
+  mov r12, r0; 
\
+  op(r4, r5, r0, r1, r2, r3);  
\
+  stm r12, {r4, r5};   
\
+  ldm r12, {r6, r12};  
\
+  cmp r6, r4;  
\
+  bne LOCAL_LABEL(tryatomic_##op); 
\
+  cmp r12, r5; 
\
+  bne LOCAL_LABEL(tryatomic_##op); 
\
+  pop { r4, r5, r6, pc }
+
+#endif
+
 #define MINMAX_4(rD, rN, rM, cmp_kind) 
\
   cmp rN, rM;  
\
   mov rD, rM;  
\
Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -740,6 +740,7 @@
 list(APPEND BUILTIN_CFLAGS_${arch} -fomit-frame-pointer 
-DCOMPILER_RT_ARMHF_TARGET)
   endif()
 
+  test_arm_smp_support(${arch} BUILTIN_CFLAGS_${arch})
   # For RISCV32, we must force enable int128 for compiling long
   # double routines.
   if("${arch}" STREQUAL "riscv32")
Index: compiler-rt/cmake/config-ix.cmake
===
--- compiler-rt/cmake/config-ix.cmake
+++ compiler-rt/cmake/config-ix.cmake
@@ -200,6 +200,11 @@
 set(SIMPLE_SOURCE ${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}/simple.cc)
 file(WRITE ${SIMPLE_SOURCE} "#include \n#include \nint 
main() { printf(\"hello, world\"); }\n")
 
+# Check if we have SMP support for particular ARM architecture
+# If not use stubs instead of real atomic operations - see sync-ops.h
+set(ARM_SMP_CHECK_SRC 
${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}/arm-barrier.cc)
+file(WRITE ${ARM_SMP_CHECK_SRC} "int main() { asm(\"dmb\"); return 0; }")
+
 # Detect whether the current target platform is 32-bit or 64-bit, and setup
 # the correct commandline flags needed to attempt to target 32-bit and 64-bit.
 if (NOT CMAKE_SIZEOF_VOID_P EQUAL 4 AND
Index: compiler-rt/cmake/Modules/CompilerRTUtils.cmake
===
--- 

[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

In D116088#3393350 , @efriedma wrote:

> D120026  is merged now, which addresses the 
> issue of the compiler generating __sync calls where it isn't supposed to.
>
> Does anyone want to continue discussing what changes to compiler-rt would be 
> appropriate?  I didn't mean to completely shut down discussion with my 
> comment.

@efriedma

Imagine we have the following piece of code in the program:

  volatile int G;
  int foo() { return __sync_add_and_fetch(&G, 1); }

Now we want having this built and running on armv5 platform. At the moment the 
only option we have is to use libgcc. Unfortunately this have one big 
disadvantage: we're only limited to Linux, because call to __sync_add_and_fetch 
boils down to Linux kernel user helper. We want this to work on other platforms 
also, and here is what compiler-rt good for.

However sync ops operations in compiler-rt use memory barriers, which doesn't 
work on armv5: any attempt to use memory barrier on the latter will result in 
SIGILL. As armv5 doesn't support SMP (but still supports preemptive 
multitasking) it's possible in out opinion to implement sync ops as a compare 
and swap loop without memory barriers. What's your opinion on this?


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[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

At the moment, in case of compiler-rt, `__sync_add_and_fetch` boils down to
`__sync_add_and_fetch_N`, where `N` is the size of data being fetched (4 for 
int).
The implementation of `__sync_fetch_and_add_N` does approximately the following:

1. Sets memory barrier
2. Calls atomic load from memory location
3. Modifies data
4. Calls atomic store to memory location
5. Checks that operation is consistent, if not goes to step 2.

IMO, performance-wise there is not much difference (if any) between this and
modifying data with acquiring spinlock.

No code in compiler-rt disables interrupts, so it can and will be interrupted 
in the middle,
by a different thread however I don't see any problem in this.

Now if we are on a platform which doesn't support SMP we can use ordinary 
memory operations instead
of atomic ones, can't we?


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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 created this revision.
kpdev42 added reviewers: DavidSpickett, davide, clayborg, k8stone.
kpdev42 added projects: LLVM, LLDB.
Herald added subscribers: Michael137, JDevlieghere, martong.
Herald added a reviewer: shafik.
Herald added a reviewer: shafik.
Herald added a project: All.
kpdev42 requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

The no_unique_address attribute is currently a part of C++20 standard and is 
being used in both libstdc++ and libc++. This causes problems when debugging 
C++ code with lldb because the latter doesn't expect two non-empty base classes 
having the same offset and crashes with assertion. Patch attempts to infer this 
attribute by detecting two consecutive base classes with the same offset to 
derived class and marking first of those classes as empty and adding 
no_unique_address attribute to all of its fields.


Repository:
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https://reviews.llvm.org/D143347

Files:
  clang/include/clang/AST/DeclCXX.h
  clang/lib/AST/ASTImporter.cpp
  lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
  lldb/test/API/types/TestEmptyBase.py
  lldb/test/API/types/empty_base_type.cpp

Index: lldb/test/API/types/empty_base_type.cpp
===
--- /dev/null
+++ lldb/test/API/types/empty_base_type.cpp
@@ -0,0 +1,23 @@
+struct C
+{
+ long c,d;
+};
+
+struct D
+{
+};
+
+struct B
+{
+  [[no_unique_address]] D x;
+};
+
+struct A : B,C
+{
+ long a,b;
+} _a;
+
+
+int main() {
+  return _a.a; // Set breakpoint here.
+}
Index: lldb/test/API/types/TestEmptyBase.py
===
--- /dev/null
+++ lldb/test/API/types/TestEmptyBase.py
@@ -0,0 +1,42 @@
+"""
+Test that recursive types are handled correctly.
+"""
+
+
+
+import lldb
+import lldbsuite.test.lldbutil as lldbutil
+from lldbsuite.test.lldbtest import *
+
+
+class EmptyBaseTestCase(TestBase):
+
+def setUp(self):
+# Call super's setUp().
+TestBase.setUp(self)
+
+# Find the line number to break for main.c.
+self.line = line_number('empty_base_type.cpp',
+'// Set breakpoint here.')
+
+self.sources = {
+'CXX_SOURCES': 'empty_base_type.cpp'}
+
+def test(self):
+"""Test that recursive structs are displayed correctly."""
+self.build(dictionary=self.sources)
+self.setTearDownCleanup(dictionary=self.sources)
+self.run_expr()
+
+def run_expr(self):
+self.runCmd("file " + self.getBuildArtifact("a.out"), CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(
+self,
+"empty_base_type.cpp",
+self.line,
+num_expected_locations=-1,
+loc_exact=True)
+
+self.runCmd("run", RUN_SUCCEEDED)
+self.runCmd("expression _a")
Index: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
===
--- lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
+++ lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
@@ -1460,6 +1460,8 @@
   if (!result)
 return;
 
+  const clang::CXXBaseSpecifier *prev_base =
+  base_classes.empty() ? nullptr : base_classes.back().get();
   base_classes.push_back(std::move(result));
 
   if (is_virtual) {
@@ -1476,6 +1478,20 @@
 // be removed from LayoutRecordType() in the external
 // AST source in clang.
   } else {
+if (prev_base) {
+  clang::CXXRecordDecl *prev_base_decl =
+  prev_base->getType()->getAsCXXRecordDecl();
+  if (prev_base_decl && !prev_base_decl->isEmpty()) {
+auto it = layout_info.base_offsets.find(prev_base_decl);
+assert(it != layout_info.base_offsets.end());
+if (it->second.getQuantity() == member_byte_offset) {
+  prev_base_decl->markEmpty();
+  for (auto *field : prev_base_decl->fields())
+field->addAttr(clang::NoUniqueAddressAttr::Create(
+ast->getASTContext(), clang::SourceRange()));
+}
+  }
+}
 layout_info.base_offsets.insert(std::make_pair(
 ast->GetAsCXXRecordDecl(base_class_clang_type.GetOpaqueQualType()),
 clang::CharUnits::fromQuantity(member_byte_offset)));
Index: lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
===
--- lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
+++ lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
@@ -548,6 +548,7 @@
 
 void ClangASTImporter::SetRecordLayout(clang::RecordDecl *decl,
 const LayoutInfo &layout) {
+
   m_record_decl_to_layout_map.insert(std::make_pair(decl, layout));
 }
 
Index: clang/lib/AST/ASTImporter.cpp
==

[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 432478.
kpdev42 edited the summary of this revision.
kpdev42 added a comment.

Well, after some investigation it turned out that:

1. ARMv5 has DMB instruction in the form of mcr p15, #0, , c7, c10, #5
2. There is SWP instruction (deprecated on ARMv6), which does atomic exchange 
of 32-bit values

I've reimplemented sync ops using these primitves, PTAL
Theoretically this should work on ARMv6 and higher, though I didn't check this


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Files:
  compiler-rt/cmake/Modules/CompilerRTUtils.cmake
  compiler-rt/cmake/config-ix.cmake
  compiler-rt/lib/builtins/CMakeLists.txt
  compiler-rt/lib/builtins/arm/sync-ops.h

Index: compiler-rt/lib/builtins/arm/sync-ops.h
===
--- compiler-rt/lib/builtins/arm/sync-ops.h
+++ compiler-rt/lib/builtins/arm/sync-ops.h
@@ -16,12 +16,14 @@
 
 #if __ARM_ARCH >= 7
 #define DMB dmb
-#elif __ARM_ARCH >= 6
+#elif __ARM_ARCH >= 5
 #define DMB mcr p15, #0, r0, c7, c10, #5
 #else
 #error DMB is only supported on ARMv6+
 #endif
 
+#ifdef COMPILER_RT_HAS_SMP_SUPPORT
+
 #define SYNC_OP_4(op)  \
   .p2align 2;  \
   .syntax unified; \
@@ -51,6 +53,42 @@
   DMB; \
   pop { r4, r5, r6, pc }
 
+#else
+
+#define SYNC_OP_4(op)  \
+  .p2align 2;  \
+  DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_##op)\
+  DMB; \
+  mov r12, r0; \
+  LOCAL_LABEL(tryatomic_##op) : ldr r0, [r12]; \
+  op(r2, r0, r1);  \
+  swp r3, r2, [r12];   \
+  cmp r3, r0;  \
+  bne LOCAL_LABEL(tryatomic_##op); \
+  DMB; \
+  bx lr
+
+#define SYNC_OP_8(op)  \
+  .p2align 2;  \
+  DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_##op)\
+  push{r4, r5, r6, lr};\
+  DMB; \
+  mov r12, r0; \
+  LOCAL_LABEL(tryatomic_##op) : ldm r12, {r0, r1}; \
+  op(r4, r5, r0, r1, r2, r3);  \
+  swp r6, r4, [r12];   \
+  cmp r6, r0;  \
+  bne LOCAL_LABEL(tryatomic_##op); \
+  add r12, r12, #4;\
+  swp r6, r5, [r12];   \
+  sub r12, r12, #4;\
+  cmp r6, r1;  \
+  bne LOCAL_LABEL(tryatomic_##op); \
+  DMB; \
+  pop { r4, r5, r6, pc }
+
+#endif
+
 #define MINMAX_4(rD, rN, rM, cmp_kind) \
   cmp rN, rM;  \
   mov rD, rM;  \
Index: compiler-rt/lib/builtins/CMakeLists.txt
===
--- compiler-rt/lib/builtins/CMakeLists.txt
+++ compiler-rt/lib/builtins/CMakeLists.txt
@@ -752,6 +752,7 @@
 list(APPEND BUILTIN_CFLAGS_${arch} -fomit-frame-pointer -DCOMPILER_RT_ARMHF_TARGET)
   endif()
 
+  test_arm_smp_support(${arch} BUILTIN_CFLAGS_${arch})
   # For RISCV32, we must force enable int128 for compiling long
   # double routines.
   if("${arch}" STREQUAL "riscv32")
Index: compiler-rt/cmake/config-ix.cmake
===
--- compiler-rt/cmake/config-ix.cmake
+++ compiler-rt/cmake/config-ix.cmake
@@ -201,6 +201,11 @@
 set(SIMPLE_SOURCE ${CMAKE_BINARY_DIR}${CMAKE_FILES_

[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 marked an inline comment as done.
kpdev42 added inline comments.



Comment at: clang/lib/Driver/ToolChains/OHOS.h:38
+  bool isPICDefaultForced() const override { return false; }
+  bool useRelaxRelocations() const override { return false; }
+  UnwindLibType GetUnwindLibType(const llvm::opt::ArgList &Args) const 
override;

MaskRay wrote:
> Why is `useRelaxRelocations` false?
Thank you for mentioning. I would say that there is no precise reason for it. 
And it will be changed to `true` in the nearest future.


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[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG28997feb0c3a: [LLVM][OHOS] Clang toolchain and targets 
(authored by kpdev42).
Herald added a subscriber: asb.

Changed prior to commit:
  https://reviews.llvm.org/D145227?vs=504994&id=506511#toc

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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/Basic/Targets/X86.h
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/lib/Driver/ToolChains/OHOS.cpp
  clang/lib/Driver/ToolChains/OHOS.h
  clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
  clang/test/Driver/Inputs/ohos_native_tree/llvm/bin/.keep
  clang/test/Driver/Inputs/ohos_native_tree/llvm/include/c++/v1/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_softfp_neon-vfpv4/libc++.so
  clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.profile.a
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/arm-liteos-ohos/.keep
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  clang/test/Driver/ohos.c
  clang/test/Driver/ohos.cpp
  clang/test/Preprocessor/ohos.c

Index: clang/test/Preprocessor/ohos.c

[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

In D145227#4192628 , @DavidSpickett 
wrote:

> Also failing on our Windows on Arm bot: 
> https://lab.llvm.org/buildbot/#/builders/65/builds/8607
>
> I think some lines need to account for Windows slashes, `{{/|}}` should 
> do that.

Yes, sorry... Fixed 
https://github.com/llvm/llvm-project/commit/28997feb0c3ac243cb5cc89d7682993e23463ca7


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D145227/new/

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[PATCH] D145057: [clang][ASTImport] Add support for import of empty records

[Pavel Kosov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
kpdev42 marked an inline comment as done.
Closed by commit rG21cd04c46fe0: [clang][ASTImport] Add support for import of 
empty records (authored by kpdev42).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145057/new/

https://reviews.llvm.org/D145057

Files:
  clang/include/clang/AST/ASTImporter.h
  clang/include/clang/AST/DeclCXX.h
  clang/lib/AST/ASTImporter.cpp
  clang/unittests/AST/ASTImporterTest.cpp

Index: clang/unittests/AST/ASTImporterTest.cpp
===
--- clang/unittests/AST/ASTImporterTest.cpp
+++ clang/unittests/AST/ASTImporterTest.cpp
@@ -8478,6 +8478,29 @@
   ToVaList->getUnderlyingType(), ToBuiltinVaList->getUnderlyingType()));
 }
 
+TEST_P(ASTImporterOptionSpecificTestBase,
+   ImportDefinitionOfEmptyClassWithNoUniqueAddressField) {
+  Decl *FromTU = getTuDecl(
+  R"(
+  struct B {};
+  struct A { B b; };
+  )",
+  Lang_CXX20);
+
+  CXXRecordDecl *FromD = FirstDeclMatcher().match(
+  FromTU, cxxRecordDecl(hasName("A")));
+
+  for (auto *FD : FromD->fields())
+FD->addAttr(clang::NoUniqueAddressAttr::Create(FromD->getASTContext(),
+   clang::SourceRange()));
+  FromD->markEmpty();
+
+  CXXRecordDecl *ToD = cast(Import(FromD, Lang_CXX20));
+  EXPECT_EQ(true, ToD->isEmpty());
+  for (auto *FD : ToD->fields())
+EXPECT_EQ(true, FD->hasAttr());
+}
+
 INSTANTIATE_TEST_SUITE_P(ParameterizedTests, ASTImporterLookupTableTest,
  DefaultTestValuesForRunOptions);
 
Index: clang/lib/AST/ASTImporter.cpp
===
--- clang/lib/AST/ASTImporter.cpp
+++ clang/lib/AST/ASTImporter.cpp
@@ -3895,6 +3895,12 @@
   D->getInClassInitStyle()))
 return ToField;
 
+  // We need [[no_unqiue_address]] attributes to be added to FieldDecl, before
+  // we add fields in CXXRecordDecl::addedMember, otherwise record will be
+  // marked as having non-zero size.
+  Err = Importer.ImportAttrs(ToField, D);
+  if (Err)
+return std::move(Err);
   ToField->setAccess(D->getAccess());
   ToField->setLexicalDeclContext(LexicalDC);
   if (ToInitializer)
@@ -8981,6 +8987,19 @@
   return FromDPos->second->getTranslationUnitDecl();
 }
 
+Error ASTImporter::ImportAttrs(Decl *ToD, Decl *FromD) {
+  if (!FromD->hasAttrs() || ToD->hasAttrs())
+return Error::success();
+  for (const Attr *FromAttr : FromD->getAttrs()) {
+auto ToAttrOrErr = Import(FromAttr);
+if (ToAttrOrErr)
+  ToD->addAttr(*ToAttrOrErr);
+else
+  return ToAttrOrErr.takeError();
+  }
+  return Error::success();
+}
+
 Expected ASTImporter::Import(Decl *FromD) {
   if (!FromD)
 return nullptr;
@@ -9115,15 +9134,8 @@
 
   // Make sure that ImportImpl registered the imported decl.
   assert(ImportedDecls.count(FromD) != 0 && "Missing call to MapImported?");
-
-  if (FromD->hasAttrs())
-for (const Attr *FromAttr : FromD->getAttrs()) {
-  auto ToAttrOrErr = Import(FromAttr);
-  if (ToAttrOrErr)
-ToD->addAttr(*ToAttrOrErr);
-  else
-return ToAttrOrErr.takeError();
-}
+  if (auto Error = ImportAttrs(ToD, FromD))
+return std::move(Error);
 
   // Notify subclasses.
   Imported(FromD, ToD);
Index: clang/include/clang/AST/DeclCXX.h
===
--- clang/include/clang/AST/DeclCXX.h
+++ clang/include/clang/AST/DeclCXX.h
@@ -1165,6 +1165,10 @@
   ///
   /// \note This does NOT include a check for union-ness.
   bool isEmpty() const { return data().Empty; }
+  /// Marks this record as empty. This is used by DWARFASTParserClang
+  /// when parsing records with empty fields having [[no_unique_address]]
+  /// attribute
+  void markEmpty() { data().Empty = true; }
 
   void setInitMethod(bool Val) { data().HasInitMethod = Val; }
   bool hasInitMethod() const { return data().HasInitMethod; }
Index: clang/include/clang/AST/ASTImporter.h
===
--- clang/include/clang/AST/ASTImporter.h
+++ clang/include/clang/AST/ASTImporter.h
@@ -258,6 +258,7 @@
 FoundDeclsTy findDeclsInToCtx(DeclContext *DC, DeclarationName Name);
 
 void AddToLookupTable(Decl *ToD);
+llvm::Error ImportAttrs(Decl *ToD, Decl *FromD);
 
   protected:
 /// Can be overwritten by subclasses to implement their own import logic.
___
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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 507272.
kpdev42 added a comment.

Update patch after landing D145057 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143347/new/

https://reviews.llvm.org/D143347

Files:
  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
  lldb/test/API/types/TestEmptyBase.py
  lldb/test/API/types/empty_base_type.cpp

Index: lldb/test/API/types/empty_base_type.cpp
===
--- /dev/null
+++ lldb/test/API/types/empty_base_type.cpp
@@ -0,0 +1,23 @@
+struct C
+{
+ long c,d;
+};
+
+struct D
+{
+};
+
+struct B
+{
+  [[no_unique_address]] D x;
+};
+
+struct A : B,C
+{
+ long a,b;
+} _a;
+
+
+int main() {
+  return _a.a; // Set breakpoint here.
+}
Index: lldb/test/API/types/TestEmptyBase.py
===
--- /dev/null
+++ lldb/test/API/types/TestEmptyBase.py
@@ -0,0 +1,42 @@
+"""
+Test that recursive types are handled correctly.
+"""
+
+
+
+import lldb
+import lldbsuite.test.lldbutil as lldbutil
+from lldbsuite.test.lldbtest import *
+
+
+class EmptyBaseTestCase(TestBase):
+
+def setUp(self):
+# Call super's setUp().
+TestBase.setUp(self)
+
+# Find the line number to break for main.c.
+self.line = line_number('empty_base_type.cpp',
+'// Set breakpoint here.')
+
+self.sources = {
+'CXX_SOURCES': 'empty_base_type.cpp'}
+
+def test(self):
+"""Test that recursive structs are displayed correctly."""
+self.build(dictionary=self.sources)
+self.setTearDownCleanup(dictionary=self.sources)
+self.run_expr()
+
+def run_expr(self):
+self.runCmd("file " + self.getBuildArtifact("a.out"), CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(
+self,
+"empty_base_type.cpp",
+self.line,
+num_expected_locations=-1,
+loc_exact=True)
+
+self.runCmd("run", RUN_SUCCEEDED)
+self.runCmd("expression _a")
Index: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
===
--- lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
+++ lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
@@ -1460,6 +1460,8 @@
   if (!result)
 return;
 
+  const clang::CXXBaseSpecifier *prev_base =
+  base_classes.empty() ? nullptr : base_classes.back().get();
   base_classes.push_back(std::move(result));
 
   if (is_virtual) {
@@ -1476,6 +1478,20 @@
 // be removed from LayoutRecordType() in the external
 // AST source in clang.
   } else {
+if (prev_base) {
+  clang::CXXRecordDecl *prev_base_decl =
+  prev_base->getType()->getAsCXXRecordDecl();
+  if (prev_base_decl && !prev_base_decl->isEmpty()) {
+auto it = layout_info.base_offsets.find(prev_base_decl);
+assert(it != layout_info.base_offsets.end());
+if (it->second.getQuantity() == member_byte_offset) {
+  prev_base_decl->markEmpty();
+  for (auto *field : prev_base_decl->fields())
+field->addAttr(clang::NoUniqueAddressAttr::Create(
+ast->getASTContext(), clang::SourceRange()));
+}
+  }
+}
 layout_info.base_offsets.insert(std::make_pair(
 ast->GetAsCXXRecordDecl(base_class_clang_type.GetOpaqueQualType()),
 clang::CharUnits::fromQuantity(member_byte_offset)));
___
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[PATCH] D145057: [clang][ASTImport] Add support for import of empty records

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 created this revision.
kpdev42 added reviewers: clayborg, balazske.
kpdev42 added a project: LLVM.
Herald added a subscriber: martong.
Herald added a reviewer: shafik.
Herald added a project: All.
kpdev42 requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Patch represents the clang part of changes in D143347 



Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145057

Files:
  clang/include/clang/AST/ASTImporter.h
  clang/include/clang/AST/DeclCXX.h
  clang/lib/AST/ASTImporter.cpp
  clang/unittests/AST/ASTImporterTest.cpp

Index: clang/unittests/AST/ASTImporterTest.cpp
===
--- clang/unittests/AST/ASTImporterTest.cpp
+++ clang/unittests/AST/ASTImporterTest.cpp
@@ -8137,6 +8137,29 @@
   EXPECT_FALSE(SharedStatePtr->isNewDecl(ToBar));
 }
 
+TEST_P(ASTImporterOptionSpecificTestBase,
+   ImportDefinitionOfEmptyClassWithNoUniqueAddressField) {
+  Decl *FromTU = getTuDecl(
+  R"(
+  struct B {};
+  struct A { B b; };
+  )",
+  Lang_CXX20);
+
+  CXXRecordDecl *FromD = FirstDeclMatcher().match(
+  FromTU, cxxRecordDecl(hasName("A")));
+
+  for (auto *FD : FromD->fields())
+FD->addAttr(clang::NoUniqueAddressAttr::Create(FromD->getASTContext(),
+   clang::SourceRange()));
+  FromD->markEmpty();
+
+  CXXRecordDecl *ToD = cast(Import(FromD, Lang_CXX20));
+  EXPECT_EQ(true, ToD->isEmpty());
+  for (auto *FD : ToD->fields())
+EXPECT_EQ(true, FD->hasAttr());
+}
+
 INSTANTIATE_TEST_SUITE_P(ParameterizedTests, ASTImporterLookupTableTest,
  DefaultTestValuesForRunOptions);
 
Index: clang/lib/AST/ASTImporter.cpp
===
--- clang/lib/AST/ASTImporter.cpp
+++ clang/lib/AST/ASTImporter.cpp
@@ -3892,6 +3892,9 @@
   D->getInClassInitStyle()))
 return ToField;
 
+  Err = Importer.ImportAttrs(ToField, D);
+  if (Err)
+return std::move(Err);
   ToField->setAccess(D->getAccess());
   ToField->setLexicalDeclContext(LexicalDC);
   if (ToInitializer)
@@ -8978,6 +8981,18 @@
   return FromDPos->second->getTranslationUnitDecl();
 }
 
+Error ASTImporter::ImportAttrs(Decl *ToD, Decl *FromD) {
+  if (FromD->hasAttrs())
+for (const Attr *FromAttr : FromD->getAttrs()) {
+  auto ToAttrOrErr = Import(FromAttr);
+  if (ToAttrOrErr)
+ToD->addAttr(*ToAttrOrErr);
+  else
+return ToAttrOrErr.takeError();
+}
+  return Error::success();
+}
+
 Expected ASTImporter::Import(Decl *FromD) {
   if (!FromD)
 return nullptr;
@@ -9112,15 +9127,8 @@
 
   // Make sure that ImportImpl registered the imported decl.
   assert(ImportedDecls.count(FromD) != 0 && "Missing call to MapImported?");
-
-  if (FromD->hasAttrs())
-for (const Attr *FromAttr : FromD->getAttrs()) {
-  auto ToAttrOrErr = Import(FromAttr);
-  if (ToAttrOrErr)
-ToD->addAttr(*ToAttrOrErr);
-  else
-return ToAttrOrErr.takeError();
-}
+  if (auto Error = ImportAttrs(ToD, FromD))
+return std::move(Error);
 
   // Notify subclasses.
   Imported(FromD, ToD);
Index: clang/include/clang/AST/DeclCXX.h
===
--- clang/include/clang/AST/DeclCXX.h
+++ clang/include/clang/AST/DeclCXX.h
@@ -1165,6 +1165,10 @@
   ///
   /// \note This does NOT include a check for union-ness.
   bool isEmpty() const { return data().Empty; }
+  /// Marks this record as empty. This is used by DWARFASTParserClang
+  /// when parsing records with empty fields having [[no_unique_address]]
+  /// attribute
+  void markEmpty() { data().Empty = true; }
 
   void setInitMethod(bool Val) { data().HasInitMethod = Val; }
   bool hasInitMethod() const { return data().HasInitMethod; }
Index: clang/include/clang/AST/ASTImporter.h
===
--- clang/include/clang/AST/ASTImporter.h
+++ clang/include/clang/AST/ASTImporter.h
@@ -258,6 +258,7 @@
 FoundDeclsTy findDeclsInToCtx(DeclContext *DC, DeclarationName Name);
 
 void AddToLookupTable(Decl *ToD);
+llvm::Error ImportAttrs(Decl *ToD, Decl *FromD);
 
   protected:
 /// Can be overwritten by subclasses to implement their own import logic.
___
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[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 created this revision.
kpdev42 added reviewers: DavidSpickett, echristo.
kpdev42 added a project: LLVM.
Herald added subscribers: yaneury, supersymetrie, Chia-hungDuan, s.egerton, 
ormris, cryptoad, simoncook, hiraditya, kristof.beyls.
Herald added a reviewer: aaron.ballman.
Herald added a project: All.
kpdev42 requested review of this revision.
Herald added subscribers: cfe-commits, pcwang-thead, MaskRay.
Herald added a project: clang.

Add a clang part of OpenHarmony target

Related LLVM part: D138202 

~~~

Huawei RRI, OS Lab


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145227

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/Basic/Targets/X86.h
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/lib/Driver/ToolChains/OHOS.cpp
  clang/lib/Driver/ToolChains/OHOS.h
  clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
  clang/test/Driver/Inputs/ohos_native_tree/llvm/bin/.keep
  clang/test/Driver/Inputs/ohos_native_tree/llvm/include/c++/v1/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_softfp_neon-vfpv4/libc++.so
  clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.profile.a
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/arm-liteos-ohos/.keep
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/u

[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 marked an inline comment as done.
kpdev42 added inline comments.



Comment at: clang/test/Driver/ohos.c:240
+
+// CHECK-OHOS-PTHREAD-NOT: -lpthread
+

DavidSpickett wrote:
> This one is checking that we do not link to a pthread library, because when 
> using musl, it already provides one?
> 
> Just checking you're not accepting the option but doing the opposite here. 
> Worth adding a comment to explain the reasoning.
Yes, musl implements pthread api, so we do not need to link with libpthread


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[PATCH] D145057: [clang][ASTImport] Add support for import of empty records

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 marked an inline comment as done.
kpdev42 added inline comments.



Comment at: clang/lib/AST/ASTImporter.cpp:3897
+  if (Err)
+return std::move(Err);
   ToField->setAccess(D->getAccess());

balazske wrote:
> I am not familiar with this use case, is there a path where the attributes 
> are read from a `FieldDecl` before return from `VisitFieldDecl`? Probably 
> `ImportImpl` is overridden? Importing the attributes here should work but not 
> totally sure if it does not cause problems. Problematic case is if the 
> attribute has pointer to a `Decl` or `Type` that is imported here in a state 
> when the field is already created but not initialized. Another problem is 
> that attributes are added a second time in `Import(Decl *)`. Can it work if 
> the `ImportAttrs` is made a protected function and called from (overridden) 
> `ImportImpl` (still there can be a second import in `Import(Decl *)`?
The problem is that field attributes are required when we are adding a copy of 
a field to a structure in `VisitFieldDecl`. Attributes themselves are read in 
`CXXRecordDecl::addedMember` (see the call to `isZeroSize`). Adding them after 
`ImportImpl` is called is too late: record is already marked as non-empty. 


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[PATCH] D145057: [clang][ASTImport] Add support for import of empty records

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Comment at: clang/unittests/AST/ASTImporterTest.cpp:8161
+EXPECT_EQ(true, FD->hasAttr());
+}
+

balazske wrote:
> Does this test fail without the changes applied? And does it not fail after 
> (is the "Empty" value copied at import)?
Yes the tests will fail due to above mentioned problem with field attributes


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[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 504632.
kpdev42 marked an inline comment as done.
kpdev42 added a comment.

Address review comments and rebase


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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/Basic/Targets/X86.h
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/lib/Driver/ToolChains/OHOS.cpp
  clang/lib/Driver/ToolChains/OHOS.h
  clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
  clang/test/Driver/Inputs/ohos_native_tree/llvm/bin/.keep
  clang/test/Driver/Inputs/ohos_native_tree/llvm/include/c++/v1/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_softfp_neon-vfpv4/libc++.so
  clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.profile.a
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/arm-liteos-ohos/.keep
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  clang/test/Driver/ohos.c
  clang/test/Driver/ohos.cpp
  clang/test/Preprocessor/ohos.c

Index: clang/test/Preprocessor/ohos.c
===
--- /dev/null
+++ clang/test/Preprocessor/ohos.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -x c++ -E -dM -ffreestanding 

[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 504647.
kpdev42 added a comment.

Fix test case


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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/Basic/Targets/X86.h
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/lib/Driver/ToolChains/OHOS.cpp
  clang/lib/Driver/ToolChains/OHOS.h
  clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
  clang/test/Driver/Inputs/ohos_native_tree/llvm/bin/.keep
  clang/test/Driver/Inputs/ohos_native_tree/llvm/include/c++/v1/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_softfp_neon-vfpv4/libc++.so
  clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.profile.a
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/arm-liteos-ohos/.keep
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  clang/test/Driver/ohos.c
  clang/test/Driver/ohos.cpp
  clang/test/Preprocessor/ohos.c

Index: clang/test/Preprocessor/ohos.c
===
--- /dev/null
+++ clang/test/Preprocessor/ohos.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -x c++ -E -dM -ffreestanding -triple=arm-linux-ohos < /dev/null | FileCheck %s -match-full-l

[PATCH] D145057: [clang][ASTImport] Add support for import of empty records

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 504956.
kpdev42 marked an inline comment as done.
kpdev42 added a comment.

Address review comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145057/new/

https://reviews.llvm.org/D145057

Files:
  clang/include/clang/AST/ASTImporter.h
  clang/include/clang/AST/DeclCXX.h
  clang/lib/AST/ASTImporter.cpp
  clang/unittests/AST/ASTImporterTest.cpp

Index: clang/unittests/AST/ASTImporterTest.cpp
===
--- clang/unittests/AST/ASTImporterTest.cpp
+++ clang/unittests/AST/ASTImporterTest.cpp
@@ -8474,6 +8474,29 @@
   ToVaList->getUnderlyingType(), ToBuiltinVaList->getUnderlyingType()));
 }
 
+TEST_P(ASTImporterOptionSpecificTestBase,
+   ImportDefinitionOfEmptyClassWithNoUniqueAddressField) {
+  Decl *FromTU = getTuDecl(
+  R"(
+  struct B {};
+  struct A { B b; };
+  )",
+  Lang_CXX20);
+
+  CXXRecordDecl *FromD = FirstDeclMatcher().match(
+  FromTU, cxxRecordDecl(hasName("A")));
+
+  for (auto *FD : FromD->fields())
+FD->addAttr(clang::NoUniqueAddressAttr::Create(FromD->getASTContext(),
+   clang::SourceRange()));
+  FromD->markEmpty();
+
+  CXXRecordDecl *ToD = cast(Import(FromD, Lang_CXX20));
+  EXPECT_EQ(true, ToD->isEmpty());
+  for (auto *FD : ToD->fields())
+EXPECT_EQ(true, FD->hasAttr());
+}
+
 INSTANTIATE_TEST_SUITE_P(ParameterizedTests, ASTImporterLookupTableTest,
  DefaultTestValuesForRunOptions);
 
Index: clang/lib/AST/ASTImporter.cpp
===
--- clang/lib/AST/ASTImporter.cpp
+++ clang/lib/AST/ASTImporter.cpp
@@ -3895,6 +3895,12 @@
   D->getInClassInitStyle()))
 return ToField;
 
+  // We need [[no_unqiue_address]] attributes to be added to FieldDecl, before
+  // we add fields in CXXRecordDecl::addedMember, otherwise record will be
+  // marked as having non-zero size.
+  Err = Importer.ImportAttrs(ToField, D);
+  if (Err)
+return std::move(Err);
   ToField->setAccess(D->getAccess());
   ToField->setLexicalDeclContext(LexicalDC);
   if (ToInitializer)
@@ -8981,6 +8987,19 @@
   return FromDPos->second->getTranslationUnitDecl();
 }
 
+Error ASTImporter::ImportAttrs(Decl *ToD, Decl *FromD) {
+  if (!FromD->hasAttrs() || ToD->hasAttrs())
+return Error::success();
+  for (const Attr *FromAttr : FromD->getAttrs()) {
+auto ToAttrOrErr = Import(FromAttr);
+if (ToAttrOrErr)
+  ToD->addAttr(*ToAttrOrErr);
+else
+  return ToAttrOrErr.takeError();
+  }
+  return Error::success();
+}
+
 Expected ASTImporter::Import(Decl *FromD) {
   if (!FromD)
 return nullptr;
@@ -9115,15 +9134,8 @@
 
   // Make sure that ImportImpl registered the imported decl.
   assert(ImportedDecls.count(FromD) != 0 && "Missing call to MapImported?");
-
-  if (FromD->hasAttrs())
-for (const Attr *FromAttr : FromD->getAttrs()) {
-  auto ToAttrOrErr = Import(FromAttr);
-  if (ToAttrOrErr)
-ToD->addAttr(*ToAttrOrErr);
-  else
-return ToAttrOrErr.takeError();
-}
+  if (auto Error = ImportAttrs(ToD, FromD))
+return std::move(Error);
 
   // Notify subclasses.
   Imported(FromD, ToD);
Index: clang/include/clang/AST/DeclCXX.h
===
--- clang/include/clang/AST/DeclCXX.h
+++ clang/include/clang/AST/DeclCXX.h
@@ -1165,6 +1165,10 @@
   ///
   /// \note This does NOT include a check for union-ness.
   bool isEmpty() const { return data().Empty; }
+  /// Marks this record as empty. This is used by DWARFASTParserClang
+  /// when parsing records with empty fields having [[no_unique_address]]
+  /// attribute
+  void markEmpty() { data().Empty = true; }
 
   void setInitMethod(bool Val) { data().HasInitMethod = Val; }
   bool hasInitMethod() const { return data().HasInitMethod; }
Index: clang/include/clang/AST/ASTImporter.h
===
--- clang/include/clang/AST/ASTImporter.h
+++ clang/include/clang/AST/ASTImporter.h
@@ -258,6 +258,7 @@
 FoundDeclsTy findDeclsInToCtx(DeclContext *DC, DeclarationName Name);
 
 void AddToLookupTable(Decl *ToD);
+llvm::Error ImportAttrs(Decl *ToD, Decl *FromD);
 
   protected:
 /// Can be overwritten by subclasses to implement their own import logic.
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[PATCH] D145057: [clang][ASTImport] Add support for import of empty records

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 marked an inline comment as done.
kpdev42 added inline comments.



Comment at: clang/include/clang/AST/DeclCXX.h:1171
+  /// attribute
+  void markEmpty() { data().Empty = true; }
 

balazske wrote:
> This change looks not related.
The `markEmpty` is still needed and is used in corresponding unit tests. It's 
gonna be used in `DWARFASTParserClang` to mark records with empty fields as 
having zero size. Then by copying attributes in `ASTImporter` we prevent this 
empty mark to be overwritten


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[PATCH] D145227: [LLVM][OHOS] Clang toolchain and targets

[Pavel Kosov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG72474afa2757: [LLVM][OHOS] Clang toolchain and targets 
(authored by kpdev42).

Repository:
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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/Basic/Targets/X86.h
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/lib/Driver/ToolChains/OHOS.cpp
  clang/lib/Driver/ToolChains/OHOS.h
  clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
  clang/test/Driver/Inputs/ohos_native_tree/llvm/bin/.keep
  clang/test/Driver/Inputs/ohos_native_tree/llvm/include/c++/v1/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_hard_neon-vfpv4/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_soft/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/c++/a7_softfp_neon-vfpv4/libc++.so
  clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/arm-liteos-ohos/libc++.so
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_soft/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/libclang_rt.profile.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtbegin.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/clang_rt.crtend.o
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.builtins.a
  
clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/arm-liteos-ohos/libclang_rt.profile.a
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/arm-liteos-ohos/.keep
  clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_hard_neon-vfpv4/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_soft/.keep
  
clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/arm-liteos-ohos/a7_softfp_neon-vfpv4/.keep
  clang/test/Driver/ohos.c
  clang/test/Driver/ohos.cpp
  clang/test/Preprocessor/ohos.c

Index: clang/test/Preprocessor/ohos.c
===
--- /dev/null
+++ clang/test/Preproce

[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

ping


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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 511362.
kpdev42 added a comment.

Address review comments


Repository:
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Files:
  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
  lldb/test/API/types/TestEmptyBase.py
  lldb/test/API/types/empty_base_type.cpp

Index: lldb/test/API/types/empty_base_type.cpp
===
--- /dev/null
+++ lldb/test/API/types/empty_base_type.cpp
@@ -0,0 +1,29 @@
+struct C
+{
+ long c,d;
+};
+
+struct D
+{
+};
+
+struct B
+{
+  [[no_unique_address]] D x;
+};
+
+struct E
+{
+  [[no_unique_address]] D x;
+};
+
+
+struct A : B,E,C
+{
+ long a,b;
+} _a;
+
+
+int main() {
+  return _a.a; // Set breakpoint here.
+}
Index: lldb/test/API/types/TestEmptyBase.py
===
--- /dev/null
+++ lldb/test/API/types/TestEmptyBase.py
@@ -0,0 +1,42 @@
+"""
+Test that recursive types are handled correctly.
+"""
+
+
+
+import lldb
+import lldbsuite.test.lldbutil as lldbutil
+from lldbsuite.test.lldbtest import *
+
+
+class EmptyBaseTestCase(TestBase):
+
+def setUp(self):
+# Call super's setUp().
+TestBase.setUp(self)
+
+# Find the line number to break for main.c.
+self.line = line_number('empty_base_type.cpp',
+'// Set breakpoint here.')
+
+self.sources = {
+'CXX_SOURCES': 'empty_base_type.cpp'}
+
+def test(self):
+"""Test that recursive structs are displayed correctly."""
+self.build(dictionary=self.sources)
+self.setTearDownCleanup(dictionary=self.sources)
+self.run_expr()
+
+def run_expr(self):
+self.runCmd("file " + self.getBuildArtifact("a.out"), CURRENT_EXECUTABLE_SET)
+
+lldbutil.run_break_set_by_file_and_line(
+self,
+"empty_base_type.cpp",
+self.line,
+num_expected_locations=-1,
+loc_exact=True)
+
+self.runCmd("run", RUN_SUCCEEDED)
+self.runCmd("expression _a")
Index: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
===
--- lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
+++ lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
@@ -1460,8 +1460,6 @@
   if (!result)
 return;
 
-  base_classes.push_back(std::move(result));
-
   if (is_virtual) {
 // Do not specify any offset for virtual inheritance. The DWARF
 // produced by clang doesn't give us a constant offset, but gives
@@ -1476,10 +1474,33 @@
 // be removed from LayoutRecordType() in the external
 // AST source in clang.
   } else {
+// DWARF doesn't have any representation for [[no_unique_address]]
+// attribute. Empty base classes with [[no_unique_address]] fields
+// confuse lldb and prevent construction of object memory layout.
+// To fix this we scan base classes in reverse order to determine
+// overlapping offsets. Wnen found we consider such class as empty
+// base with all fields having [[no_unique_address]] attribute.
+for (auto it = base_classes.rbegin(); it != base_classes.rend(); ++it) {
+  clang::CXXRecordDecl *prev_base_decl =
+  (*it)->getType()->getAsCXXRecordDecl();
+  // We've already marked this class, exit.
+  if (prev_base_decl->isEmpty())
+break;
+  auto it_layout = layout_info.base_offsets.find(prev_base_decl);
+  assert(it_layout != layout_info.base_offsets.end());
+  // We found a normal base class, exit.
+  if (it_layout->second.getQuantity() < member_byte_offset)
+break;
+  prev_base_decl->markEmpty();
+  for (auto *field : prev_base_decl->fields())
+field->addAttr(clang::NoUniqueAddressAttr::Create(
+ast->getASTContext(), clang::SourceRange()));
+}
 layout_info.base_offsets.insert(std::make_pair(
 ast->GetAsCXXRecordDecl(base_class_clang_type.GetOpaqueQualType()),
 clang::CharUnits::fromQuantity(member_byte_offset)));
   }
+  base_classes.push_back(std::move(result));
 }
 
 TypeSP DWARFASTParserClang::UpdateSymbolContextScopeForType(
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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 511683.
kpdev42 edited the summary of this revision.
kpdev42 added a comment.

Address review comments


Repository:
  rG LLVM Github Monorepo

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Files:
  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
  lldb/test/API/lang/cpp/no_unique_address/Makefile
  lldb/test/API/lang/cpp/no_unique_address/TestNoUniqueAddress.py
  lldb/test/API/lang/cpp/no_unique_address/main.cpp

Index: lldb/test/API/lang/cpp/no_unique_address/main.cpp
===
--- /dev/null
+++ lldb/test/API/lang/cpp/no_unique_address/main.cpp
@@ -0,0 +1,67 @@
+struct C
+{
+ long c,d;
+};
+
+struct Q
+{
+ long h;
+};
+
+struct D
+{
+};
+
+struct B
+{
+  [[no_unique_address]] D x;
+};
+
+struct E
+{
+  [[no_unique_address]] D x;
+};
+
+struct Foo1 : B,E,C
+{
+ long a = 42,b = 52;
+} _f1;
+
+struct Foo2 : B,E
+{
+ long v = 42;
+} _f2;
+
+struct Foo3 : C,B,E
+{
+ long v = 42;
+} _f3;
+
+struct Foo4 : B,C,E,Q
+{
+ long v = 42;
+} _f4;
+
+struct Foo5 : B,C,E
+{
+ [[no_unique_address]] D x1;
+ [[no_unique_address]] D x2;
+ long v1 = 42;
+ [[no_unique_address]] D y1;
+ [[no_unique_address]] D y2;
+ long v2 = 52;
+ [[no_unique_address]] D z1;
+ [[no_unique_address]] D z2;
+} _f5;
+
+struct Foo6 : B,E
+{
+ long v1 = 42;
+ [[no_unique_address]] D y1;
+ [[no_unique_address]] D y2;
+ long v2 = 52;
+} _f6;
+
+int main() {
+  return 0; // Set breakpoint here.
+}
Index: lldb/test/API/lang/cpp/no_unique_address/TestNoUniqueAddress.py
===
--- /dev/null
+++ lldb/test/API/lang/cpp/no_unique_address/TestNoUniqueAddress.py
@@ -0,0 +1,28 @@
+"""
+Test that we correctly handle [[no_unique_address]] attribute.
+"""
+
+import lldb
+
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class TestInlineNamespace(TestBase):
+
+def test(self):
+self.build()
+
+lldbutil.run_to_source_breakpoint(self,
+"// Set breakpoint here.", lldb.SBFileSpec("main.cpp"))
+
+self.expect_expr("_f1.a", result_type="long", result_value="42")
+self.expect_expr("_f1.b", result_type="long", result_value="52")
+self.expect_expr("_f2.v", result_type="long", result_value="42")
+self.expect_expr("_f3.v", result_type="long", result_value="42")
+self.expect_expr("_f4.v", result_type="long", result_value="42")
+self.expect_expr("_f5.v1", result_type="long", result_value="42")
+self.expect_expr("_f5.v2", result_type="long", result_value="52")
+self.expect_expr("_f6.v1", result_type="long", result_value="42")
+self.expect_expr("_f6.v2", result_type="long", result_value="52")
Index: lldb/test/API/lang/cpp/no_unique_address/Makefile
===
--- /dev/null
+++ lldb/test/API/lang/cpp/no_unique_address/Makefile
@@ -0,0 +1,3 @@
+CXX_SOURCES := main.cpp
+
+include Makefile.rules
Index: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
===
--- lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
+++ lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
@@ -223,6 +223,7 @@
 uint64_t bit_size = 0;
 uint64_t bit_offset = 0;
 bool is_bitfield = false;
+clang::FieldDecl *field_decl = nullptr;
 
 FieldInfo() = default;
 
@@ -275,6 +276,10 @@
   const ParsedDWARFTypeAttributes &attrs);
   lldb::TypeSP ParsePointerToMemberType(const DWARFDIE &die,
 const ParsedDWARFTypeAttributes &attrs);
+  void FixupBaseClasses(
+  std::vector> &base_classes,
+  const lldb_private::ClangASTImporter::LayoutInfo &layout_info,
+  long byte_offset);
 
   /// Parses a DW_TAG_inheritance DIE into a base/super class.
   ///
Index: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
===
--- lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
+++ lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
@@ -1366,6 +1366,28 @@
   return nullptr;
 }
 
+void DWARFASTParserClang::FixupBaseClasses(
+std::vector> &base_classes,
+const ClangASTImporter::LayoutInfo &layout_info, long byte_offset) {
+  for (auto it = base_classes.rbegin(); it != base_classes.rend(); ++it) {
+clang::CXXRecordDecl *prev_base_decl =
+(*it)->getType()->getAsCXXRecordDecl();
+// We've already marked this class, exit.
+if (prev_base_decl->isEmpty())
+  break;
+auto it_layout = layout_info.base_offsets.find(prev_base_decl);
+if (it_layout == layout_info.base_offsets.end())
+  continue;
+// We found a normal base 

[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added inline comments.



Comment at: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp:1483
+// base with all fields having [[no_unique_address]] attribute.
+for (auto it = base_classes.rbegin(); it != base_classes.rend(); ++it) {
+  clang::CXXRecordDecl *prev_base_decl =

Michael137 wrote:
> Michael137 wrote:
> > The main problem I still see with this is that if we have something like:
> > ```
> > struct A : C, B {
> > 
> > };
> > ```
> > 
> > then we mark `C`'s fields as empty and leave `B` as is. This still leads to 
> > the same crash later on.
> > 
> > Perhaps we should mark we could check the size of the struct and decide 
> > based on that which one is the "empty" one
> Interestingly there was a discussion on the DWARF mailing list about this 
> some time ago: 
> https://www.mail-archive.com/dwarf-discuss@lists.dwarfstd.org/msg00880.html
> 
> There might be room to changing the emitted DWARF to make it easier to 
> determine the empty structure. I will gauge opinions on this thread later 
> today
Unfortunately we cannot analyze record size, because it is always 1 for empty 
records, whether or not [[no_unique_address]] is used. However we still can 
analyze field offsets, I think. This what an updated patch does and it seems to 
handle more different cases


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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added inline comments.



Comment at: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp:1483
+// base with all fields having [[no_unique_address]] attribute.
+for (auto it = base_classes.rbegin(); it != base_classes.rend(); ++it) {
+  clang::CXXRecordDecl *prev_base_decl =

kpdev42 wrote:
> Michael137 wrote:
> > Michael137 wrote:
> > > The main problem I still see with this is that if we have something like:
> > > ```
> > > struct A : C, B {
> > > 
> > > };
> > > ```
> > > 
> > > then we mark `C`'s fields as empty and leave `B` as is. This still leads 
> > > to the same crash later on.
> > > 
> > > Perhaps we should mark we could check the size of the struct and decide 
> > > based on that which one is the "empty" one
> > Interestingly there was a discussion on the DWARF mailing list about this 
> > some time ago: 
> > https://www.mail-archive.com/dwarf-discuss@lists.dwarfstd.org/msg00880.html
> > 
> > There might be room to changing the emitted DWARF to make it easier to 
> > determine the empty structure. I will gauge opinions on this thread later 
> > today
> Unfortunately we cannot analyze record size, because it is always 1 for empty 
> records, whether or not [[no_unique_address]] is used. However we still can 
> analyze field offsets, I think. This what an updated patch does and it seems 
> to handle more different cases
Yes, this will help a lot, however many people use older versions of clang 
compiler and also gcc. This fix might be useful for them so far


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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 updated this revision to Diff 512945.
kpdev42 added a comment.

Thanks for pointing out the bug @Michael137 . It seems that clang assigns 
arbitrary offsets for non_unique_address so analyzing them brings me nowhere. 
In this patch I tried assigning no_unique_address to every empty structure and 
this fixed issue you found, making the code changes much smaller and simpler. 
The lldb test suite pass for me as well


Repository:
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Files:
  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
  lldb/test/API/lang/cpp/no_unique_address/Makefile
  lldb/test/API/lang/cpp/no_unique_address/TestNoUniqueAddress.py
  lldb/test/API/lang/cpp/no_unique_address/main.cpp

Index: lldb/test/API/lang/cpp/no_unique_address/main.cpp
===
--- /dev/null
+++ lldb/test/API/lang/cpp/no_unique_address/main.cpp
@@ -0,0 +1,77 @@
+struct C
+{
+ long c,d;
+};
+
+struct Q
+{
+ long h;
+};
+
+struct D
+{
+};
+
+struct B
+{
+  [[no_unique_address]] D x;
+};
+
+struct E
+{
+  [[no_unique_address]] D x;
+};
+
+struct Foo1 : B,E,C
+{
+ long a = 42,b = 52;
+} _f1;
+
+struct Foo2 : B,E
+{
+ long v = 42;
+} _f2;
+
+struct Foo3 : C,B,E
+{
+ long v = 42;
+} _f3;
+
+struct Foo4 : B,C,E,Q
+{
+ long v = 42;
+} _f4;
+
+struct Foo5 : B,C,E
+{
+ [[no_unique_address]] D x1;
+ [[no_unique_address]] D x2;
+ long v1 = 42;
+ [[no_unique_address]] D y1;
+ [[no_unique_address]] D y2;
+ long v2 = 52;
+ [[no_unique_address]] D z1;
+ [[no_unique_address]] D z2;
+} _f5;
+
+struct Foo6 : B,E
+{
+ long v1 = 42;
+ [[no_unique_address]] D y1;
+ [[no_unique_address]] D y2;
+ long v2 = 52;
+} _f6;
+
+namespace NS {
+template struct Wrap {};
+}
+
+struct Foo7 : NS::Wrap,B,E {
+  NS::Wrap w1;
+  B b1;
+  long v = 42;
+} _f7;
+
+int main() {
+  return 0; // Set breakpoint here.
+}
Index: lldb/test/API/lang/cpp/no_unique_address/TestNoUniqueAddress.py
===
--- /dev/null
+++ lldb/test/API/lang/cpp/no_unique_address/TestNoUniqueAddress.py
@@ -0,0 +1,33 @@
+"""
+Test that we correctly handle [[no_unique_address]] attribute.
+"""
+
+import lldb
+
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class TestInlineNamespace(TestBase):
+
+def test(self):
+self.build()
+
+lldbutil.run_to_source_breakpoint(self,
+"// Set breakpoint here.", lldb.SBFileSpec("main.cpp"))
+
+
+self.expect_expr("_f3", result_type="Foo3")
+self.expect_expr("_f7", result_type="Foo7")
+
+self.expect_expr("_f1.a", result_type="long", result_value="42")
+self.expect_expr("_f1.b", result_type="long", result_value="52")
+self.expect_expr("_f2.v", result_type="long", result_value="42")
+self.expect_expr("_f3.v", result_type="long", result_value="42")
+self.expect_expr("_f4.v", result_type="long", result_value="42")
+self.expect_expr("_f5.v1", result_type="long", result_value="42")
+self.expect_expr("_f5.v2", result_type="long", result_value="52")
+self.expect_expr("_f6.v1", result_type="long", result_value="42")
+self.expect_expr("_f6.v2", result_type="long", result_value="52")
+self.expect_expr("_f7.v", result_type="long", result_value="42")
Index: lldb/test/API/lang/cpp/no_unique_address/Makefile
===
--- /dev/null
+++ lldb/test/API/lang/cpp/no_unique_address/Makefile
@@ -0,0 +1,3 @@
+CXX_SOURCES := main.cpp
+
+include Makefile.rules
Index: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
===
--- lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
+++ lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
@@ -1566,6 +1566,16 @@
   return qualified_name;
 }
 
+static bool IsEmptyStruct(const DWARFDIE &die) {
+  if (!die.HasChildren())
+return true;
+
+  // Empty templates are actually empty structures.
+  return llvm::all_of(die.children(), [](const DWARFDIE &die) {
+return die.Tag() == DW_TAG_template_type_parameter;
+  });
+}
+
 TypeSP
 DWARFASTParserClang::ParseStructureLikeDIE(const SymbolContext &sc,
const DWARFDIE &die,
@@ -1829,7 +1839,7 @@
 // has child classes or types that require the class to be created
 // for use as their decl contexts the class will be ready to accept
 // these child definitions.
-if (!die.HasChildren()) {
+if (IsEmptyStruct(die)) {
   // No children for this struct/union/class, lets finish it
   if (TypeSystemClang::StartTagDeclarationDefinition(clang_type)) {
 TypeSystemClang::CompleteTagDeclarationDefinition(clang_type);
@@ -1852,6 +1862,9 @@
 clang::RecordDecl *record_decl

[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added inline comments.



Comment at: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp:2212
 m_ast.GetAsCXXRecordDecl(clang_type.GetOpaqueQualType());
-if (record_decl)
+if (record_decl) {
+  bool is_empty = true;

Michael137 wrote:
> Generally I'm not sure if attaching a `clang::NoUniqueAddressAttr` to every 
> empty field is the right approach. That goes slightly against our attempts to 
> construct an AST that's faithful to the source to avoid unpredictable 
> behaviour (which isn't always possible but for the most part we try). This 
> approach was considered in https://reviews.llvm.org/D101237 but concern was 
> raised about it affecting ABI, etc., leading to subtle issues down the line.
> 
> Based on the the discussion in https://reviews.llvm.org/D101237 it seemed to 
> me like the only two viable solutions are:
> 1. Add a `DW_AT_byte_size` of `0` to the empty field
> 2. Add a `DW_AT_no_unique_address`
> 
> AFAICT Jan tried to implement (1) but never seemed to be able to fully add 
> support for this in the ASTImporter/LLDB. Another issue I see with this is 
> that sometimes the byte-size of said field is not `0`, depending on the 
> context in which the structure is used.
> 
> I'm still leaning towards proposing a `DW_AT_no_unique_address`. Which is 
> pretty easy to implement and also reason about from LLDB's perspective. 
> @dblaikie @aprantl does that sound reasonable to you?
I think that lldb jitter relies on value of `DW_AT_member` location when/if 
empty structure address is taken, so assigning no_unique_address attribute 
shouldn't, in my opinion, affect anything. Also, as I understand, AST obtained 
from DWARF will not (and cannot) be identical to the source (e.g. because of 
optimizations)



Comment at: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp:2219
+if (is_empty_field)
+  field->addAttr(clang::NoUniqueAddressAttr::Create(
+  m_ast.getASTContext(), clang::SourceRange()));

Michael137 wrote:
> Typically the call to `record_decl->fields()` below would worry me, because 
> if the decl `!hasLoadedFieldsFromExternalStorage()` then we'd start another 
> `ASTImport` process, which could lead to some unpredictable behaviour if we 
> are already in the middle of an import. But since 
> `CompleteTagDeclarationDefinition` sets 
> `setHasLoadedFieldsFromExternalStorage(true)` I *think* we'd be ok. Might 
> warrant a comment.
We can probably use keys of `DenseMap` in `layout_info.base_offsets` to stay 
safe, can't we?



Comment at: lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp:2231
+if (is_empty)
+  record_decl->markEmpty();
+  }

Michael137 wrote:
> Why do we need to mark the parents empty here again? Wouldn't they have been 
> marked in `ParseStructureLikeDIE`?
`ParseStructureLikeDIE` marks only trivially empty records (with no children or 
with only children being template parameters). All non-trivially empty structs 
(with only children being other empty structs) are marked here.


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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added inline comments.



Comment at: clang/lib/AST/ASTImporter.cpp:3896
+  if (D->hasAttrs())
+ToField->setAttrs(D->getAttrs());
   ToField->setAccess(D->getAccess());

balazske wrote:
> The import of attributes is handled in function `ASTImporter::Import(Decl*)`. 
> This new line will probably copy all attributes, that may not work in all 
> cases dependent on the attribute types. This may interfere with the later 
> import of attributes, probably these will be duplicated. What was the need 
> for this line? (Simple attributes that do not have references to other nodes 
> could be copied at this place.)
Unfortunately it is too late to copy attribute in `ASTImporter::Import(Decl*)`, 
because field has already been added to record in a call to `ImportImpl 
(VisitFieldDecl/addDeclInternal)`. I've reused the current way of cloning 
attributes in `VisitFieldDecl`.


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[PATCH] D143347: [lldb][DWARF] Infer no_unique_address attribute

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

So what are next steps? Are we going for implementation of 
`DW_AT_no_unique_address` (which is going to be a non-standard extension) ? 
@dblaikie @aprantl @Michael137


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[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

In D116088#3254400 , @joerg wrote:

> Correct me if I'm wrong, but I don't think this stubs are async signal safe 
> nor will they work for preemptive multitasking systems?

Those stubs are basically cas loops 
(https://en.wikipedia.org/wiki/Compare-and-swap) which are not much different 
from their SMP counterparts, except memory sync ops are not used. This should 
work normally in case of preemption (preempting thread will spend its quota in 
busy-wait). Signal can be a problem if it preempt a thread executing atomic op, 
but I wonder if SMP code handles this


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[PATCH] D116088: [compiler-rt] Implement ARM atomic operations for architectures without SMP support

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 added a comment.

Ping


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[PATCH] D112135: [ARM] Fix inline assembly referencing floating point registers on soft-float targets

[Pavel Kosov via Phabricator via cfe-commits]

kpdev42 created this revision.
kpdev42 added reviewers: dmgreen, thakis, dcandler, nickdesaulniers, LukeGeeson.
kpdev42 added a project: LLVM.
Herald added a subscriber: kristof.beyls.
kpdev42 requested review of this revision.
Herald added a project: clang.

Fixes PR: https://bugs.llvm.org/show_bug.cgi?id=52230


Repository:
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https://reviews.llvm.org/D112135

Files:
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h
  clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c


Index: clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
===
--- /dev/null
+++ clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
@@ -0,0 +1,29 @@
+// REQUIRES: arm-registered-target
+// RUN: %clang_cc1 -triple arm -target-feature -fpregs -verify=arm-nofp %s
+
+// w: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d31, or 
q0-q15.
+float test_w(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=w"(x)
+  : "w"(x)); // No error expected.
+  // arm-nofp-error@7 {{invalid output constraint '=w' in asm}}
+  return x;
+}
+
+// x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or 
q0-q3.
+float test_x(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=x"(x)
+  : "x"(x)); // No error expected.
+  // arm-nofp-error@16 {{invalid output constraint '=x' in asm}}
+  return x;
+}
+
+// t: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d15, or 
q0-q7.
+float test_t(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=t"(x)
+  : "t"(x)); // No error expected.
+  // arm-nofp-error@25 {{invalid output constraint '=t' in asm}}
+  return x;
+}
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -78,6 +78,7 @@
   unsigned Unaligned : 1;
   unsigned DotProd : 1;
   unsigned HasMatMul : 1;
+  unsigned FPRegsDisabled : 1;
 
   enum {
 LDREX_B = (1 << 0), /// byte (8-bit)
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -440,6 +440,7 @@
   HasFloat16 = true;
   ARMCDECoprocMask = 0;
   HasBFloat16 = false;
+  FPRegsDisabled = false;
 
   // This does not diagnose illegal cases like having both
   // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64".
@@ -516,6 +517,8 @@
   ARMCDECoprocMask |= (1U << Coproc);
 } else if (Feature == "+bf16") {
   HasBFloat16 = true;
+} else if (Feature == "-fpregs") {
+  FPRegsDisabled = true;
 }
   }
 
@@ -968,6 +971,8 @@
   case 't': // s0-s31, d0-d31, or q0-q15
   case 'w': // s0-s15, d0-d7, or q0-q3
   case 'x': // s0-s31, d0-d15, or q0-q7
+if (FPRegsDisabled)
+  return false;
 Info.setAllowsRegister();
 return true;
   case 'j': // An immediate integer between 0 and 65535 (valid for MOVW)


Index: clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
===
--- /dev/null
+++ clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
@@ -0,0 +1,29 @@
+// REQUIRES: arm-registered-target
+// RUN: %clang_cc1 -triple arm -target-feature -fpregs -verify=arm-nofp %s
+
+// w: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d31, or q0-q15.
+float test_w(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=w"(x)
+  : "w"(x)); // No error expected.
+  // arm-nofp-error@7 {{invalid output constraint '=w' in asm}}
+  return x;
+}
+
+// x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3.
+float test_x(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=x"(x)
+  : "x"(x)); // No error expected.
+  // arm-nofp-error@16 {{invalid output constraint '=x' in asm}}
+  return x;
+}
+
+// t: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d15, or q0-q7.
+float test_t(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=t"(x)
+  : "t"(x)); // No error expected.
+  // arm-nofp-error@25 {{invalid output constraint '=t' in asm}}
+  return x;
+}
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -78,6 +78,7 @@
   unsigned Unaligned : 1;
   unsigned DotProd : 1;
   unsigned HasMatMul : 1;
+  unsigned FPRegsDisabled : 1;
 
   enum {
 LDREX_B = (1 << 0), /// byte (8-bit)
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -440,6 +440,7 @@
   HasFloat16 = true;
   ARMCDECoprocMask = 0;
   HasBFloat16 = false;
+  FPRegsDisabled = false;
 
   // This does not diagnose illegal cases like having both
   // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64".
@@ -51

[PATCH] D112135: [ARM] Fix inline assembly referencing floating point registers on soft-float targets

[Pavel Kosov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGcb9a0dc293cf: [ARM] Fix inline assembly referencing floating 
point registers on soft-float… (authored by kpdev42).

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Files:
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h
  clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c


Index: clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
===
--- /dev/null
+++ clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
@@ -0,0 +1,29 @@
+// REQUIRES: arm-registered-target
+// RUN: %clang_cc1 -triple arm -target-feature -fpregs -verify=arm-nofp %s
+
+// w: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d31, or 
q0-q15.
+float test_w(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=w"(x)
+  : "w"(x)); // No error expected.
+  // arm-nofp-error@7 {{invalid output constraint '=w' in asm}}
+  return x;
+}
+
+// x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or 
q0-q3.
+float test_x(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=x"(x)
+  : "x"(x)); // No error expected.
+  // arm-nofp-error@16 {{invalid output constraint '=x' in asm}}
+  return x;
+}
+
+// t: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d15, or 
q0-q7.
+float test_t(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=t"(x)
+  : "t"(x)); // No error expected.
+  // arm-nofp-error@25 {{invalid output constraint '=t' in asm}}
+  return x;
+}
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -78,6 +78,7 @@
   unsigned Unaligned : 1;
   unsigned DotProd : 1;
   unsigned HasMatMul : 1;
+  unsigned FPRegsDisabled : 1;
 
   enum {
 LDREX_B = (1 << 0), /// byte (8-bit)
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -446,6 +446,7 @@
   HasFloat16 = true;
   ARMCDECoprocMask = 0;
   HasBFloat16 = false;
+  FPRegsDisabled = false;
 
   // This does not diagnose illegal cases like having both
   // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64".
@@ -522,6 +523,8 @@
   ARMCDECoprocMask |= (1U << Coproc);
 } else if (Feature == "+bf16") {
   HasBFloat16 = true;
+} else if (Feature == "-fpregs") {
+  FPRegsDisabled = true;
 }
   }
 
@@ -978,6 +981,8 @@
   case 't': // s0-s31, d0-d31, or q0-q15
   case 'w': // s0-s15, d0-d7, or q0-q3
   case 'x': // s0-s31, d0-d15, or q0-q7
+if (FPRegsDisabled)
+  return false;
 Info.setAllowsRegister();
 return true;
   case 'j': // An immediate integer between 0 and 65535 (valid for MOVW)


Index: clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
===
--- /dev/null
+++ clang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
@@ -0,0 +1,29 @@
+// REQUIRES: arm-registered-target
+// RUN: %clang_cc1 -triple arm -target-feature -fpregs -verify=arm-nofp %s
+
+// w: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d31, or q0-q15.
+float test_w(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=w"(x)
+  : "w"(x)); // No error expected.
+  // arm-nofp-error@7 {{invalid output constraint '=w' in asm}}
+  return x;
+}
+
+// x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3.
+float test_x(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=x"(x)
+  : "x"(x)); // No error expected.
+  // arm-nofp-error@16 {{invalid output constraint '=x' in asm}}
+  return x;
+}
+
+// t: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d15, or q0-q7.
+float test_t(float x) {
+  __asm__("vsqrt.f32 %0, %1"
+  : "=t"(x)
+  : "t"(x)); // No error expected.
+  // arm-nofp-error@25 {{invalid output constraint '=t' in asm}}
+  return x;
+}
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -78,6 +78,7 @@
   unsigned Unaligned : 1;
   unsigned DotProd : 1;
   unsigned HasMatMul : 1;
+  unsigned FPRegsDisabled : 1;
 
   enum {
 LDREX_B = (1 << 0), /// byte (8-bit)
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -446,6 +446,7 @@
   HasFloat16 = true;
   ARMCDECoprocMask = 0;
   HasBFloat16 = false;
+  FPRegsDisabled = false;
 
   // This does not diagnose illegal cases like having both
   // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64".
@@ -522,6 +523,8 @@
   ARMCDECoprocMask |