[clang] [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)

2024-11-11 Thread Mark Goncharov via cfe-commits

mga-sc wrote:

> @mga-sc I'm trying to run some experiments with your PR and will post as soon 
> as they are done, but can I ask you to add the following code to your PR? So 
> that clang can accept -fveclib=SLEEF when building for riscv64
> 
> ```
> diff --git a/clang/lib/Driver/ToolChains/Clang.cpp 
> b/clang/lib/Driver/ToolChains/Clang.cpp
> index 0952262c3601..04f4f0522618 100644
> --- a/clang/lib/Driver/ToolChains/Clang.cpp
> +++ b/clang/lib/Driver/ToolChains/Clang.cpp
> @@ -5804,7 +5804,8 @@ void Clang::ConstructJob(Compilation &C, const 
> JobAction &JA,
>  << Name << Triple.getArchName();
>  } else if (Name == "SLEEF" || Name == "ArmPL") {
>if (Triple.getArch() != llvm::Triple::aarch64 &&
> -  Triple.getArch() != llvm::Triple::aarch64_be)
> +  Triple.getArch() != llvm::Triple::aarch64_be &&
> +  Triple.getArch() != llvm::Triple::riscv64)
>  D.Diag(diag::err_drv_unsupported_opt_for_target)
>  << Name << Triple.getArchName();
>  }
> ```

Add clang support. Also add test to fveclib.c to check. 

https://github.com/llvm/llvm-project/pull/114014
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[clang] [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)

2024-11-25 Thread Mark Goncharov via cfe-commits

mga-sc wrote:

@mikhailramalho , @topperc , ping

https://github.com/llvm/llvm-project/pull/114014
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[clang] [llvm] [RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. (PR #114014)

2024-11-25 Thread Mark Goncharov via cfe-commits

mga-sc wrote:

I can't merge this PR.
@topperc , could please merge it.

https://github.com/llvm/llvm-project/pull/114014
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[clang] [llvm] [TargetLibraryInfo] Add libmvec support for risc-v (PR #119844)

2024-12-20 Thread Mark Goncharov via cfe-commits


@@ -236,6 +236,79 @@ TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVdN4v_log", 
FIXED(4), "_ZGV_LLVM_N4v")
 TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVbN4v_logf", FIXED(4), "_ZGV_LLVM_N4v")
 TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVdN8v_logf", FIXED(8), "_ZGV_LLVM_N8v")
 
+#elif defined(TLI_DEFINE_LIBMVEC_RVV_VECFUNCS)
+// GLIBC Vector math Functions for RISC-V
+
+TLI_DEFINE_VECFUNC("sin", "_ZGV1Nxv_sin", SCALABLE(1), "_ZGVr1Nxv")

mga-sc wrote:

You have missed `r` letter in mangled vector name`after ZGV according to 
[mention 
MR](https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/455/files)

https://github.com/llvm/llvm-project/pull/119844
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[clang] [llvm] [TargetLibraryInfo] Add libmvec support for risc-v (PR #119844)

2024-12-20 Thread Mark Goncharov via cfe-commits

https://github.com/mga-sc edited 
https://github.com/llvm/llvm-project/pull/119844
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[clang] [llvm] [TargetLibraryInfo] Add libmvec support for risc-v (PR #119844)

2024-12-20 Thread Mark Goncharov via cfe-commits


@@ -109,11 +109,11 @@ static void addMappingsFromTLI(const TargetLibraryInfo 
&TLI, CallInst &CI) {
   TLI.getWidestVF(ScalarName, WidestFixedVF, WidestScalableVF);
 
   for (bool Predicated : {false, true}) {
-for (ElementCount VF = ElementCount::getFixed(2);

mga-sc wrote:

Leave a comment about this change. It is unclear why this change is needed and 
whether it affects other vector libraries.

https://github.com/llvm/llvm-project/pull/119844
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[clang] [llvm] [TargetLibraryInfo] Add libmvec support for risc-v (PR #119844)

2024-12-20 Thread Mark Goncharov via cfe-commits


@@ -110,7 +114,7 @@
 // CHECK-ENABLED-LAST: math errno enabled by '-ffp-model=strict' after it was 
implicitly disabled by '-fveclib=ArmPL', this may limit the utilization of the 
vector library [-Wmath-errno-enabled-with-veclib]
 
 /* Verify no warning when math-errno is re-enabled for a different veclib 
(that does not imply -fno-math-errno). */
-// RUN: %clang -### --target=aarch64-linux-gnu -fveclib=ArmPL -fmath-errno 
-fveclib=LIBMVEC %s 2>&1 | FileCheck --check-prefix=CHECK-REPEAT-VECLIB %s
+// RUN: %clang -### --target=aarch64-linux-gnu -fveclib=ArmPL -fmath-errno 
-fveclib=LIBMVEC-X86 %s 2>&1 | FileCheck --check-prefix=CHECK-REPEAT-VECLIB %s

mga-sc wrote:

Why did you leave x86 for arm here?

https://github.com/llvm/llvm-project/pull/119844
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[clang] [llvm] [TargetLibraryInfo] Add libmvec support for risc-v (PR #119844)

2024-12-20 Thread Mark Goncharov via cfe-commits

https://github.com/mga-sc requested changes to this pull request.

Finally, libmvec is still not ported to RISC-V (today check glibc ToT with 
`--enable-mathvec`). I think we should wait for this and also wait for commit 
to 
[riscv-elf-psabi-doc](https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/455).
 Probably, implementation will differ from the proposals.

https://github.com/llvm/llvm-project/pull/119844
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[clang] [llvm] [TargetLibraryInfo] Add libmvec support for risc-v (PR #119844)

2024-12-20 Thread Mark Goncharov via cfe-commits


@@ -49,6 +49,10 @@ enum class VFISAKind {
   AVX,  // x86 AVX
   AVX2, // x86 AVX2
   AVX512,   // x86 AVX512
+  RVVM1,// RISC-V Vector Extension LMUL=1
+  RVVM2,// RISC-V Vector Extension LMUL=2
+  RVVM4,// RISC-V Vector Extension LMUL=4
+  RVVM8,// RISC-V Vector Extension LMUL=8

mga-sc wrote:

Are you sure we need to enable all of them (now enabled only one for each 
RISC-V and AArch64)?

https://github.com/llvm/llvm-project/pull/119844
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