[clang] 687e7d3 - [NFC] Tweak a comment about the lock-free builtins

2020-08-17 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-08-17T13:43:53+01:00
New Revision: 687e7d34253b283945bdf9892aa58fd167f9913d

URL: 
https://github.com/llvm/llvm-project/commit/687e7d34253b283945bdf9892aa58fd167f9913d
DIFF: 
https://github.com/llvm/llvm-project/commit/687e7d34253b283945bdf9892aa58fd167f9913d.diff

LOG: [NFC] Tweak a comment about the lock-free builtins

Added: 


Modified: 
clang/lib/AST/ExprConstant.cpp

Removed: 




diff  --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index 448a683c9088..760e5621e0ef 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -11519,8 +11519,8 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const 
CallExpr *E,
   return false;
 
 // For __atomic_is_lock_free(sizeof(_Atomic(T))), if the size is a power
-// of two less than the maximum inline atomic width, we know it is
-// lock-free.  If the size isn't a power of two, or greater than the
+// of two less than or equal to the maximum inline atomic width, we know it
+// is lock-free.  If the size isn't a power of two, or greater than the
 // maximum alignment where we promote atomics, we know it is not lock-free
 // (at least not in the sense of atomic_is_lock_free).  Otherwise,
 // the answer can only be determined at runtime; for example, 16-byte



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[clang] ca93f9a - [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

2020-12-08 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: ca93f9abdc0abc96ca8fb7999549a50aadd95caf

URL: 
https://github.com/llvm/llvm-project/commit/ca93f9abdc0abc96ca8fb7999549a50aadd95caf
DIFF: 
https://github.com/llvm/llvm-project/commit/ca93f9abdc0abc96ca8fb7999549a50aadd95caf.diff

LOG: [Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

This patch adds tests that showcase a behavior that is currently buggy.
Fix in a follow-up patch.

Differential Revision: https://reviews.llvm.org/D91269

Added: 
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Modified: 


Removed: 




diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
new file mode 100644
index ..ffebb057e230
--- /dev/null
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-abi ilp32d \
+// RUN: -Wno-missing-declarations -emit-llvm %s -o - | FileCheck %s
+
+struct empty_float2 { struct {}; float f; float g; };
+
+// CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
+// FIXME: Extraneous padding before the second float
+// CHECK: { [4 x i8], float, [4 x i8], float }
+float f_empty_float2(empty_float2 a) {
+return a.g;
+}
+
+struct empty_double2 { struct {}; double f; double g; };
+
+// CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double 
%1)
+// FIXME: Extraneous padding before the second double
+// CHECK: { [8 x i8], double, [8 x i8], double }
+double f_empty_double2(empty_double2 a) {
+return a.g;
+}
+
+struct empty_float_double { struct {}; float f; double g; };
+
+// CHECK: define double @_Z20f_empty_float_double18empty_float_double(float 
%0, double %1)
+// CHECK: { [4 x i8], float, double }
+double f_empty_float_double(empty_float_double a) {
+return a.g;
+}
+
+struct empty_double_float { struct {}; double f; float g; };
+
+// CHECK: define double @_Z20f_empty_double_float18empty_double_float(double 
%0, float %1)
+// FIXME: Extraneous padding before the float
+// CHECK: { [8 x i8], double, [8 x i8], float }
+double f_empty_double_float(empty_double_float a) {
+return a.g;
+}



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[clang] fa8f5bf - [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

2020-12-08 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: fa8f5bfa4e8cff042c9730320c74e97fab152ae1

URL: 
https://github.com/llvm/llvm-project/commit/fa8f5bfa4e8cff042c9730320c74e97fab152ae1
DIFF: 
https://github.com/llvm/llvm-project/commit/fa8f5bfa4e8cff042c9730320c74e97fab152ae1.diff

LOG: [Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

The code seemed not to account for the field 1 offset.

Differential Revision: https://reviews.llvm.org/D91270

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 7213f7864d43..05c12dfe0458 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10520,7 +10520,7 @@ bool RISCVABIInfo::detectFPCCEligibleStruct(QualType 
Ty, llvm::Type *&Field1Ty,
 NeededArgFPRs++;
   else if (Field2Ty)
 NeededArgGPRs++;
-  return IsCandidate;
+  return true;
 }
 
 // Call getCoerceAndExpand for the two-element flattened struct described by
@@ -10546,15 +10546,15 @@ ABIArgInfo 
RISCVABIInfo::coerceAndExpandFPCCEligibleStruct(
 
   CharUnits Field2Align =
   CharUnits::fromQuantity(getDataLayout().getABITypeAlignment(Field2Ty));
-  CharUnits Field1Size =
+  CharUnits Field1End = Field1Off +
   CharUnits::fromQuantity(getDataLayout().getTypeStoreSize(Field1Ty));
-  CharUnits Field2OffNoPadNoPack = Field1Size.alignTo(Field2Align);
+  CharUnits Field2OffNoPadNoPack = Field1End.alignTo(Field2Align);
 
   CharUnits Padding = CharUnits::Zero();
   if (Field2Off > Field2OffNoPadNoPack)
 Padding = Field2Off - Field2OffNoPadNoPack;
-  else if (Field2Off != Field2Align && Field2Off > Field1Size)
-Padding = Field2Off - Field1Size;
+  else if (Field2Off != Field2Align && Field2Off > Field1End)
+Padding = Field2Off - Field1End;
 
   bool IsPacked = !Field2Off.isMultipleOf(Field2Align);
 

diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
index ffebb057e230..1018c78e168b 100644
--- a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -4,8 +4,7 @@
 struct empty_float2 { struct {}; float f; float g; };
 
 // CHECK: define float @_Z14f_empty_float212empty_float2(float %0, float %1)
-// FIXME: Extraneous padding before the second float
-// CHECK: { [4 x i8], float, [4 x i8], float }
+// CHECK: { [4 x i8], float, float }
 float f_empty_float2(empty_float2 a) {
 return a.g;
 }
@@ -13,8 +12,7 @@ float f_empty_float2(empty_float2 a) {
 struct empty_double2 { struct {}; double f; double g; };
 
 // CHECK: define double @_Z15f_empty_double213empty_double2(double %0, double 
%1)
-// FIXME: Extraneous padding before the second double
-// CHECK: { [8 x i8], double, [8 x i8], double }
+// CHECK: { [8 x i8], double, double }
 double f_empty_double2(empty_double2 a) {
 return a.g;
 }
@@ -30,8 +28,7 @@ double f_empty_float_double(empty_float_double a) {
 struct empty_double_float { struct {}; double f; float g; };
 
 // CHECK: define double @_Z20f_empty_double_float18empty_double_float(double 
%0, float %1)
-// FIXME: Extraneous padding before the float
-// CHECK: { [8 x i8], double, [8 x i8], float }
+// CHECK: { [8 x i8], double, float }
 double f_empty_double_float(empty_double_float a) {
 return a.g;
 }



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[clang] 3af354e - [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex

2020-12-08 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-12-08T09:19:05Z
New Revision: 3af354e863f553ef727967dfc091a64a11500aa5

URL: 
https://github.com/llvm/llvm-project/commit/3af354e863f553ef727967dfc091a64a11500aa5
DIFF: 
https://github.com/llvm/llvm-project/commit/3af354e863f553ef727967dfc091a64a11500aa5.diff

LOG: [Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct 
and complex

Fixes bug 44904.

Differential Revision: https://reviews.llvm.org/D91278

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/riscv32-ilp32d-abi.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 05c12dfe0458..d4191b943ef5 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -10425,7 +10425,6 @@ bool 
RISCVABIInfo::detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
   return false;
 Field1Ty = CGT.ConvertType(EltTy);
 Field1Off = CurOff;
-assert(CurOff.isZero() && "Unexpected offset for first field");
 Field2Ty = Field1Ty;
 Field2Off = Field1Off + getContext().getTypeSizeInChars(EltTy);
 return true;

diff  --git a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp 
b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
index 1018c78e168b..26d968be97df 100644
--- a/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
+++ b/clang/test/CodeGen/riscv32-ilp32d-abi.cpp
@@ -32,3 +32,19 @@ struct empty_double_float { struct {}; double f; float g; };
 double f_empty_double_float(empty_double_float a) {
 return a.g;
 }
+
+struct empty_complex_f { struct {}; float _Complex fc; };
+
+// CHECK: define float @_Z17f_empty_complex_f15empty_complex_f(float %0, float 
%1)
+// CHECK: { [4 x i8], float, float }
+float f_empty_complex_f(empty_complex_f a) {
+return __imag__ a.fc;
+}
+
+struct empty_complex_d { struct {}; double _Complex fc; };
+
+// CHECK: define double @_Z17f_empty_complex_d15empty_complex_d(double %0, 
double %1)
+// CHECK: { [8 x i8], double, double }
+double f_empty_complex_d(empty_complex_d a) {
+return __imag__ a.fc;
+}



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[clang] 28de0fb - [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines

2020-11-24 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-11-24T22:50:28Z
New Revision: 28de0fb4863a3cfef06c26260219089123a80c2f

URL: 
https://github.com/llvm/llvm-project/commit/28de0fb4863a3cfef06c26260219089123a80c2f
DIFF: 
https://github.com/llvm/llvm-project/commit/28de0fb4863a3cfef06c26260219089123a80c2f.diff

LOG: [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines

The RISCV target did not set the GCC atomic compare and swap defines,
unlike other targets. This broke builds for things like glib on RISCV.

Patch by Kristof Provost (kprovost)

Differential Revision: https://reviews.llvm.org/D91784

Added: 


Modified: 
clang/lib/Basic/Targets/RISCV.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/RISCV.cpp 
b/clang/lib/Basic/Targets/RISCV.cpp
index 5e17b7d51175..37e688d14b4a 100644
--- a/clang/lib/Basic/Targets/RISCV.cpp
+++ b/clang/lib/Basic/Targets/RISCV.cpp
@@ -115,8 +115,14 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions 
&Opts,
 Builder.defineMacro("__riscv_muldiv");
   }
 
-  if (HasA)
+  if (HasA) {
 Builder.defineMacro("__riscv_atomic");
+Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+if (Is64Bit)
+  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+  }
 
   if (HasF || HasD) {
 Builder.defineMacro("__riscv_flen", HasD ? "64" : "32");



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[clang] 2de4f19 - [LSan][RISCV] Enable LSan for RISCV64

2021-01-31 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2021-01-31T21:53:25Z
New Revision: 2de4f19ecdb275bcbc6e7ee8368c19a63f99db88

URL: 
https://github.com/llvm/llvm-project/commit/2de4f19ecdb275bcbc6e7ee8368c19a63f99db88
DIFF: 
https://github.com/llvm/llvm-project/commit/2de4f19ecdb275bcbc6e7ee8368c19a63f99db88.diff

LOG: [LSan][RISCV] Enable LSan for RISCV64

Fixes the broken RISCV64 implementation of `internal_clone` and
adds RISCV64 support for LSan.

Differential Revision: https://reviews.llvm.org/D92403

Added: 


Modified: 
clang/lib/Driver/ToolChains/Linux.cpp
clang/test/Driver/fsanitize.c
compiler-rt/cmake/config-ix.cmake
compiler-rt/lib/lsan/lsan_allocator.h
compiler-rt/lib/lsan/lsan_common.h
compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
compiler-rt/test/asan/lit.cfg.py
compiler-rt/test/lsan/TestCases/use_registers.cpp
compiler-rt/test/lsan/lit.common.cfg.py
compiler-rt/test/sanitizer_common/print_address.h

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Linux.cpp 
b/clang/lib/Driver/ToolChains/Linux.cpp
index 5f0ce69fc5e6..b7b992124d30 100644
--- a/clang/lib/Driver/ToolChains/Linux.cpp
+++ b/clang/lib/Driver/ToolChains/Linux.cpp
@@ -872,6 +872,7 @@ SanitizerMask Linux::getSupportedSanitizers() const {
  getTriple().getArch() == llvm::Triple::thumb ||
  getTriple().getArch() == llvm::Triple::armeb ||
  getTriple().getArch() == llvm::Triple::thumbeb;
+  const bool IsRISCV64 = getTriple().getArch() == llvm::Triple::riscv64;
   const bool IsSystemZ = getTriple().getArch() == llvm::Triple::systemz;
   SanitizerMask Res = ToolChain::getSupportedSanitizers();
   Res |= SanitizerKind::Address;
@@ -886,7 +887,7 @@ SanitizerMask Linux::getSupportedSanitizers() const {
   if (IsX86_64 || IsMIPS64 || IsAArch64)
 Res |= SanitizerKind::DataFlow;
   if (IsX86_64 || IsMIPS64 || IsAArch64 || IsX86 || IsArmArch || IsPowerPC64 ||
-  IsSystemZ)
+  IsRISCV64 || IsSystemZ)
 Res |= SanitizerKind::Leak;
   if (IsX86_64 || IsMIPS64 || IsAArch64 || IsPowerPC64)
 Res |= SanitizerKind::Thread;

diff  --git a/clang/test/Driver/fsanitize.c b/clang/test/Driver/fsanitize.c
index 8926d55a0cf4..63953c042992 100644
--- a/clang/test/Driver/fsanitize.c
+++ b/clang/test/Driver/fsanitize.c
@@ -434,6 +434,12 @@
 // RUN: %clang -target powerpc-unknown-linux -fsanitize=leak %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SANL-PPC
 // CHECK-SANL-PPC: unsupported option '-fsanitize=leak' for target 
'powerpc-unknown-linux'
 
+// RUN: %clang -target riscv64-linux-gnu -fsanitize=leak %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-SANL-RISCV64
+// CHECK-SANL-RISCV64: "-fsanitize=leak"
+
+// RUN: %clang -target riscv64-linux-gnu -fsanitize=address,leak 
-fno-sanitize=address %s -### 2>&1 | FileCheck %s 
--check-prefix=CHECK-SANA-SANL-NO-SANA-RISCV64
+// CHECK-SANA-SANL-NO-SANA-RISCV64: "-fsanitize=leak"
+
 // RUN: %clang -target x86_64-linux-gnu -fsanitize=memory %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-MSAN
 // CHECK-MSAN: "-fno-assume-sane-operator-new"
 // RUN: %clang -target x86_64-linux-gnu -fsanitize=address %s -### 2>&1 | 
FileCheck %s --check-prefix=CHECK-ASAN

diff  --git a/compiler-rt/cmake/config-ix.cmake 
b/compiler-rt/cmake/config-ix.cmake
index f81b8384cbd5..813573802aec 100644
--- a/compiler-rt/cmake/config-ix.cmake
+++ b/compiler-rt/cmake/config-ix.cmake
@@ -322,7 +322,7 @@ set(ALL_GWP_ASAN_SUPPORTED_ARCH ${X86} ${X86_64})
 if(APPLE)
   set(ALL_LSAN_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64} ${ARM64})
 else()
-  set(ALL_LSAN_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64} ${ARM64} ${ARM32} 
${PPC64} ${S390X})
+  set(ALL_LSAN_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64} ${ARM64} ${ARM32} 
${PPC64} ${S390X} ${RISCV64})
 endif()
 set(ALL_MSAN_SUPPORTED_ARCH ${X86_64} ${MIPS64} ${ARM64} ${PPC64} ${S390X})
 set(ALL_HWASAN_SUPPORTED_ARCH ${X86_64} ${ARM64})

diff  --git a/compiler-rt/lib/lsan/lsan_allocator.h 
b/compiler-rt/lib/lsan/lsan_allocator.h
index 17e13cd014ba..9d763789154f 100644
--- a/compiler-rt/lib/lsan/lsan_allocator.h
+++ b/compiler-rt/lib/lsan/lsan_allocator.h
@@ -50,7 +50,7 @@ struct ChunkMetadata {
 };
 
 #if defined(__mips64) || defined(__aarch64__) || defined(__i386__) || \
-defined(__arm__)
+defined(__arm__) || SANITIZER_RISCV64
 template 
 struct AP32 {
   static const uptr kSpaceBeg = 0;

diff  --git a/compiler-rt/lib/lsan/lsan_common.h 
b/compiler-rt/lib/lsan/lsan_common.h
index b0ae6f020b63..f579d6115ba3 100644
--- a/compiler-rt/lib/lsan/lsan_common.h
+++ b/compiler-rt/lib/lsan/lsan_common.h
@@ -41,6 +41,8 @@
 #define CAN_SANITIZE_LEAKS 1
 #elif defined(__arm__) && SANITIZER_LINUX
 #define CAN_SANITIZE_LEAKS 1
+#elif SANITIZER_RISCV64 && SANITIZER_LINUX
+#define CAN_SANITIZE_LEAKS 1
 #elif SANITIZER_NETBSD || SANITIZER_FU

[clang] 0781e93 - [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V

2020-02-21 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-02-21T19:29:57Z
New Revision: 0781e93a6eaa71ec5d87be3bbd053067f7ee

URL: 
https://github.com/llvm/llvm-project/commit/0781e93a6eaa71ec5d87be3bbd053067f7ee
DIFF: 
https://github.com/llvm/llvm-project/commit/0781e93a6eaa71ec5d87be3bbd053067f7ee.diff

LOG: [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V

By default the RISC-V target doesn't have the atomics standard extension
enabled. The first RUN line in `clang/test/CodeGen/atomic_ops.c` didn't
specify a target triple, which meant that on RISC-V Linux hosts it would
target RISC-V, but because it used clang cc1 we didn't get the toolchain
driver functionality to automatically turn on the extensions implied by
the target triple (riscv64-linux includes atomics). This would cause the
test to fail on RISC-V hosts.

This patch changes the test to have RUN lines for two explicit targets,
one with native atomics and one without. To work around FileCheck
limitations and more accurately match the output, some tests now have
separate prefixes for the two cases.

Reviewers: jyknight, eli.friedman, lenary, efriedma
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D74847

Added: 


Modified: 
clang/test/CodeGen/atomic_ops.c

Removed: 




diff  --git a/clang/test/CodeGen/atomic_ops.c b/clang/test/CodeGen/atomic_ops.c
index a853ba9f739c..c1eb1d005dba 100644
--- a/clang/test/CodeGen/atomic_ops.c
+++ b/clang/test/CodeGen/atomic_ops.c
@@ -1,7 +1,7 @@
-// XFAIL: hexagon,sparc
-//(due to not having native load atomic support)
-// RUN: %clang_cc1 -emit-llvm %s -o - | FileCheck %s
-// RUN: %clang_cc1 -triple mips-linux-gnu -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64 -emit-llvm %s \
+// RUN:   -o - | FileCheck -check-prefixes=CHECK,NATIVE %s
+// RUN: %clang_cc1 -triple riscv32 -target-feature -a -emit-llvm %s \
+// RUN:   -o - | FileCheck -check-prefixes=CHECK,LIBCALL %s
 
 void foo(int x)
 {
@@ -9,32 +9,47 @@ void foo(int x)
   _Atomic(short) j = 0;
   // Check that multiply / divides on atomics produce a cmpxchg loop
   i *= 2;
-  // CHECK: mul nsw i32
-  // CHECK: {{(cmpxchg i32*|i1 @__atomic_compare_exchange\(i32 4,)}}
+  // NATIVE: mul nsw i32
+  // NATIVE: cmpxchg i32*
+  // LIBCALL: mul nsw i32
+  // LIBCALL: i1 @__atomic_compare_exchange(i32 4,
   i /= 2;
-  // CHECK: sdiv i32
-  // CHECK: {{(cmpxchg i32*|i1 @__atomic_compare_exchange\(i32 4, )}}
+  // NATIVE: sdiv i32
+  // NATIVE: cmpxchg i32*
+  // LIBCALL: sdiv i32
+  // LIBCALL: i1 @__atomic_compare_exchange(i32 4,
   j /= x;
-  // CHECK: sdiv i32
-  // CHECK: {{(cmpxchg i16*|i1 @__atomic_compare_exchange\(i32 2, )}}
+  // NATIVE: sdiv i32
+  // NATIVE: cmpxchg i16*
+  // LIBCALL: sdiv i32
+  // LIBCALL: i1 @__atomic_compare_exchange(i32 2,
 
 }
 
 extern _Atomic _Bool b;
 
 _Bool bar() {
-// CHECK-LABEL: @bar
-// CHECK: %[[load:.*]] = load atomic i8, i8* @b seq_cst
-// CHECK: %[[tobool:.*]] = trunc i8 %[[load]] to i1
-// CHECK: ret i1 %[[tobool]]
+// NATIVE-LABEL: @bar
+// NATIVE: %[[load:.*]] = load atomic i8, i8* @b seq_cst
+// NATIVE: %[[tobool:.*]] = trunc i8 %[[load]] to i1
+// NATIVE: ret i1 %[[tobool]]
+// LIBCALL-LABEL: @bar
+// LIBCALL: call void @__atomic_load(i32 1, i8* @b, i8* %atomic-temp, i32 5)
+// LIBCALL: %[[load:.*]] = load i8, i8* %atomic-temp
+// LIBCALL: %[[tobool:.*]] = trunc i8 %[[load]] to i1
+// LIBCALL: ret i1 %[[tobool]]
+
   return b;
 }
 
 extern _Atomic(_Complex int) x;
 
 void baz(int y) {
-// CHECK-LABEL: @baz
-// CHECK: {{store atomic|call void @__atomic_store}}
+// NATIVE-LABEL: @baz
+// NATIVE: store atomic
+// LIBCALL-LABEL: @baz
+// LIBCALL: call void @__atomic_store
+
   x += y;
 }
 
@@ -84,9 +99,11 @@ _Atomic(int) compound_and(_Atomic(int) in) {
 }
 
 _Atomic(int) compound_mul(_Atomic(int) in) {
-// CHECK-LABEL: @compound_mul
-// CHECK: cmpxchg i32* {{%.*}}, i32 {{%.*}}, i32 [[NEW:%.*]] seq_cst seq_cst
-// CHECK: ret i32 [[NEW]]
+// NATIVE-LABEL: @compound_mul
+// NATIVE: cmpxchg i32* {{%.*}}, i32 {{%.*}}, i32 [[NEW:%.*]] seq_cst seq_cst
+// NATIVE: ret i32 [[NEW]]
+// LIBCALL-LABEL: @compound_mul
+// LIBCALL: i1 @__atomic_compare_exchange(i32 4,
 
   return (in *= 5);
 }



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[clang] 91f7f0d - [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC

2020-02-25 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-02-25T14:17:45Z
New Revision: 91f7f0d8e3ef2b6be07bc9621de075ff11c730c9

URL: 
https://github.com/llvm/llvm-project/commit/91f7f0d8e3ef2b6be07bc9621de075ff11c730c9
DIFF: 
https://github.com/llvm/llvm-project/commit/91f7f0d8e3ef2b6be07bc9621de075ff11c730c9.diff

LOG: [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC

D68391 added tests that check scenarios where no RISC-V GCC toolchain is
supposed to be detected. When running the tests on RISC-V hosts the system's
GCC toolchain will be detected, and the tests will fail. This patch adds a
`--gcc-toolchain` option pointing to a path where no GCC toolchain is
present, ensuring that the tests are run under the expected conditions, and
therefore are able to pass in all test environments.

Differential Revision: https://reviews.llvm.org/D75061

Added: 


Modified: 
clang/test/Driver/riscv32-toolchain-extra.c
clang/test/Driver/riscv64-toolchain-extra.c

Removed: 




diff  --git a/clang/test/Driver/riscv32-toolchain-extra.c 
b/clang/test/Driver/riscv32-toolchain-extra.c
index ad3974bd9c78..ff9842b37c02 100644
--- a/clang/test/Driver/riscv32-toolchain-extra.c
+++ b/clang/test/Driver/riscv32-toolchain-extra.c
@@ -19,6 +19,7 @@
 // RUN: ln -s %S/Inputs/basic_riscv32_nogcc_tree/bin/riscv32-unknown-elf-ld 
%T/testroot-riscv32-baremetal-nogcc/bin/riscv32-unknown-elf-ld
 // RUN: ln -s %S/Inputs/basic_riscv32_nogcc_tree/riscv32-unknown-elf 
%T/testroot-riscv32-baremetal-nogcc/riscv32-unknown-elf
 // RUN: %T/testroot-riscv32-baremetal-nogcc/bin/clang %s -### 
-no-canonical-prefixes \
+// RUN:--gcc-toolchain=%T/testroot-riscv32-baremetal-nogcc/invalid \
 // RUN:-target riscv32-unknown-elf --rtlib=platform 2>&1 \
 // RUN:| FileCheck -check-prefix=C-RV32-BAREMETAL-ILP32-NOGCC %s
 

diff  --git a/clang/test/Driver/riscv64-toolchain-extra.c 
b/clang/test/Driver/riscv64-toolchain-extra.c
index 2213d96456ec..6b474e88f473 100644
--- a/clang/test/Driver/riscv64-toolchain-extra.c
+++ b/clang/test/Driver/riscv64-toolchain-extra.c
@@ -19,6 +19,7 @@
 // RUN: ln -s %S/Inputs/basic_riscv64_nogcc_tree/bin/riscv64-unknown-elf-ld 
%T/testroot-riscv64-baremetal-nogcc/bin/riscv64-unknown-elf-ld
 // RUN: ln -s %S/Inputs/basic_riscv64_nogcc_tree/riscv64-unknown-elf 
%T/testroot-riscv64-baremetal-nogcc/riscv64-unknown-elf
 // RUN: %T/testroot-riscv64-baremetal-nogcc/bin/clang %s -### 
-no-canonical-prefixes \
+// RUN:--gcc-toolchain=%T/testroot-riscv64-baremetal-nogcc/invalid \
 // RUN:-target riscv64-unknown-elf --rtlib=platform 2>&1 \
 // RUN:| FileCheck -check-prefix=C-RV64-BAREMETAL-LP64-NOGCC %s
 



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[clang] 9816e72 - [Driver][RISCV] Add RedHat Linux RISC-V triple

2020-02-14 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-02-14T13:46:26Z
New Revision: 9816e726e747d72e0c5ac92aa20e652031a10448

URL: 
https://github.com/llvm/llvm-project/commit/9816e726e747d72e0c5ac92aa20e652031a10448
DIFF: 
https://github.com/llvm/llvm-project/commit/9816e726e747d72e0c5ac92aa20e652031a10448.diff

LOG: [Driver][RISCV] Add RedHat Linux RISC-V triple

Summary: Adds the RedHat Linux triple to the list of 64-bit RISC-V triples.
Without this the gcc libraries wouldn't be found by clang on a redhat/fedora
system, as the search list included `/usr/lib/gcc/riscv64-redhat-linux-gnu`
but the correct path didn't include the `-gnu` suffix.

Reviewers: lenary, asb, dlj
Reviewed By: lenary
Tags: #clang
Differential Revision: https://reviews.llvm.org/D74399

Added: 

clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtbegin.o

clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtend.o

clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crti.o

clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtn.o
clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib64/crt1.o

Modified: 
clang/lib/Driver/ToolChains/Gnu.cpp
clang/test/Driver/linux-ld.c

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Gnu.cpp 
b/clang/lib/Driver/ToolChains/Gnu.cpp
index bc67a7e0cdf9..dadbfa288a03 100644
--- a/clang/lib/Driver/ToolChains/Gnu.cpp
+++ b/clang/lib/Driver/ToolChains/Gnu.cpp
@@ -2090,6 +2090,7 @@ void 
Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes(
   static const char *const RISCV64Triples[] = {"riscv64-unknown-linux-gnu",
"riscv64-linux-gnu",
"riscv64-unknown-elf",
+   "riscv64-redhat-linux",
"riscv64-suse-linux"};
 
   static const char *const SPARCv8LibDirs[] = {"/lib32", "/lib"};

diff  --git 
a/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtbegin.o
 
b/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtbegin.o
new file mode 100644
index ..e69de29bb2d1

diff  --git 
a/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtend.o
 
b/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtend.o
new file mode 100644
index ..e69de29bb2d1

diff  --git 
a/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crti.o
 
b/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crti.o
new file mode 100644
index ..e69de29bb2d1

diff  --git 
a/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtn.o
 
b/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib/gcc/riscv64-redhat-linux/9/crtn.o
new file mode 100644
index ..e69de29bb2d1

diff  --git a/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib64/crt1.o 
b/clang/test/Driver/Inputs/fedora_31_riscv64_tree/usr/lib64/crt1.o
new file mode 100644
index ..e69de29bb2d1

diff  --git a/clang/test/Driver/linux-ld.c b/clang/test/Driver/linux-ld.c
index 51227550b528..ec539522c25d 100644
--- a/clang/test/Driver/linux-ld.c
+++ b/clang/test/Driver/linux-ld.c
@@ -769,6 +769,21 @@
 // CHECK-FEDORA-21-AARCH64: 
"{{.*}}/usr/lib/gcc/aarch64-redhat-linux/4.9.0{{/|}}crtend.o"
 // CHECK-FEDORA-21-AARCH64: 
"{{.*}}/usr/lib/gcc/aarch64-redhat-linux/4.9.0/../../../../lib64{{/|}}crtn.o"
 //
+// Check Fedora 31 on riscv64.
+// RUN: %clang -no-canonical-prefixes %s -### -o %t.o 2>&1 \
+// RUN: --target=riscv64-redhat-linux -rtlib=platform \
+// RUN: --gcc-toolchain="" \
+// RUN: --sysroot=%S/Inputs/fedora_31_riscv64_tree \
+// RUN:   | FileCheck --check-prefix=CHECK-FEDORA-31-RISCV64 %s
+// CHECK-FEDORA-31-RISCV64: "{{.*}}ld{{(.exe)?}}" "--sysroot=[[SYSROOT:[^"]+]]"
+// CHECK-FEDORA-31-RISCV64: 
"{{.*}}/usr/lib/gcc/riscv64-redhat-linux/9/../../../../lib64{{/|}}crt1.o"
+// CHECK-FEDORA-31-RISCV64: 
"{{.*}}/usr/lib/gcc/riscv64-redhat-linux/9{{/|}}crti.o"
+// CHECK-FEDORA-31-RISCV64: 
"{{.*}}/usr/lib/gcc/riscv64-redhat-linux/9{{/|}}crtbegin.o"
+// CHECK-FEDORA-31-RISCV64: "-L[[SYSROOT]]/usr/lib/gcc/riscv64-redhat-linux/9"
+// CHECK-FEDORA-31-RISCV64: 
"-L[[SYSROOT]]/usr/lib/gcc/riscv64-redhat-linux/9/../../../../lib64"
+// CHECK-FEDORA-31-RISCV64: 
"{{.*}}/usr/lib/gcc/riscv64-redhat-linux/9{{/|}}crtend.o"
+// CHECK-FEDORA-31-RISCV64: 
"{{.*}}/usr/lib/gcc/riscv64-redhat-linux/9{{/|}}crtn.o"
+//
 // RUN: %clang -no-canonical-prefixes %s -### -o %t.o 2>&1 \
 // RUN: --target=arm-unknown-linux-gnueabi -rtlib=platform \
 // RUN: --gcc-toolchain="" \



_

[clang-tools-extra] 1d40c41 - [clang-tools-extra] fix the check for if '-latomic' is necessary

2020-02-14 Thread Luís Marques via cfe-commits 

Author: Gokturk Yuksek
Date: 2020-02-14T14:16:10Z
New Revision: 1d40c4150630729a9c1ce5119a8027dac93a5b2d

URL: 
https://github.com/llvm/llvm-project/commit/1d40c4150630729a9c1ce5119a8027dac93a5b2d
DIFF: 
https://github.com/llvm/llvm-project/commit/1d40c4150630729a9c1ce5119a8027dac93a5b2d.diff

LOG: [clang-tools-extra] fix the check for if '-latomic' is necessary

Summary:
The CheckAtomic module performs two tests to determine if passing
'-latomic' to the linker is required: one for 64-bit atomics, and
another for non-64-bit atomics. clangd only uses the result from
HAVE_CXX_ATOMICS64_WITHOUT_LIB. This is incomplete because there are
uses of non-64-bit atomics in the code, such as the ReplyOnce::Replied
of type std::atomic defined in clangd/ClangdLSPServer.cpp.

Fix by also checking for the result of HAVE_CXX_ATOMICS_WITHOUT_LIB.

See also: https://reviews.llvm.org/D68964

Reviewers: ilya-biryukov, nridge, kadircet, beanz, compnerd, luismarques
Reviewed By: luismarques
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69869

Added: 


Modified: 
clang-tools-extra/clangd/CMakeLists.txt

Removed: 




diff  --git a/clang-tools-extra/clangd/CMakeLists.txt 
b/clang-tools-extra/clangd/CMakeLists.txt
index e3eccb50a496..fc5a07e69e9d 100644
--- a/clang-tools-extra/clangd/CMakeLists.txt
+++ b/clang-tools-extra/clangd/CMakeLists.txt
@@ -30,7 +30,7 @@ if(CLANG_BUILT_STANDALONE)
 endif()
 
 set(CLANGD_ATOMIC_LIB "")
-if(NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
+if(NOT HAVE_CXX_ATOMICS_WITHOUT_LIB OR NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
   list(APPEND CLANGD_ATOMIC_LIB "atomic")
 endif()
 



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[clang-tools-extra] 13700c3 - Revert "[clang-tools-extra] fix the check for if '-latomic' is necessary"

2020-02-14 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2020-02-14T15:01:52Z
New Revision: 13700c383fdbb172fac281bff6738a62989631c5

URL: 
https://github.com/llvm/llvm-project/commit/13700c383fdbb172fac281bff6738a62989631c5
DIFF: 
https://github.com/llvm/llvm-project/commit/13700c383fdbb172fac281bff6738a62989631c5.diff

LOG: Revert "[clang-tools-extra] fix the check for if '-latomic' is necessary"

This reverts commit 1d40c4150630729a9c1ce5119a8027dac93a5b2d.
This seemed to have caused build failures on ARM/AArch64.

Added: 


Modified: 
clang-tools-extra/clangd/CMakeLists.txt

Removed: 




diff  --git a/clang-tools-extra/clangd/CMakeLists.txt 
b/clang-tools-extra/clangd/CMakeLists.txt
index fc5a07e69e9d..e3eccb50a496 100644
--- a/clang-tools-extra/clangd/CMakeLists.txt
+++ b/clang-tools-extra/clangd/CMakeLists.txt
@@ -30,7 +30,7 @@ if(CLANG_BUILT_STANDALONE)
 endif()
 
 set(CLANGD_ATOMIC_LIB "")
-if(NOT HAVE_CXX_ATOMICS_WITHOUT_LIB OR NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
+if(NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
   list(APPEND CLANGD_ATOMIC_LIB "atomic")
 endif()
 



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[clang-tools-extra] 351ed50 - Reland "[clang-tools-extra] fix the check for if '-latomic' is necessary""

2020-02-17 Thread Luís Marques via cfe-commits 

Author: Gokturk Yuksek
Date: 2020-02-17T16:53:29Z
New Revision: 351ed50dcb2a67a88213ef67469f70bd5e2b4a60

URL: 
https://github.com/llvm/llvm-project/commit/351ed50dcb2a67a88213ef67469f70bd5e2b4a60
DIFF: 
https://github.com/llvm/llvm-project/commit/351ed50dcb2a67a88213ef67469f70bd5e2b4a60.diff

LOG: Reland "[clang-tools-extra] fix the check for if '-latomic' is necessary""

The buildbot failures on MSVC should have been fixed by f128f442a3d.

Added: 


Modified: 
clang-tools-extra/clangd/CMakeLists.txt

Removed: 




diff  --git a/clang-tools-extra/clangd/CMakeLists.txt 
b/clang-tools-extra/clangd/CMakeLists.txt
index e3eccb50a496..fc5a07e69e9d 100644
--- a/clang-tools-extra/clangd/CMakeLists.txt
+++ b/clang-tools-extra/clangd/CMakeLists.txt
@@ -30,7 +30,7 @@ if(CLANG_BUILT_STANDALONE)
 endif()
 
 set(CLANGD_ATOMIC_LIB "")
-if(NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
+if(NOT HAVE_CXX_ATOMICS_WITHOUT_LIB OR NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB)
   list(APPEND CLANGD_ATOMIC_LIB "atomic")
 endif()
 



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[clang] a8cf32b - [RISCV] Add XFAIL riscv32 for known issue with the old pass manager

2021-03-31 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2021-03-31T15:18:32+01:00
New Revision: a8cf32baf57de151bb6a8341957e101b04a6e816

URL: 
https://github.com/llvm/llvm-project/commit/a8cf32baf57de151bb6a8341957e101b04a6e816
DIFF: 
https://github.com/llvm/llvm-project/commit/a8cf32baf57de151bb6a8341957e101b04a6e816.diff

LOG: [RISCV] Add XFAIL riscv32 for known issue with the old pass manager

See D80668, rG7b4832648a63 and https://bugs.llvm.org/show_bug.cgi?id=46117
for details of the issue.

Differential Revision: https://reviews.llvm.org/D99108

Added: 


Modified: 
clang/test/CodeGen/sanitize-coverage-old-pm.c

Removed: 




diff  --git a/clang/test/CodeGen/sanitize-coverage-old-pm.c 
b/clang/test/CodeGen/sanitize-coverage-old-pm.c
index a6ded8a0fb985..610dd651587f9 100644
--- a/clang/test/CodeGen/sanitize-coverage-old-pm.c
+++ b/clang/test/CodeGen/sanitize-coverage-old-pm.c
@@ -7,6 +7,8 @@
 //
 // Host armv7 is currently unsupported: 
https://bugs.llvm.org/show_bug.cgi?id=46117
 // XFAIL: armv7, thumbv7
+// The same issue also occurs on a riscv32 host.
+// XFAIL: riscv32
 
 int x[10];
 



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[clang] 34e055d - [Clang][RISCV] Implement getConstraintRegister for RISC-V

2021-08-26 Thread Luís Marques via cfe-commits 

Author: Luís Marques
Date: 2021-08-26T17:43:43+01:00
New Revision: 34e055d33e37cd87b9f6f4b0431a4c061628d036

URL: 
https://github.com/llvm/llvm-project/commit/34e055d33e37cd87b9f6f4b0431a4c061628d036
DIFF: 
https://github.com/llvm/llvm-project/commit/34e055d33e37cd87b9f6f4b0431a4c061628d036.diff

LOG: [Clang][RISCV] Implement getConstraintRegister for RISC-V

The getConstraintRegister method is used by semantic checking of inline
assembly statements in order to diagnose conflicts between clobber list
and input/output lists. By overriding getConstraintRegister we get those
diagnostics and we match RISC-V GCC's behavior. The implementation is
trivial due to the lack of single-register RISC-V-specific constraints.

Differential Revision: https://reviews.llvm.org/D108624

Added: 


Modified: 
clang/lib/Basic/Targets/RISCV.h
clang/test/Sema/inline-asm-validate-riscv.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/RISCV.h b/clang/lib/Basic/Targets/RISCV.h
index 7e0846581ca1f..9609b6fc3f307 100644
--- a/clang/lib/Basic/Targets/RISCV.h
+++ b/clang/lib/Basic/Targets/RISCV.h
@@ -82,6 +82,11 @@ class RISCVTargetInfo : public TargetInfo {
 
   const char *getClobbers() const override { return ""; }
 
+  StringRef getConstraintRegister(StringRef Constraint,
+  StringRef Expression) const override {
+return Expression;
+  }
+
   ArrayRef getGCCRegNames() const override;
 
   int getEHDataRegisterNumber(unsigned RegNo) const override {

diff  --git a/clang/test/Sema/inline-asm-validate-riscv.c 
b/clang/test/Sema/inline-asm-validate-riscv.c
index 744f73e23cf26..43a5378bc3f25 100644
--- a/clang/test/Sema/inline-asm-validate-riscv.c
+++ b/clang/test/Sema/inline-asm-validate-riscv.c
@@ -21,3 +21,11 @@ void K(int k) {
   asm volatile ("" :: "K"(BelowMin)); // expected-error{{value '-1' out of 
range for constraint 'K'}}
   asm volatile ("" :: "K"(AboveMax)); // expected-error{{value '32' out of 
range for constraint 'K'}}
 }
+
+void test_clobber_conflict(void) {
+  register long x10 asm("x10");
+  asm volatile("" :: "r"(x10) : "x10"); // expected-error {{conflicts with asm 
clobber list}}
+  asm volatile("" :: "r"(x10) : "a0"); // expected-error {{conflicts with asm 
clobber list}}
+  asm volatile("" : "=r"(x10) :: "x10"); // expected-error {{conflicts with 
asm clobber list}}
+  asm volatile("" : "=r"(x10) :: "a0"); // expected-error {{conflicts with asm 
clobber list}}
+}



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