Author: Luís Marques Date: 2021-08-26T17:43:43+01:00 New Revision: 34e055d33e37cd87b9f6f4b0431a4c061628d036
URL: https://github.com/llvm/llvm-project/commit/34e055d33e37cd87b9f6f4b0431a4c061628d036 DIFF: https://github.com/llvm/llvm-project/commit/34e055d33e37cd87b9f6f4b0431a4c061628d036.diff LOG: [Clang][RISCV] Implement getConstraintRegister for RISC-V The getConstraintRegister method is used by semantic checking of inline assembly statements in order to diagnose conflicts between clobber list and input/output lists. By overriding getConstraintRegister we get those diagnostics and we match RISC-V GCC's behavior. The implementation is trivial due to the lack of single-register RISC-V-specific constraints. Differential Revision: https://reviews.llvm.org/D108624 Added: Modified: clang/lib/Basic/Targets/RISCV.h clang/test/Sema/inline-asm-validate-riscv.c Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/RISCV.h b/clang/lib/Basic/Targets/RISCV.h index 7e0846581ca1f..9609b6fc3f307 100644 --- a/clang/lib/Basic/Targets/RISCV.h +++ b/clang/lib/Basic/Targets/RISCV.h @@ -82,6 +82,11 @@ class RISCVTargetInfo : public TargetInfo { const char *getClobbers() const override { return ""; } + StringRef getConstraintRegister(StringRef Constraint, + StringRef Expression) const override { + return Expression; + } + ArrayRef<const char *> getGCCRegNames() const override; int getEHDataRegisterNumber(unsigned RegNo) const override { diff --git a/clang/test/Sema/inline-asm-validate-riscv.c b/clang/test/Sema/inline-asm-validate-riscv.c index 744f73e23cf26..43a5378bc3f25 100644 --- a/clang/test/Sema/inline-asm-validate-riscv.c +++ b/clang/test/Sema/inline-asm-validate-riscv.c @@ -21,3 +21,11 @@ void K(int k) { asm volatile ("" :: "K"(BelowMin)); // expected-error{{value '-1' out of range for constraint 'K'}} asm volatile ("" :: "K"(AboveMax)); // expected-error{{value '32' out of range for constraint 'K'}} } + +void test_clobber_conflict(void) { + register long x10 asm("x10"); + asm volatile("" :: "r"(x10) : "x10"); // expected-error {{conflicts with asm clobber list}} + asm volatile("" :: "r"(x10) : "a0"); // expected-error {{conflicts with asm clobber list}} + asm volatile("" : "=r"(x10) :: "x10"); // expected-error {{conflicts with asm clobber list}} + asm volatile("" : "=r"(x10) :: "a0"); // expected-error {{conflicts with asm clobber list}} +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
