r331962 - [X86] ptwrite intrinsic
Author: gbuella
Date: Thu May 10 00:28:54 2018
New Revision: 331962
URL: http://llvm.org/viewvc/llvm-project?rev=331962&view=rev
Log:
[X86] ptwrite intrinsic
Reviewers: craig.topper, RKSimon
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D46540
Added:
cfe/trunk/lib/Headers/ptwriteintrin.h (with props)
cfe/trunk/test/CodeGen/ptwrite.c (with props)
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Basic/BuiltinsX86_64.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/cpuid.h
cfe/trunk/lib/Headers/module.modulemap
cfe/trunk/lib/Headers/x86intrin.h
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/predefined-arch-macros.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=331962&r1=331961&r2=331962&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu May 10 00:28:54 2018
@@ -1885,6 +1885,9 @@ TARGET_BUILTIN(__builtin_ia32_cldemote,
TARGET_BUILTIN(__builtin_ia32_directstore_u32, "vUi*Ui", "n", "movdiri")
TARGET_BUILTIN(__builtin_ia32_movdir64b, "vv*vC*", "n", "movdir64b")
+// PTWRITE
+TARGET_BUILTIN(__builtin_ia32_ptwrite32, "vUi", "n", "ptwrite")
+
// MSVC
TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h",
ALL_MS_LANGUAGES, "")
TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h",
ALL_MS_LANGUAGES, "")
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86_64.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86_64.def?rev=331962&r1=331961&r2=331962&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86_64.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86_64.def Thu May 10 00:28:54 2018
@@ -95,6 +95,7 @@ TARGET_BUILTIN(__builtin_ia32_cvtsi2ss64
TARGET_BUILTIN(__builtin_ia32_cvtusi2sd64, "V2dV2dULLiIi", "nc", "avx512f")
TARGET_BUILTIN(__builtin_ia32_cvtusi2ss64, "V4fV4fULLiIi", "nc", "avx512f")
TARGET_BUILTIN(__builtin_ia32_directstore_u64, "vULi*ULi", "n", "movdiri")
+TARGET_BUILTIN(__builtin_ia32_ptwrite64, "vULLi", "n", "ptwrite")
#undef BUILTIN
#undef TARGET_BUILTIN
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=331962&r1=331961&r2=331962&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu May 10 00:28:54 2018
@@ -2697,6 +2697,8 @@ def mprefetchwt1 : Flag<["-"], "mprefetc
def mno_prefetchwt1 : Flag<["-"], "mno-prefetchwt1">,
Group;
def mprfchw : Flag<["-"], "mprfchw">, Group;
def mno_prfchw : Flag<["-"], "mno-prfchw">, Group;
+def mptwrite : Flag<["-"], "mptwrite">, Group;
+def mno_ptwrite : Flag<["-"], "mno-ptwrite">, Group;
def mrdpid : Flag<["-"], "mrdpid">, Group;
def mno_rdpid : Flag<["-"], "mno-rdpid">, Group;
def mrdrnd : Flag<["-"], "mrdrnd">, Group;
Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=331962&r1=331961&r2=331962&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Thu May 10 00:28:54 2018
@@ -253,6 +253,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "waitpkg", true);
LLVM_FALLTHROUGH;
case CK_GoldmontPlus:
+setFeatureEnabledImpl(Features, "ptwrite", true);
setFeatureEnabledImpl(Features, "rdpid", true);
setFeatureEnabledImpl(Features, "sgx", true);
LLVM_FALLTHROUGH;
@@ -830,6 +831,8 @@ bool X86TargetInfo::handleTargetFeatures
HasMOVDIR64B = true;
} else if (Feature == "+pconfig") {
HasPCONFIG = true;
+} else if (Feature == "+ptwrite") {
+ HasPTWRITE = true;
}
X86SSEEnum Level = llvm::StringSwitch(Feature)
@@ -1192,6 +1195,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__MOVDIR64B__");
if (HasPCONFIG)
Builder.defineMacro("__PCONFIG__");
+ if (HasPTWRITE)
+Builder.defineMacro("__PTWRITE__");
// Each case falls through to the previous one here.
switch (SSELevel) {
@@ -1326,6 +1331,7 @@ bool X86TargetInfo::isValidFeatureName(S
.Case("popcnt", true)
.Case("prefetchwt1", true)
.Case("prfchw", true)
+ .Case("ptwrite", true)
.Case("rdpid", true)
.Case("rdrnd", true)
.Case("rdseed", true)
r332091 - [X86] Assume alignment of movdir64b dst argument
Author: gbuella
Date: Fri May 11 07:22:04 2018
New Revision: 332091
URL: http://llvm.org/viewvc/llvm-project?rev=332091&view=rev
Log:
[X86] Assume alignment of movdir64b dst argument
Reviewers: craig.topper
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D46683
Modified:
cfe/trunk/lib/Headers/movdirintrin.h
cfe/trunk/test/CodeGen/builtin-movdir.c
Modified: cfe/trunk/lib/Headers/movdirintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/movdirintrin.h?rev=332091&r1=332090&r2=332091&view=diff
==
--- cfe/trunk/lib/Headers/movdirintrin.h (original)
+++ cfe/trunk/lib/Headers/movdirintrin.h Fri May 11 07:22:04 2018
@@ -47,10 +47,15 @@ _directstoreu_u64 (void *__dst, unsigned
#endif /* __x86_64__ */
-// Move 64 bytes as direct store
+/*
+ * movdir64b - Move 64 bytes as direct store.
+ * The destination must be 64 byte aligned, and the store is atomic.
+ * The source address has no alignment requirement, and the load from
+ * the source address is not atomic.
+ */
static __inline__ void
__attribute__((__always_inline__, __nodebug__, __target__("movdir64b")))
-_movdir64b (void *__dst, const void *__src)
+_movdir64b (void *__dst __attribute__((align_value(64))), const void *__src)
{
__builtin_ia32_movdir64b(__dst, __src);
}
Modified: cfe/trunk/test/CodeGen/builtin-movdir.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtin-movdir.c?rev=332091&r1=332090&r2=332091&view=diff
==
--- cfe/trunk/test/CodeGen/builtin-movdir.c (original)
+++ cfe/trunk/test/CodeGen/builtin-movdir.c Fri May 11 07:22:04 2018
@@ -1,5 +1,5 @@
// RUN: %clang_cc1 -ffreestanding -Wall -pedantic -triple
x86_64-unknown-unknown -target-feature +movdiri -target-feature +movdir64b %s
-emit-llvm -o - | FileCheck %s --check-prefix=X86_64 --check-prefix=CHECK
-// RUN: %clang_cc1 -ffreestanding -Wall -pedantic -triple i386-unknown-unknown
-target-feature +movdiri -target-feature +movdir64b %s -emit-llvm -o - |
FileCheck %s --check-prefix=CHECK
+// RUN: %clang_cc1 -ffreestanding -Wall -pedantic -triple i386-unknown-unknown
-target-feature +movdiri -target-feature +movdir64b %s -emit-llvm -o - |
FileCheck %s --check-prefix=X86 --check-prefix=CHECK
#include
#include
@@ -22,6 +22,11 @@ void test_directstore64(void *dst, uint6
void test_dir64b(void *dst, const void *src) {
// CHECK-LABEL: test_dir64b
+ // CHECK: [[PTRINT1:%.+]] = ptrtoint
+ // X86: [[MASKEDPTR1:%.+]] = and i32 [[PTRINT1]], 63
+ // X86: [[MASKCOND1:%.+]] = icmp eq i32 [[MASKEDPTR1]], 0
+ // X86_64: [[MASKEDPTR1:%.+]] = and i64 [[PTRINT1]], 63
+ // X86_64: [[MASKCOND1:%.+]] = icmp eq i64 [[MASKEDPTR1]], 0
// CHECK: call void @llvm.x86.movdir64b
_movdir64b(dst, src);
}
___
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r333160 - [X86] NFC Include immintrin.h in CodeGen tests
Author: gbuella
Date: Thu May 24 00:09:08 2018
New Revision: 333160
URL: http://llvm.org/viewvc/llvm-project?rev=333160&view=rev
Log:
[X86] NFC Include immintrin.h in CodeGen tests
Following r333110:
"Move all Intel defined intrinsic includes into immintrin.h"
Modified:
cfe/trunk/test/CodeGen/adx-builtins.c
cfe/trunk/test/CodeGen/avx-builtins.c
cfe/trunk/test/CodeGen/avx2-builtins.c
cfe/trunk/test/CodeGen/bmi-builtins.c
cfe/trunk/test/CodeGen/bmi2-builtins.c
cfe/trunk/test/CodeGen/builtin-clflushopt.c
cfe/trunk/test/CodeGen/builtin-clwb.c
cfe/trunk/test/CodeGen/builtin-movdir.c
cfe/trunk/test/CodeGen/builtin-wbnoinvd.c
cfe/trunk/test/CodeGen/cldemote.c
cfe/trunk/test/CodeGen/f16c-builtins.c
cfe/trunk/test/CodeGen/fsgsbase-builtins.c
cfe/trunk/test/CodeGen/lzcnt-builtins.c
cfe/trunk/test/CodeGen/mmx-builtins.c
cfe/trunk/test/CodeGen/popcnt-builtins.c
cfe/trunk/test/CodeGen/ptwrite.c
cfe/trunk/test/CodeGen/rdpid-builtins.c
cfe/trunk/test/CodeGen/rdrand-builtins.c
cfe/trunk/test/CodeGen/sse-builtins.c
cfe/trunk/test/CodeGen/sse2-builtins.c
cfe/trunk/test/CodeGen/sse3-builtins.c
cfe/trunk/test/CodeGen/sse41-builtins.c
cfe/trunk/test/CodeGen/sse42-builtins.c
cfe/trunk/test/CodeGen/ssse3-builtins.c
cfe/trunk/test/CodeGen/waitpkg.c
cfe/trunk/test/CodeGen/x86-nontemporal.c
cfe/trunk/test/Headers/pconfigintin.c
cfe/trunk/test/Headers/sgxintrin.c
Modified: cfe/trunk/test/CodeGen/adx-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/adx-builtins.c?rev=333160&r1=333159&r2=333160&view=diff
==
--- cfe/trunk/test/CodeGen/adx-builtins.c (original)
+++ cfe/trunk/test/CodeGen/adx-builtins.c Thu May 24 00:09:08 2018
@@ -1,6 +1,6 @@
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -ffreestanding
-target-feature +adx -emit-llvm -o - %s | FileCheck %s
-#include
+#include
unsigned char test_addcarryx_u32(unsigned char __cf, unsigned int __x,
unsigned int __y, unsigned int *__p) {
Modified: cfe/trunk/test/CodeGen/avx-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx-builtins.c?rev=333160&r1=333159&r2=333160&view=diff
==
--- cfe/trunk/test/CodeGen/avx-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx-builtins.c Thu May 24 00:09:08 2018
@@ -2,7 +2,7 @@
// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin
-target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck
%s
-#include
+#include
// NOTE: This should match the tests in
llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
Modified: cfe/trunk/test/CodeGen/avx2-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx2-builtins.c?rev=333160&r1=333159&r2=333160&view=diff
==
--- cfe/trunk/test/CodeGen/avx2-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx2-builtins.c Thu May 24 00:09:08 2018
@@ -2,7 +2,7 @@
// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin
-target-feature +avx2 -fno-signed-char -emit-llvm -o - -Wall -Werror |
FileCheck %s
-#include
+#include
// NOTE: This should match the tests in
llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
Modified: cfe/trunk/test/CodeGen/bmi-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/bmi-builtins.c?rev=333160&r1=333159&r2=333160&view=diff
==
--- cfe/trunk/test/CodeGen/bmi-builtins.c (original)
+++ cfe/trunk/test/CodeGen/bmi-builtins.c Thu May 24 00:09:08 2018
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin
-target-feature +bmi -emit-llvm -o - -Wall -Werror | FileCheck %s
-#include
+#include
// NOTE: This should match the tests in
llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
Modified: cfe/trunk/test/CodeGen/bmi2-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/bmi2-builtins.c?rev=333160&r1=333159&r2=333160&view=diff
==
--- cfe/trunk/test/CodeGen/bmi2-builtins.c (original)
+++ cfe/trunk/test/CodeGen/bmi2-builtins.c Thu May 24 00:09:08 2018
@@ -2,7 +2,7 @@
// RUN: %clang_cc1 -ffreestanding %s -triple=i386-apple-darwin -target-feature
+bmi2 -emit-llvm -o - | FileCheck %s --check-prefix=B32
-#include
+#include
unsigned int test_bzhi_u32(unsigned int __X, unsigned int __Y) {
// CHECK: @llvm.x86.bmi.bzhi.32
Modified: cfe/trunk/test/CodeGen/builtin-clflushopt.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtin-clflushopt.c?rev=333160&r1=333159&r2=333160&view=diff
r333256 - [x86] invpcid intrinsic
Author: gbuella
Date: Thu May 24 23:34:42 2018
New Revision: 333256
URL: http://llvm.org/viewvc/llvm-project?rev=333256&view=rev
Log:
[x86] invpcid intrinsic
An intrinsic for an old instruction, as described in the Intel SDM.
Reviewers: craig.topper, rnk
Reviewed By: craig.topper, rnk
Differential Revision: https://reviews.llvm.org/D47142
Added:
cfe/trunk/lib/Headers/invpcidintrin.h (with props)
cfe/trunk/test/CodeGen/invpcid.c (with props)
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/cpuid.h
cfe/trunk/lib/Headers/immintrin.h
cfe/trunk/lib/Headers/module.modulemap
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/predefined-arch-macros.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=333256&r1=333255&r2=333256&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu May 24 23:34:42 2018
@@ -1867,6 +1867,9 @@ TARGET_BUILTIN(__builtin_ia32_movdir64b,
// PTWRITE
TARGET_BUILTIN(__builtin_ia32_ptwrite32, "vUi", "n", "ptwrite")
+// INVPCID
+TARGET_BUILTIN(__builtin_ia32_invpcid, "vUiv*", "nc", "invpcid")
+
// MSVC
TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h",
ALL_MS_LANGUAGES, "")
TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h",
ALL_MS_LANGUAGES, "")
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=333256&r1=333255&r2=333256&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu May 24 23:34:42 2018
@@ -2685,6 +2685,8 @@ def mfsgsbase : Flag<["-"], "mfsgsbase">
def mno_fsgsbase : Flag<["-"], "mno-fsgsbase">, Group;
def mfxsr : Flag<["-"], "mfxsr">, Group;
def mno_fxsr : Flag<["-"], "mno-fxsr">, Group;
+def minvpcid : Flag<["-"], "minvpcid">, Group;
+def mno_invpcid : Flag<["-"], "mno-invpcid">, Group;
def mgfni : Flag<["-"], "mgfni">, Group;
def mno_gfni : Flag<["-"], "mno-gfni">, Group;
def mlwp : Flag<["-"], "mlwp">, Group;
Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=333256&r1=333255&r2=333256&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Thu May 24 23:34:42 2018
@@ -182,6 +182,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "bmi", true);
setFeatureEnabledImpl(Features, "bmi2", true);
setFeatureEnabledImpl(Features, "fma", true);
+setFeatureEnabledImpl(Features, "invpcid", true);
setFeatureEnabledImpl(Features, "movbe", true);
LLVM_FALLTHROUGH;
case CK_IvyBridge:
@@ -811,6 +812,8 @@ bool X86TargetInfo::handleTargetFeatures
HasPCONFIG = true;
} else if (Feature == "+ptwrite") {
HasPTWRITE = true;
+} else if (Feature == "+invpcid") {
+ HasINVPCID = true;
}
X86SSEEnum Level = llvm::StringSwitch(Feature)
@@ -1173,6 +1176,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__PCONFIG__");
if (HasPTWRITE)
Builder.defineMacro("__PTWRITE__");
+ if (HasINVPCID)
+Builder.defineMacro("__INVPCID__");
// Each case falls through to the previous one here.
switch (SSELevel) {
@@ -1293,6 +1298,7 @@ bool X86TargetInfo::isValidFeatureName(S
.Case("fsgsbase", true)
.Case("fxsr", true)
.Case("gfni", true)
+ .Case("invpcid", true)
.Case("lwp", true)
.Case("lzcnt", true)
.Case("mmx", true)
@@ -1370,6 +1376,7 @@ bool X86TargetInfo::hasFeature(StringRef
.Case("fsgsbase", HasFSGSBASE)
.Case("fxsr", HasFXSR)
.Case("gfni", HasGFNI)
+ .Case("invpcid", HasINVPCID)
.Case("lwp", HasLWP)
.Case("lzcnt", HasLZCNT)
.Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
Modified: cfe/trunk/lib/Basic/Targets/X86.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.h?rev=333256&r1=333255&r2=333256&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.h (original)
+++ cfe/trunk/lib/Basic/Targets/X86.h Thu May 24 23:34:42 2018
@@ -106,6 +106,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI
bool HasMOVDIRI = false;
bool HasMOVDIR64B = false;
bool HasPTWRITE = false;
+ bool HasINVPCID = false;
protected:
/// Enumeration of all
r334174 - [CodeGen] Improve diagnostics related to target attributes
Author: gbuella
Date: Thu Jun 7 01:48:36 2018
New Revision: 334174
URL: http://llvm.org/viewvc/llvm-project?rev=334174&view=rev
Log:
[CodeGen] Improve diagnostics related to target attributes
Summary:
When requirement imposed by __target__ attributes on functions
are not satisfied, prefer printing those requirements, which
are explicitly mentioned in the attributes.
This makes such messages more useful, e.g. printing avx512f instead of avx2
in the following scenario:
```
$ cat foo.c
static inline void __attribute__((__always_inline__, __target__("avx512f")))
x(void)
{
}
int main(void)
{
x();
}
$ clang foo.c
foo.c:7:2: error: always_inline function 'x' requires target feature 'avx2',
but would be inlined into function 'main' that is compiled without support for
'avx2'
x();
^
1 error generated.
```
bugzilla: https://bugs.llvm.org/show_bug.cgi?id=37338
Reviewers: craig.topper, echristo, dblaikie
Reviewed By: craig.topper, echristo
Differential Revision: https://reviews.llvm.org/D46541
Modified:
cfe/trunk/lib/CodeGen/CodeGenFunction.cpp
cfe/trunk/lib/CodeGen/CodeGenModule.cpp
cfe/trunk/lib/CodeGen/CodeGenModule.h
cfe/trunk/test/CodeGen/target-features-error-2.c
cfe/trunk/test/CodeGen/target-features-error.c
Modified: cfe/trunk/lib/CodeGen/CodeGenFunction.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenFunction.cpp?rev=334174&r1=334173&r2=334174&view=diff
==
--- cfe/trunk/lib/CodeGen/CodeGenFunction.cpp (original)
+++ cfe/trunk/lib/CodeGen/CodeGenFunction.cpp Thu Jun 7 01:48:36 2018
@@ -2330,9 +2330,19 @@ void CodeGenFunction::checkTargetFeature
} else if (TargetDecl->hasAttr()) {
// Get the required features for the callee.
+
+const TargetAttr *TD = TargetDecl->getAttr();
+TargetAttr::ParsedTargetAttr ParsedAttr =
CGM.filterFunctionTargetAttrs(TD);
+
SmallVector ReqFeatures;
llvm::StringMap CalleeFeatureMap;
CGM.getFunctionFeatureMap(CalleeFeatureMap, TargetDecl);
+
+for (const auto &F : ParsedAttr.Features) {
+ if (F[0] == '+' && CalleeFeatureMap.lookup(F.substr(1)))
+ReqFeatures.push_back(StringRef(F).substr(1));
+}
+
for (const auto &F : CalleeFeatureMap) {
// Only positive features are "required".
if (F.getValue())
Modified: cfe/trunk/lib/CodeGen/CodeGenModule.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenModule.cpp?rev=334174&r1=334173&r2=334174&view=diff
==
--- cfe/trunk/lib/CodeGen/CodeGenModule.cpp (original)
+++ cfe/trunk/lib/CodeGen/CodeGenModule.cpp Thu Jun 7 01:48:36 2018
@@ -5033,22 +5033,28 @@ void CodeGenModule::AddVTableTypeMetadat
}
}
+TargetAttr::ParsedTargetAttr CodeGenModule::filterFunctionTargetAttrs(const
TargetAttr *TD) {
+ assert(TD != nullptr);
+ TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse();
+
+ ParsedAttr.Features.erase(
+ llvm::remove_if(ParsedAttr.Features,
+ [&](const std::string &Feat) {
+return !Target.isValidFeatureName(
+StringRef{Feat}.substr(1));
+ }),
+ ParsedAttr.Features.end());
+ return ParsedAttr;
+}
+
+
// Fills in the supplied string map with the set of target features for the
// passed in function.
void CodeGenModule::getFunctionFeatureMap(llvm::StringMap &FeatureMap,
const FunctionDecl *FD) {
StringRef TargetCPU = Target.getTargetOpts().CPU;
if (const auto *TD = FD->getAttr()) {
-// If we have a TargetAttr build up the feature map based on that.
-TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse();
-
-ParsedAttr.Features.erase(
-llvm::remove_if(ParsedAttr.Features,
-[&](const std::string &Feat) {
- return !Target.isValidFeatureName(
- StringRef{Feat}.substr(1));
-}),
-ParsedAttr.Features.end());
+TargetAttr::ParsedTargetAttr ParsedAttr = filterFunctionTargetAttrs(TD);
// Make a copy of the features as passed on the command line into the
// beginning of the additional features from the function to override.
Modified: cfe/trunk/lib/CodeGen/CodeGenModule.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenModule.h?rev=334174&r1=334173&r2=334174&view=diff
==
--- cfe/trunk/lib/CodeGen/CodeGenModule.h (original)
+++ cfe/trunk/lib/CodeGen/CodeGenModule.h Thu Jun 7 01:48:36 2018
@@ -1089,6 +1089,10 @@ public:
/// It's up to you to ensure that this is safe.
void AddDefaultFnAttrs(llvm::Function &F);
+ /// Parses the target attributes passed in, and returns only the ones that
are
+ /// valid feature names.
+ Targ
r335339 - [X86] Lower _mm[256|512]_cmp[.]_mask intrinsics to native llvm IR
Author: gbuella
Date: Fri Jun 22 04:59:16 2018
New Revision: 335339
URL: http://llvm.org/viewvc/llvm-project?rev=335339&view=rev
Log:
[X86] Lower _mm[256|512]_cmp[.]_mask intrinsics to native llvm IR
Summary:
Lowering some vector comparision builtins to fcmp IR instructions.
This ignores the signaling behaviour specified in the predicate
argument of said builtins.
Affected AVX512 builtins:
__builtin_ia32_cmpps128_mask
__builtin_ia32_cmpps256_mask
__builtin_ia32_cmpps512_mask
__builtin_ia32_cmppd128_mask
__builtin_ia32_cmppd256_mask
__builtin_ia32_cmppd512_mask
Reviewers: craig.topper, uriel.k, RKSimon, andrew.w.kaylor, spatel, scanon,
efriedma
Reviewed By: craig.topper, spatel, efriedma
Differential Revision: https://reviews.llvm.org/D45616
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/avx-builtins.c
cfe/trunk/test/CodeGen/avx-cmp-builtins.c
cfe/trunk/test/CodeGen/avx2-builtins.c
cfe/trunk/test/CodeGen/avx512f-builtins.c
cfe/trunk/test/CodeGen/avx512vl-builtins.c
Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=335339&r1=335338&r2=335339&view=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Fri Jun 22 04:59:16 2018
@@ -10120,44 +10120,7 @@ Value *CodeGenFunction::EmitX86BuiltinEx
return Builder.CreateExtractValue(Call, 1);
}
- case X86::BI__builtin_ia32_cmpps128_mask:
- case X86::BI__builtin_ia32_cmpps256_mask:
- case X86::BI__builtin_ia32_cmpps512_mask:
- case X86::BI__builtin_ia32_cmppd128_mask:
- case X86::BI__builtin_ia32_cmppd256_mask:
- case X86::BI__builtin_ia32_cmppd512_mask: {
-unsigned NumElts = Ops[0]->getType()->getVectorNumElements();
-Value *MaskIn = Ops[3];
-Ops.erase(&Ops[3]);
-
-Intrinsic::ID ID;
-switch (BuiltinID) {
-default: llvm_unreachable("Unsupported intrinsic!");
-case X86::BI__builtin_ia32_cmpps128_mask:
- ID = Intrinsic::x86_avx512_mask_cmp_ps_128;
- break;
-case X86::BI__builtin_ia32_cmpps256_mask:
- ID = Intrinsic::x86_avx512_mask_cmp_ps_256;
- break;
-case X86::BI__builtin_ia32_cmpps512_mask:
- ID = Intrinsic::x86_avx512_mask_cmp_ps_512;
- break;
-case X86::BI__builtin_ia32_cmppd128_mask:
- ID = Intrinsic::x86_avx512_mask_cmp_pd_128;
- break;
-case X86::BI__builtin_ia32_cmppd256_mask:
- ID = Intrinsic::x86_avx512_mask_cmp_pd_256;
- break;
-case X86::BI__builtin_ia32_cmppd512_mask:
- ID = Intrinsic::x86_avx512_mask_cmp_pd_512;
- break;
-}
-
-Value *Cmp = Builder.CreateCall(CGM.getIntrinsic(ID), Ops);
-return EmitX86MaskedCompareResult(*this, Cmp, NumElts, MaskIn);
- }
-
- // SSE packed comparison intrinsics
+ // packed comparison intrinsics
case X86::BI__builtin_ia32_cmpeqps:
case X86::BI__builtin_ia32_cmpeqpd:
return getVectorFCmpIR(CmpInst::FCMP_OEQ);
@@ -10185,64 +10148,84 @@ Value *CodeGenFunction::EmitX86BuiltinEx
case X86::BI__builtin_ia32_cmpps:
case X86::BI__builtin_ia32_cmpps256:
case X86::BI__builtin_ia32_cmppd:
- case X86::BI__builtin_ia32_cmppd256: {
+ case X86::BI__builtin_ia32_cmppd256:
+ case X86::BI__builtin_ia32_cmpps128_mask:
+ case X86::BI__builtin_ia32_cmpps256_mask:
+ case X86::BI__builtin_ia32_cmpps512_mask:
+ case X86::BI__builtin_ia32_cmppd128_mask:
+ case X86::BI__builtin_ia32_cmppd256_mask:
+ case X86::BI__builtin_ia32_cmppd512_mask: {
+// Lowering vector comparisons to fcmp instructions, while
+// ignoring signalling behaviour requested
+// ignoring rounding mode requested
+// This is is only possible as long as FENV_ACCESS is not implemented.
+// See also: https://reviews.llvm.org/D45616
+
+// The third argument is the comparison condition, and integer in the
+// range [0, 31]
unsigned CC = cast(Ops[2])->getZExtValue() & 0x1f;
-// If this one of the SSE immediates, we can use native IR.
-if (CC < 8) {
- FCmpInst::Predicate Pred;
- switch (CC) {
- case 0: Pred = FCmpInst::FCMP_OEQ; break;
- case 1: Pred = FCmpInst::FCMP_OLT; break;
- case 2: Pred = FCmpInst::FCMP_OLE; break;
- case 3: Pred = FCmpInst::FCMP_UNO; break;
- case 4: Pred = FCmpInst::FCMP_UNE; break;
- case 5: Pred = FCmpInst::FCMP_UGE; break;
- case 6: Pred = FCmpInst::FCMP_UGT; break;
- case 7: Pred = FCmpInst::FCMP_ORD; break;
- }
- return getVectorFCmpIR(Pred);
+
+// Lowering to IR fcmp instruction.
+// Ignoring requested signaling behaviour,
+// e.g. both _CMP_GT_OS & _CMP_GT_OQ are translated to FCMP_OGT.
+FCmpInst::Predicate Pred;
+switch (CC) {
+case 0x00: Pred = FCmpInst::FCMP_OEQ; break;
+case 0x01: Pred = FCmpInst::FCMP_OLT; break;
+case 0x02: Pred = FCmpInst::FCMP_OLE; break;
+case 0x03: Pred = FCmpInst::FCMP_UNO; break;
+
r329848 - [x86] wbnoinvd intrinsic
Author: gbuella
Date: Wed Apr 11 13:09:09 2018
New Revision: 329848
URL: http://llvm.org/viewvc/llvm-project?rev=329848&view=rev
Log:
[x86] wbnoinvd intrinsic
The WBNOINVD instruction writes back all modified
cache lines in the processor’s internal cache to main memory
but does not invalidate (flush) the internal caches.
Reviewers: craig.topper, zvi, ashlykov
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D43817
Added:
cfe/trunk/lib/Headers/wbnoinvdintrin.h
cfe/trunk/test/CodeGen/builtin-wbnoinvd.c
Modified:
cfe/trunk/docs/ClangCommandLineReference.rst
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/cpuid.h
cfe/trunk/lib/Headers/x86intrin.h
cfe/trunk/test/CodeGen/builtins-x86.c
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/predefined-arch-macros.c
Modified: cfe/trunk/docs/ClangCommandLineReference.rst
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/ClangCommandLineReference.rst?rev=329848&r1=329847&r2=329848&view=diff
==
--- cfe/trunk/docs/ClangCommandLineReference.rst (original)
+++ cfe/trunk/docs/ClangCommandLineReference.rst Wed Apr 11 13:09:09 2018
@@ -2484,6 +2484,8 @@ X86
.. option:: -mvpclmulqdq, -mno-vpclmulqdq
+.. option:: -mwbnoinvd, -mno-wbnoinvd
+
.. option:: -mx87, -m80387, -mno-x87
.. option:: -mxop, -mno-xop
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=329848&r1=329847&r2=329848&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Wed Apr 11 13:09:09 2018
@@ -679,6 +679,9 @@ TARGET_BUILTIN(__builtin_ia32_clflushopt
//CLWB
TARGET_BUILTIN(__builtin_ia32_clwb, "vvC*", "", "clwb")
+//WBNOINVD
+TARGET_BUILTIN(__builtin_ia32_wbnoinvd, "v", "", "wbnoinvd")
+
// ADX
TARGET_BUILTIN(__builtin_ia32_addcarryx_u32, "UcUcUiUiUi*", "", "adx")
TARGET_BUILTIN(__builtin_ia32_addcarry_u32, "UcUcUiUiUi*", "", "")
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=329848&r1=329847&r2=329848&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Apr 11 13:09:09 2018
@@ -2598,6 +2598,8 @@ def mclflushopt : Flag<["-"], "mclflusho
def mno_clflushopt : Flag<["-"], "mno-clflushopt">,
Group;
def mclwb : Flag<["-"], "mclwb">, Group;
def mno_clwb : Flag<["-"], "mno-clwb">, Group;
+def mwbnoinvd : Flag<["-"], "mwbnoinvd">, Group;
+def mno_wbnoinvd : Flag<["-"], "mno-wbnoinvd">, Group;
def mclzero : Flag<["-"], "mclzero">, Group;
def mno_clzero : Flag<["-"], "mno-clzero">, Group;
def mcx16 : Flag<["-"], "mcx16">, Group;
Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=329848&r1=329847&r2=329848&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Wed Apr 11 13:09:09 2018
@@ -154,6 +154,8 @@ bool X86TargetInfo::initFeatureMap(
break;
case CK_IcelakeServer:
+setFeatureEnabledImpl(Features, "wbnoinvd", true);
+LLVM_FALLTHROUGH;
case CK_IcelakeClient:
setFeatureEnabledImpl(Features, "vaes", true);
setFeatureEnabledImpl(Features, "gfni", true);
@@ -792,6 +794,8 @@ bool X86TargetInfo::handleTargetFeatures
HasCLFLUSHOPT = true;
} else if (Feature == "+clwb") {
HasCLWB = true;
+} else if (Feature == "+wbnoinvd") {
+ HasWBNOINVD = true;
} else if (Feature == "+prefetchwt1") {
HasPREFETCHWT1 = true;
} else if (Feature == "+clzero") {
@@ -1134,6 +1138,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__CLFLUSHOPT__");
if (HasCLWB)
Builder.defineMacro("__CLWB__");
+ if (HasWBNOINVD)
+Builder.defineMacro("__WBNOINVD__");
if (HasMPX)
Builder.defineMacro("__MPX__");
if (HasSHSTK)
@@ -1297,6 +1303,7 @@ bool X86TargetInfo::isValidFeatureName(S
.Case("tbm", true)
.Case("vaes", true)
.Case("vpclmulqdq", true)
+ .Case("wbnoinvd", true)
.Case("x87", true)
.Case("xop", true)
.Case("xsave", true)
@@ -1371,6 +1378,7 @@ bool X86TargetInfo::hasFeature(StringRef
.Case("tbm", HasTBM)
.Case("vaes", HasVAES)
.Case("vpclmulqdq", HasVPCLMULQDQ)
+ .Case("wbnoinvd", HasWBNOINVD)
.Case("x86", true)
r329932 - NFC - Indentation fixes in predefined-arch-macros.c
Author: gbuella
Date: Thu Apr 12 11:15:39 2018
New Revision: 329932
URL: http://llvm.org/viewvc/llvm-project?rev=329932&view=rev
Log:
NFC - Indentation fixes in predefined-arch-macros.c
Consistently separating tests with empty lines.
Helps while navigating this file.
Reviewers: craig.topper
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D45561
Modified:
cfe/trunk/test/Preprocessor/predefined-arch-macros.c
Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=329932&r1=329931&r2=329932&view=diff
==
--- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original)
+++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Thu Apr 12 11:15:39
2018
@@ -1,5 +1,5 @@
// Begin X86/GCC/Linux tests
-//
+
// RUN: %clang -march=i386 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I386_M32
@@ -11,7 +11,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I386_M64
// CHECK_I386_M64: error: {{.*}}
-//
+
// RUN: %clang -march=i486 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I486_M32
@@ -25,7 +25,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I486_M64
// CHECK_I486_M64: error: {{.*}}
-//
+
// RUN: %clang -march=i586 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I586_M32
@@ -42,7 +42,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I586_M64
// CHECK_I586_M64: error: {{.*}}
-//
+
// RUN: %clang -march=pentium -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_M32
@@ -59,7 +59,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_M64
// CHECK_PENTIUM_M64: error: {{.*}}
-//
+
// RUN: %clang -march=pentium-mmx -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_MMX_M32
@@ -79,7 +79,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM_MMX_M64
// CHECK_PENTIUM_MMX_M64: error: {{.*}}
-//
+
// RUN: %clang -march=winchip-c6 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP_C6_M32
@@ -94,7 +94,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP_C6_M64
// CHECK_WINCHIP_C6_M64: error: {{.*}}
-//
+
// RUN: %clang -march=winchip2 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP2_M32
@@ -110,7 +110,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_WINCHIP2_M64
// CHECK_WINCHIP2_M64: error: {{.*}}
-//
+
// RUN: %clang -march=c3 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_M32
@@ -126,7 +126,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_M64
// CHECK_C3_M64: error: {{.*}}
-//
+
// RUN: %clang -march=c3-2 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_2_M32
@@ -146,7 +146,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_C3_2_M64
// CHECK_C3_2_M64: error: {{.*}}
-//
+
// RUN: %clang -march=i686 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I686_M32
@@ -163,7 +163,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_I686_M64
// CHECK_I686_M64: error: {{.*}}
-//
+
// RUN: %clang -march=pentiumpro -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUMPRO_M32
@@ -180,7 +180,7 @@
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUMPRO_M64
// CHECK_PENTIUMPRO_M64: error: {{.*}}
-//
+
// RUN: %clang -march=pentium2 -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_PENTIUM2_M
r329937 - [X86] Introduce wbinvd intrinsic
Author: gbuella
Date: Thu Apr 12 11:42:02 2018
New Revision: 329937
URL: http://llvm.org/viewvc/llvm-project?rev=329937&view=rev
Log:
[X86] Introduce wbinvd intrinsic
A previously missing intrinsic for an old instruction.
Reviewers: craig.topper, echristo
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D45311
Added:
cfe/trunk/test/CodeGen/builtin-wbinvd.c (with props)
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/ia32intrin.h
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=329937&r1=329936&r2=329937&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Apr 12 11:42:02 2018
@@ -679,7 +679,8 @@ TARGET_BUILTIN(__builtin_ia32_clflushopt
//CLWB
TARGET_BUILTIN(__builtin_ia32_clwb, "vvC*", "", "clwb")
-//WBNOINVD
+//WB[NO]INVD
+TARGET_BUILTIN(__builtin_ia32_wbinvd, "v", "", "")
TARGET_BUILTIN(__builtin_ia32_wbnoinvd, "v", "", "wbnoinvd")
// ADX
Modified: cfe/trunk/lib/Headers/ia32intrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/ia32intrin.h?rev=329937&r1=329936&r2=329937&view=diff
==
--- cfe/trunk/lib/Headers/ia32intrin.h (original)
+++ cfe/trunk/lib/Headers/ia32intrin.h Thu Apr 12 11:42:02 2018
@@ -70,4 +70,9 @@ __rdtscp(unsigned int *__A) {
#define _rdpmc(A) __rdpmc(A)
+static __inline__ void __attribute__((__always_inline__, __nodebug__))
+_wbinvd(void) {
+ return __builtin_ia32_wbinvd();
+}
+
#endif /* __IA32INTRIN_H */
Added: cfe/trunk/test/CodeGen/builtin-wbinvd.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtin-wbinvd.c?rev=329937&view=auto
==
--- cfe/trunk/test/CodeGen/builtin-wbinvd.c (added)
+++ cfe/trunk/test/CodeGen/builtin-wbinvd.c Thu Apr 12 11:42:02 2018
@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -emit-llvm
-o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown -emit-llvm
-o - -Wall -Werror | FileCheck %s
+
+#include
+
+void test_wbinvd(void) {
+ //CHECK-LABEL: @test_wbinvd
+ //CHECK: call void @llvm.x86.wbinvd()
+ _wbinvd();
+}
Propchange: cfe/trunk/test/CodeGen/builtin-wbinvd.c
--
svn:eol-style = native
Propchange: cfe/trunk/test/CodeGen/builtin-wbinvd.c
--
svn:keywords = Author Date Id Rev URL
Propchange: cfe/trunk/test/CodeGen/builtin-wbinvd.c
--
svn:mime-type = text/plain
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r329995 - [X86] Fix cldemote builtin signature
Author: gbuella Date: Fri Apr 13 01:14:21 2018 New Revision: 329995 URL: http://llvm.org/viewvc/llvm-project?rev=329995&view=rev Log: [X86] Fix cldemote builtin signature Fix for r329993 Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=329995&r1=329994&r2=329995&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Fri Apr 13 01:14:21 2018 @@ -1884,7 +1884,7 @@ TARGET_BUILTIN(__builtin_ia32_mwaitx, "v TARGET_BUILTIN(__builtin_ia32_clzero, "vv*", "", "clzero") // CLDEMOTE -TARGET_BUILTIN(__builtin_ia32_cldemote, "vCv*", "", "cldemote") +TARGET_BUILTIN(__builtin_ia32_cldemote, "vvC*", "", "cldemote") // MSVC TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r329993 - [X86] Introduce cldemote intrinsic
Author: gbuella
Date: Fri Apr 13 00:37:24 2018
New Revision: 329993
URL: http://llvm.org/viewvc/llvm-project?rev=329993&view=rev
Log:
[X86] Introduce cldemote intrinsic
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D45257
Added:
cfe/trunk/lib/Headers/cldemoteintrin.h (with props)
cfe/trunk/test/CodeGen/cldemote.c (with props)
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/cpuid.h
cfe/trunk/lib/Headers/x86intrin.h
cfe/trunk/test/CodeGen/builtins-x86.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=329993&r1=329992&r2=329993&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Fri Apr 13 00:37:24 2018
@@ -1883,6 +1883,9 @@ TARGET_BUILTIN(__builtin_ia32_mwaitx, "v
// CLZERO
TARGET_BUILTIN(__builtin_ia32_clzero, "vv*", "", "clzero")
+// CLDEMOTE
+TARGET_BUILTIN(__builtin_ia32_cldemote, "vCv*", "", "cldemote")
+
// MSVC
TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h",
ALL_MS_LANGUAGES, "")
TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h",
ALL_MS_LANGUAGES, "")
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=329993&r1=329992&r2=329993&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Fri Apr 13 00:37:24 2018
@@ -2599,6 +2599,8 @@ def mbmi : Flag<["-"], "mbmi">, Group, Group;
def mbmi2 : Flag<["-"], "mbmi2">, Group;
def mno_bmi2 : Flag<["-"], "mno-bmi2">, Group;
+def mcldemote : Flag<["-"], "mcldemote">, Group;
+def mno_cldemote : Flag<["-"], "mno-cldemote">, Group;
def mclflushopt : Flag<["-"], "mclflushopt">, Group;
def mno_clflushopt : Flag<["-"], "mno-clflushopt">,
Group;
def mclwb : Flag<["-"], "mclwb">, Group;
Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=329993&r1=329992&r2=329993&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Fri Apr 13 00:37:24 2018
@@ -800,6 +800,8 @@ bool X86TargetInfo::handleTargetFeatures
HasPREFETCHWT1 = true;
} else if (Feature == "+clzero") {
HasCLZERO = true;
+} else if (Feature == "+cldemote") {
+ HasCLDEMOTE = true;
} else if (Feature == "+rdpid") {
HasRDPID = true;
} else if (Feature == "+retpoline") {
@@ -1154,6 +1156,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__CLZERO__");
if (HasRDPID)
Builder.defineMacro("__RDPID__");
+ if (HasCLDEMOTE)
+Builder.defineMacro("__CLDEMOTE__");
// Each case falls through to the previous one here.
switch (SSELevel) {
@@ -1263,6 +1267,7 @@ bool X86TargetInfo::isValidFeatureName(S
.Case("avx512ifma", true)
.Case("bmi", true)
.Case("bmi2", true)
+ .Case("cldemote", true)
.Case("clflushopt", true)
.Case("clwb", true)
.Case("clzero", true)
@@ -1334,6 +1339,7 @@ bool X86TargetInfo::hasFeature(StringRef
.Case("avx512ifma", HasAVX512IFMA)
.Case("bmi", HasBMI)
.Case("bmi2", HasBMI2)
+ .Case("cldemote", HasCLDEMOTE)
.Case("clflushopt", HasCLFLUSHOPT)
.Case("clwb", HasCLWB)
.Case("clzero", HasCLZERO)
Modified: cfe/trunk/lib/Basic/Targets/X86.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.h?rev=329993&r1=329992&r2=329993&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.h (original)
+++ cfe/trunk/lib/Basic/Targets/X86.h Fri Apr 13 00:37:24 2018
@@ -91,6 +91,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI
bool HasXSAVES = false;
bool HasMWAITX = false;
bool HasCLZERO = false;
+ bool HasCLDEMOTE = false;
bool HasPKU = false;
bool HasCLFLUSHOPT = false;
bool HasCLWB = false;
Modified: cfe/trunk/lib/Headers/CMakeLists.txt
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/CMakeLists.txt?rev=329993&r1=329992&r2=329993&view=diff
==
--- cfe/trunk/lib/Headers/CMakeLists.txt (original)
+++ cfe/trunk/lib/Headers/CMakeLists.txt Fri Apr 13 00:37:24 2018
@@ -40,6 +40,7 @@ set(files
__clang_cuda_math_forward_declares.h
__clang_cuda_runtime_wrapper.h
r330110 - [X86] Introduce archs: goldmont-plus & tremont
Author: gbuella Date: Mon Apr 16 01:10:10 2018 New Revision: 330110 URL: http://llvm.org/viewvc/llvm-project?rev=330110&view=rev Log: [X86] Introduce archs: goldmont-plus & tremont Reviewers: craig.topper Reviewed By: craig.topper Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D45613 Modified: cfe/trunk/include/clang/Basic/X86Target.def cfe/trunk/lib/Basic/Targets/X86.cpp cfe/trunk/test/Driver/x86-march.c cfe/trunk/test/Misc/target-invalid-cpu-note.c cfe/trunk/test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/include/clang/Basic/X86Target.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/X86Target.def?rev=330110&r1=330109&r2=330110&view=diff == --- cfe/trunk/include/clang/Basic/X86Target.def (original) +++ cfe/trunk/include/clang/Basic/X86Target.def Mon Apr 16 01:10:10 2018 @@ -104,6 +104,9 @@ PROC_WITH_FEAT(Silvermont, "silvermont", PROC_ALIAS(Silvermont, "slm") PROC(Goldmont, "goldmont", PROC_64_BIT) +PROC(GoldmontPlus, "goldmont-plus", PROC_64_BIT) + +PROC(Tremont, "tremont", PROC_64_BIT) //@} /// \name Nehalem Modified: cfe/trunk/lib/Basic/Targets/X86.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=330110&r1=330109&r2=330110&view=diff == --- cfe/trunk/lib/Basic/Targets/X86.cpp (original) +++ cfe/trunk/lib/Basic/Targets/X86.cpp Mon Apr 16 01:10:10 2018 @@ -244,6 +244,14 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "fxsr", true); break; + case CK_Tremont: +setFeatureEnabledImpl(Features, "cldemote", true); +setFeatureEnabledImpl(Features, "gfni", true); +LLVM_FALLTHROUGH; + case CK_GoldmontPlus: +setFeatureEnabledImpl(Features, "rdpid", true); +setFeatureEnabledImpl(Features, "sgx", true); +LLVM_FALLTHROUGH; case CK_Goldmont: setFeatureEnabledImpl(Features, "sha", true); setFeatureEnabledImpl(Features, "rdseed", true); @@ -930,6 +938,12 @@ void X86TargetInfo::getTargetDefines(con case CK_Goldmont: defineCPUMacros(Builder, "goldmont"); break; + case CK_GoldmontPlus: +defineCPUMacros(Builder, "goldmont_plus"); +break; + case CK_Tremont: +defineCPUMacros(Builder, "tremont"); +break; case CK_Nehalem: case CK_Westmere: case CK_SandyBridge: Modified: cfe/trunk/test/Driver/x86-march.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/x86-march.c?rev=330110&r1=330109&r2=330110&view=diff == --- cfe/trunk/test/Driver/x86-march.c (original) +++ cfe/trunk/test/Driver/x86-march.c Mon Apr 16 01:10:10 2018 @@ -84,6 +84,14 @@ // RUN: | FileCheck %s -check-prefix=goldmont // goldmont: "-target-cpu" "goldmont" // +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=goldmont-plus 2>&1 \ +// RUN: | FileCheck %s -check-prefix=goldmont-plus +// goldmont-plus: "-target-cpu" "goldmont-plus" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=tremont 2>&1 \ +// RUN: | FileCheck %s -check-prefix=tremont +// tremont: "-target-cpu" "tremont" +// // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=k8 2>&1 \ // RUN: | FileCheck %s -check-prefix=k8 // k8: "-target-cpu" "k8" Modified: cfe/trunk/test/Misc/target-invalid-cpu-note.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Misc/target-invalid-cpu-note.c?rev=330110&r1=330109&r2=330110&view=diff == --- cfe/trunk/test/Misc/target-invalid-cpu-note.c (original) +++ cfe/trunk/test/Misc/target-invalid-cpu-note.c Mon Apr 16 01:10:10 2018 @@ -13,7 +13,7 @@ // X86: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3, // X86-SAME: i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, // X86-SAME: pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, -// X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, +// X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, // X86-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, // X86-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, // X86-SAME: skx, cannonlake, icelake-client, icelake-server, knl, knm, lakemont, k6, k6-2, k6-3, @@ -25,7 +25,7 @@ // RUN: not %clang_cc1 -triple x86_64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86_64 // X86_64: error: unknown target CPU 'not-a-cpu' // X86_64: note: valid target CPU values are: nocona, core2, penryn, bonnell, -// X86_64-SAME: atom, silvermont, slm, goldmont, nehalem, corei7, westmere, +// X86_64-SAME: atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, w
r330463 - [X86] WaitPKG intrinsics
Author: gbuella
Date: Fri Apr 20 11:44:33 2018
New Revision: 330463
URL: http://llvm.org/viewvc/llvm-project?rev=330463&view=rev
Log:
[X86] WaitPKG intrinsics
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D45254
Added:
cfe/trunk/lib/Headers/waitpkgintrin.h (with props)
cfe/trunk/test/CodeGen/waitpkg.c (with props)
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/cpuid.h
cfe/trunk/lib/Headers/x86intrin.h
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/predefined-arch-macros.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=330463&r1=330462&r2=330463&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Fri Apr 20 11:44:33 2018
@@ -1880,6 +1880,11 @@ TARGET_BUILTIN(__builtin_ia32_selectpd_5
TARGET_BUILTIN(__builtin_ia32_monitorx, "vv*UiUi", "", "mwaitx")
TARGET_BUILTIN(__builtin_ia32_mwaitx, "vUiUiUi", "", "mwaitx")
+// WAITPKG
+TARGET_BUILTIN(__builtin_ia32_umonitor, "vv*", "", "waitpkg")
+TARGET_BUILTIN(__builtin_ia32_umwait, "UcUiUiUi", "", "waitpkg")
+TARGET_BUILTIN(__builtin_ia32_tpause, "UcUiUiUi", "", "waitpkg")
+
// CLZERO
TARGET_BUILTIN(__builtin_ia32_clzero, "vv*", "", "clzero")
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=330463&r1=330462&r2=330463&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Fri Apr 20 11:44:33 2018
@@ -2680,6 +2680,8 @@ def mvaes : Flag<["-"], "mvaes">, Group<
def mno_vaes : Flag<["-"], "mno-vaes">, Group;
def mvpclmulqdq : Flag<["-"], "mvpclmulqdq">, Group;
def mno_vpclmulqdq : Flag<["-"], "mno-vpclmulqdq">,
Group;
+def mwaitpkg : Flag<["-"], "mwaitpkg">, Group;
+def mno_waitpkg : Flag<["-"], "mno-waitpkg">, Group;
def mxop : Flag<["-"], "mxop">, Group;
def mno_xop : Flag<["-"], "mno-xop">, Group;
def mxsave : Flag<["-"], "mxsave">, Group;
Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=330463&r1=330462&r2=330463&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Fri Apr 20 11:44:33 2018
@@ -247,6 +247,7 @@ bool X86TargetInfo::initFeatureMap(
case CK_Tremont:
setFeatureEnabledImpl(Features, "cldemote", true);
setFeatureEnabledImpl(Features, "gfni", true);
+setFeatureEnabledImpl(Features, "waitpkg", true);
LLVM_FALLTHROUGH;
case CK_GoldmontPlus:
setFeatureEnabledImpl(Features, "rdpid", true);
@@ -818,6 +819,8 @@ bool X86TargetInfo::handleTargetFeatures
HasRetpolineExternalThunk = true;
} else if (Feature == "+sahf") {
HasLAHFSAHF = true;
+} else if (Feature == "+waitpkg") {
+ HasWAITPKG = true;
}
X86SSEEnum Level = llvm::StringSwitch(Feature)
@@ -1172,6 +1175,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__RDPID__");
if (HasCLDEMOTE)
Builder.defineMacro("__CLDEMOTE__");
+ if (HasWAITPKG)
+Builder.defineMacro("__WAITPKG__");
// Each case falls through to the previous one here.
switch (SSELevel) {
@@ -1323,6 +1328,7 @@ bool X86TargetInfo::isValidFeatureName(S
.Case("vaes", true)
.Case("vpclmulqdq", true)
.Case("wbnoinvd", true)
+ .Case("waitpkg", true)
.Case("x87", true)
.Case("xop", true)
.Case("xsave", true)
@@ -1399,6 +1405,7 @@ bool X86TargetInfo::hasFeature(StringRef
.Case("vaes", HasVAES)
.Case("vpclmulqdq", HasVPCLMULQDQ)
.Case("wbnoinvd", HasWBNOINVD)
+ .Case("waitpkg", HasWAITPKG)
.Case("x86", true)
.Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
.Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
Modified: cfe/trunk/lib/Basic/Targets/X86.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.h?rev=330463&r1=330462&r2=330463&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.h (original)
+++ cfe/trunk/lib/Basic/Targets/X86.h Fri Apr 20 11:44:33 2018
@@ -102,6 +102,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI
bool HasRetpolineExternalThunk = false;
bool HasLAHFSAHF = false;
bool HasWBNOINVD = false;
+ bool HasWAITPKG = false;
pr
r331249 - [X86] directstore and movdir64b intrinsics
Author: gbuella Date: Tue May 1 03:05:42 2018 New Revision: 331249 URL: http://llvm.org/viewvc/llvm-project?rev=331249&view=rev Log: [X86] directstore and movdir64b intrinsics Reviewers: spatel, craig.topper, RKSimon Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45984 Added: cfe/trunk/lib/Headers/movdirintrin.h (with props) cfe/trunk/test/CodeGen/builtin-movdir.c (with props) Modified: cfe/trunk/docs/ClangCommandLineReference.rst cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/include/clang/Basic/BuiltinsX86_64.def cfe/trunk/include/clang/Driver/Options.td cfe/trunk/lib/Basic/Targets/X86.cpp cfe/trunk/lib/Basic/Targets/X86.h cfe/trunk/lib/Headers/CMakeLists.txt cfe/trunk/lib/Headers/cpuid.h cfe/trunk/lib/Headers/module.modulemap cfe/trunk/lib/Headers/x86intrin.h cfe/trunk/test/Driver/x86-target-features.c cfe/trunk/test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/docs/ClangCommandLineReference.rst URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/ClangCommandLineReference.rst?rev=331249&r1=331248&r2=331249&view=diff == --- cfe/trunk/docs/ClangCommandLineReference.rst (original) +++ cfe/trunk/docs/ClangCommandLineReference.rst Tue May 1 03:05:42 2018 @@ -2496,6 +2496,10 @@ X86 .. option:: -mmovbe, -mno-movbe +.. option:: -mmovdiri, -mno-movdiri + +.. option:: -mmovdir64b, -mno-movdir64b + .. option:: -mmpx, -mno-mpx .. option:: -mmwaitx, -mno-mwaitx Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=331249&r1=331248&r2=331249&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Tue May 1 03:05:42 2018 @@ -1883,6 +1883,10 @@ TARGET_BUILTIN(__builtin_ia32_clzero, "v // CLDEMOTE TARGET_BUILTIN(__builtin_ia32_cldemote, "vvC*", "", "cldemote") +// Direct Move +TARGET_BUILTIN(__builtin_ia32_directstore_u32, "vUi*Ui", "", "movdiri") +TARGET_BUILTIN(__builtin_ia32_movdir64b, "vv*vC*", "", "movdir64b") + // MSVC TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") Modified: cfe/trunk/include/clang/Basic/BuiltinsX86_64.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86_64.def?rev=331249&r1=331248&r2=331249&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsX86_64.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86_64.def Tue May 1 03:05:42 2018 @@ -94,6 +94,7 @@ TARGET_BUILTIN(__builtin_ia32_cvtsi2sd64 TARGET_BUILTIN(__builtin_ia32_cvtsi2ss64, "V4fV4fLLiIi","","avx512f") TARGET_BUILTIN(__builtin_ia32_cvtusi2sd64, "V2dV2dULLiIi","","avx512f") TARGET_BUILTIN(__builtin_ia32_cvtusi2ss64, "V4fV4fULLiIi","","avx512f") +TARGET_BUILTIN(__builtin_ia32_directstore_u64, "vULi*ULi", "", "movdiri") #undef BUILTIN #undef TARGET_BUILTIN Modified: cfe/trunk/include/clang/Driver/Options.td URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=331249&r1=331248&r2=331249&view=diff == --- cfe/trunk/include/clang/Driver/Options.td (original) +++ cfe/trunk/include/clang/Driver/Options.td Tue May 1 03:05:42 2018 @@ -2660,6 +2660,10 @@ def mlzcnt : Flag<["-"], "mlzcnt">, Grou def mno_lzcnt : Flag<["-"], "mno-lzcnt">, Group; def mmovbe : Flag<["-"], "mmovbe">, Group; def mno_movbe : Flag<["-"], "mno-movbe">, Group; +def mmovdiri : Flag<["-"], "mmovdiri">, Group; +def mno_movdiri : Flag<["-"], "mno-movdiri">, Group; +def mmovdir64b : Flag<["-"], "mmovdir64b">, Group; +def mno_movdir64b : Flag<["-"], "mno-movdir64b">, Group; def mmpx : Flag<["-"], "mmpx">, Group; def mno_mpx : Flag<["-"], "mno-mpx">, Group; def mmwaitx : Flag<["-"], "mmwaitx">, Group; Modified: cfe/trunk/lib/Basic/Targets/X86.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=331249&r1=331248&r2=331249&view=diff == --- cfe/trunk/lib/Basic/Targets/X86.cpp (original) +++ cfe/trunk/lib/Basic/Targets/X86.cpp Tue May 1 03:05:42 2018 @@ -246,6 +246,8 @@ bool X86TargetInfo::initFeatureMap( case CK_Tremont: setFeatureEnabledImpl(Features, "cldemote", true); +setFeatureEnabledImpl(Features, "movdiri", true); +setFeatureEnabledImpl(Features, "movdir64b", true); setFeatureEnabledImpl(Features, "gfni", true); setFeatureEnabledImpl(Features, "waitpkg", true); LLVM_FALLTHROUGH; @@ -821,6 +823,10 @@ bool X86TargetI
r331740 - [x86] Introduce the pconfig intrinsic
Author: gbuella
Date: Mon May 7 23:49:41 2018
New Revision: 331740
URL: http://llvm.org/viewvc/llvm-project?rev=331740&view=rev
Log:
[x86] Introduce the pconfig intrinsic
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D46431
Added:
cfe/trunk/lib/Headers/pconfigintrin.h (with props)
cfe/trunk/test/Headers/pconfigintin.c (with props)
Modified:
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/cpuid.h
cfe/trunk/lib/Headers/module.modulemap
cfe/trunk/lib/Headers/x86intrin.h
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/predefined-arch-macros.c
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=331740&r1=331739&r2=331740&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Mon May 7 23:49:41 2018
@@ -2674,6 +2674,8 @@ def mpku : Flag<["-"], "mpku">, Group, Group;
def mpclmul : Flag<["-"], "mpclmul">, Group;
def mno_pclmul : Flag<["-"], "mno-pclmul">, Group;
+def mpconfig : Flag<["-"], "mpconfig">, Group;
+def mno_pconfig : Flag<["-"], "mno-pconfig">, Group;
def mpopcnt : Flag<["-"], "mpopcnt">, Group;
def mno_popcnt : Flag<["-"], "mno-popcnt">, Group;
def mprefetchwt1 : Flag<["-"], "mprefetchwt1">, Group;
Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=331740&r1=331739&r2=331740&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Mon May 7 23:49:41 2018
@@ -154,6 +154,7 @@ bool X86TargetInfo::initFeatureMap(
break;
case CK_IcelakeServer:
+setFeatureEnabledImpl(Features, "pconfig", true);
setFeatureEnabledImpl(Features, "wbnoinvd", true);
LLVM_FALLTHROUGH;
case CK_IcelakeClient:
@@ -827,6 +828,8 @@ bool X86TargetInfo::handleTargetFeatures
HasMOVDIRI = true;
} else if (Feature == "+movdir64b") {
HasMOVDIR64B = true;
+} else if (Feature == "+pconfig") {
+ HasPCONFIG = true;
}
X86SSEEnum Level = llvm::StringSwitch(Feature)
@@ -1187,6 +1190,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__MOVDIRI__");
if (HasMOVDIR64B)
Builder.defineMacro("__MOVDIR64B__");
+ if (HasPCONFIG)
+Builder.defineMacro("__PCONFIG__");
// Each case falls through to the previous one here.
switch (SSELevel) {
@@ -1316,6 +1321,7 @@ bool X86TargetInfo::isValidFeatureName(S
.Case("mpx", true)
.Case("mwaitx", true)
.Case("pclmul", true)
+ .Case("pconfig", true)
.Case("pku", true)
.Case("popcnt", true)
.Case("prefetchwt1", true)
@@ -1394,6 +1400,7 @@ bool X86TargetInfo::hasFeature(StringRef
.Case("mpx", HasMPX)
.Case("mwaitx", HasMWAITX)
.Case("pclmul", HasPCLMUL)
+ .Case("pconfig", HasPCONFIG)
.Case("pku", HasPKU)
.Case("popcnt", HasPOPCNT)
.Case("prefetchwt1", HasPREFETCHWT1)
Modified: cfe/trunk/lib/Basic/Targets/X86.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.h?rev=331740&r1=331739&r2=331740&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.h (original)
+++ cfe/trunk/lib/Basic/Targets/X86.h Mon May 7 23:49:41 2018
@@ -92,6 +92,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI
bool HasMWAITX = false;
bool HasCLZERO = false;
bool HasCLDEMOTE = false;
+ bool HasPCONFIG = false;
bool HasPKU = false;
bool HasCLFLUSHOPT = false;
bool HasCLWB = false;
Modified: cfe/trunk/lib/Headers/CMakeLists.txt
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/CMakeLists.txt?rev=331740&r1=331739&r2=331740&view=diff
==
--- cfe/trunk/lib/Headers/CMakeLists.txt (original)
+++ cfe/trunk/lib/Headers/CMakeLists.txt Mon May 7 23:49:41 2018
@@ -73,6 +73,7 @@ set(files
opencl-c.h
pkuintrin.h
pmmintrin.h
+ pconfigintrin.h
popcntintrin.h
prfchwintrin.h
rdseedintrin.h
Modified: cfe/trunk/lib/Headers/cpuid.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/cpuid.h?rev=331740&r1=331739&r2=331740&view=diff
==
--- cfe/trunk/lib/Headers/cpuid.h (original)
+++ cfe/trunk/lib/Headers/cpuid.h Mon May 7 23:49:41 2018
@@ -194,6 +194,7 @@
/* Features in %edx for leaf 7 sub-leaf 0 */
#define bit_AVX5124VNNIW 0x0004
#define bit_AVX5124FMAPS 0x0008
+#define bit_PCONF
r331743 - [x86] Introduce the encl[u|s|v] intrinsics
Author: gbuella
Date: Tue May 8 00:12:34 2018
New Revision: 331743
URL: http://llvm.org/viewvc/llvm-project?rev=331743&view=rev
Log:
[x86] Introduce the encl[u|s|v] intrinsics
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D46435
Added:
cfe/trunk/lib/Headers/sgxintrin.h (with props)
cfe/trunk/test/Headers/sgxintrin.c (with props)
Modified:
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/module.modulemap
cfe/trunk/lib/Headers/x86intrin.h
Modified: cfe/trunk/lib/Headers/CMakeLists.txt
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/CMakeLists.txt?rev=331743&r1=331742&r2=331743&view=diff
==
--- cfe/trunk/lib/Headers/CMakeLists.txt (original)
+++ cfe/trunk/lib/Headers/CMakeLists.txt Tue May 8 00:12:34 2018
@@ -78,6 +78,7 @@ set(files
prfchwintrin.h
rdseedintrin.h
rtmintrin.h
+ sgxintrin.h
s390intrin.h
shaintrin.h
smmintrin.h
Modified: cfe/trunk/lib/Headers/module.modulemap
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/module.modulemap?rev=331743&r1=331742&r2=331743&view=diff
==
--- cfe/trunk/lib/Headers/module.modulemap (original)
+++ cfe/trunk/lib/Headers/module.modulemap Tue May 8 00:12:34 2018
@@ -68,6 +68,7 @@ module _Builtin_intrinsics [system] [ext
textual header "waitpkgintrin.h"
textual header "movdirintrin.h"
textual header "pconfigintrin.h"
+textual header "sgxintrin.h"
explicit module mm_malloc {
requires !freestanding
Added: cfe/trunk/lib/Headers/sgxintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/sgxintrin.h?rev=331743&view=auto
==
--- cfe/trunk/lib/Headers/sgxintrin.h (added)
+++ cfe/trunk/lib/Headers/sgxintrin.h Tue May 8 00:12:34 2018
@@ -0,0 +1,70 @@
+/*=== sgxintrin.h - X86 SGX intrinsics configuration ---===
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ *===---===
+ */
+
+#ifndef __X86INTRIN_H
+#error "Never use directly; include instead."
+#endif
+
+#ifndef __SGXINTRIN_H
+#define __SGXINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS \
+ __attribute__((__always_inline__, __nodebug__, __target__("sgx")))
+
+static __inline unsigned int __DEFAULT_FN_ATTRS
+_enclu_u32(unsigned int __leaf, __SIZE_TYPE__ __d[])
+{
+ unsigned int __result;
+ __asm__ ("enclu"
+ : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2])
+ : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2])
+ : "cc");
+ return __result;
+}
+
+static __inline unsigned int __DEFAULT_FN_ATTRS
+_encls_u32(unsigned int __leaf, __SIZE_TYPE__ __d[])
+{
+ unsigned int __result;
+ __asm__ ("encls"
+ : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2])
+ : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2])
+ : "cc");
+ return __result;
+}
+
+static __inline unsigned int __DEFAULT_FN_ATTRS
+_enclv_u32(unsigned int __leaf, __SIZE_TYPE__ __d[])
+{
+ unsigned int __result;
+ __asm__ ("enclv"
+ : "=a" (__result), "=b" (__d[0]), "=c" (__d[1]), "=d" (__d[2])
+ : "a" (__leaf), "b" (__d[0]), "c" (__d[1]), "d" (__d[2])
+ : "cc");
+ return __result;
+}
+
+#undef __DEFAULT_FN_ATTRS
+
+#endif
Propchange: cfe/trunk/lib/Headers/sgxintrin.h
--
svn:eol-style = native
Propchange: cfe/trunk/lib/Headers/sgxintrin.h
--
svn:keywords = Author Date Id Rev URL
Propchange: c
r336243 - NFC - typo fix in test/CodeGen/avx512f-builtins.c
Author: gbuella
Date: Wed Jul 4 01:32:02 2018
New Revision: 336243
URL: http://llvm.org/viewvc/llvm-project?rev=336243&view=rev
Log:
NFC - typo fix in test/CodeGen/avx512f-builtins.c
Modified:
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=336243&r1=336242&r2=336243&view=diff
==
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Wed Jul 4 01:32:02 2018
@@ -2757,12 +2757,12 @@ __m512d test_mm512_maskz_div_round_pd(__
return _mm512_maskz_div_round_pd(__U,__A,__B,_MM_FROUND_TO_NEAREST_INT |
_MM_FROUND_NO_EXC);
}
__m512d test_mm512_div_pd(__m512d __a, __m512d __b) {
- // CHECK-LABLE: @test_mm512_div_pd
+ // CHECK-LABEL: @test_mm512_div_pd
// CHECK: fdiv <8 x double>
return _mm512_div_pd(__a,__b);
}
__m512d test_mm512_mask_div_pd(__m512d __w, __mmask8 __u, __m512d __a, __m512d
__b) {
- // CHECK-LABLE: @test_mm512_mask_div_pd
+ // CHECK-LABEL: @test_mm512_mask_div_pd
// CHECK: fdiv <8 x double> %{{.*}}, %{{.*}}
// CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
return _mm512_mask_div_pd(__w,__u,__a,__b);
___
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r336262 - NFC - Fix typo in test/Layout/itanium-pack-and-align.cpp
Author: gbuella Date: Wed Jul 4 04:21:44 2018 New Revision: 336262 URL: http://llvm.org/viewvc/llvm-project?rev=336262&view=rev Log: NFC - Fix typo in test/Layout/itanium-pack-and-align.cpp Modified: cfe/trunk/test/Layout/itanium-pack-and-align.cpp Modified: cfe/trunk/test/Layout/itanium-pack-and-align.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Layout/itanium-pack-and-align.cpp?rev=336262&r1=336261&r2=336262&view=diff == --- cfe/trunk/test/Layout/itanium-pack-and-align.cpp (original) +++ cfe/trunk/test/Layout/itanium-pack-and-align.cpp Wed Jul 4 04:21:44 2018 @@ -23,4 +23,4 @@ T t; // CHECK-NEXT: 0 | char x // CHECK-NEXT: 1 | int y // CHECK-NEXT:| [sizeof=8, dsize=8, align=8, -// CHECK-NETX:| nvsize=8, nvalign=8] +// CHECK-NEXT:| nvsize=8, nvalign=8] ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r336263 - NFC - Fix typo in test/CodeGenObjC/gnustep2-class.m
Author: gbuella Date: Wed Jul 4 04:26:09 2018 New Revision: 336263 URL: http://llvm.org/viewvc/llvm-project?rev=336263&view=rev Log: NFC - Fix typo in test/CodeGenObjC/gnustep2-class.m Modified: cfe/trunk/test/CodeGenObjC/gnustep2-class.m Modified: cfe/trunk/test/CodeGenObjC/gnustep2-class.m URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGenObjC/gnustep2-class.m?rev=336263&r1=336262&r2=336263&view=diff == --- cfe/trunk/test/CodeGenObjC/gnustep2-class.m (original) +++ cfe/trunk/test/CodeGenObjC/gnustep2-class.m Wed Jul 4 04:26:09 2018 @@ -51,5 +51,5 @@ // And check that we get a pointer to it in the right place // CHECK: @._OBJC_REF_CLASS_X = global // CHECK-SAME: @._OBJC_CLASS_X -// CHECK-SAMEsection "__objc_class_refs" +// CHECK-SAME: section "__objc_class_refs" ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r336264 - NFC - Fix type in builtins-ppc-p9vector.c test
Author: gbuella
Date: Wed Jul 4 04:29:21 2018
New Revision: 336264
URL: http://llvm.org/viewvc/llvm-project?rev=336264&view=rev
Log:
NFC - Fix type in builtins-ppc-p9vector.c test
Modified:
cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
Modified: cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c?rev=336264&r1=336263&r2=336264&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c (original)
+++ cfe/trunk/test/CodeGen/builtins-ppc-p9vector.c Wed Jul 4 04:29:21 2018
@@ -983,7 +983,7 @@ vector bool int test86(void) {
}
vector bool long long test87(void) {
// CHECK-BE: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127)
-// CHECK-BE_NEXT: ret <2 x i64
+// CHECK-BE-NEXT: ret <2 x i64>
// CHECK: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127)
// CHECK-NEXT: ret <2 x i64>
return vec_test_data_class(vda, __VEC_CLASS_FP_NOT_NORMAL);
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r336355 - [X86] Fix some vector cmp builtins - TRUE/FALSE predicates
Author: gbuella
Date: Thu Jul 5 07:26:56 2018
New Revision: 336355
URL: http://llvm.org/viewvc/llvm-project?rev=336355&view=rev
Log:
[X86] Fix some vector cmp builtins - TRUE/FALSE predicates
This patch removes on optimization used with the TRUE/FALSE
predicates, as was suggested in https://reviews.llvm.org/D45616
for r335339.
The optimization was buggy, since r335339 used it also
for *_mask builtins, without actually applying the mask -- the
mask argument was just ignored.
Reviewers: craig.topper, uriel.k, RKSimon, andrew.w.kaylor, spatel, scanon,
efriedma
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D48715
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/avx-builtins.c
cfe/trunk/test/CodeGen/avx512f-builtins.c
cfe/trunk/test/CodeGen/avx512vl-builtins.c
Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=336355&r1=336354&r2=336355&view=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu Jul 5 07:26:56 2018
@@ -10158,43 +10158,38 @@ Value *CodeGenFunction::EmitX86BuiltinEx
// e.g. both _CMP_GT_OS & _CMP_GT_OQ are translated to FCMP_OGT.
FCmpInst::Predicate Pred;
switch (CC) {
-case 0x00: Pred = FCmpInst::FCMP_OEQ; break;
-case 0x01: Pred = FCmpInst::FCMP_OLT; break;
-case 0x02: Pred = FCmpInst::FCMP_OLE; break;
-case 0x03: Pred = FCmpInst::FCMP_UNO; break;
-case 0x04: Pred = FCmpInst::FCMP_UNE; break;
-case 0x05: Pred = FCmpInst::FCMP_UGE; break;
-case 0x06: Pred = FCmpInst::FCMP_UGT; break;
-case 0x07: Pred = FCmpInst::FCMP_ORD; break;
-case 0x08: Pred = FCmpInst::FCMP_UEQ; break;
-case 0x09: Pred = FCmpInst::FCMP_ULT; break;
-case 0x0a: Pred = FCmpInst::FCMP_ULE; break;
-case 0x0c: Pred = FCmpInst::FCMP_ONE; break;
-case 0x0d: Pred = FCmpInst::FCMP_OGE; break;
-case 0x0e: Pred = FCmpInst::FCMP_OGT; break;
-case 0x10: Pred = FCmpInst::FCMP_OEQ; break;
-case 0x11: Pred = FCmpInst::FCMP_OLT; break;
-case 0x12: Pred = FCmpInst::FCMP_OLE; break;
-case 0x13: Pred = FCmpInst::FCMP_UNO; break;
-case 0x14: Pred = FCmpInst::FCMP_UNE; break;
-case 0x15: Pred = FCmpInst::FCMP_UGE; break;
-case 0x16: Pred = FCmpInst::FCMP_UGT; break;
-case 0x17: Pred = FCmpInst::FCMP_ORD; break;
-case 0x18: Pred = FCmpInst::FCMP_UEQ; break;
-case 0x19: Pred = FCmpInst::FCMP_ULT; break;
-case 0x1a: Pred = FCmpInst::FCMP_ULE; break;
-case 0x1c: Pred = FCmpInst::FCMP_ONE; break;
-case 0x1d: Pred = FCmpInst::FCMP_OGE; break;
-case 0x1e: Pred = FCmpInst::FCMP_OGT; break;
-// _CMP_TRUE_UQ, _CMP_TRUE_US produce -1,-1... vector
-// on any input and _CMP_FALSE_OQ, _CMP_FALSE_OS produce 0, 0...
-case 0x0b: // FALSE_OQ
-case 0x1b: // FALSE_OS
- return llvm::Constant::getNullValue(ConvertType(E->getType()));
-case 0x0f: // TRUE_UQ
-case 0x1f: // TRUE_US
- return llvm::Constant::getAllOnesValue(ConvertType(E->getType()));
-
+case 0x00: Pred = FCmpInst::FCMP_OEQ; break;
+case 0x01: Pred = FCmpInst::FCMP_OLT; break;
+case 0x02: Pred = FCmpInst::FCMP_OLE; break;
+case 0x03: Pred = FCmpInst::FCMP_UNO; break;
+case 0x04: Pred = FCmpInst::FCMP_UNE; break;
+case 0x05: Pred = FCmpInst::FCMP_UGE; break;
+case 0x06: Pred = FCmpInst::FCMP_UGT; break;
+case 0x07: Pred = FCmpInst::FCMP_ORD; break;
+case 0x08: Pred = FCmpInst::FCMP_UEQ; break;
+case 0x09: Pred = FCmpInst::FCMP_ULT; break;
+case 0x0a: Pred = FCmpInst::FCMP_ULE; break;
+case 0x0b: Pred = FCmpInst::FCMP_FALSE; break;
+case 0x0c: Pred = FCmpInst::FCMP_ONE; break;
+case 0x0d: Pred = FCmpInst::FCMP_OGE; break;
+case 0x0e: Pred = FCmpInst::FCMP_OGT; break;
+case 0x0f: Pred = FCmpInst::FCMP_TRUE; break;
+case 0x10: Pred = FCmpInst::FCMP_OEQ; break;
+case 0x11: Pred = FCmpInst::FCMP_OLT; break;
+case 0x12: Pred = FCmpInst::FCMP_OLE; break;
+case 0x13: Pred = FCmpInst::FCMP_UNO; break;
+case 0x14: Pred = FCmpInst::FCMP_UNE; break;
+case 0x15: Pred = FCmpInst::FCMP_UGE; break;
+case 0x16: Pred = FCmpInst::FCMP_UGT; break;
+case 0x17: Pred = FCmpInst::FCMP_ORD; break;
+case 0x18: Pred = FCmpInst::FCMP_UEQ; break;
+case 0x19: Pred = FCmpInst::FCMP_ULT; break;
+case 0x1a: Pred = FCmpInst::FCMP_ULE; break;
+case 0x1b: Pred = FCmpInst::FCMP_FALSE; break;
+case 0x1c: Pred = FCmpInst::FCMP_ONE; break;
+case 0x1d: Pred = FCmpInst::FCMP_OGE; break;
+case 0x1e: Pred = FCmpInst::FCMP_OGT; break;
+case 0x1f: Pred = FCmpInst::FCMP_TRUE; break;
default: llvm_unreachable("Unhandled CC");
}
Modified: cfe/trunk/test/CodeGen/avx-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeG
[clang] 9c48c2f - [NFC] - Typo fix in test/CodeGenCXX/runtime-dllstorage.cpp
Author: Gabor Buella Date: 2019-12-12T11:26:54+01:00 New Revision: 9c48c2f9c477007234c5bdad0bc8c0969afa0724 URL: https://github.com/llvm/llvm-project/commit/9c48c2f9c477007234c5bdad0bc8c0969afa0724 DIFF: https://github.com/llvm/llvm-project/commit/9c48c2f9c477007234c5bdad0bc8c0969afa0724.diff LOG: [NFC] - Typo fix in test/CodeGenCXX/runtime-dllstorage.cpp Reviewed By: Jim Differential Revision: https://reviews.llvm.org/D48921 Added: Modified: clang/test/CodeGenCXX/runtime-dllstorage.cpp Removed: diff --git a/clang/test/CodeGenCXX/runtime-dllstorage.cpp b/clang/test/CodeGenCXX/runtime-dllstorage.cpp index c8692b7384be..864a1ab51d65 100644 --- a/clang/test/CodeGenCXX/runtime-dllstorage.cpp +++ b/clang/test/CodeGenCXX/runtime-dllstorage.cpp @@ -1,13 +1,13 @@ // RUN: %clang_cc1 -triple i686-windows-msvc -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-MS -check-prefix CHECK-MS-DYNAMIC // RUN: %clang_cc1 -triple i686-windows-msvc -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-MS -check-prefix CHECK-MS-STATIC -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-NODECL-IA -check-prefix CHECK-DYANMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-NODECL-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT // RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-NODECL-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IMPORT-IA -check-prefix CHECK-DYANMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IMPORT-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT // RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DIMPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-STATIC-IMPORT-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYANMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-IA-CXA-ATEXIT // RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -flto-visibility-public-std -DEXPORT_DECLARATIONS -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-STATIC-IA -check-prefix CHECK-IA-STATIC-CXA-ATEXIT -// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DDECL -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-DECL-IA -check-prefix CHECK-DYANMIC-IA-CXA-ATEXIT +// RUN: %clang_cc1 -triple i686-windows-itanium -std=c++11 -fdeclspec -fms-compatibility -fexceptions -fcxx-exceptions -DDECL -emit-llvm -o - %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix CHECK-IA -check-prefix CHECK-DYNAMIC-IA -check-prefix CHECK-DYNAMIC-DECL-IA -check-prefi
[clang] d8f4991 - [NFC] - Partially revert 9c48c2f9c477007234c
Author: Gabor Buella
Date: 2019-12-12T12:46:17+01:00
New Revision: d8f49912847dd8a589e992e2e07d79ac77e61408
URL:
https://github.com/llvm/llvm-project/commit/d8f49912847dd8a589e992e2e07d79ac77e61408
DIFF:
https://github.com/llvm/llvm-project/commit/d8f49912847dd8a589e992e2e07d79ac77e61408.diff
LOG: [NFC] - Partially revert 9c48c2f9c477007234c
Added:
Modified:
clang/test/CodeGenCXX/runtime-dllstorage.cpp
Removed:
diff --git a/clang/test/CodeGenCXX/runtime-dllstorage.cpp
b/clang/test/CodeGenCXX/runtime-dllstorage.cpp
index 864a1ab51d65..694a9b4ea368 100644
--- a/clang/test/CodeGenCXX/runtime-dllstorage.cpp
+++ b/clang/test/CodeGenCXX/runtime-dllstorage.cpp
@@ -134,7 +134,7 @@ void l() {
// CHECK-DYNAMIC-NODECL-IA-DAG: declare dllimport void
@__cxa_guard_release(i64*)
// CHECK-DYNAMIC-IMPORT-IA-DAG: declare dllimport void
@__cxa_guard_release(i64*)
// CHECK-DYNAMIC-EXPORT-IA-DAG: declare dllimport void
@__cxa_guard_release(i64*)
-// CHECK-DYNAMIC-IA-DAG: declare dllimport void @_ZSt9terminatev()
+// CHECK-DYANMIC-IA-DAG: declare dllimport void @_ZSt9terminatev()
// CHECK-DYNAMIC-NODECL-IA-DAG: declare dso_local void @_ZSt9terminatev()
// CHECK-DYNAMIC-IMPORT-IA-DAG: declare dllimport void @_ZSt9terminatev()
// CHECK-DYNAMIC-EXPORT-IA-DAG: declare dso_local dllexport void
@_ZSt9terminatev()
___
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r329689 - CodeGen tests - typo fixes NFC
Author: gbuella
Date: Tue Apr 10 04:20:05 2018
New Revision: 329689
URL: http://llvm.org/viewvc/llvm-project?rev=329689&view=rev
Log:
CodeGen tests - typo fixes NFC
Modified:
cfe/trunk/test/CodeGen/avx512-reduceMinMaxIntrin.c
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/test/CodeGen/avx512-reduceMinMaxIntrin.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512-reduceMinMaxIntrin.c?rev=329689&r1=329688&r2=329689&view=diff
==
--- cfe/trunk/test/CodeGen/avx512-reduceMinMaxIntrin.c (original)
+++ cfe/trunk/test/CodeGen/avx512-reduceMinMaxIntrin.c Tue Apr 10 04:20:05 2018
@@ -227,7 +227,7 @@ double test_mm512_reduce_max_pd(__m512d
// CHECK: [[TMP6:%.*]] = load <8 x i64>, <8 x i64>* [[__B_ADDR_I_I]], align
64
// CHECK: store <8 x i64> zeroinitializer, <8 x i64>*
[[_COMPOUNDLITERAL_I_I_I]], align 64
// CHECK: [[TMP7:%.*]] = load <8 x i64>, <8 x i64>*
[[_COMPOUNDLITERAL_I_I_I]], align 64
-// CHECK: [[TMP8:%.*]] = icmp sgt <8 x i64> [[TMP5]], [[TMP6]]
+// CHECK: [[TMP8:%.*]] = icmp slt <8 x i64> [[TMP5]], [[TMP6]]
// CHECK: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x
i64> [[TMP6]]
// CHECK: store <8 x i64> [[TMP9]], <8 x i64>* [[__V_ADDR_I]], align 64
// CHECK: [[TMP10:%.*]] = load <8 x i64>, <8 x i64>* [[__V_ADDR_I]], align 64
@@ -242,7 +242,7 @@ double test_mm512_reduce_max_pd(__m512d
// CHECK: [[TMP15:%.*]] = load <8 x i64>, <8 x i64>* [[__B_ADDR_I13_I]],
align 64
// CHECK: store <8 x i64> zeroinitializer, <8 x i64>*
[[_COMPOUNDLITERAL_I_I11_I]], align 64
// CHECK: [[TMP16:%.*]] = load <8 x i64>, <8 x i64>*
[[_COMPOUNDLITERAL_I_I11_I]], align 64
-// CHECK: [[TMP17:%.*]] = icmp sgt <8 x i64> [[TMP14]], [[TMP15]]
+// CHECK: [[TMP17:%.*]] = icmp slt <8 x i64> [[TMP14]], [[TMP15]]
// CHECK: [[TMP18:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP14]], <8
x i64> [[TMP15]]
// CHECK: store <8 x i64> [[TMP18]], <8 x i64>* [[__V_ADDR_I]], align 64
// CHECK: [[TMP19:%.*]] = load <8 x i64>, <8 x i64>* [[__V_ADDR_I]], align 64
@@ -257,14 +257,14 @@ double test_mm512_reduce_max_pd(__m512d
// CHECK: [[TMP24:%.*]] = load <8 x i64>, <8 x i64>* [[__B_ADDR_I10_I]],
align 64
// CHECK: store <8 x i64> zeroinitializer, <8 x i64>*
[[_COMPOUNDLITERAL_I_I8_I]], align 64
// CHECK: [[TMP25:%.*]] = load <8 x i64>, <8 x i64>*
[[_COMPOUNDLITERAL_I_I8_I]], align 64
-// CHECK: [[TMP26:%.*]] = icmp sgt <8 x i64> [[TMP23]], [[TMP24]]
+// CHECK: [[TMP26:%.*]] = icmp slt <8 x i64> [[TMP23]], [[TMP24]]
// CHECK: [[TMP27:%.*]] = select <8 x i1> [[TMP26]], <8 x i64> [[TMP23]], <8
x i64> [[TMP24]]
// CHECK: store <8 x i64> [[TMP27]], <8 x i64>* [[__V_ADDR_I]], align 64
// CHECK: [[TMP28:%.*]] = load <8 x i64>, <8 x i64>* [[__V_ADDR_I]], align 64
// CHECK: [[VECEXT_I:%.*]] = extractelement <8 x i64> [[TMP28]], i32 0
// CHECK: ret i64 [[VECEXT_I]]
long long test_mm512_reduce_min_epi64(__m512i __W){
- return _mm512_reduce_max_epi64(__W);
+ return _mm512_reduce_min_epi64(__W);
}
// CHECK-LABEL: define i64 @test_mm512_reduce_min_epu64(<8 x i64> %__W) #0 {
@@ -294,7 +294,7 @@ long long test_mm512_reduce_min_epi64(__
// CHECK: [[TMP6:%.*]] = load <8 x i64>, <8 x i64>* [[__B_ADDR_I_I]], align
64
// CHECK: store <8 x i64> zeroinitializer, <8 x i64>*
[[_COMPOUNDLITERAL_I_I_I]], align 64
// CHECK: [[TMP7:%.*]] = load <8 x i64>, <8 x i64>*
[[_COMPOUNDLITERAL_I_I_I]], align 64
-// CHECK: [[TMP8:%.*]] = icmp ugt <8 x i64> [[TMP5]], [[TMP6]]
+// CHECK: [[TMP8:%.*]] = icmp ult <8 x i64> [[TMP5]], [[TMP6]]
// CHECK: [[TMP9:%.*]] = select <8 x i1> [[TMP8]], <8 x i64> [[TMP5]], <8 x
i64> [[TMP6]]
// CHECK: store <8 x i64> [[TMP9]], <8 x i64>* [[__V_ADDR_I]], align 64
// CHECK: [[TMP10:%.*]] = load <8 x i64>, <8 x i64>* [[__V_ADDR_I]], align 64
@@ -309,7 +309,7 @@ long long test_mm512_reduce_min_epi64(__
// CHECK: [[TMP15:%.*]] = load <8 x i64>, <8 x i64>* [[__B_ADDR_I13_I]],
align 64
// CHECK: store <8 x i64> zeroinitializer, <8 x i64>*
[[_COMPOUNDLITERAL_I_I11_I]], align 64
// CHECK: [[TMP16:%.*]] = load <8 x i64>, <8 x i64>*
[[_COMPOUNDLITERAL_I_I11_I]], align 64
-// CHECK: [[TMP17:%.*]] = icmp ugt <8 x i64> [[TMP14]], [[TMP15]]
+// CHECK: [[TMP17:%.*]] = icmp ult <8 x i64> [[TMP14]], [[TMP15]]
// CHECK: [[TMP18:%.*]] = select <8 x i1> [[TMP17]], <8 x i64> [[TMP14]], <8
x i64> [[TMP15]]
// CHECK: store <8 x i64> [[TMP18]], <8 x i64>* [[__V_ADDR_I]], align 64
// CHECK: [[TMP19:%.*]] = load <8 x i64>, <8 x i64>* [[__V_ADDR_I]], align 64
@@ -324,14 +324,14 @@ long long test_mm512_reduce_min_epi64(__
// CHECK: [[TMP24:%.*]] = load <8 x i64>, <8 x i64>* [[__B_ADDR_I10_I]],
align 64
// CHECK: store <8 x i64> zeroinitializer, <8 x i64>*
[[_COMPOUNDLITERAL_I_I8_I]], align 64
// CHECK: [[TMP25:%.*]] = load <8 x i64>, <8 x i64>*
[[_COMPOUNDLITERAL_I_I8_I]], align 64
-// CHECK:
r329701 - [X86] Disable SGX for Skylake Server
Author: gbuella Date: Tue Apr 10 07:04:21 2018 New Revision: 329701 URL: http://llvm.org/viewvc/llvm-project?rev=329701&view=rev Log: [X86] Disable SGX for Skylake Server Reviewers: craig.topper, zvi, echristo Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45058 Modified: cfe/trunk/lib/Basic/Targets/X86.cpp Modified: cfe/trunk/lib/Basic/Targets/X86.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=329701&r1=329700&r2=329701&view=diff == --- cfe/trunk/lib/Basic/Targets/X86.cpp (original) +++ cfe/trunk/lib/Basic/Targets/X86.cpp Tue Apr 10 07:04:21 2018 @@ -182,7 +182,8 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "xsavec", true); setFeatureEnabledImpl(Features, "xsaves", true); setFeatureEnabledImpl(Features, "mpx", true); -setFeatureEnabledImpl(Features, "sgx", true); +if (Kind != CK_SkylakeServer) // SKX inherits all SKL features, except SGX + setFeatureEnabledImpl(Features, "sgx", true); setFeatureEnabledImpl(Features, "clflushopt", true); setFeatureEnabledImpl(Features, "rtm", true); LLVM_FALLTHROUGH; ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r329710 - [X86] Disable SGX for Skylake Server - CPP test
Author: gbuella Date: Tue Apr 10 08:03:03 2018 New Revision: 329710 URL: http://llvm.org/viewvc/llvm-project?rev=329710&view=rev Log: [X86] Disable SGX for Skylake Server - CPP test Summary: Fix test case - corresponding to r329701 Reviewers: craig.topper, davezarzycki Reviewed By: davezarzycki Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D45488 Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=329710&r1=329709&r2=329710&view=diff == --- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original) +++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Tue Apr 10 08:03:03 2018 @@ -892,7 +892,7 @@ // CHECK_SKX_M32: #define __RDRND__ 1 // CHECK_SKX_M32: #define __RDSEED__ 1 // CHECK_SKX_M32: #define __RTM__ 1 -// CHECK_SKX_M32: #define __SGX__ 1 +// CHECK_SKX_M32-NOT: #define __SGX__ 1 // CHECK_SKX_M32: #define __SSE2__ 1 // CHECK_SKX_M32: #define __SSE3__ 1 // CHECK_SKX_M32: #define __SSE4_1__ 1 @@ -937,7 +937,7 @@ // CHECK_SKX_M64: #define __RDRND__ 1 // CHECK_SKX_M64: #define __RDSEED__ 1 // CHECK_SKX_M64: #define __RTM__ 1 -// CHECK_SKX_M64: #define __SGX__ 1 +// CHECK_SKX_M64-NOT: #define __SGX__ 1 // CHECK_SKX_M64: #define __SSE2_MATH__ 1 // CHECK_SKX_M64: #define __SSE2__ 1 // CHECK_SKX_M64: #define __SSE3__ 1 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r329741 - [X86] Split up -march=icelake to -client & -server
Author: gbuella Date: Tue Apr 10 11:58:26 2018 New Revision: 329741 URL: http://llvm.org/viewvc/llvm-project?rev=329741&view=rev Log: [X86] Split up -march=icelake to -client & -server Reviewers: craig.topper, zvi, echristo Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45056 Modified: cfe/trunk/include/clang/Basic/X86Target.def cfe/trunk/lib/Basic/Targets/X86.cpp cfe/trunk/test/Driver/x86-march.c cfe/trunk/test/Frontend/x86-target-cpu.c cfe/trunk/test/Misc/target-invalid-cpu-note.c cfe/trunk/test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/include/clang/Basic/X86Target.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/X86Target.def?rev=329741&r1=329740&r2=329741&view=diff == --- cfe/trunk/include/clang/Basic/X86Target.def (original) +++ cfe/trunk/include/clang/Basic/X86Target.def Tue Apr 10 11:58:26 2018 @@ -149,7 +149,11 @@ PROC_WITH_FEAT(Cannonlake, "cannonlake", /// \name Icelake Client /// Icelake client microarchitecture based processors. -PROC(Icelake, "icelake", PROC_64_BIT) +PROC(IcelakeClient, "icelake-client", PROC_64_BIT) + +/// \name Icelake Server +/// Icelake server microarchitecture based processors. +PROC(IcelakeServer, "icelake-server", PROC_64_BIT) /// \name Knights Landing /// Knights Landing processor. Modified: cfe/trunk/lib/Basic/Targets/X86.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=329741&r1=329740&r2=329741&view=diff == --- cfe/trunk/lib/Basic/Targets/X86.cpp (original) +++ cfe/trunk/lib/Basic/Targets/X86.cpp Tue Apr 10 11:58:26 2018 @@ -153,7 +153,8 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "mmx", true); break; - case CK_Icelake: + case CK_IcelakeServer: + case CK_IcelakeClient: setFeatureEnabledImpl(Features, "vaes", true); setFeatureEnabledImpl(Features, "gfni", true); setFeatureEnabledImpl(Features, "vpclmulqdq", true); @@ -932,7 +933,8 @@ void X86TargetInfo::getTargetDefines(con case CK_SkylakeClient: case CK_SkylakeServer: case CK_Cannonlake: - case CK_Icelake: + case CK_IcelakeClient: + case CK_IcelakeServer: // FIXME: Historically, we defined this legacy name, it would be nice to // remove it at some point. We've never exposed fine-grained names for // recent primary x86 CPUs, and we should keep it that way. Modified: cfe/trunk/test/Driver/x86-march.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/x86-march.c?rev=329741&r1=329740&r2=329741&view=diff == --- cfe/trunk/test/Driver/x86-march.c (original) +++ cfe/trunk/test/Driver/x86-march.c Tue Apr 10 11:58:26 2018 @@ -60,9 +60,13 @@ // RUN: | FileCheck %s -check-prefix=cannonlake // cannonlake: "-target-cpu" "cannonlake" // -// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=icelake 2>&1 \ -// RUN: | FileCheck %s -check-prefix=icelake -// icelake: "-target-cpu" "icelake" +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=icelake-client 2>&1 \ +// RUN: | FileCheck %s -check-prefix=icelake-client +// icelake-client: "-target-cpu" "icelake-client" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=icelake-server 2>&1 \ +// RUN: | FileCheck %s -check-prefix=icelake-server +// icelake-server: "-target-cpu" "icelake-server" // // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=lakemont 2>&1 \ // RUN: | FileCheck %s -check-prefix=lakemont Modified: cfe/trunk/test/Frontend/x86-target-cpu.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Frontend/x86-target-cpu.c?rev=329741&r1=329740&r2=329741&view=diff == --- cfe/trunk/test/Frontend/x86-target-cpu.c (original) +++ cfe/trunk/test/Frontend/x86-target-cpu.c Tue Apr 10 11:58:26 2018 @@ -13,7 +13,8 @@ // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu skylake-avx512 -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu skx -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu cannonlake -verify %s -// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu icelake -verify %s +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu icelake-client -verify %s +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu icelake-server -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu knl -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu knm -verify %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu bonnell -verify %s Modified: cfe/trunk/test/Misc/target-invalid-cpu-note.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/
