Author: gbuella Date: Thu May 24 23:34:42 2018 New Revision: 333256 URL: http://llvm.org/viewvc/llvm-project?rev=333256&view=rev Log: [x86] invpcid intrinsic
An intrinsic for an old instruction, as described in the Intel SDM. Reviewers: craig.topper, rnk Reviewed By: craig.topper, rnk Differential Revision: https://reviews.llvm.org/D47142 Added: cfe/trunk/lib/Headers/invpcidintrin.h (with props) cfe/trunk/test/CodeGen/invpcid.c (with props) Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/include/clang/Driver/Options.td cfe/trunk/lib/Basic/Targets/X86.cpp cfe/trunk/lib/Basic/Targets/X86.h cfe/trunk/lib/Headers/CMakeLists.txt cfe/trunk/lib/Headers/cpuid.h cfe/trunk/lib/Headers/immintrin.h cfe/trunk/lib/Headers/module.modulemap cfe/trunk/test/Driver/x86-target-features.c cfe/trunk/test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu May 24 23:34:42 2018 @@ -1867,6 +1867,9 @@ TARGET_BUILTIN(__builtin_ia32_movdir64b, // PTWRITE TARGET_BUILTIN(__builtin_ia32_ptwrite32, "vUi", "n", "ptwrite") +// INVPCID +TARGET_BUILTIN(__builtin_ia32_invpcid, "vUiv*", "nc", "invpcid") + // MSVC TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "") Modified: cfe/trunk/include/clang/Driver/Options.td URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/include/clang/Driver/Options.td (original) +++ cfe/trunk/include/clang/Driver/Options.td Thu May 24 23:34:42 2018 @@ -2685,6 +2685,8 @@ def mfsgsbase : Flag<["-"], "mfsgsbase"> def mno_fsgsbase : Flag<["-"], "mno-fsgsbase">, Group<m_x86_Features_Group>; def mfxsr : Flag<["-"], "mfxsr">, Group<m_x86_Features_Group>; def mno_fxsr : Flag<["-"], "mno-fxsr">, Group<m_x86_Features_Group>; +def minvpcid : Flag<["-"], "minvpcid">, Group<m_x86_Features_Group>; +def mno_invpcid : Flag<["-"], "mno-invpcid">, Group<m_x86_Features_Group>; def mgfni : Flag<["-"], "mgfni">, Group<m_x86_Features_Group>; def mno_gfni : Flag<["-"], "mno-gfni">, Group<m_x86_Features_Group>; def mlwp : Flag<["-"], "mlwp">, Group<m_x86_Features_Group>; Modified: cfe/trunk/lib/Basic/Targets/X86.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/lib/Basic/Targets/X86.cpp (original) +++ cfe/trunk/lib/Basic/Targets/X86.cpp Thu May 24 23:34:42 2018 @@ -182,6 +182,7 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "bmi", true); setFeatureEnabledImpl(Features, "bmi2", true); setFeatureEnabledImpl(Features, "fma", true); + setFeatureEnabledImpl(Features, "invpcid", true); setFeatureEnabledImpl(Features, "movbe", true); LLVM_FALLTHROUGH; case CK_IvyBridge: @@ -811,6 +812,8 @@ bool X86TargetInfo::handleTargetFeatures HasPCONFIG = true; } else if (Feature == "+ptwrite") { HasPTWRITE = true; + } else if (Feature == "+invpcid") { + HasINVPCID = true; } X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature) @@ -1173,6 +1176,8 @@ void X86TargetInfo::getTargetDefines(con Builder.defineMacro("__PCONFIG__"); if (HasPTWRITE) Builder.defineMacro("__PTWRITE__"); + if (HasINVPCID) + Builder.defineMacro("__INVPCID__"); // Each case falls through to the previous one here. switch (SSELevel) { @@ -1293,6 +1298,7 @@ bool X86TargetInfo::isValidFeatureName(S .Case("fsgsbase", true) .Case("fxsr", true) .Case("gfni", true) + .Case("invpcid", true) .Case("lwp", true) .Case("lzcnt", true) .Case("mmx", true) @@ -1370,6 +1376,7 @@ bool X86TargetInfo::hasFeature(StringRef .Case("fsgsbase", HasFSGSBASE) .Case("fxsr", HasFXSR) .Case("gfni", HasGFNI) + .Case("invpcid", HasINVPCID) .Case("lwp", HasLWP) .Case("lzcnt", HasLZCNT) .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow) Modified: cfe/trunk/lib/Basic/Targets/X86.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.h?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/lib/Basic/Targets/X86.h (original) +++ cfe/trunk/lib/Basic/Targets/X86.h Thu May 24 23:34:42 2018 @@ -106,6 +106,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI bool HasMOVDIRI = false; bool HasMOVDIR64B = false; bool HasPTWRITE = false; + bool HasINVPCID = false; protected: /// Enumeration of all of the X86 CPUs supported by Clang. Modified: cfe/trunk/lib/Headers/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/CMakeLists.txt?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/lib/Headers/CMakeLists.txt (original) +++ cfe/trunk/lib/Headers/CMakeLists.txt Thu May 24 23:34:42 2018 @@ -58,6 +58,7 @@ set(files immintrin.h intrin.h inttypes.h + invpcidintrin.h iso646.h limits.h lwpintrin.h Modified: cfe/trunk/lib/Headers/cpuid.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/cpuid.h?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/lib/Headers/cpuid.h (original) +++ cfe/trunk/lib/Headers/cpuid.h Thu May 24 23:34:42 2018 @@ -156,6 +156,7 @@ #define bit_SMEP 0x00000080 #define bit_BMI2 0x00000100 #define bit_ENH_MOVSB 0x00000200 +#define bit_INVPCID 0x00000400 #define bit_RTM 0x00000800 #define bit_MPX 0x00004000 #define bit_AVX512F 0x00010000 Modified: cfe/trunk/lib/Headers/immintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/immintrin.h?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/lib/Headers/immintrin.h (original) +++ cfe/trunk/lib/Headers/immintrin.h Thu May 24 23:34:42 2018 @@ -376,4 +376,8 @@ _writegsbase_u64(unsigned long long __V) #include <ptwriteintrin.h> #endif +#if !defined(_MSC_VER) || __has_feature(modules) || defined(__INVPCID__) +#include <invpcidintrin.h> +#endif + #endif /* __IMMINTRIN_H */ Added: cfe/trunk/lib/Headers/invpcidintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/invpcidintrin.h?rev=333256&view=auto ============================================================================== --- cfe/trunk/lib/Headers/invpcidintrin.h (added) +++ cfe/trunk/lib/Headers/invpcidintrin.h Thu May 24 23:34:42 2018 @@ -0,0 +1,37 @@ +/*===------------- invpcidintrin.h - INVPCID intrinsic ---------------------=== + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + *===-----------------------------------------------------------------------=== + */ + +#ifndef __IMMINTRIN_H +#error "Never use <invpcidintrin.h> directly; include <immintrin.h> instead." +#endif + +#ifndef __INVPCIDINTRIN_H +#define __INVPCIDINTRIN_H + +static __inline__ void + __attribute__((__always_inline__, __nodebug__, __target__("invpcid"))) +_invpcid(unsigned int __type, void *__descriptor) { + __builtin_ia32_invpcid(__type, __descriptor); +} + +#endif /* __INVPCIDINTRIN_H */ Propchange: cfe/trunk/lib/Headers/invpcidintrin.h ------------------------------------------------------------------------------ svn:eol-style = native Propchange: cfe/trunk/lib/Headers/invpcidintrin.h ------------------------------------------------------------------------------ svn:keywords = Author Date Id Rev URL Propchange: cfe/trunk/lib/Headers/invpcidintrin.h ------------------------------------------------------------------------------ svn:mime-type = text/plain Modified: cfe/trunk/lib/Headers/module.modulemap URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/module.modulemap?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/lib/Headers/module.modulemap (original) +++ cfe/trunk/lib/Headers/module.modulemap Thu May 24 23:34:42 2018 @@ -70,6 +70,7 @@ module _Builtin_intrinsics [system] [ext textual header "pconfigintrin.h" textual header "sgxintrin.h" textual header "ptwriteintrin.h" + textual header "invpcidintrin.h" textual header "__wmmintrin_aes.h" textual header "__wmmintrin_pclmul.h" Added: cfe/trunk/test/CodeGen/invpcid.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/invpcid.c?rev=333256&view=auto ============================================================================== --- cfe/trunk/test/CodeGen/invpcid.c (added) +++ cfe/trunk/test/CodeGen/invpcid.c Thu May 24 23:34:42 2018 @@ -0,0 +1,12 @@ +// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +invpcid -emit-llvm -o - -Wall -Werror -pedantic | FileCheck %s +// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown -target-feature +invpcid -emit-llvm -o - -Wall -Werror -pedantic | FileCheck %s + +#include <immintrin.h> + +#include <stdint.h> + +void test_invpcid(uint32_t type, void *descriptor) { + //CHECK-LABEL: @test_invpcid + //CHECK: call void @llvm.x86.invpcid(i32 %{{.*}}, i8* %{{.*}}) + _invpcid(type, descriptor); +} Propchange: cfe/trunk/test/CodeGen/invpcid.c ------------------------------------------------------------------------------ svn:eol-style = native Propchange: cfe/trunk/test/CodeGen/invpcid.c ------------------------------------------------------------------------------ svn:keywords = Author Date Id Rev URL Propchange: cfe/trunk/test/CodeGen/invpcid.c ------------------------------------------------------------------------------ svn:mime-type = text/plain Modified: cfe/trunk/test/Driver/x86-target-features.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/x86-target-features.c?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/test/Driver/x86-target-features.c (original) +++ cfe/trunk/test/Driver/x86-target-features.c Thu May 24 23:34:42 2018 @@ -164,3 +164,8 @@ // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-ptwrite %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-PTWRITE %s // PTWRITE: "-target-feature" "+ptwrite" // NO-PTWRITE: "-target-feature" "-ptwrite" + +// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -minvpcid %s -### -o %t.o 2>&1 | FileCheck -check-prefix=INVPCID %s +// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-invpcid %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-INVPCID %s +// INVPCID: "-target-feature" "+invpcid" +// NO-INVPCID: "-target-feature" "-invpcid" Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=333256&r1=333255&r2=333256&view=diff ============================================================================== --- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original) +++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Thu May 24 23:34:42 2018 @@ -526,6 +526,7 @@ // CHECK_CORE_AVX2_M32: #define __BMI__ 1 // CHECK_CORE_AVX2_M32: #define __F16C__ 1 // CHECK_CORE_AVX2_M32: #define __FMA__ 1 +// CHECK_CORE_AVX2_M32: #define __INVPCID__ 1 // CHECK_CORE_AVX2_M32: #define __LZCNT__ 1 // CHECK_CORE_AVX2_M32: #define __MMX__ 1 // CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1 @@ -556,6 +557,7 @@ // CHECK_CORE_AVX2_M64: #define __BMI__ 1 // CHECK_CORE_AVX2_M64: #define __F16C__ 1 // CHECK_CORE_AVX2_M64: #define __FMA__ 1 +// CHECK_CORE_AVX2_M64: #define __INVPCID__ 1 // CHECK_CORE_AVX2_M64: #define __LZCNT__ 1 // CHECK_CORE_AVX2_M64: #define __MMX__ 1 // CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1 @@ -590,6 +592,7 @@ // CHECK_BROADWELL_M32: #define __BMI__ 1 // CHECK_BROADWELL_M32: #define __F16C__ 1 // CHECK_BROADWELL_M32: #define __FMA__ 1 +// CHECK_BROADWELL_M32: #define __INVPCID__ 1 // CHECK_BROADWELL_M32: #define __LZCNT__ 1 // CHECK_BROADWELL_M32: #define __MMX__ 1 // CHECK_BROADWELL_M32: #define __PCLMUL__ 1 @@ -623,6 +626,7 @@ // CHECK_BROADWELL_M64: #define __BMI__ 1 // CHECK_BROADWELL_M64: #define __F16C__ 1 // CHECK_BROADWELL_M64: #define __FMA__ 1 +// CHECK_BROADWELL_M64: #define __INVPCID__ 1 // CHECK_BROADWELL_M64: #define __LZCNT__ 1 // CHECK_BROADWELL_M64: #define __MMX__ 1 // CHECK_BROADWELL_M64: #define __PCLMUL__ 1 @@ -660,6 +664,7 @@ // CHECK_SKL_M32: #define __CLFLUSHOPT__ 1 // CHECK_SKL_M32: #define __F16C__ 1 // CHECK_SKL_M32: #define __FMA__ 1 +// CHECK_SKL_M32: #define __INVPCID__ 1 // CHECK_SKL_M32: #define __LZCNT__ 1 // CHECK_SKL_M32: #define __MMX__ 1 // CHECK_SKL_M32: #define __MPX__ 1 @@ -694,6 +699,7 @@ // CHECK_SKL_M64: #define __CLFLUSHOPT__ 1 // CHECK_SKL_M64: #define __F16C__ 1 // CHECK_SKL_M64: #define __FMA__ 1 +// CHECK_SKL_M64: #define __INVPCID__ 1 // CHECK_SKL_M64: #define __LZCNT__ 1 // CHECK_SKL_M64: #define __MMX__ 1 // CHECK_SKL_M64: #define __MPX__ 1 @@ -888,6 +894,7 @@ // CHECK_SKX_M32: #define __CLWB__ 1 // CHECK_SKX_M32: #define __F16C__ 1 // CHECK_SKX_M32: #define __FMA__ 1 +// CHECK_SKX_M32: #define __INVPCID__ 1 // CHECK_SKX_M32: #define __LZCNT__ 1 // CHECK_SKX_M32: #define __MMX__ 1 // CHECK_SKX_M32: #define __MPX__ 1 @@ -933,6 +940,7 @@ // CHECK_SKX_M64: #define __CLWB__ 1 // CHECK_SKX_M64: #define __F16C__ 1 // CHECK_SKX_M64: #define __FMA__ 1 +// CHECK_SKX_M64: #define __INVPCID__ 1 // CHECK_SKX_M64: #define __LZCNT__ 1 // CHECK_SKX_M64: #define __MMX__ 1 // CHECK_SKX_M64: #define __MPX__ 1 @@ -983,6 +991,7 @@ // CHECK_CNL_M32-NOT: #define __CLWB__ 1 // CHECK_CNL_M32: #define __F16C__ 1 // CHECK_CNL_M32: #define __FMA__ 1 +// CHECK_CNL_M32: #define __INVPCID__ 1 // CHECK_CNL_M32: #define __LZCNT__ 1 // CHECK_CNL_M32: #define __MMX__ 1 // CHECK_CNL_M32: #define __MPX__ 1 @@ -1031,6 +1040,7 @@ // CHECK_CNL_M64-NOT: #define __CLWB__ 1 // CHECK_CNL_M64: #define __F16C__ 1 // CHECK_CNL_M64: #define __FMA__ 1 +// CHECK_CNL_M64: #define __INVPCID__ 1 // CHECK_CNL_M64: #define __LZCNT__ 1 // CHECK_CNL_M64: #define __MMX__ 1 // CHECK_CNL_M64: #define __MPX__ 1 @@ -1085,6 +1095,7 @@ // CHECK_ICL_M32: #define __F16C__ 1 // CHECK_ICL_M32: #define __FMA__ 1 // CHECK_ICL_M32: #define __GFNI__ 1 +// CHECK_ICL_M32: #define __INVPCID__ 1 // CHECK_ICL_M32: #define __LZCNT__ 1 // CHECK_ICL_M32: #define __MMX__ 1 // CHECK_ICL_M32: #define __MPX__ 1 @@ -1142,6 +1153,7 @@ // CHECK_ICL_M64: #define __F16C__ 1 // CHECK_ICL_M64: #define __FMA__ 1 // CHECK_ICL_M64: #define __GFNI__ 1 +// CHECK_ICL_M64: #define __INVPCID__ 1 // CHECK_ICL_M64: #define __LZCNT__ 1 // CHECK_ICL_M64: #define __MMX__ 1 // CHECK_ICL_M64: #define __MPX__ 1 @@ -1200,6 +1212,7 @@ // CHECK_ICX_M32: #define __F16C__ 1 // CHECK_ICX_M32: #define __FMA__ 1 // CHECK_ICX_M32: #define __GFNI__ 1 +// CHECK_ICX_M32: #define __INVPCID__ 1 // CHECK_ICX_M32: #define __LZCNT__ 1 // CHECK_ICX_M32: #define __MMX__ 1 // CHECK_ICX_M32: #define __MPX__ 1 @@ -1258,6 +1271,7 @@ // CHECK_ICX_M64: #define __F16C__ 1 // CHECK_ICX_M64: #define __FMA__ 1 // CHECK_ICX_M64: #define __GFNI__ 1 +// CHECK_ICX_M64: #define __INVPCID__ 1 // CHECK_ICX_M64: #define __LZCNT__ 1 // CHECK_ICX_M64: #define __MMX__ 1 // CHECK_ICX_M64: #define __MPX__ 1 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org 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