[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/131070
>From 81196e016dbf1209637dd13315efff7eac461d42 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Fri, 14 Mar 2025 00:24:26 +
Subject: [PATCH 1/3] Implement ResMayNotAlias DXIL shader flag analysis
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
clang/test/CodeGenHLSL/res-may-alias.hlsl | 7 +++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 43 ---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++-
.../DirectX/ShaderFlags/res-may-alias-0.ll| 39 +
.../DirectX/ShaderFlags/res-may-alias-1.ll| 37
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
.../typed-uav-load-additional-formats.ll | 9 ++--
12 files changed, 210 insertions(+), 12 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/res-may-alias.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index 66ae8f1c7f064..9c5fd2354f95e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9043,6 +9043,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 5916fa6183a27..6fd8bc295e8ca 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -283,10 +283,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fe172d923ac07..9be3939641cfc 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3959,6 +3959,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/clang/test/CodeGenHLSL/res-may-alias.hlsl
b/clang/test/CodeGenHLSL/res-may-alias.hlsl
new file mode 100644
index 0..53ee8ee4935d8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/res-may-alias.hlsl
@@ -0,0 +1,7 @@
+// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [NFC][HLSL][RootSignature] Make the Lexer adhere to naming conventions (PR #134136)
https://github.com/Icohedron approved this pull request. https://github.com/llvm/llvm-project/pull/134136 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Add target builtins (PR #134439)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134439 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Add target builtins (PR #134439)
https://github.com/Icohedron approved this pull request. I like this change. It helps makes implementing builtins more consistent between SPIR-V and DirectX/DXIL https://github.com/llvm/llvm-project/pull/134439 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Add target builtins (PR #134439)
@@ -0,0 +1,23 @@
+//===- SemaDirectX.cpp - Semantic Analysis for DirectX
constructs--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+// This implements Semantic Analysis for DirectX constructs.
+//===--===//
+
+#include "clang/Sema/SemaDirectX.h"
+#include "clang/Basic/TargetBuiltins.h"
+#include "clang/Sema/Sema.h"
+
+namespace clang {
+
+SemaDirectX::SemaDirectX(Sema &S) : SemaBase(S) {}
+
+bool SemaDirectX::CheckDirectXBuiltinFunctionCall(unsigned BuiltinID,
+ CallExpr *TheCall) {
+ return false;
Icohedron wrote:
In that case, I think that if we want to add empty switch cases for this then
it should be a separate PR to change it for all other the other builtins at
once.
https://github.com/llvm/llvm-project/pull/134439
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[clang] [llvm] [DirectX] Add target builtins (PR #134439)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134439 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -101,6 +101,16 @@ constexpr vector smoothstep_vec_impl(vector
Min, vector Max,
#endif
}
+template constexpr vector lit_impl(T NDotL, T NDotH, T M) {
+ bool DiffuseCond = NDotL < 0;
+ T Diffuse = select(DiffuseCond, 0, NDotL);
+ vector Result = {1, Diffuse, 0, 1};
+ bool SpecularCond = or (DiffuseCond, (NDotH < 0));
Icohedron wrote:
```suggestion
bool SpecularCond = or(DiffuseCond, (NDotH < 0));
```
clang-format adds an undesirable space here. This will eventually be fixed but
you should remove it manually for now.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -280,6 +280,22 @@ constexpr bool4 isinf(double4 V) { return
isinf((float4)V); }
_DXC_COMPAT_TERNARY_DOUBLE_OVERLOADS(lerp)
_DXC_COMPAT_TERNARY_INTEGER_OVERLOADS(lerp)
+//===--===//
+// lit builtins overloads
+//===--===//
+
+template
+constexpr __detail::enable_if_t<__detail::is_arithmetic::Value &&
+(__detail::is_same::value ||
Icohedron wrote:
> ^ Since bool is arithmetic, both of these options would allow bool inputs to
> pass. I checked the [DXC implementation](https://godbolt.org/z/Eb3vTdvvG) and
> I guess it technically accepts bool types and casts them down to float. But
> is that something we want to be mimicking?
>
> As for checking just `__detail::is_arithmetic`, this produces a `call to
> 'lit' is ambiguous` error. So if we want to do this I think it would have to
> be checking not half or float too.
Thinking back on the handling of this ambiguity, I change my mind. I don't
think trying to hack the implementation to mimic DXC is the right decision. It
should be better to accept that the program will not compile when the method
resolution is ambiguous. This is the stance we have adopted for handling
ambiguous overload resolution. See [hlsl spec proposal
0020](https://github.com/microsoft/hlsl-specs/blob/63c6a33d4be91e1617d662b61be79a16693db504/proposals/0020-hlsl-202x-202y.md?plain=1#L95-L100):
> [Clang] HLSL's overload best-match algorithm ... will produce ambiguous
> resolution errors instead of potentially
choosing an unexpected overload when ambiguity exists in the source.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
Icohedron wrote: In my opinion, we should just define `lit` without templates, thereby following Clang's overload resolution rules and allowing implicit vector truncation. Overload resolution and implicit vector truncation are behaviors that should be consistent across the language. To me, it feels wrong to have special-case behavior on language-defining features implemented/overridden on a per-function basis. Implicit vector truncation is also an area that needs addressing as a problem with the language, rather than being a special-case behavior handled by each function's implementation. Again, a compiler warning would go a long way to addressing problems where implicit truncation may not be intended by the programmer. ``` warning: implicit truncation of vector type [-Wconversion] ``` Or maybe implicit truncation should be removed from the language entirely (for 202y perhaps)? If you can make the behavior consistent with DXC under all cases with some special implementation in hlsl_compat_overloads for 202x, then you can do that, but I don't think we should be writing an implementation that matches DXC now and then rewrite it entirely again when we swap to 202y that makes the language more consistent (which is one of our goals for HLSL's future, right?) https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -280,6 +280,22 @@ constexpr bool4 isinf(double4 V) { return
isinf((float4)V); }
_DXC_COMPAT_TERNARY_DOUBLE_OVERLOADS(lerp)
_DXC_COMPAT_TERNARY_INTEGER_OVERLOADS(lerp)
+//===--===//
+// lit builtins overloads
+//===--===//
+
+template
+constexpr __detail::enable_if_t<__detail::is_arithmetic::Value &&
+(__detail::is_same::value ||
Icohedron wrote:
I don't understand why `lit(bool,bool,bool)` isn't ambiguous.
C++ doesn't have half types, but defining two functions
`lit(float,float,float)` and `lit(double,double,double)` and then calling
`lit(bool,bool,bool)` results in a compilation error `error: call to 'lit' is
ambiguous` as seen here: https://godbolt.org/z/Y3ThTfEs9
Is there special case handling for overload resolution implemented for HLSL?
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -280,6 +280,22 @@ constexpr bool4 isinf(double4 V) { return
isinf((float4)V); }
_DXC_COMPAT_TERNARY_DOUBLE_OVERLOADS(lerp)
_DXC_COMPAT_TERNARY_INTEGER_OVERLOADS(lerp)
+//===--===//
+// lit builtins overloads
+//===--===//
+
+template
+constexpr __detail::enable_if_t<__detail::is_arithmetic::Value &&
+(__detail::is_same::value ||
Icohedron wrote:
It actually is ambiguous and there isn't special-case handling for overload
resolution for HLSL under Clang. I was confused because earlier I thought it
was said that defining lit without using templates eliminated the ambiguous
call error. I can see that it actually does not eliminate the ambiguous call
error: see https://hlsl.godbolt.org/z/KxMYe877x
```c++
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
const inline half4 lit(half A, half B, half M) { return lit_impl(A, B, M); }
const inline float4 lit(float A, float B, float M) { return lit_impl(A, B, M); }
export float4 test(bool A, bool B, bool C) {
return lit(A,B,C);
}
```
Clang HLSL fails to compile this program and reports an ambiguous call to lit:
```
:19:12: error: call to 'lit' is ambiguous
19 | return lit(A,B,C);
|
```
https://github.com/llvm/llvm-project/pull/134171
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[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/131070
>From 81196e016dbf1209637dd13315efff7eac461d42 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Fri, 14 Mar 2025 00:24:26 +
Subject: [PATCH 1/8] Implement ResMayNotAlias DXIL shader flag analysis
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
clang/test/CodeGenHLSL/res-may-alias.hlsl | 7 +++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 43 ---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++-
.../DirectX/ShaderFlags/res-may-alias-0.ll| 39 +
.../DirectX/ShaderFlags/res-may-alias-1.ll| 37
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
.../typed-uav-load-additional-formats.ll | 9 ++--
12 files changed, 210 insertions(+), 12 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/res-may-alias.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index 66ae8f1c7f064..9c5fd2354f95e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9043,6 +9043,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 5916fa6183a27..6fd8bc295e8ca 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -283,10 +283,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fe172d923ac07..9be3939641cfc 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3959,6 +3959,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/clang/test/CodeGenHLSL/res-may-alias.hlsl
b/clang/test/CodeGenHLSL/res-may-alias.hlsl
new file mode 100644
index 0..53ee8ee4935d8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/res-may-alias.hlsl
@@ -0,0 +1,7 @@
+// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/131070
>From 81196e016dbf1209637dd13315efff7eac461d42 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Fri, 14 Mar 2025 00:24:26 +
Subject: [PATCH 1/9] Implement ResMayNotAlias DXIL shader flag analysis
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
clang/test/CodeGenHLSL/res-may-alias.hlsl | 7 +++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 43 ---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++-
.../DirectX/ShaderFlags/res-may-alias-0.ll| 39 +
.../DirectX/ShaderFlags/res-may-alias-1.ll| 37
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
.../typed-uav-load-additional-formats.ll | 9 ++--
12 files changed, 210 insertions(+), 12 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/res-may-alias.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index 66ae8f1c7f064..9c5fd2354f95e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9043,6 +9043,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 5916fa6183a27..6fd8bc295e8ca 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -283,10 +283,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fe172d923ac07..9be3939641cfc 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3959,6 +3959,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/clang/test/CodeGenHLSL/res-may-alias.hlsl
b/clang/test/CodeGenHLSL/res-may-alias.hlsl
new file mode 100644
index 0..53ee8ee4935d8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/res-may-alias.hlsl
@@ -0,0 +1,7 @@
+// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/131070
>From 81196e016dbf1209637dd13315efff7eac461d42 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Fri, 14 Mar 2025 00:24:26 +
Subject: [PATCH 01/10] Implement ResMayNotAlias DXIL shader flag analysis
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
clang/test/CodeGenHLSL/res-may-alias.hlsl | 7 +++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 43 ---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++-
.../DirectX/ShaderFlags/res-may-alias-0.ll| 39 +
.../DirectX/ShaderFlags/res-may-alias-1.ll| 37
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
.../typed-uav-load-additional-formats.ll | 9 ++--
12 files changed, 210 insertions(+), 12 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/res-may-alias.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index 66ae8f1c7f064..9c5fd2354f95e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9043,6 +9043,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 5916fa6183a27..6fd8bc295e8ca 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -283,10 +283,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fe172d923ac07..9be3939641cfc 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3959,6 +3959,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/clang/test/CodeGenHLSL/res-may-alias.hlsl
b/clang/test/CodeGenHLSL/res-may-alias.hlsl
new file mode 100644
index 0..53ee8ee4935d8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/res-may-alias.hlsl
@@ -0,0 +1,7 @@
+// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disabl
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -0,0 +1,34 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 +// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -O1 -o - | FileCheck %s Icohedron wrote: Generally you should prefer `-disable-llvm-passes` since it makes the test run faster https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/131070
>From 81196e016dbf1209637dd13315efff7eac461d42 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Fri, 14 Mar 2025 00:24:26 +
Subject: [PATCH 1/7] Implement ResMayNotAlias DXIL shader flag analysis
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
clang/test/CodeGenHLSL/res-may-alias.hlsl | 7 +++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 43 ---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++-
.../DirectX/ShaderFlags/res-may-alias-0.ll| 39 +
.../DirectX/ShaderFlags/res-may-alias-1.ll| 37
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
.../typed-uav-load-additional-formats.ll | 9 ++--
12 files changed, 210 insertions(+), 12 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/res-may-alias.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index 66ae8f1c7f064..9c5fd2354f95e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9043,6 +9043,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 5916fa6183a27..6fd8bc295e8ca 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -283,10 +283,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fe172d923ac07..9be3939641cfc 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3959,6 +3959,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/clang/test/CodeGenHLSL/res-may-alias.hlsl
b/clang/test/CodeGenHLSL/res-may-alias.hlsl
new file mode 100644
index 0..53ee8ee4935d8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/res-may-alias.hlsl
@@ -0,0 +1,7 @@
+// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/134288
>From c482c96c99ab76458904b3f94b1146ccfee0f55c Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Wed, 2 Apr 2025 21:16:16 +
Subject: [PATCH 1/8] Add test for UseNativeLowPrecision shader flag
---
.../ShaderFlags/use-native-low-precision.ll | 45 +++
1 file changed, 45 insertions(+)
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
new file mode 100644
index 0..95c916b169cdf
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
@@ -0,0 +1,45 @@
+; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
+; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
+
+target triple = "dxil-pc-shadermodel6.7-library"
+
+;CHECK: ; Combined Shader Flags for Module
+;CHECK-NEXT: ; Shader Flags Value: 0x00800020
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Note: shader requires additional functionality:
+;CHECK-NEXT: ; Note: extra DXIL module flags:
+;CHECK-NEXT: ; D3D11_1_SB_GLOBAL_FLAG_ENABLE_MINIMUM_PRECISION
+;CHECK-NEXT: ; Native 16bit types enabled
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Shader Flags for Module Functions
+
+;CHECK-LABEL: ; Function add_i16 : 0x00800020
+define i16 @add_i16(i16 %a, i16 %b) #0 {
+ %sum = add i16 %a, %b
+ ret i16 %sum
+}
+
+; NOTE: The flag for native low precision is set for every function in the
+; module regardless of whether or not the function uses low precision data
+; types. This matches the behavior in DXC
+;CHECK-LABEL: ; Function add_i32 : 0x0080
+define i32 @add_i32(i32 %a, i32 %b) #0 {
+ %sum = add i32 %a, %b
+ ret i32 %sum
+}
+
+;CHECK-LABEL: ; Function add_half : 0x00800020
+define half @add_half(half %a, half %b) #0 {
+ %sum = fadd half %a, %b
+ ret half %sum
+}
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export" }
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"dx.nativelowprec", i32 1}
+
+; DXC: - Name:SFI0
+; DXC-NEXT: Size:8
+; DXC-NOT: Flags:
+; DXC: ...
>From 1d90753f91b62cd6c5a72f7855ad88a45fe6f16d Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Thu, 3 Apr 2025 16:24:32 +
Subject: [PATCH 2/8] Implement UseNativeLowPrecision shader flag analysis
---
clang/lib/CodeGen/CGHLSLRuntime.cpp| 3 +++
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 9 +
llvm/lib/Target/DirectX/DXILShaderFlags.cpp| 6 ++
3 files changed, 18 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/enable-16bit-types.hlsl
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 3b1810b62a2cd..ca5f180d2a64c 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -282,10 +282,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &LangOpts = CGM.getLangOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (LangOpts.NativeHalfType)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
new file mode 100644
index 0..7da66a3ed863b
--- /dev/null
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fnative-half-type -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=NOFLAG
+
+// NOTE: -enable-16bit-types is a DXCFlag that aliases -fnative-half-type
+
+// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
+// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
+
+// NOFLAG-NOT: dx.nativelowprec
diff --git a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
index babf495220393..437d1402ccedc 100644
--- a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+++ b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
@@ -188,6 +188,12 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
continue;
}
+ // Set UseNativeLowPrecision using dx.nativelowprec module metadata
+ if (auto *NativeLowPrec = mdconst::extract_or_null(
+ M.getModuleFlag("dx.nativelowprec")))
+if (NativeLowPrec->getValue() != 0)
+ SCCSF.UseNativeLowPrecision = true;
+
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron closed https://github.com/llvm/llvm-project/pull/134288 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
@@ -0,0 +1,7 @@ +// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefix=FLAG Icohedron wrote: Yea I will change these to clang_dxc https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/131070
>From 81196e016dbf1209637dd13315efff7eac461d42 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Fri, 14 Mar 2025 00:24:26 +
Subject: [PATCH 01/10] Implement ResMayNotAlias DXIL shader flag analysis
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
clang/test/CodeGenHLSL/res-may-alias.hlsl | 7 +++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 43 ---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++-
.../DirectX/ShaderFlags/res-may-alias-0.ll| 39 +
.../DirectX/ShaderFlags/res-may-alias-1.ll| 37
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
.../typed-uav-load-additional-formats.ll | 9 ++--
12 files changed, 210 insertions(+), 12 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/res-may-alias.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index 66ae8f1c7f064..9c5fd2354f95e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9043,6 +9043,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 5916fa6183a27..6fd8bc295e8ca 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -283,10 +283,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fe172d923ac07..9be3939641cfc 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3959,6 +3959,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/clang/test/CodeGenHLSL/res-may-alias.hlsl
b/clang/test/CodeGenHLSL/res-may-alias.hlsl
new file mode 100644
index 0..53ee8ee4935d8
--- /dev/null
+++ b/clang/test/CodeGenHLSL/res-may-alias.hlsl
@@ -0,0 +1,7 @@
+// RUN: %clang_cc1 -res-may-alias -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disabl
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron approved this pull request. https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
@@ -188,6 +188,13 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
continue;
}
+ // Set UseNativeLowPrecision using dx.nativelowprec module metadata
+ if (auto *NativeLowPrec = mdconst::extract_or_null(
+ M.getModuleFlag("dx.nativelowprec")))
+if (MMDI.DXILVersion >= VersionTuple(1, 2) &&
Icohedron wrote:
The frontend is what is adding `!0 = !{i32 1, !"dx.nativelowprec", i32 1}`, so
we wouldn't see it in the module.
If it is manually added to a module that is SM 6.1 or older, then it should
have no effect on the shader flags.
Should I add a test for this?
https://github.com/llvm/llvm-project/pull/134288
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -0,0 +1,37 @@
+// RUN: %clang_cc1 -std=hlsl202y -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm-only
-disable-llvm-passes -verify
+
+double4 test_double_inputs(double p0, double p1, double p2) {
+ return lit(p0, p1, p2);
+ // expected-error@-1 {{call to deleted function 'lit'}}
Icohedron wrote:
I think these should be ambiguity errors rather than call to deleted function
errors, but I'm not sure of an easy way to do this without also allowing
implicit vector truncation.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
Icohedron wrote:
If you add a test here that uses `half`
```c++
half4 test_lit_half(half NDotL, half NDotH, half M) { return lit(NDotL, NDotH,
M); }
```
Will it convert the `half` types to float?
https://github.com/llvm/llvm-project/pull/134171
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[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron closed https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Don't invoke `dxv` from `clang-dxc` for text output (PR #135876)
https://github.com/Icohedron approved this pull request. This is great! Now I don't have to specify `-Vd` when I run clang-dxc without `-Fo` :) https://github.com/llvm/llvm-project/pull/135876 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `ldexp` intrinsic (PR #138182)
https://github.com/Icohedron approved this pull request. https://github.com/llvm/llvm-project/pull/138182 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `ldexp` intrinsic (PR #138182)
@@ -0,0 +1,39 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm-only
-disable-llvm-passes -verify
+
+float test_double_inputs(double p0, double p1) {
+ return ldexp(p0, p1);
+ // expected-error@-1 {{no matching function for call to 'ldexp'}}
+ // expected-note@hlsl/hlsl_intrinsics.h:* {{candidate template ignored}}
Icohedron wrote:
Yea the notes don't seem worthwhile to include. They're more distracting than
anything useful. Plus, I don't see any other tests checking for notes.
https://github.com/llvm/llvm-project/pull/138182
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[clang] [HLSL] Implement the `ldexp` intrinsic (PR #138182)
@@ -0,0 +1,49 @@ +// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s Icohedron wrote: Yea, to be consistent if nothing else. https://github.com/llvm/llvm-project/pull/138182 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `ldexp` intrinsic (PR #138182)
https://github.com/Icohedron requested changes to this pull request. @spall pointed out some good changes that should be made https://github.com/llvm/llvm-project/pull/138182 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `ldexp` intrinsic (PR #138182)
https://github.com/Icohedron approved this pull request. https://github.com/llvm/llvm-project/pull/138182 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `ldexp` intrinsic (PR #138182)
@@ -0,0 +1,49 @@ +// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -o - | FileCheck %s Icohedron wrote: Add `-disable-llvm-passes`? https://github.com/llvm/llvm-project/pull/138182 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,144 @@ // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ -// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: -emit-llvm -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half // // -- No Native Half support test --- // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ // RUN: -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float +// DXCHECK: define [[FNATTRS]] [[TYPE]] @ +// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] Icohedron wrote: I would leave the llvm passes disabled because the passes are eliminating some of the instructions you are emitting. You can use [string substitution substitution blocks](https://llvm.org/docs/CommandGuide/FileCheck.html#filecheck-string-substitution-blocks) to replace register names like %7 with something more descriptive. https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,136 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
+// RUN: -emit-llvm -o - | FileCheck %s \
+// RUN: -DTYPE=half --check-prefixes=CHECK,SPVCHECK
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
-// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// RUN: -DTYPE=float --check-prefixes=CHECK,SPVCHECK
-// CHECK: define [[FNATTRS]] [[TYPE]] @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
-// CHECK: ret [[TYPE]] %fmod
+// CHECK-LABEL: test_fmod_half
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]],
[[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]]
[[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]]
[[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.f16([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.f32([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.f16([[TYPE]] %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.f32([[TYPE]] %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]]
[[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1
[[CMP_I:%.*]], [[TYPE]] [[HLSL_FRAC_I_2:%.*]], [[TYPE]] %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]]
%hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret [[TYPE]] %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]],
[[Y:%.*]]
+// SPVCHECK: ret [[TYPE]] %fmod.i
half test_fmod_half(half p0, half p1) { return fmod(p0, p1); }
-// CHECK: define [[FNATTRS]] <2 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
-// CHECK: ret <2 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half2
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge <2 x [[TYPE]]>
[[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.fabs.v2f16(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
@llvm.fabs.v2f32(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.dx.frac.v2f16(<2 x [[TYPE]]> %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.dx.frac.v2f32(<2 x [[TYPE]]> %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn <2 x i1>
[[CMP_I:%.*]], <2 x [[TYPE]]> [[HLSL_FRAC_I_2:%.*]], <2 x [[TYPE]]> %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
%hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret <2 x [[TYPE]]> %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// SPVCHECK: ret <2 x [[TYPE]]> %fmod.i
half2 test_fmod_half2(half2 p0, half2 p1) { return fmod(p0, p1); }
-// CHECK: define [[FNATTRS]] <3 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
-// CHECK: ret <3 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half3
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[DIV1_I:%.*]]
Icohedron wrote:
I would also add the instructions that are producing `[[DIV1_I_2:%.*]]` and
`[[DIV1_I_3:%.*]]`, so that we can see where they are coming from.
https://github.com/llvm/llvm-project/pull/130320
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[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,136 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
+// RUN: -emit-llvm -o - | FileCheck %s \
+// RUN: -DTYPE=half --check-prefixes=CHECK,SPVCHECK
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
-// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// RUN: -DTYPE=float --check-prefixes=CHECK,SPVCHECK
-// CHECK: define [[FNATTRS]] [[TYPE]] @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
-// CHECK: ret [[TYPE]] %fmod
+// CHECK-LABEL: test_fmod_half
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]],
[[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]]
[[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]]
[[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.f16([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.f32([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.f16([[TYPE]] %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.f32([[TYPE]] %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]]
[[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1
[[CMP_I:%.*]], [[TYPE]] [[HLSL_FRAC_I_2:%.*]], [[TYPE]] %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]]
%hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret [[TYPE]] %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]],
[[Y:%.*]]
+// SPVCHECK: ret [[TYPE]] %fmod.i
half test_fmod_half(half p0, half p1) { return fmod(p0, p1); }
-// CHECK: define [[FNATTRS]] <2 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
-// CHECK: ret <2 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half2
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge <2 x [[TYPE]]>
[[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.fabs.v2f16(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
@llvm.fabs.v2f32(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.dx.frac.v2f16(<2 x [[TYPE]]> %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.dx.frac.v2f32(<2 x [[TYPE]]> %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn <2 x i1>
[[CMP_I:%.*]], <2 x [[TYPE]]> [[HLSL_FRAC_I_2:%.*]], <2 x [[TYPE]]> %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
%hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret <2 x [[TYPE]]> %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// SPVCHECK: ret <2 x [[TYPE]]> %fmod.i
half2 test_fmod_half2(half2 p0, half2 p1) { return fmod(p0, p1); }
-// CHECK: define [[FNATTRS]] <3 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
-// CHECK: ret <3 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half3
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[DIV1_I:%.*]]
Icohedron wrote:
It's always better to include as many or all the instructions as you can that
participate in the computation of the result.
In this case, since there are many instructions, you may want to use the python
script
[`llvm/utils/update_cc_test_checks.py`](https://github.com/llvm/llvm-project/blob/main/llvm/utils/update_cc_test_checks.py)
to generate the `*CHECK` lines for you:
`python3 llvm/utils/update_cc_test_checks.py --version 5
--clang=/path/to/your/built/clang clang/test/CodeGenHLSL/builtins/fmod.hlsl`
https://github.com/llvm/llvm-project/pull/130320
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[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,136 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
+// RUN: -emit-llvm -o - | FileCheck %s \
+// RUN: -DTYPE=half --check-prefixes=CHECK,SPVCHECK
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
-// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// RUN: -DTYPE=float --check-prefixes=CHECK,SPVCHECK
-// CHECK: define [[FNATTRS]] [[TYPE]] @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
-// CHECK: ret [[TYPE]] %fmod
+// CHECK-LABEL: test_fmod_half
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]],
[[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]]
[[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]]
[[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.f16([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.f32([[TYPE]] [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.f16([[TYPE]] %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.f32([[TYPE]] %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]]
[[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1
[[CMP_I:%.*]], [[TYPE]] [[HLSL_FRAC_I_2:%.*]], [[TYPE]] %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]]
%hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret [[TYPE]] %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn [[TYPE]] [[X:%.*]],
[[Y:%.*]]
+// SPVCHECK: ret [[TYPE]] %fmod.i
half test_fmod_half(half p0, half p1) { return fmod(p0, p1); }
-// CHECK: define [[FNATTRS]] <2 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
-// CHECK: ret <2 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half2
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[DIV1_I:%.*]]
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge <2 x [[TYPE]]>
[[DIV1_I_2:%.*]], %fneg.i
+// DXNATIVE_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.fabs.v2f16(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNO_HALF: %elt.abs.i = call reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
@llvm.fabs.v2f32(<2 x [[TYPE]]> [[DIV1_I_3:%.*]])
+// DXNATIVE_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.dx.frac.v2f16(<2 x [[TYPE]]> %elt.abs.i)
+// DXNO_HALF: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn <2 x
[[TYPE]]> @llvm.dx.frac.v2f32(<2 x [[TYPE]]> %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[HLSL_FRAC_I:%.*]]
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn <2 x i1>
[[CMP_I:%.*]], <2 x [[TYPE]]> [[HLSL_FRAC_I_2:%.*]], <2 x [[TYPE]]> %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
%hlsl.select.i, [[Y_2:%.*]]
+// DXCHECK: ret <2 x [[TYPE]]> %mul.i
+// SPVCHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn <2 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// SPVCHECK: ret <2 x [[TYPE]]> %fmod.i
half2 test_fmod_half2(half2 p0, half2 p1) { return fmod(p0, p1); }
-// CHECK: define [[FNATTRS]] <3 x [[TYPE]]> @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
-// CHECK: ret <3 x [[TYPE]]> %fmod
+// CHECK-LABEL: test_fmod_half3
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[DIV1_I:%.*]]
Icohedron wrote:
```suggestion
// DXCHECK: %[[DIV1_I:.*]] = fdiv reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
[[X:%.*]], [[Y:%.*]]
// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn <3 x [[TYPE]]>
%[[DIV1_I]]
```
I would match the registers where they are defined, like so.
`[[X:%.*]], [[Y:%.*]]` is fine, since these directly correspond to the function
arguments retrieved from extra loads and stores that get removed later.
https://github.com/llvm/llvm-project/pull/130320
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[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron requested changes to this pull request. For the most part, this PR looks good! Just needs some changes to the codegen test to make it more clear that the implementation is correctly being tested. https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,144 @@ // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ -// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: -emit-llvm -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half // // -- No Native Half support test --- // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ // RUN: -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float +// DXCHECK: define [[FNATTRS]] [[TYPE]] @ +// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] Icohedron wrote: Since the codegen now produces multiple instructions, each dependent on each other, I would include the operands of each instruction, as opposed to only showing what the instructions are https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,144 @@ // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ -// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: -emit-llvm -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half // // -- No Native Half support test --- // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ // RUN: -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float +// DXCHECK: define [[FNATTRS]] [[TYPE]] @ Icohedron wrote: I would mark function definitions with a `CHECK-LABEL` followed by the name of the function being tested. This assumes you configured `CHECK` to apply to both DirectX and SPIR-V. There is no need to consider the function definitions differently between DirectX and SPIR-V using `DXCHECK` and `SPVCHECK` https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,144 @@ // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ -// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: -emit-llvm -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half Icohedron wrote: I would add `--check-prefixes=CHECK,SPVCHECK` to signify that `SPVCHECK` is for the SPIR-V codegen only, while `CHECK` is for both DirectX and SPIR-V. Likewise, for the RUN lines to test the DirectX codegen, change `--check-prefixes=DXCHECK,DXNATIVE_HALF` to `--check-prefixes=CHECK,DXCHECK,DX...` so that you can use `CHECK` to check for lines that are common between DirectX and SPIR-V codegen https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,144 @@ // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ -// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: -emit-llvm -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half // // -- No Native Half support test --- // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ // RUN: -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float +// DXCHECK: define [[FNATTRS]] [[TYPE]] @ +// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] Icohedron wrote: You will need to assign each one a different name in that case https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)
https://github.com/Icohedron closed https://github.com/llvm/llvm-project/pull/127137 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,128 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: -emit-llvm -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// DXCHECK: define [[FNATTRS]] [[TYPE]] @
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] %{{.*}},
%{{.*}}
Icohedron wrote:
Very well, then. I will approve the PR. I will leave this comment however:
> I think this our fundamental disagreement. You seem to want to use a concept
> in FileCheck for checking values as a comment and I think thats a misuse of
> the feature that hurts clarity.
I don't think it is a misuse of the feature. If it was, then wouldn't someone
have implemented a check for unused variables within FileCheck itself and warn
of such appearances?
Unused FileCheck variables are also a common occurrence. Perhaps the most
obvious are checks for the entry block label made by the
`update_cc_test_checks.py` script. Can see that in autogenerated checks for
tests such as
[length.hlsl](https://github.com/llvm/llvm-project/blob/9415b7d97fc38d0b8f3de63f7ba6ff6a5072158e/clang/test/CodeGenHLSL/builtins/length.hlsl#L16).
You also approved a PR (#128979) with a handwritten test that includes several
unused FileCheck variables
([or.hlsl](https://github.com/llvm/llvm-project/blob/9415b7d97fc38d0b8f3de63f7ba6ff6a5072158e/clang/test/CodeGenHLSL/builtins/or.hlsl#L18))
https://github.com/llvm/llvm-project/pull/130320
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[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron approved this pull request. https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,136 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: -emit-llvm -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// DXCHECK: define [[FNATTRS]] [[TYPE]] @
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] %4, %5
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] %7
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]] %6,
%fneg.i
+// DXCHECK: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.[[INT_TYPE]]([[TYPE]] %8)
+// DXCHECK: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.[[INT_TYPE]]([[TYPE]] %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] %11
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1
%loadedv.i, [[TYPE]] %10, [[TYPE]] %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]]
%hlsl.select.i, %12
+// DXCHECK: ret [[TYPE]] %mul.i
// CHECK: define [[FNATTRS]] [[TYPE]] @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
-// CHECK: ret [[TYPE]] %fmod
+// CHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
+// CHECK: ret [[TYPE]] %fmod.i
half test_fmod_half(half p0, half p1) { return fmod(p0, p1); }
+// DXCHECK: define [[FNATTRS]] <2 x [[TYPE]]> @
Icohedron wrote:
In your case use `DXCHECK-LABEL` for DirectX and `CHECK-LABEL` for SPIR-V
https://github.com/llvm/llvm-project/pull/130320
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[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron requested changes to this pull request. https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,136 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: -emit-llvm -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// DXCHECK: define [[FNATTRS]] [[TYPE]] @
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] %4, %5
+// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] %7
+// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]] %6,
%fneg.i
+// DXCHECK: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.fabs.[[INT_TYPE]]([[TYPE]] %8)
+// DXCHECK: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]]
@llvm.dx.frac.[[INT_TYPE]]([[TYPE]] %elt.abs.i)
+// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] %11
+// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1
%loadedv.i, [[TYPE]] %10, [[TYPE]] %fneg2.i
+// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]]
%hlsl.select.i, %12
+// DXCHECK: ret [[TYPE]] %mul.i
// CHECK: define [[FNATTRS]] [[TYPE]] @
-// CHECK: %fmod = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
-// CHECK: ret [[TYPE]] %fmod
+// CHECK: %fmod.i = frem reassoc nnan ninf nsz arcp afn [[TYPE]]
+// CHECK: ret [[TYPE]] %fmod.i
half test_fmod_half(half p0, half p1) { return fmod(p0, p1); }
+// DXCHECK: define [[FNATTRS]] <2 x [[TYPE]]> @
Icohedron wrote:
Use [`-LABEL`
checks](https://llvm.org/docs/CommandGuide/FileCheck.html#the-check-label-directive)
for function definitions to have better error messages produced when the test
fails for any reason.
https://github.com/llvm/llvm-project/pull/130320
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[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,136 @@ // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ -// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ +// RUN: -emit-llvm -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half // // -- No Native Half support test --- // // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ // RUN: -o - | FileCheck %s \ // RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float +// DXCHECK: define [[FNATTRS]] [[TYPE]] @ +// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] %4, %5 +// DXCHECK: %fneg.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] %7 +// DXCHECK: %cmp.i = fcmp reassoc nnan ninf nsz arcp afn oge [[TYPE]] %6, %fneg.i +// DXCHECK: %elt.abs.i = call reassoc nnan ninf nsz arcp afn [[TYPE]] @llvm.fabs.[[INT_TYPE]]([[TYPE]] %8) +// DXCHECK: %hlsl.frac.i = call reassoc nnan ninf nsz arcp afn [[TYPE]] @llvm.dx.frac.[[INT_TYPE]]([[TYPE]] %elt.abs.i) +// DXCHECK: %fneg2.i = fneg reassoc nnan ninf nsz arcp afn [[TYPE]] %11 +// DXCHECK: %hlsl.select.i = select reassoc nnan ninf nsz arcp afn i1 %loadedv.i, [[TYPE]] %10, [[TYPE]] %fneg2.i +// DXCHECK: %mul.i = fmul reassoc nnan ninf nsz arcp afn [[TYPE]] %hlsl.select.i, %12 +// DXCHECK: ret [[TYPE]] %mul.i Icohedron wrote: Yes, it suffices to replace the numbered registers (`%4`, `%5`, `%6`, ...) with appropriately-named wild-card variables if absolutely certain they are doing nothing fishy. https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Implement the `fmod` intrinsic (PR #130320)
@@ -22,56 +22,128 @@
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: -emit-llvm -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=half
//
// -- No Native Half support test ---
//
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
-// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
+// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \
// RUN: -o - | FileCheck %s \
// RUN: -DFNATTRS="spir_func noundef nofpclass(nan inf)" -DTYPE=float
+// DXCHECK: define [[FNATTRS]] [[TYPE]] @
+// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] %{{.*}},
%{{.*}}
Icohedron wrote:
```suggestion
// DXCHECK: %div1.i = fdiv reassoc nnan ninf nsz arcp afn [[TYPE]] %[[X:.*]],
%[[Y:.*]]
```
Give the wildcards appropriate names to describe what they are
https://github.com/llvm/llvm-project/pull/130320
___
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[clang] Implement the `fmod` intrinsic (PR #130320)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/130320 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/127137
>From 4fae5642c6e8e305cdc687b4968ba5eabaa44b50 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Mon, 27 Jan 2025 11:18:09 -0800
Subject: [PATCH 01/14] Add the AddUint64 HLSL builtin function
- Defines the AddUint64 HLSL builtin function
- Implements the UAddc DXIL op to lower AddUint64 to DXIL
---
clang/include/clang/Basic/Builtins.td | 6 ++
.../clang/Basic/DiagnosticSemaKinds.td| 2 +
clang/lib/CodeGen/CGBuiltin.cpp | 45
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 21 ++
clang/lib/Sema/SemaHLSL.cpp | 47
.../test/CodeGenHLSL/builtins/AddUint64.hlsl | 71 +++
.../SemaHLSL/BuiltIns/AddUint64-errors.hlsl | 41 +++
llvm/lib/Target/DirectX/DXIL.td | 13
llvm/lib/Target/DirectX/DXILOpBuilder.cpp | 14
llvm/lib/Target/DirectX/DXILOpBuilder.h | 3 +
llvm/lib/Target/DirectX/DXILOpLowering.cpp| 22 --
llvm/test/CodeGen/DirectX/UAddc.ll| 40 +++
llvm/test/CodeGen/DirectX/UAddc_errors.ll | 30
13 files changed, 348 insertions(+), 7 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/AddUint64.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/AddUint64-errors.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/UAddc.ll
create mode 100644 llvm/test/CodeGen/DirectX/UAddc_errors.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 29939242596ba..2433427a89429 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4753,6 +4753,12 @@ def GetDeviceSideMangledName : LangBuiltin<"CUDA_LANG"> {
}
// HLSL
+def HLSLAddUint64: LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_adduint64"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLResourceGetPointer : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_resource_getpointer"];
let Attributes = [NoThrow];
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 2fce5e88ba8a0..e78339ee924ff 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -10655,6 +10655,8 @@ def err_second_argument_to_cwsc_not_pointer : Error<
def err_vector_incorrect_num_elements : Error<
"%select{too many|too few}0 elements in vector
%select{initialization|operand}3 (expected %1 elements, have %2)">;
+def err_invalid_even_odd_vector_element_count : Error<
+ "invalid element count of %0 in vector %select{initialization|operand}4
(expected an %select{even|odd}3 element count in the range of %1 and %2)">;
def err_altivec_empty_initializer : Error<"expected initializer">;
def err_invalid_neon_type_code : Error<
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 361e4c4bf2e2e..5322b38458b26 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -19445,6 +19445,51 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return nullptr;
switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_adduint64: {
+Value *OpA = EmitScalarExpr(E->getArg(0));
+Value *OpB = EmitScalarExpr(E->getArg(1));
+assert(E->getArg(0)->getType()->hasIntegerRepresentation() &&
+ E->getArg(1)->getType()->hasIntegerRepresentation() &&
+ "AddUint64 operands must have an integer representation");
+assert(((E->getArg(0)->getType()->castAs()->getNumElements() ==
+ 2 &&
+ E->getArg(1)->getType()->castAs()->getNumElements() ==
+ 2) ||
+(E->getArg(0)->getType()->castAs()->getNumElements() ==
+ 4 &&
+ E->getArg(1)->getType()->castAs()->getNumElements() ==
+ 4)) &&
+ "input vectors must have 2 or 4 elements each");
+
+llvm::Value *Result = PoisonValue::get(OpA->getType());
+uint64_t NumElements =
+E->getArg(0)->getType()->castAs()->getNumElements();
+for (uint64_t i = 0; i < NumElements / 2; ++i) {
+
+ // Obtain low and high words of inputs A and B
+ llvm::Value *LowA = Builder.CreateExtractElement(OpA, 2 * i + 0);
+ llvm::Value *HighA = Builder.CreateExtractElement(OpA, 2 * i + 1);
+ llvm::Value *LowB = Builder.CreateExtractElement(OpB, 2 * i + 0);
+ llvm::Value *HighB = Builder.CreateExtractElement(OpB, 2 * i + 1);
+
+ // Use an uadd_with_overflow to compute the sum of low words and obtain a
+ // carry value
+ llvm::Value *Carry;
+ llvm::Value *LowSum = EmitOverflowIntrinsic(
+ *this, llvm::Intrinsic::uadd_with_overflow, LowA, LowB, Carry);
+ llvm::Value *ZExtCarry = Builder.CreateZExt(Carry, HighA->getType());
+
+ // Sum the high words and the carr
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/131070 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement Shader Flags Analysis for ResMayNotAlias (PR #131070)
https://github.com/Icohedron created
https://github.com/llvm/llvm-project/pull/131070
Fixes #112270
Completed ACs:
- `-res-may-alias` clang-dxc command-line option added
- Shader flag set appropriately:
- CASE 1: command-line option -res-may-alias is NOT specified AND DXIL
Version > 1.7 AND function uses UAVs
- Add tests
- A test (`res-may-not-alias-shadermodel6.8.ll`) for CASE 1
- A test (`res-may-not-alias-shadermodel6.7.ll`) for CASE 2
- A test (`res-may-alias.ll`) for the case where the command-line option
`-res-may-alias` is specified
ACs left to complete:
- Shader flag set appropriately:
- CASE 2: command-line option -res-may-alias is NOT specified AND DXIL
Version <= 1.7 AND UAVs present globally
- This Draft PR currently uses the now-removed `DXILResourceMD` analysis
(#130323) to query for global UAVs
- Need to create an alternative implementation for this case
>From ad5fbee6d0d58df1884153bb70e59a1434953659 Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Thu, 13 Mar 2025 03:15:39 +
Subject: [PATCH] Initial ResMayNotAlias shader flag implementation
---
clang/include/clang/Basic/CodeGenOptions.def | 3 ++
clang/include/clang/Driver/Options.td | 5 +++
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++
clang/lib/Driver/ToolChains/Clang.cpp | 1 +
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 30 +---
llvm/lib/Target/DirectX/DXILShaderFlags.h | 9 +++--
.../DirectX/ShaderFlags/res-may-alias.ll | 34 +++
.../res-may-not-alias-shadermodel6.7.ll | 33 ++
.../res-may-not-alias-shadermodel6.8.ll | 33 ++
9 files changed, 145 insertions(+), 6 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.7.ll
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-shadermodel6.8.ll
diff --git a/clang/include/clang/Basic/CodeGenOptions.def
b/clang/include/clang/Basic/CodeGenOptions.def
index a7f5f1abbb825..a436c0ec98d5b 100644
--- a/clang/include/clang/Basic/CodeGenOptions.def
+++ b/clang/include/clang/Basic/CodeGenOptions.def
@@ -476,6 +476,9 @@ CODEGENOPT(ImportCallOptimization, 1, 0)
/// (BlocksRuntime) on Windows.
CODEGENOPT(StaticClosure, 1, 0)
+/// Assume that UAVs/SRVs may alias
+CODEGENOPT(ResMayAlias, 1, 0)
+
/// FIXME: Make DebugOptions its own top-level .def file.
#include "DebugOptions.def"
diff --git a/clang/include/clang/Driver/Options.td
b/clang/include/clang/Driver/Options.td
index d0414aba35209..9d33994c777d1 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -9044,6 +9044,11 @@ def dxil_validator_version : Option<["/", "-"],
"validator-version", KIND_SEPARA
HelpText<"Override validator version for module. Format: ;"
"Default: DXIL.dll version or current internal version">,
MarshallingInfoString, "\"1.8\"">;
+def res_may_alias : Option<["/", "-"], "res-may-alias", KIND_FLAG>,
+ Group, Flags<[HelpHidden]>,
+ Visibility<[DXCOption, ClangOption, CC1Option]>,
+ HelpText<"Assume that UAVs/SRVs may alias">,
+ MarshallingInfoFlag>;
def target_profile : DXCJoinedOrSeparate<"T">, MetaVarName<"">,
HelpText<"Set target profile">,
Values<"ps_6_0, ps_6_1, ps_6_2, ps_6_3, ps_6_4, ps_6_5, ps_6_6, ps_6_7,"
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index dc34653e8f497..b6c2cb0bfefc0 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -252,10 +252,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &CodeGenOpts = CGM.getCodeGenOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (CodeGenOpts.ResMayAlias)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.resmayalias", 1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index 4ebbd241d2f0b..f066e333c6e74 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3960,6 +3960,7 @@ static void RenderOpenCLOptions(const ArgList &Args,
ArgStringList &CmdArgs,
static void RenderHLSLOptions(const ArgList &Args, ArgStringList &CmdArgs,
types::ID InputType) {
const unsigned ForwardedArguments[] = {options::OPT_dxil_validator_version,
+ options::OPT_res_may_alias,
options::OPT_D,
options::OPT_I,
options::OPT_O,
diff --git a/l
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron created
https://github.com/llvm/llvm-project/pull/134288
Fixes #112267
>From c482c96c99ab76458904b3f94b1146ccfee0f55c Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Wed, 2 Apr 2025 21:16:16 +
Subject: [PATCH 1/2] Add test for UseNativeLowPrecision shader flag
---
.../ShaderFlags/use-native-low-precision.ll | 45 +++
1 file changed, 45 insertions(+)
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
new file mode 100644
index 0..95c916b169cdf
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
@@ -0,0 +1,45 @@
+; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
+; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
+
+target triple = "dxil-pc-shadermodel6.7-library"
+
+;CHECK: ; Combined Shader Flags for Module
+;CHECK-NEXT: ; Shader Flags Value: 0x00800020
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Note: shader requires additional functionality:
+;CHECK-NEXT: ; Note: extra DXIL module flags:
+;CHECK-NEXT: ; D3D11_1_SB_GLOBAL_FLAG_ENABLE_MINIMUM_PRECISION
+;CHECK-NEXT: ; Native 16bit types enabled
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Shader Flags for Module Functions
+
+;CHECK-LABEL: ; Function add_i16 : 0x00800020
+define i16 @add_i16(i16 %a, i16 %b) #0 {
+ %sum = add i16 %a, %b
+ ret i16 %sum
+}
+
+; NOTE: The flag for native low precision is set for every function in the
+; module regardless of whether or not the function uses low precision data
+; types. This matches the behavior in DXC
+;CHECK-LABEL: ; Function add_i32 : 0x0080
+define i32 @add_i32(i32 %a, i32 %b) #0 {
+ %sum = add i32 %a, %b
+ ret i32 %sum
+}
+
+;CHECK-LABEL: ; Function add_half : 0x00800020
+define half @add_half(half %a, half %b) #0 {
+ %sum = fadd half %a, %b
+ ret half %sum
+}
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export" }
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"dx.nativelowprec", i32 1}
+
+; DXC: - Name:SFI0
+; DXC-NEXT: Size:8
+; DXC-NOT: Flags:
+; DXC: ...
>From 1d90753f91b62cd6c5a72f7855ad88a45fe6f16d Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Thu, 3 Apr 2025 16:24:32 +
Subject: [PATCH 2/2] Implement UseNativeLowPrecision shader flag analysis
---
clang/lib/CodeGen/CGHLSLRuntime.cpp| 3 +++
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 9 +
llvm/lib/Target/DirectX/DXILShaderFlags.cpp| 6 ++
3 files changed, 18 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/enable-16bit-types.hlsl
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 3b1810b62a2cd..ca5f180d2a64c 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -282,10 +282,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &LangOpts = CGM.getLangOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (LangOpts.NativeHalfType)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
new file mode 100644
index 0..7da66a3ed863b
--- /dev/null
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fnative-half-type -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=NOFLAG
+
+// NOTE: -enable-16bit-types is a DXCFlag that aliases -fnative-half-type
+
+// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
+// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
+
+// NOFLAG-NOT: dx.nativelowprec
diff --git a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
index babf495220393..437d1402ccedc 100644
--- a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+++ b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
@@ -188,6 +188,12 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
continue;
}
+ // Set UseNativeLowPrecision using dx.nativelowprec module metadata
+ if (auto *NativeLowPrec = mdconst::extract_or_null(
+ M.getModuleFlag("dx.nativelowprec")))
+if (NativeLowPrec->getValue() != 0)
+ SCCSF.UseNativeLowPreci
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134288 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/134288
>From c482c96c99ab76458904b3f94b1146ccfee0f55c Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Wed, 2 Apr 2025 21:16:16 +
Subject: [PATCH 1/4] Add test for UseNativeLowPrecision shader flag
---
.../ShaderFlags/use-native-low-precision.ll | 45 +++
1 file changed, 45 insertions(+)
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
new file mode 100644
index 0..95c916b169cdf
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
@@ -0,0 +1,45 @@
+; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
+; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
+
+target triple = "dxil-pc-shadermodel6.7-library"
+
+;CHECK: ; Combined Shader Flags for Module
+;CHECK-NEXT: ; Shader Flags Value: 0x00800020
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Note: shader requires additional functionality:
+;CHECK-NEXT: ; Note: extra DXIL module flags:
+;CHECK-NEXT: ; D3D11_1_SB_GLOBAL_FLAG_ENABLE_MINIMUM_PRECISION
+;CHECK-NEXT: ; Native 16bit types enabled
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Shader Flags for Module Functions
+
+;CHECK-LABEL: ; Function add_i16 : 0x00800020
+define i16 @add_i16(i16 %a, i16 %b) #0 {
+ %sum = add i16 %a, %b
+ ret i16 %sum
+}
+
+; NOTE: The flag for native low precision is set for every function in the
+; module regardless of whether or not the function uses low precision data
+; types. This matches the behavior in DXC
+;CHECK-LABEL: ; Function add_i32 : 0x0080
+define i32 @add_i32(i32 %a, i32 %b) #0 {
+ %sum = add i32 %a, %b
+ ret i32 %sum
+}
+
+;CHECK-LABEL: ; Function add_half : 0x00800020
+define half @add_half(half %a, half %b) #0 {
+ %sum = fadd half %a, %b
+ ret half %sum
+}
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export" }
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"dx.nativelowprec", i32 1}
+
+; DXC: - Name:SFI0
+; DXC-NEXT: Size:8
+; DXC-NOT: Flags:
+; DXC: ...
>From 1d90753f91b62cd6c5a72f7855ad88a45fe6f16d Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Thu, 3 Apr 2025 16:24:32 +
Subject: [PATCH 2/4] Implement UseNativeLowPrecision shader flag analysis
---
clang/lib/CodeGen/CGHLSLRuntime.cpp| 3 +++
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 9 +
llvm/lib/Target/DirectX/DXILShaderFlags.cpp| 6 ++
3 files changed, 18 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/enable-16bit-types.hlsl
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 3b1810b62a2cd..ca5f180d2a64c 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -282,10 +282,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &LangOpts = CGM.getLangOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (LangOpts.NativeHalfType)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
new file mode 100644
index 0..7da66a3ed863b
--- /dev/null
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fnative-half-type -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=NOFLAG
+
+// NOTE: -enable-16bit-types is a DXCFlag that aliases -fnative-half-type
+
+// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
+// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
+
+// NOFLAG-NOT: dx.nativelowprec
diff --git a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
index babf495220393..437d1402ccedc 100644
--- a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+++ b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
@@ -188,6 +188,12 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
continue;
}
+ // Set UseNativeLowPrecision using dx.nativelowprec module metadata
+ if (auto *NativeLowPrec = mdconst::extract_or_null(
+ M.getModuleFlag("dx.nativelowprec")))
+if (NativeLowPrec->getValue() != 0)
+ SCCSF.UseNativeLowPrecision = true;
+
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -253,6 +253,37 @@ const inline float
length(__detail::HLSL_FIXED_VECTOR X) {
return __detail::length_vec_impl(X);
}
+//===--===//
+// lit builtins
+//===--===//
+
+/// \fn vector lit(T NDotL, T NDotH, T M)
+/// \brief Returns a lighting coefficient vector.
+/// \param NDotL The dot product of the normalized surface normal and the
+/// light vector.
+/// \param NDotH The dot product of the half-angle vector and the surface
+/// normal.
+/// \param M A specular exponent.
+///
+/// This function returns a lighting coefficient vector (ambient, diffuse,
+/// specular, 1).
+
+template
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+const inline __detail::enable_if_t<__detail::is_arithmetic::Value &&
Icohedron wrote:
I agree we should avoid using templates where we can, especially in this case.
A macro also already exists to handle the compatibility overload for doubles in
the case of a function accepting three floats.
```c++
_DXC_COMPAT_TERNARY_DOUBLE_OVERLOADS(lit)
```
https://github.com/llvm/llvm-project/pull/134171
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[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/134288
>From c482c96c99ab76458904b3f94b1146ccfee0f55c Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Wed, 2 Apr 2025 21:16:16 +
Subject: [PATCH 1/3] Add test for UseNativeLowPrecision shader flag
---
.../ShaderFlags/use-native-low-precision.ll | 45 +++
1 file changed, 45 insertions(+)
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
new file mode 100644
index 0..95c916b169cdf
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
@@ -0,0 +1,45 @@
+; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
+; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
+
+target triple = "dxil-pc-shadermodel6.7-library"
+
+;CHECK: ; Combined Shader Flags for Module
+;CHECK-NEXT: ; Shader Flags Value: 0x00800020
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Note: shader requires additional functionality:
+;CHECK-NEXT: ; Note: extra DXIL module flags:
+;CHECK-NEXT: ; D3D11_1_SB_GLOBAL_FLAG_ENABLE_MINIMUM_PRECISION
+;CHECK-NEXT: ; Native 16bit types enabled
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Shader Flags for Module Functions
+
+;CHECK-LABEL: ; Function add_i16 : 0x00800020
+define i16 @add_i16(i16 %a, i16 %b) #0 {
+ %sum = add i16 %a, %b
+ ret i16 %sum
+}
+
+; NOTE: The flag for native low precision is set for every function in the
+; module regardless of whether or not the function uses low precision data
+; types. This matches the behavior in DXC
+;CHECK-LABEL: ; Function add_i32 : 0x0080
+define i32 @add_i32(i32 %a, i32 %b) #0 {
+ %sum = add i32 %a, %b
+ ret i32 %sum
+}
+
+;CHECK-LABEL: ; Function add_half : 0x00800020
+define half @add_half(half %a, half %b) #0 {
+ %sum = fadd half %a, %b
+ ret half %sum
+}
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export" }
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"dx.nativelowprec", i32 1}
+
+; DXC: - Name:SFI0
+; DXC-NEXT: Size:8
+; DXC-NOT: Flags:
+; DXC: ...
>From 1d90753f91b62cd6c5a72f7855ad88a45fe6f16d Mon Sep 17 00:00:00 2001
From: Icohedron
Date: Thu, 3 Apr 2025 16:24:32 +
Subject: [PATCH 2/3] Implement UseNativeLowPrecision shader flag analysis
---
clang/lib/CodeGen/CGHLSLRuntime.cpp| 3 +++
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 9 +
llvm/lib/Target/DirectX/DXILShaderFlags.cpp| 6 ++
3 files changed, 18 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/enable-16bit-types.hlsl
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 3b1810b62a2cd..ca5f180d2a64c 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -282,10 +282,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &LangOpts = CGM.getLangOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (LangOpts.NativeHalfType)
+M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
new file mode 100644
index 0..7da66a3ed863b
--- /dev/null
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fnative-half-type -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=NOFLAG
+
+// NOTE: -enable-16bit-types is a DXCFlag that aliases -fnative-half-type
+
+// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
+// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
+
+// NOFLAG-NOT: dx.nativelowprec
diff --git a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
index babf495220393..437d1402ccedc 100644
--- a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+++ b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
@@ -188,6 +188,12 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
continue;
}
+ // Set UseNativeLowPrecision using dx.nativelowprec module metadata
+ if (auto *NativeLowPrec = mdconst::extract_or_null(
+ M.getModuleFlag("dx.nativelowprec")))
+if (NativeLowPrec->getValue() != 0)
+ SCCSF.UseNativeLowPrecision = true;
+
[clang] [llvm] [DirectX] Implement UseNativeLowPrecision shader flag analysis (PR #134288)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134288 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -101,6 +101,16 @@ constexpr vector smoothstep_vec_impl(vector
Min, vector Max,
#endif
}
+template constexpr vector lit_impl(T NDotL, T NDotH, T M) {
+ bool DiffuseCond = NDotL < 0;
+ T Diffuse = select(DiffuseCond, 0, NDotL);
+ vector Result = {1, Diffuse, 0, 1};
+ bool SpecularCond = or (DiffuseCond, (NDotH < 0));
Icohedron wrote:
I had a similar issue when implementing the `and` intrinsic (#127098). Justin
filed an issue for it (#127851) and in the meantime I manually fixed the
spacing. I don't recall the PR code format check complaining about it.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -253,6 +253,37 @@ const inline float
length(__detail::HLSL_FIXED_VECTOR X) {
return __detail::length_vec_impl(X);
}
+//===--===//
+// lit builtins
+//===--===//
+
+/// \fn vector lit(T NDotL, T NDotH, T M)
+/// \brief Returns a lighting coefficient vector.
+/// \param NDotL The dot product of the normalized surface normal and the
+/// light vector.
+/// \param NDotH The dot product of the half-angle vector and the surface
+/// normal.
+/// \param M A specular exponent.
+///
+/// This function returns a lighting coefficient vector (ambient, diffuse,
+/// specular, 1).
+
+template
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+const inline __detail::enable_if_t<__detail::is_arithmetic::Value &&
Icohedron wrote:
> > I believe you should not worry about implicit truncation here.
>
> Hm ok, curious what other people's thoughts are on this. I was just trying to
> match the behavior of DXC since it doesn't compile when called with vector
> inputs. I still think `_DXC_COMPAT_TERNARY_DOUBLE_OVERLOADS(lit)` doesn't
> work regardless because the return type of `lit` is always a vector of 4.
Oh, right
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -22,10 +22,10 @@ // HLSL standard library function declarations/definitions. #include "hlsl/hlsl_alias_intrinsics.h" +#include "hlsl/hlsl_intrinsics.h" #if __HLSL_VERSION <= __HLSL_202x #include "hlsl/hlsl_compat_overloads.h" #endif -#include "hlsl/hlsl_intrinsics.h" Icohedron wrote: Curious why this change is here https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -101,6 +101,16 @@ constexpr vector smoothstep_vec_impl(vector
Min, vector Max,
#endif
}
+template constexpr vector lit_impl(T NDotL, T NDotH, T M) {
+ bool DiffuseCond = NDotL < 0;
+ T Diffuse = select(DiffuseCond, 0, NDotL);
+ vector Result = {1, Diffuse, 0, 1};
+ bool SpecularCond = or (DiffuseCond, (NDotH < 0));
Icohedron wrote:
Hmm. Seems to be complaining this time for some reason.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -101,6 +101,16 @@ constexpr vector smoothstep_vec_impl(vector
Min, vector Max,
#endif
}
+template constexpr vector lit_impl(T NDotL, T NDotH, T M) {
+ bool DiffuseCond = NDotL < 0;
+ T Diffuse = select(DiffuseCond, 0, NDotL);
+ vector Result = {1, Diffuse, 0, 1};
+ bool SpecularCond = or (DiffuseCond, (NDotH < 0));
Icohedron wrote:
It should be fine to leave it though.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron deleted https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -101,6 +101,16 @@ constexpr vector smoothstep_vec_impl(vector
Min, vector Max,
#endif
}
+template constexpr vector lit_impl(T NDotL, T NDotH, T M) {
+ bool DiffuseCond = NDotL < 0;
+ T Diffuse = select(DiffuseCond, 0, NDotL);
+ vector Result = {1, Diffuse, 0, 1};
+ bool SpecularCond = or (DiffuseCond, (NDotH < 0));
Icohedron wrote:
Oh wait. Add this above the line
```
// clang-format off
```
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -280,6 +280,22 @@ constexpr bool4 isinf(double4 V) { return
isinf((float4)V); }
_DXC_COMPAT_TERNARY_DOUBLE_OVERLOADS(lerp)
_DXC_COMPAT_TERNARY_INTEGER_OVERLOADS(lerp)
+//===--===//
+// lit builtins overloads
+//===--===//
+
+template
+constexpr __detail::enable_if_t<__detail::is_arithmetic::Value &&
+(__detail::is_same::value ||
Icohedron wrote:
> ^ Since bool is arithmetic, both of these options would allow bool inputs to
> pass. I checked the DXC implementation on
> [godbolt](https://godbolt.org/z/Eb3vTdvvG) and I guess it technically accepts
> bool types and casts them down to float. But is that something we want to be
> mimicking?
>
> As for checking just `__detail::is_arithmetic`, this produces a `call to
> 'lit' is ambiguous` error. So if we want to do this I think it would have to
> be checking not half or float too.
We should mimic DXC.
Would the ambiguous error still appear if you didn't use templates? Just like
as Farzon suggested:
```c++
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
const inline half4 lit(half A, half B, half M) { ...}
const inline float4 lit(float A, float B, float M) { ...}
```
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/134171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Implement the `lit` intrinsic (PR #134171)
@@ -253,6 +253,37 @@ const inline float
length(__detail::HLSL_FIXED_VECTOR X) {
return __detail::length_vec_impl(X);
}
+//===--===//
+// lit builtins
+//===--===//
+
+/// \fn vector lit(T NDotL, T NDotH, T M)
+/// \brief Returns a lighting coefficient vector.
+/// \param NDotL The dot product of the normalized surface normal and the
+/// light vector.
+/// \param NDotH The dot product of the half-angle vector and the surface
+/// normal.
+/// \param M A specular exponent.
+///
+/// This function returns a lighting coefficient vector (ambient, diffuse,
+/// specular, 1).
+
+template
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+const inline __detail::enable_if_t<__detail::is_arithmetic::Value &&
Icohedron wrote:
You should match the behavior of DXC in this case then.
https://github.com/llvm/llvm-project/pull/134171
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[clang] [HLSL][NFC] Test cleanup - remove function attributes (PR #139302)
https://github.com/Icohedron approved this pull request. https://github.com/llvm/llvm-project/pull/139302 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
