https://github.com/Icohedron updated
https://github.com/llvm/llvm-project/pull/134288
>From c482c96c99ab76458904b3f94b1146ccfee0f55c Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Wed, 2 Apr 2025 21:16:16 +0000
Subject: [PATCH 1/8] Add test for UseNativeLowPrecision shader flag
---
.../ShaderFlags/use-native-low-precision.ll | 45 +++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644
llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
new file mode 100644
index 0000000000000..95c916b169cdf
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
@@ -0,0 +1,45 @@
+; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
+; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
+
+target triple = "dxil-pc-shadermodel6.7-library"
+
+;CHECK: ; Combined Shader Flags for Module
+;CHECK-NEXT: ; Shader Flags Value: 0x00800020
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Note: shader requires additional functionality:
+;CHECK-NEXT: ; Note: extra DXIL module flags:
+;CHECK-NEXT: ; D3D11_1_SB_GLOBAL_FLAG_ENABLE_MINIMUM_PRECISION
+;CHECK-NEXT: ; Native 16bit types enabled
+;CHECK-NEXT: ;
+;CHECK-NEXT: ; Shader Flags for Module Functions
+
+;CHECK-LABEL: ; Function add_i16 : 0x00800020
+define i16 @add_i16(i16 %a, i16 %b) #0 {
+ %sum = add i16 %a, %b
+ ret i16 %sum
+}
+
+; NOTE: The flag for native low precision is set for every function in the
+; module regardless of whether or not the function uses low precision data
+; types. This matches the behavior in DXC
+;CHECK-LABEL: ; Function add_i32 : 0x00800000
+define i32 @add_i32(i32 %a, i32 %b) #0 {
+ %sum = add i32 %a, %b
+ ret i32 %sum
+}
+
+;CHECK-LABEL: ; Function add_half : 0x00800020
+define half @add_half(half %a, half %b) #0 {
+ %sum = fadd half %a, %b
+ ret half %sum
+}
+
+attributes #0 = { convergent norecurse nounwind "hlsl.export" }
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"dx.nativelowprec", i32 1}
+
+; DXC: - Name: SFI0
+; DXC-NEXT: Size: 8
+; DXC-NOT: Flags:
+; DXC: ...
>From 1d90753f91b62cd6c5a72f7855ad88a45fe6f16d Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Thu, 3 Apr 2025 16:24:32 +0000
Subject: [PATCH 2/8] Implement UseNativeLowPrecision shader flag analysis
---
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 +++
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 9 +++++++++
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 6 ++++++
3 files changed, 18 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/enable-16bit-types.hlsl
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 3b1810b62a2cd..ca5f180d2a64c 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -282,10 +282,13 @@ void CGHLSLRuntime::addHLSLBufferLayoutType(const
RecordType *StructType,
void CGHLSLRuntime::finishCodeGen() {
auto &TargetOpts = CGM.getTarget().getTargetOpts();
+ auto &LangOpts = CGM.getLangOpts();
llvm::Module &M = CGM.getModule();
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+ if (LangOpts.NativeHalfType)
+ M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
generateGlobalCtorDtorCalls();
}
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
new file mode 100644
index 0000000000000..7da66a3ed863b
--- /dev/null
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fnative-half-type -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=NOFLAG
+
+// NOTE: -enable-16bit-types is a DXCFlag that aliases -fnative-half-type
+
+// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
+// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
+
+// NOFLAG-NOT: dx.nativelowprec
diff --git a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
index babf495220393..437d1402ccedc 100644
--- a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+++ b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
@@ -188,6 +188,12 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
continue;
}
+ // Set UseNativeLowPrecision using dx.nativelowprec module metadata
+ if (auto *NativeLowPrec = mdconst::extract_or_null<ConstantInt>(
+ M.getModuleFlag("dx.nativelowprec")))
+ if (NativeLowPrec->getValue() != 0)
+ SCCSF.UseNativeLowPrecision = true;
+
ComputedShaderFlags CSF;
for (const auto &BB : *F)
for (const auto &I : BB)
>From 33f5896ad1e961aa9df998ec619a5dc425b064ed Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Thu, 3 Apr 2025 18:54:07 +0000
Subject: [PATCH 3/8] Add check for DXIL Version >= 1.2
---
llvm/lib/Target/DirectX/DXILShaderFlags.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
index 437d1402ccedc..2ca428672e1c4 100644
--- a/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+++ b/llvm/lib/Target/DirectX/DXILShaderFlags.cpp
@@ -191,7 +191,8 @@ void ModuleShaderFlags::initialize(Module &M,
DXILResourceTypeMap &DRTM,
// Set UseNativeLowPrecision using dx.nativelowprec module metadata
if (auto *NativeLowPrec = mdconst::extract_or_null<ConstantInt>(
M.getModuleFlag("dx.nativelowprec")))
- if (NativeLowPrec->getValue() != 0)
+ if (MMDI.DXILVersion >= VersionTuple(1, 2) &&
+ NativeLowPrec->getValue() != 0)
SCCSF.UseNativeLowPrecision = true;
ComputedShaderFlags CSF;
>From 5656192c141305821b25053c1845b09547716a33 Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Thu, 3 Apr 2025 18:55:59 +0000
Subject: [PATCH 4/8] Apply clang-format
---
clang/lib/CodeGen/CGHLSLRuntime.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index ca5f180d2a64c..de115d78c2040 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -288,7 +288,8 @@ void CGHLSLRuntime::finishCodeGen() {
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
if (LangOpts.NativeHalfType)
- M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
+ M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
+ 1);
generateGlobalCtorDtorCalls();
}
>From 35a080411e4ce0618665db31de7bf887b8d1abb6 Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Tue, 8 Apr 2025 23:02:16 +0000
Subject: [PATCH 5/8] Replace clang_cc1 with clang_dxc in enable-16bit-types
test
---
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
index 7da66a3ed863b..c49f7c729abb5 100644
--- a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -1,7 +1,5 @@
-// RUN: %clang_cc1 -fnative-half-type -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=FLAG
-// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s --check-prefix=NOFLAG
-
-// NOTE: -enable-16bit-types is a DXCFlag that aliases -fnative-half-type
+// RUN: %clang_dxc -enable-16bit-types -T lib_6_3 -HV 202x %s | FileCheck %s
--check-prefix=FLAG
+// RUN: %clang_dxc -T lib_6_3 -HV 202x %s | FileCheck %s --check-prefix=NOFLAG
// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
>From 09864cfeb165514109212438c3e1fdb3860aa12b Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Tue, 8 Apr 2025 23:31:10 +0000
Subject: [PATCH 6/8] Remove unnecessary attributes and obj2yml test
---
.../DirectX/ShaderFlags/low-precision.ll | 14 +++----------
.../ShaderFlags/use-native-low-precision.ll | 20 ++++++-------------
2 files changed, 9 insertions(+), 25 deletions(-)
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
index fd25a165bfe8d..52e00b107bb82 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
@@ -1,5 +1,4 @@
; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
-; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
target triple = "dxil-pc-shadermodel6.7-library"
@@ -13,26 +12,19 @@ target triple = "dxil-pc-shadermodel6.7-library"
;CHECK-NEXT: ; Shader Flags for Module Functions
;CHECK-LABEL: ; Function add_i16 : 0x00000020
-define i16 @add_i16(i16 %a, i16 %b) #0 {
+define i16 @add_i16(i16 %a, i16 %b) {
%sum = add i16 %a, %b
ret i16 %sum
}
;CHECK-LABEL: ; Function add_i32 : 0x00000000
-define i32 @add_i32(i32 %a, i32 %b) #0 {
+define i32 @add_i32(i32 %a, i32 %b) {
%sum = add i32 %a, %b
ret i32 %sum
}
;CHECK-LABEL: ; Function add_half : 0x00000020
-define half @add_half(half %a, half %b) #0 {
+define half @add_half(half %a, half %b) {
%sum = fadd half %a, %b
ret half %sum
}
-
-attributes #0 = { convergent norecurse nounwind "hlsl.export"}
-
-; DXC: - Name: SFI0
-; DXC-NEXT: Size: 8
-; DXC-NOT: Flags:
-; DXC: ...
diff --git a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
index 95c916b169cdf..98e9a5fa7b241 100644
--- a/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
+++ b/llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision.ll
@@ -1,5 +1,4 @@
; RUN: opt -S --passes="print-dx-shader-flags" 2>&1 %s | FileCheck %s
-; RUN: llc %s --filetype=obj -o - | obj2yaml | FileCheck %s --check-prefix=DXC
target triple = "dxil-pc-shadermodel6.7-library"
@@ -14,32 +13,25 @@ target triple = "dxil-pc-shadermodel6.7-library"
;CHECK-NEXT: ; Shader Flags for Module Functions
;CHECK-LABEL: ; Function add_i16 : 0x00800020
-define i16 @add_i16(i16 %a, i16 %b) #0 {
+define i16 @add_i16(i16 %a, i16 %b) {
%sum = add i16 %a, %b
ret i16 %sum
}
-; NOTE: The flag for native low precision is set for every function in the
-; module regardless of whether or not the function uses low precision data
-; types. This matches the behavior in DXC
+; NOTE: The flag for native low precision (0x80000) is set for every function
+; in the module regardless of whether or not the function uses low precision
+; data types (flag 0x20). This matches the behavior in DXC
;CHECK-LABEL: ; Function add_i32 : 0x00800000
-define i32 @add_i32(i32 %a, i32 %b) #0 {
+define i32 @add_i32(i32 %a, i32 %b) {
%sum = add i32 %a, %b
ret i32 %sum
}
;CHECK-LABEL: ; Function add_half : 0x00800020
-define half @add_half(half %a, half %b) #0 {
+define half @add_half(half %a, half %b) {
%sum = fadd half %a, %b
ret half %sum
}
-attributes #0 = { convergent norecurse nounwind "hlsl.export" }
-
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"dx.nativelowprec", i32 1}
-
-; DXC: - Name: SFI0
-; DXC-NEXT: Size: 8
-; DXC-NOT: Flags:
-; DXC: ...
>From 0e8b7fa1539cbdf9aac0f050bc89895a080ae1c3 Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Tue, 8 Apr 2025 23:42:45 +0000
Subject: [PATCH 7/8] Add a comment describing the purpose of the
NativeHalfType conditional
---
clang/lib/CodeGen/CGHLSLRuntime.cpp | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index de115d78c2040..77700ea3a676d 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -287,6 +287,10 @@ void CGHLSLRuntime::finishCodeGen() {
Triple T(M.getTargetTriple());
if (T.getArch() == Triple::ArchType::dxil)
addDxilValVersion(TargetOpts.DxilValidatorVersion, M);
+
+ // NativeHalfType corresponds to the -fnative-half-type clang option which is
+ // aliased by clang-dxc's -enable-16bit-types option. This option is used to
+ // set the UseNativeLowPrecision DXIL module flag in the DirectX backend
if (LangOpts.NativeHalfType)
M.setModuleFlag(llvm::Module::ModFlagBehavior::Error, "dx.nativelowprec",
1);
>From 71687e49861ccab5deb8350ebc8f6f327ed11db2 Mon Sep 17 00:00:00 2001
From: Icohedron <cheung.de...@gmail.com>
Date: Wed, 9 Apr 2025 21:44:05 +0000
Subject: [PATCH 8/8] Add '-Xclang -emit-llvm' to avoid running the DirectX
backend
---
clang/test/CodeGenHLSL/enable-16bit-types.hlsl | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
index c49f7c729abb5..9b5c742f9dacd 100644
--- a/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
+++ b/clang/test/CodeGenHLSL/enable-16bit-types.hlsl
@@ -1,5 +1,5 @@
-// RUN: %clang_dxc -enable-16bit-types -T lib_6_3 -HV 202x %s | FileCheck %s
--check-prefix=FLAG
-// RUN: %clang_dxc -T lib_6_3 -HV 202x %s | FileCheck %s --check-prefix=NOFLAG
+// RUN: %clang_dxc -enable-16bit-types -T lib_6_3 -HV 202x -Vd -Xclang
-emit-llvm %s | FileCheck %s --check-prefix=FLAG
+// RUN: %clang_dxc -T lib_6_3 -HV 202x -Vd -Xclang -emit-llvm %s | FileCheck
%s --check-prefix=NOFLAG
// FLAG-DAG: ![[NLP:.*]] = !{i32 1, !"dx.nativelowprec", i32 1}
// FLAG-DAG: !llvm.module.flags = !{{{.*}}![[NLP]]{{.*}}}
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
