[PATCH] D63852: [Clang] Move assembler into a separate file

2019-07-17 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

ping?


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[PATCH] D63852: [Clang] Move assembler into a separate file

2019-08-17 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

*friendly ping*


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[PATCH] D63852: [Clang] Move assembler into a separate file

2019-06-26 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added a reviewer: chandlerc.
Herald added subscribers: cfe-commits, mgorny.
Herald added a project: clang.

This change adds an AssemblerInvocation class, similar to the 
CompilerInvocation class. It can be used to invoke cc1as directly.

The project I'm working on wants to compile Clang and use it as a static 
library. For that to work, there must be a way to invoke the assembler 
programmatically, using the same arguments as you would otherwise pass to cc1as.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D63852

Files:
  clang/include/clang/Frontend/AssemblerInvocation.h
  clang/lib/Frontend/AssemblerInvocation.cpp
  clang/lib/Frontend/CMakeLists.txt
  clang/tools/driver/cc1as_main.cpp

Index: clang/tools/driver/cc1as_main.cpp
===
--- clang/tools/driver/cc1as_main.cpp
+++ clang/tools/driver/cc1as_main.cpp
@@ -15,6 +15,7 @@
 #include "clang/Basic/DiagnosticOptions.h"
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
+#include "clang/Frontend/AssemblerInvocation.h"
 #include "clang/Frontend/FrontendDiagnostic.h"
 #include "clang/Frontend/TextDiagnosticPrinter.h"
 #include "clang/Frontend/Utils.h"
@@ -55,485 +56,10 @@
 #include 
 #include 
 using namespace clang;
-using namespace clang::driver;
-using namespace clang::driver::options;
-using namespace llvm;
 using namespace llvm::opt;
 
 namespace {
 
-/// Helper class for representing a single invocation of the assembler.
-struct AssemblerInvocation {
-  /// @name Target Options
-  /// @{
-
-  /// The name of the target triple to assemble for.
-  std::string Triple;
-
-  /// If given, the name of the target CPU to determine which instructions
-  /// are legal.
-  std::string CPU;
-
-  /// The list of target specific features to enable or disable -- this should
-  /// be a list of strings starting with '+' or '-'.
-  std::vector Features;
-
-  /// The list of symbol definitions.
-  std::vector SymbolDefs;
-
-  /// @}
-  /// @name Language Options
-  /// @{
-
-  std::vector IncludePaths;
-  unsigned NoInitialTextSection : 1;
-  unsigned SaveTemporaryLabels : 1;
-  unsigned GenDwarfForAssembly : 1;
-  unsigned RelaxELFRelocations : 1;
-  unsigned DwarfVersion;
-  std::string DwarfDebugFlags;
-  std::string DwarfDebugProducer;
-  std::string DebugCompilationDir;
-  std::map DebugPrefixMap;
-  llvm::DebugCompressionType CompressDebugSections =
-  llvm::DebugCompressionType::None;
-  std::string MainFileName;
-  std::string SplitDwarfOutput;
-
-  /// @}
-  /// @name Frontend Options
-  /// @{
-
-  std::string InputFile;
-  std::vector LLVMArgs;
-  std::string OutputPath;
-  enum FileType {
-FT_Asm,  ///< Assembly (.s) output, transliterate mode.
-FT_Null, ///< No output, for timing purposes.
-FT_Obj   ///< Object file output.
-  };
-  FileType OutputType;
-  unsigned ShowHelp : 1;
-  unsigned ShowVersion : 1;
-
-  /// @}
-  /// @name Transliterate Options
-  /// @{
-
-  unsigned OutputAsmVariant;
-  unsigned ShowEncoding : 1;
-  unsigned ShowInst : 1;
-
-  /// @}
-  /// @name Assembler Options
-  /// @{
-
-  unsigned RelaxAll : 1;
-  unsigned NoExecStack : 1;
-  unsigned FatalWarnings : 1;
-  unsigned IncrementalLinkerCompatible : 1;
-  unsigned EmbedBitcode : 1;
-
-  /// The name of the relocation model to use.
-  std::string RelocationModel;
-
-  /// The ABI targeted by the backend. Specified using -target-abi. Empty
-  /// otherwise.
-  std::string TargetABI;
-
-  /// @}
-
-public:
-  AssemblerInvocation() {
-Triple = "";
-NoInitialTextSection = 0;
-InputFile = "-";
-OutputPath = "-";
-OutputType = FT_Asm;
-OutputAsmVariant = 0;
-ShowInst = 0;
-ShowEncoding = 0;
-RelaxAll = 0;
-NoExecStack = 0;
-FatalWarnings = 0;
-IncrementalLinkerCompatible = 0;
-DwarfVersion = 0;
-EmbedBitcode = 0;
-  }
-
-  static bool CreateFromArgs(AssemblerInvocation &Res,
- ArrayRef Argv,
- DiagnosticsEngine &Diags);
-};
-
-}
-
-bool AssemblerInvocation::CreateFromArgs(AssemblerInvocation &Opts,
- ArrayRef Argv,
- DiagnosticsEngine &Diags) {
-  bool Success = true;
-
-  // Parse the arguments.
-  std::unique_ptr OptTbl(createDriverOptTable());
-
-  const unsigned IncludedFlagsBitmask = options::CC1AsOption;
-  unsigned MissingArgIndex, MissingArgCount;
-  InputArgList Args = OptTbl->ParseArgs(Argv, MissingArgIndex, MissingArgCount,
-IncludedFlagsBitmask);
-
-  // Check for missing argument error.
-  if (MissingArgCount) {
-Diags.Report(diag::err_drv_missing_argument)
-<< Args.getArgString(MissingArgIndex) << MissingArgCount;
-Success = false;
-  }
-
-  // Issue errors on unknown arguments.
-  for (const Arg *A : Args.filtered(OPT_UNKNOWN)) {
-auto ArgString = A->getAsString(

[PATCH] D63852: [Clang] Move assembler into a separate file

2019-06-26 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 206769.
aykevl added a comment.

- removed useless anonymous namespace


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/Frontend/AssemblerInvocation.h
  clang/lib/Frontend/AssemblerInvocation.cpp
  clang/lib/Frontend/CMakeLists.txt
  clang/tools/driver/cc1as_main.cpp

Index: clang/tools/driver/cc1as_main.cpp
===
--- clang/tools/driver/cc1as_main.cpp
+++ clang/tools/driver/cc1as_main.cpp
@@ -15,6 +15,7 @@
 #include "clang/Basic/DiagnosticOptions.h"
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
+#include "clang/Frontend/AssemblerInvocation.h"
 #include "clang/Frontend/FrontendDiagnostic.h"
 #include "clang/Frontend/TextDiagnosticPrinter.h"
 #include "clang/Frontend/Utils.h"
@@ -55,485 +56,8 @@
 #include 
 #include 
 using namespace clang;
-using namespace clang::driver;
-using namespace clang::driver::options;
-using namespace llvm;
 using namespace llvm::opt;
 
-namespace {
-
-/// Helper class for representing a single invocation of the assembler.
-struct AssemblerInvocation {
-  /// @name Target Options
-  /// @{
-
-  /// The name of the target triple to assemble for.
-  std::string Triple;
-
-  /// If given, the name of the target CPU to determine which instructions
-  /// are legal.
-  std::string CPU;
-
-  /// The list of target specific features to enable or disable -- this should
-  /// be a list of strings starting with '+' or '-'.
-  std::vector Features;
-
-  /// The list of symbol definitions.
-  std::vector SymbolDefs;
-
-  /// @}
-  /// @name Language Options
-  /// @{
-
-  std::vector IncludePaths;
-  unsigned NoInitialTextSection : 1;
-  unsigned SaveTemporaryLabels : 1;
-  unsigned GenDwarfForAssembly : 1;
-  unsigned RelaxELFRelocations : 1;
-  unsigned DwarfVersion;
-  std::string DwarfDebugFlags;
-  std::string DwarfDebugProducer;
-  std::string DebugCompilationDir;
-  std::map DebugPrefixMap;
-  llvm::DebugCompressionType CompressDebugSections =
-  llvm::DebugCompressionType::None;
-  std::string MainFileName;
-  std::string SplitDwarfOutput;
-
-  /// @}
-  /// @name Frontend Options
-  /// @{
-
-  std::string InputFile;
-  std::vector LLVMArgs;
-  std::string OutputPath;
-  enum FileType {
-FT_Asm,  ///< Assembly (.s) output, transliterate mode.
-FT_Null, ///< No output, for timing purposes.
-FT_Obj   ///< Object file output.
-  };
-  FileType OutputType;
-  unsigned ShowHelp : 1;
-  unsigned ShowVersion : 1;
-
-  /// @}
-  /// @name Transliterate Options
-  /// @{
-
-  unsigned OutputAsmVariant;
-  unsigned ShowEncoding : 1;
-  unsigned ShowInst : 1;
-
-  /// @}
-  /// @name Assembler Options
-  /// @{
-
-  unsigned RelaxAll : 1;
-  unsigned NoExecStack : 1;
-  unsigned FatalWarnings : 1;
-  unsigned IncrementalLinkerCompatible : 1;
-  unsigned EmbedBitcode : 1;
-
-  /// The name of the relocation model to use.
-  std::string RelocationModel;
-
-  /// The ABI targeted by the backend. Specified using -target-abi. Empty
-  /// otherwise.
-  std::string TargetABI;
-
-  /// @}
-
-public:
-  AssemblerInvocation() {
-Triple = "";
-NoInitialTextSection = 0;
-InputFile = "-";
-OutputPath = "-";
-OutputType = FT_Asm;
-OutputAsmVariant = 0;
-ShowInst = 0;
-ShowEncoding = 0;
-RelaxAll = 0;
-NoExecStack = 0;
-FatalWarnings = 0;
-IncrementalLinkerCompatible = 0;
-DwarfVersion = 0;
-EmbedBitcode = 0;
-  }
-
-  static bool CreateFromArgs(AssemblerInvocation &Res,
- ArrayRef Argv,
- DiagnosticsEngine &Diags);
-};
-
-}
-
-bool AssemblerInvocation::CreateFromArgs(AssemblerInvocation &Opts,
- ArrayRef Argv,
- DiagnosticsEngine &Diags) {
-  bool Success = true;
-
-  // Parse the arguments.
-  std::unique_ptr OptTbl(createDriverOptTable());
-
-  const unsigned IncludedFlagsBitmask = options::CC1AsOption;
-  unsigned MissingArgIndex, MissingArgCount;
-  InputArgList Args = OptTbl->ParseArgs(Argv, MissingArgIndex, MissingArgCount,
-IncludedFlagsBitmask);
-
-  // Check for missing argument error.
-  if (MissingArgCount) {
-Diags.Report(diag::err_drv_missing_argument)
-<< Args.getArgString(MissingArgIndex) << MissingArgCount;
-Success = false;
-  }
-
-  // Issue errors on unknown arguments.
-  for (const Arg *A : Args.filtered(OPT_UNKNOWN)) {
-auto ArgString = A->getAsString(Args);
-std::string Nearest;
-if (OptTbl->findNearest(ArgString, Nearest, IncludedFlagsBitmask) > 1)
-  Diags.Report(diag::err_drv_unknown_argument) << ArgString;
-else
-  Diags.Report(diag::err_drv_unknown_argument_with_suggestion)
-  << ArgString << Nearest;
-Success = false;
-  }
-
-  // Constr

[PATCH] D63852: [Clang] Move assembler into a separate file

2020-04-05 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Ping?
I'm not sure who to add as a reviewer.


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[PATCH] D66324: clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM

2020-04-05 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

@xbolva00 I could, but to me this is not trivial (I'm not familiar with the 
code and I'm not sure what I would break). If it's easy for you, then please do 
(otherwise I can send a patch for review).
I have already worked around this issue in a different way (by running the 
compiler invocation in a separate process).


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[PATCH] D76182: [AVR] Support aliases in non-zero address space

2020-04-13 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 256977.
aykevl added a comment.

- added test
- using `getPointerAddressSpace` instead of a cast

This is now ready for review.


Repository:
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Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/alias-avr.c


Index: clang/test/CodeGen/alias-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/alias-avr.c
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck 
%s
+
+int mul(int a, int b) {
+   return a * b;
+}
+
+// CHECK: @multiply = alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
+int multiply(int x, int y) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4547,8 +4547,9 @@
   }
 
   // Create the new alias itself, but don't set a name yet.
+  unsigned AS = Aliasee->getType()->getPointerAddressSpace();
   auto *GA =
-  llvm::GlobalAlias::create(DeclTy, 0, LT, "", Aliasee, &getModule());
+  llvm::GlobalAlias::create(DeclTy, AS, LT, "", Aliasee, &getModule());
 
   if (Entry) {
 if (GA->getAliasee() == Entry) {


Index: clang/test/CodeGen/alias-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/alias-avr.c
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck %s
+
+int mul(int a, int b) {
+	return a * b;
+}
+
+// CHECK: @multiply = alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
+int multiply(int x, int y) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4547,8 +4547,9 @@
   }
 
   // Create the new alias itself, but don't set a name yet.
+  unsigned AS = Aliasee->getType()->getPointerAddressSpace();
   auto *GA =
-  llvm::GlobalAlias::create(DeclTy, 0, LT, "", Aliasee, &getModule());
+  llvm::GlobalAlias::create(DeclTy, AS, LT, "", Aliasee, &getModule());
 
   if (Entry) {
 if (GA->getAliasee() == Entry) {
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[PATCH] D76182: [AVR] Support aliases in non-zero address space

2020-04-13 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcfc002714a20: [AVR] Support aliases in non-zero address 
space (authored by aykevl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/alias-avr.c


Index: clang/test/CodeGen/alias-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/alias-avr.c
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck 
%s
+
+int mul(int a, int b) {
+   return a * b;
+}
+
+// CHECK: @multiply = alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
+int multiply(int x, int y) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4536,8 +4536,9 @@
   }
 
   // Create the new alias itself, but don't set a name yet.
+  unsigned AS = Aliasee->getType()->getPointerAddressSpace();
   auto *GA =
-  llvm::GlobalAlias::create(DeclTy, 0, LT, "", Aliasee, &getModule());
+  llvm::GlobalAlias::create(DeclTy, AS, LT, "", Aliasee, &getModule());
 
   if (Entry) {
 if (GA->getAliasee() == Entry) {


Index: clang/test/CodeGen/alias-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/alias-avr.c
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck %s
+
+int mul(int a, int b) {
+	return a * b;
+}
+
+// CHECK: @multiply = alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
+int multiply(int x, int y) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4536,8 +4536,9 @@
   }
 
   // Create the new alias itself, but don't set a name yet.
+  unsigned AS = Aliasee->getType()->getPointerAddressSpace();
   auto *GA =
-  llvm::GlobalAlias::create(DeclTy, 0, LT, "", Aliasee, &getModule());
+  llvm::GlobalAlias::create(DeclTy, AS, LT, "", Aliasee, &getModule());
 
   if (Entry) {
 if (GA->getAliasee() == Entry) {
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[PATCH] D78117: [AVR] Define __ELF__

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: dylanmckay, rjmccall, MaskRay.
aykevl added a project: LLVM.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.
aykevl updated this revision to Diff 257358.

This symbol is defined in avr-gcc. Because AVR normally uses the ELF format, 
define the symbol unconditionally.

This patch is needed to get Clang to compile compiler-rt.


Repository:
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https://reviews.llvm.org/D78117

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
  clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
  clang/test/CodeGen/avr/target-cpu-defines/common.c


Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ clang/test/CodeGen/avr/target-cpu-defines/common.c
@@ -4,3 +4,4 @@
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -300,6 +300,7 @@
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
 auto It = llvm::find_if(


Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ clang/test/CodeGen/avr/target-cpu-defines/common.c
@@ -4,3 +4,4 @@
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -300,6 +300,7 @@
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
 auto It = llvm::find_if(
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[PATCH] D78117: [AVR] Define __ELF__

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 257358.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78117/new/

https://reviews.llvm.org/D78117

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
  clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
  clang/test/CodeGen/avr/target-cpu-defines/common.c


Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ clang/test/CodeGen/avr/target-cpu-defines/common.c
@@ -4,3 +4,4 @@
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -300,6 +300,7 @@
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
 auto It = llvm::find_if(


Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ clang/test/CodeGen/avr/target-cpu-defines/common.c
@@ -4,3 +4,4 @@
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -300,6 +300,7 @@
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
 auto It = llvm::find_if(
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[PATCH] D78125: [AVR] Use the correct address space for non-prototyped function calls

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: dylanmckay, rjmccall, MaskRay.
aykevl added a project: LLVM.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.
aykevl edited the summary of this revision.

Some function declarations like this:

  void foo();

do not have a type declaration, for that you'd use:

  void foo(void);

Clang internally bitcasts the variadic function declaration to a function 
pointer, but doesn't use the correct address space on AVR. This commit fixes 
that.

This fix is necessary to let Clang compile compiler-rt for AVR.

---

Two remarks on this diff:

1. I wasn't sure whether there is a way to set the address space on a function. 
I at least couldn't seem to get it to work. If it is possible to set the 
address space, I think the fix is slightly wrong and should somehow get the 
address space from the function declaration instead of using 
`getProgramAddressSpace` (please let me know how or where to find this 
information).
2. I hoped there was a test file already where I could include this test, but 
at least CodeGen/address-space.c seemed a bit too complex to also test with AVR 
(for example, `int` is 16-bit on AVR).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78125

Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGen/address-space-avr.c


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to 
void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+   foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5048,7 +5048,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = getTypes().getDataLayout().getProgramAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+	foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5048,7 +5048,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = getTypes().getDataLayout().getProgramAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");
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[PATCH] D78117: [AVR] Define __ELF__

2020-04-14 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rGfe06e231ff15: [AVR] Define __ELF__ (authored by aykevl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78117/new/

https://reviews.llvm.org/D78117

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
  clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
  clang/test/CodeGen/avr/target-cpu-defines/common.c


Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ clang/test/CodeGen/avr/target-cpu-defines/common.c
@@ -4,3 +4,4 @@
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -300,6 +300,7 @@
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
 auto It = llvm::find_if(


Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ clang/test/CodeGen/avr/target-cpu-defines/common.c
@@ -4,3 +4,4 @@
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
@@ -5,3 +5,4 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -300,6 +300,7 @@
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
+  Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {
 auto It = llvm::find_if(
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[PATCH] D78117: [AVR] Define __ELF__

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Okay, I have committed this patch and created a new patch to move the files: 
https://reviews.llvm.org/D78163


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[PATCH] D78163: [AVR][NFC] Move preprocessor tests to Preprocessor directory

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: dylanmckay, rjmccall, MaskRay.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.
MaskRay added a comment.

Not sure we need `target-cpu-defines/`

You can add a `lit.local.cfg` to avoid `REQUIRES: avr-registered-target`


These tests were placed in the CodeGen directory while they really should have 
been placed in the Preprocessor directory.

---

See https://reviews.llvm.org/D78117 for background.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78163

Files:
  clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
  clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
  clang/test/CodeGen/avr/target-cpu-defines/common.c
  clang/test/Preprocessor/AVR/target-cpu-defines/atmega328p.c
  clang/test/Preprocessor/AVR/target-cpu-defines/attiny104.c
  clang/test/Preprocessor/AVR/target-cpu-defines/common.c


Index: clang/test/Preprocessor/AVR/target-cpu-defines/common.c
===
--- /dev/null
+++ clang/test/Preprocessor/AVR/target-cpu-defines/common.c
@@ -0,0 +1,7 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
+
+// CHECK: #define AVR 1
+// CHECK: #define __AVR 1
+// CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/AVR/target-cpu-defines/attiny104.c
===
--- /dev/null
+++ clang/test/Preprocessor/AVR/target-cpu-defines/attiny104.c
@@ -0,0 +1,8 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 
/dev/null | FileCheck -match-full-lines %s
+
+// CHECK: #define AVR 1
+// CHECK: #define __AVR 1
+// CHECK: #define __AVR_ATtiny104__ 1
+// CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/AVR/target-cpu-defines/atmega328p.c
===
--- /dev/null
+++ clang/test/Preprocessor/AVR/target-cpu-defines/atmega328p.c
@@ -0,0 +1,8 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu atmega328p 
/dev/null | FileCheck -match-full-lines %s
+
+// CHECK: #define AVR 1
+// CHECK: #define __AVR 1
+// CHECK: #define __AVR_ATmega328P__ 1
+// CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/common.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/common.c
+++ /dev/null
@@ -1,7 +0,0 @@
-// REQUIRES: avr-registered-target
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
-
-// CHECK: #define AVR 1
-// CHECK: #define __AVR 1
-// CHECK: #define __AVR__ 1
-// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
+++ /dev/null
@@ -1,8 +0,0 @@
-// REQUIRES: avr-registered-target
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 
/dev/null | FileCheck -match-full-lines %s
-
-// CHECK: #define AVR 1
-// CHECK: #define __AVR 1
-// CHECK: #define __AVR_ATtiny104__ 1
-// CHECK: #define __AVR__ 1
-// CHECK: #define __ELF__ 1
Index: clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
===
--- clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
+++ /dev/null
@@ -1,8 +0,0 @@
-// REQUIRES: avr-registered-target
-// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu atmega328p 
/dev/null | FileCheck -match-full-lines %s
-
-// CHECK: #define AVR 1
-// CHECK: #define __AVR 1
-// CHECK: #define __AVR_ATmega328P__ 1
-// CHECK: #define __AVR__ 1
-// CHECK: #define __ELF__ 1


Index: clang/test/Preprocessor/AVR/target-cpu-defines/common.c
===
--- /dev/null
+++ clang/test/Preprocessor/AVR/target-cpu-defines/common.c
@@ -0,0 +1,7 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck -match-full-lines %s
+
+// CHECK: #define AVR 1
+// CHECK: #define __AVR 1
+// CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/AVR/target-cpu-defines/attiny104.c
===
--- /dev/null
+++ clang/test/Preprocessor/AVR/target-cpu-defines/attiny104.c
@@ -0,0 +1,8 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 /dev/null | FileCheck -match-full-lines %s
+
+// CHECK: #define AVR 1
+// CHECK: #define __AVR 1
+// CHECK: #define __AVR_ATtiny104__ 1
+// CHECK: #define __AVR__ 1
+// CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor

[PATCH] D78125: [AVR] Use the correct address space for non-prototyped function calls

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 257548.
aykevl added a comment.

Update to use the function pointer address space from the function declaration.

(This is slightly different from what @rjmccall suggested but I think this is 
more readable).


Repository:
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CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D78125

Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGen/address-space-avr.c


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to 
void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+   foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5048,7 +5048,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = Callee.getFunctionPointer()->getType()->getPointerAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+	foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5048,7 +5048,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = Callee.getFunctionPointer()->getType()->getPointerAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");
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[PATCH] D78125: [AVR] Use the correct address space for non-prototyped function calls

2020-04-14 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

In D78125#1982471 , @MaskRay wrote:

> > This fix is necessary to let Clang compile compiler-rt for AVR.
>
> This suggests that some compiler-rt declarations do not follow the best 
> practice... What are they?


The calls come from `__addXf3__` (in fp_add_impl.inc). This is what I get when 
I dump the bitcast:

  i16 () addrspace(1)* bitcast (i16 (...) addrspace(1)* @__fe_getround to i16 
() addrspace(1)*)
  i16 () addrspace(1)* bitcast (i16 (...) addrspace(1)* @__fe_raise_inexact to 
i16 () addrspace(1)*)
  i16 () addrspace(1)* bitcast (i16 (...) addrspace(1)* @__fe_getround to i16 
() addrspace(1)*)
  i16 () addrspace(1)* bitcast (i16 (...) addrspace(1)* @__fe_raise_inexact to 
i16 () addrspace(1)*)

So they must have been introduced with D57143 .


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[PATCH] D78125: [AVR] Use the correct address space for non-prototyped function calls

2020-04-15 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 257687.
aykevl marked an inline comment as done.
aykevl added a comment.

- added comment explaining the test case


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGen/address-space-avr.c


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// Test that function declarations in nonzero address spaces without prototype
+// are called correctly.
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to 
void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+   foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5048,7 +5048,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = Callee.getFunctionPointer()->getType()->getPointerAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// Test that function declarations in nonzero address spaces without prototype
+// are called correctly.
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+	foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5048,7 +5048,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = Callee.getFunctionPointer()->getType()->getPointerAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");
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[PATCH] D78163: [AVR][NFC] Move preprocessor tests to Preprocessor directory

2020-04-15 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Honestly I don't know the convention but I agree with @rjmccall that the 
convention appears to be to not use a separate subdirectory (I don't see any 
other arch-specific subdirectories). So, should the files be moved to 
clang/test/Preprocessor/avr-*.c (e.g. clang/test/Preprocessor/avr-attiny104.c) 
while keeping `REQUIRES: avr-registered-target`?


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[PATCH] D78125: [AVR] Use the correct address space for non-prototyped function calls

2020-04-15 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG215dc2e20334: [AVR] Use the correct address space for 
non-prototyped function calls (authored by aykevl).

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Files:
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  clang/test/CodeGen/address-space-avr.c


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// Test that function declarations in nonzero address spaces without prototype
+// are called correctly.
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to 
void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+   foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5063,7 +5063,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = Callee.getFunctionPointer()->getType()->getPointerAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");


Index: clang/test/CodeGen/address-space-avr.c
===
--- /dev/null
+++ clang/test/CodeGen/address-space-avr.c
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple avr -emit-llvm < %s | FileCheck %s
+
+// Test that function declarations in nonzero address spaces without prototype
+// are called correctly.
+
+// CHECK: define void @bar() addrspace(1)
+// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to void (i16) addrspace(1)*)(i16 3)
+// CHECK: declare void @foo(...) addrspace(1)
+void foo();
+void bar(void) {
+	foo(3);
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -5063,7 +5063,8 @@
   // to the function type.
   if (isa(FnType) || Chain) {
 llvm::Type *CalleeTy = getTypes().GetFunctionType(FnInfo);
-CalleeTy = CalleeTy->getPointerTo();
+int AS = Callee.getFunctionPointer()->getType()->getPointerAddressSpace();
+CalleeTy = CalleeTy->getPointerTo(AS);
 
 llvm::Value *CalleePtr = Callee.getFunctionPointer();
 CalleePtr = Builder.CreateBitCast(CalleePtr, CalleeTy, "callee.knr.cast");
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[PATCH] D81408: [builtins] Improve compatibility with 16 bit targets

2020-06-09 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I tested this patch against my local testing system to make sure it didn't 
break anything, and I get the same number of failures (most of which are due to 
a missing complex.h file, which is unrelated). So it looks fine from my point 
of view, although I know not enough about this code to LGTM it.
Note that double float (float128) doesn't work in my setup, so I can't test 
changes related to that.


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[PATCH] D81285: [builtins] Change si_int to int in some helper declarations

2020-06-09 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I'm not sure whether `native_int` is any clearer than just `int`. I'm afraid it 
only introduces more complexity ("What's `native_int`? Oh, it's just `int`").

Perhaps a controversial idea: what about changing to use stdint.h types?
`si_int` -> `int32_t`
`su_int` -> `uint32_t`
`di_int` -> `int64_t`
etc
These types are clearly defined and immediately recognizable. The meaning is, 
as far as I can see, exactly the same (`si_int` etc seems to be a leftover from 
GCC internal naming conventions, such as `SImode`).

Also note that the libgcc documentation does not always reflect the real world. 
For example, `__divmodsi4` on AVR libgcc has a very different signature: it 
returns both the division result and the remainder in registers.




Comment at: compiler-rt/lib/builtins/int_lib.h:112
 
-uint32_t __inline __builtin_ctz(uint32_t value) {
+int __inline __builtin_ctz(uint32_t value) {
   unsigned long trailing_zero = 0;

Why `int` and not `native_int` here?


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[PATCH] D63852: [Clang] Move assembler into a separate file

2020-06-10 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

@echristo any chance you could take a look at this?


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[PATCH] D81285: [builtins] Change si_int to int in some helper declarations

2020-06-10 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I need to recompile LLVM to test this patch so it might take a while.

In D81285#2082517 , @atrosinenko wrote:

> In D81285#2082394 , @aykevl wrote:
>
> > Also note that the libgcc documentation does not always reflect the real 
> > world. For example, `__divmodsi4` on AVR libgcc has a very different 
> > signature: it returns both the division result and the remainder in 
> > registers.
>
>
> Do you mean some special calling convention not used outside the 
> `libgcc`/`clang_rt`? MSP430 has one as well. And I still have to decide how 
> to express for //some of// generic C implementations that they should use 
> that special calling convention on MSP430 without cluttering the sources with 
> `O(target count)` complexity. :) Meanwhile, some hacks do exist for ARM 
> target already.


I don't mean a separate calling convention, although AVR has that as well. 
Rather, that the builtin has a different function signature. This signature is 
a bit hard to express in C so you might consider it a different ABI I guess. I 
implemented it in C by packing the two return values in a single `uint64_t`.




Comment at: compiler-rt/lib/builtins/int_lib.h:112
 
-uint32_t __inline __builtin_ctz(uint32_t value) {
+int __inline __builtin_ctz(uint32_t value) {
   unsigned long trailing_zero = 0;

atrosinenko wrote:
> aykevl wrote:
> > Why `int` and not `native_int` here?
> Just to use more "textually identical" prototype as for an actual 
> `__builtin_ctz` from GCC. On the other hand, such dilemma could be one of 
> arguments against `native_int`.
Yes, that makes sense. It is actually defined with `int` in [the official 
documentation](https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html), and 
because this is at the C language level and not at the ABI/target level, it's 
not one of the "int but really int32_t" types.

That said, I think the parameter should also be `unsigned int` instead of 
`uint32_t`. And the same goes for the other types below. Although, in practice, 
it doesn't really matter as it's all MSVC with 32-bit int everywhere.


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[PATCH] D81285: [builtins] Change si_int to int in some helper declarations

2020-06-19 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

In D81285#2102948 , @atrosinenko wrote:

> On renaming fixed width integer types to their traditional names: I would 
> prefer sending such patch afterwards, it would probably be as simple as just 
> running `sed --in-place` several times.


Yes definitely. It seems best to me to separate refactorings from functional 
changes. If it should indeed be done, I'm not a maintainer of compiler-rt.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2020-06-23 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

The reason to not call into LLVM directly is because I want to use the compiler 
driver, to be compatible with all the compiler flags. Reimplementing the 
assembler driver would be a pain.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2020-06-23 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

(sorry, I missed your comment)

I basically want to run `clang` by linking to it and calling it directly, 
without invoking any external commands.
You can see here how I did it:
https://github.com/tinygo-org/tinygo/blob/master/builder/clang.cpp
I copied the cc1as code in the project and modified it a little bit to be 
callable, essentially what this patch does:
https://github.com/tinygo-org/tinygo/blob/master/builder/cc1as.cpp

Ideally there would be something like the `tinygo_clang_driver` in Clang. Maybe 
there is, the last time I looked I couldn't find it.
What is most important is that it will not try to call `clang` externally, 
because that will make distribution much harder.

As a sidenote: I have needed to work around some global state in Clang/LLVM by 
creating a new process (essentially calling `argv[0]`) and doing the C file 
compilation in there. As one compiler invocation of TinyGo may need to compile 
several C files, global state led to problems. This is different from calling 
`clang` as I'm still shipping a single statically linked binary instead of 
several binaries.


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[PATCH] D81282: [builtins] Move more float128-related helpers to GENERIC_TF_SOURCES list

2020-06-25 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Look reasonable from my POV, but I don't know enough about CMake or the 
compiler-rt build system to LGTM this.


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[PATCH] D77221: [AVR] Rework MCU family detection to support more AVR MCUs

2020-04-19 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Great! I was considering writing something like this but this patch is much 
better than what I had in mind.

Note that this might conflict with D78117 .


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[PATCH] D77221: [AVR] Rework MCU family detection to support more AVR MCUs

2020-04-20 Thread Ayke via Phabricator via cfe-commits
aykevl added inline comments.



Comment at: clang/lib/Basic/Targets/AVR.cpp:35
+auto FamilyInfo = llvm::AVR::getFamilyInfo(Family.getValue());
+Builder.defineMacro("__AVR_ARCH__", Twine(FamilyInfo.Number));
+  }

This should have tests. Take a look at D78117 for how you can add them.


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[PATCH] D78491: Avoid relying on address space zero default parameter in llvm/IR

2020-04-20 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I can't give an LGTM but at least from my perspective I very much welcome this 
change. I am still hitting problems with non-zero address spaces on AVR. One 
nit in an inline comment.

Do you plan on eventually removing `LLVM_NO_IMPLICIT_ADDRESS_SPACE` when the 
transition is finished? If so, I think it's worth documenting this somewhere - 
perhaps at llvm/lib/IR/CMakeLists.txt.




Comment at: llvm/include/llvm/IR/DataLayout.h:356
   /// Layout pointer alignment
-  Align getPointerABIAlignment(unsigned AS) const;
 

There is no default address space in this declaration?


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[PATCH] D78163: [AVR][NFC] Move preprocessor tests to Preprocessor directory

2020-04-23 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 259621.
aykevl added a comment.

- moved test files out of the AVR-specific directory
- removed the `REQUIRES:` line

In D78163#1984210 , @rjmccall wrote:

> I don't think the REQUIRES is needed unless there's something special about 
> AVR as a target.  Clang doesn't conditionally compile out frontend target 
> support.


I grepped for `REQUIRES:` and found just a few files with such a line - most 
files by far didn't specify any requirements. So it should be fine to leave it 
out.


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Files:
  clang/test/CodeGen/avr/target-cpu-defines/atmega328p.c
  clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
  clang/test/CodeGen/avr/target-cpu-defines/common.c
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c
  clang/test/Preprocessor/avr-common.c


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 
/dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu atmega328p 
/dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 /dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu atmega328p /dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
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[PATCH] D78163: [AVR][NFC] Move preprocessor tests to Preprocessor directory

2020-04-25 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rGceba881aeac1: [AVR][NFC] Move preprocessor tests to 
Preprocessor directory (authored by aykevl).

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Files:
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  clang/test/CodeGen/avr/target-cpu-defines/attiny104.c
  clang/test/CodeGen/avr/target-cpu-defines/common.c
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c
  clang/test/Preprocessor/avr-common.c


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck 
-match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 
/dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu atmega328p 
/dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1


Index: clang/test/Preprocessor/avr-common.c
===
--- clang/test/Preprocessor/avr-common.c
+++ clang/test/Preprocessor/avr-common.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown /dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu attiny104 /dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -1,4 +1,3 @@
-// REQUIRES: avr-registered-target
 // RUN: %clang_cc1 -E -dM -triple avr-unknown-unknown -target-cpu atmega328p /dev/null | FileCheck -match-full-lines %s
 
 // CHECK: #define AVR 1
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[PATCH] D77221: [AVR] Rework MCU family detection to support more AVR MCUs

2020-04-29 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

A thought: should the AVR family be included in the target triple? Like 
`avr5-unknown-unknown` (similar to `armv6m-none-eabi`, `armv7m-none-eabi`, etc).
The different variations do sometimes change the architecture in incompatible 
ways, such as with the call instruction 

 which pushes a return address of two or three bytes depending on the 
architecture variant (and thus makes it impossible to pass parameters on the 
stack reliably).

I don't think this should block this patch (which I hope will get updated so it 
can land soon), but it may be something to consider.


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[PATCH] D118095: [clang][AVR] Reject non assembly source files for the avr1 family

2022-03-25 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.
Herald added a subscriber: StephenFan.

@MaskRay it was my suggestion to move this from the toolchain specific file to 
the generic file, because it makes the implementation much simpler. See my 
comment D117423#3251110  for details.

In D118095#3282039 , @MaskRay wrote:

> Rejecting some -mmcu= for C source files looks quite dubious. Does it really 
> help users?

For context: the avr1 family isn't supported by avr-gcc either. It's a old and 
rather limited subset of the AVR instruction set. I assume it's going to be 
rather difficult (and not worth the trouble) to write a C compiler for it, as 
it doesn't even have a fully functional stack. From Wikipedia 
:

> The AVR1 subset was not popular and no new models have been introduced since 
> 2000. It omits all RAM except for the 32 registers mapped at address 0–31 and 
> the I/O ports at addresses 32–95. The stack is replaced by a 3-level hardware 
> stack, and the PUSH and POP instructions are deleted. All 16-bit operations 
> are deleted, as are IJMP, ICALL, and all load and store addressing modes 
> except indirect via Z.

So I think the idea is to disallow this family so that users won't accidentally 
try to use a C compiler for these chips.


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[PATCH] D123200: [compiler-rt][CMake] Add initial support of target AVR

2022-04-07 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

What about chip families other than avr2? Some have a different PC pointer size 
(1-3 bytes, therefore affecting the ABI), some have different instructions, etc.


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[PATCH] D72404: [ThinLTO/FullLTO] Support Os and Oz

2022-02-08 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.
Herald added a reviewer: MaskRay.

I would be very interested in this patch, because for me to use ThinLTO without 
size regressions I need to set the optimization size level in the linker 
(`PassManagerBuilder.SizeLevel` etc).
This patch seems mostly correct to me, except for the function attributes. 
These function attributes (`optsize`, `minsize`) should IMHO be set in the 
frontend, not in the linker.

Apart from that, would it be reasonable to implement this in the form of 
`-plugin-opt=Os` and `-plugin-opt=Oz`? That is perhaps a cleaner UI (doesn't 
need a new flag!) and more cleanly maps to `PassBuilder::Oz` and the like.


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[PATCH] D72404: [ThinLTO/FullLTO] Support Os and Oz

2022-02-09 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Apparently there is also another patch that tries to do something very similar: 
D81223 .

In D72404#3305275 , @mehdi_amini wrote:

> Why can't you build the object files with `-Os` in the first place instead of 
> changing the optimization level between the compilation and the linking 
> phases?

I'm not changing the optimization level. The bitcode files are built with an 
equivalent of `-Oz` and have the `optsize` and `minsize` attributes. It's the 
optimization passes in the linker (ThinLTO) that don't respect these attributes.

In D72404#3305267 , @steven_wu wrote:

> Before I say yes or no to this patch, have you figured out what are the 
> passes that causes the most size regression? Ideally, with function 
> attributes on the function, it shouldn't be much size impact on the output.

Unfortunately, there is an impact. I did a quick test with a small program 
(around 4.7kB compiled code) and it looks like the LoopRotate pass is the main 
culprit. If `MaxHeaderSize` is set to 0 instead of -1, the code size regression 
is avoided. The following hacky patch avoids the code size increase:

  diff --git a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp 
b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
  index aa916345954d..99be1926cf34 100644
  --- a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
  +++ b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
  @@ -450,7 +450,7 @@ void PassManagerBuilder::addFunctionSimplificationPasses(
 // TODO: Investigate promotion cap for O1.
 MPM.add(createLICMPass(LicmMssaOptCap, LicmMssaNoAccForPromotionCap));
 // Rotate Loop - disable header duplication at -Oz
  -  MPM.add(createLoopRotatePass(SizeLevel == 2 ? 0 : -1, PrepareForLTO));
  +  MPM.add(createLoopRotatePass(0/*SizeLevel == 2 ? 0 : -1*/, PrepareForLTO));
 // TODO: Investigate promotion cap for O1.
 MPM.add(createLICMPass(LicmMssaOptCap, LicmMssaNoAccForPromotionCap));
 if (EnableSimpleLoopUnswitch)
  @@ -917,7 +917,7 @@ void PassManagerBuilder::populateModulePassManager(
 // Re-rotate loops in all our loop nests. These may have fallout out of
 // rotated form due to GVN or other transformations, and the vectorizer 
relies
 // on the rotated form. Disable header duplication at -Oz.
  -  MPM.add(createLoopRotatePass(SizeLevel == 2 ? 0 : -1, PrepareForLTO));
  +  MPM.add(createLoopRotatePass(0 /*SizeLevel == 2 ? 0 : -1*/, 
PrepareForLTO));
   
 // Distribute loops to allow partial vectorization.  I.e. isolate 
dependences
 // into separate loop that would otherwise inhibit vectorization.  This is

So, should all passes just look at the `optsize` and `minsize` attributes 
instead of the `SizeLevel`? In other words, should 
`PassManagerBuilder.SizeLevel` be removed and should passes only look at 
function attributes instead of `SizeLevel`? Because at the moment, it's a weird 
mix of both. IMHO size level should either all go via function attributes or 
via a flag, not something in between as it is now.
Also, if size level is done via function attributes, why not optimization 
level? There is already `optnone`. I'm not saying that's better, but right now 
I don't see the logic in this whole system.


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[PATCH] D72404: [ThinLTO/FullLTO] Support Os and Oz

2022-02-09 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

After some more testing on a larger amount of code (many small programs, 
together over 1MB of code), LoopRotate indeed seems to be the culprit. I'm now 
looking into a patch to LoopRotate to respect the `optsize` function attribute.


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[PATCH] D72404: [ThinLTO/FullLTO] Support Os and Oz

2022-02-10 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

@mehdi_amini thanks for explaining! D119342  
moves slightly closer to removing SizeLevel from the pass pipeline setup.

---

In other news, I found a workaround that can be used to avoid the size increase 
due to LoopRotate (until D119342  is merged). 
Basically, just pass the flags `-mllvm --rotation-max-header-size=0` to ld.lld 
when compiling with `-Oz`.


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[PATCH] D124815: [libclang] Fall back to getMainExecutable when dladdr fails

2022-05-02 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: MaskRay, rsmith.
Herald added subscribers: StephenFan, arphaman.
Herald added a project: All.
aykevl requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

musl-libc doesn't support dladdr in statically linked binaries:

> Are you using static or dynamic linking? If static, dladdr is just a
> stub that always fails. It could be implemented to work under some
> conditions, but it would be highly dependent on what options you
> compile the binary with, since by default static binaries do not
> contain the bloat that would be needed to perform introspection.

Source: https://www.openwall.com/lists/musl/2013/01/15/25 (in response to a bug 
report).

Libclang unfortunately uses dladdr to find the ResourcesPath so will fail if it 
is linked statically on Alpine Linux. This patch fixes this issue by falling 
back to getMainExecutable if dladdr returns an error.

Reference: 
https://github.com/llvm/llvm-project/issues/40641#issuecomment-981011427


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Files:
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Index: clang/tools/libclang/CIndexer.cpp
===
--- clang/tools/libclang/CIndexer.cpp
+++ clang/tools/libclang/CIndexer.cpp
@@ -125,13 +125,23 @@
 #elif defined(_AIX)
   getClangResourcesPathImplAIX(LibClangPath);
 #else
-  // This silly cast below avoids a C++ warning.
   Dl_info info;
-  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) == 0)
-llvm_unreachable("Call to dladdr() failed");
+  std::string Path;
+  // This silly cast below avoids a C++ warning.
+  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) != 0) {
+// We now have the CIndex directory, locate clang relative to it.
+LibClangPath += info.dli_fname;
+  } else if (!(Path = llvm::sys::fs::getMainExecutable(nullptr, 
nullptr)).empty()) {
+// If we can't get the path using dladdr, try to get the main executable
+// path. This may be needed when we're statically linking libclang with
+// musl libc, for example.
+LibClangPath += Path;
+  } else {
+// It's rather unlikely we end up here. But it could happen, so report an
+// error instead of crashing.
+llvm::report_fatal_error("Could not locate Clang resource path");
+  }
 
-  // We now have the CIndex directory, locate clang relative to it.
-  LibClangPath += info.dli_fname;
 #endif
 
   // Cache our result.


Index: clang/tools/libclang/CIndexer.cpp
===
--- clang/tools/libclang/CIndexer.cpp
+++ clang/tools/libclang/CIndexer.cpp
@@ -125,13 +125,23 @@
 #elif defined(_AIX)
   getClangResourcesPathImplAIX(LibClangPath);
 #else
-  // This silly cast below avoids a C++ warning.
   Dl_info info;
-  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) == 0)
-llvm_unreachable("Call to dladdr() failed");
+  std::string Path;
+  // This silly cast below avoids a C++ warning.
+  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) != 0) {
+// We now have the CIndex directory, locate clang relative to it.
+LibClangPath += info.dli_fname;
+  } else if (!(Path = llvm::sys::fs::getMainExecutable(nullptr, nullptr)).empty()) {
+// If we can't get the path using dladdr, try to get the main executable
+// path. This may be needed when we're statically linking libclang with
+// musl libc, for example.
+LibClangPath += Path;
+  } else {
+// It's rather unlikely we end up here. But it could happen, so report an
+// error instead of crashing.
+llvm::report_fatal_error("Could not locate Clang resource path");
+  }
 
-  // We now have the CIndex directory, locate clang relative to it.
-  LibClangPath += info.dli_fname;
 #endif
 
   // Cache our result.
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[PATCH] D123200: [compiler-rt][builtins] Add several helper functions for AVR

2022-05-05 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

@benshi001 I have been looking through the GCC code and I think avr-gcc also 
has a special calling convention for many other functions, including `__mulqi3` 
and `__mulhi3`.

Source:

1. I think this is where the ABI is specified in the compiler: 
https://github.com/gcc-mirror/gcc/blob/releases/gcc-5.4.0/gcc/config/avr/avr.md#L1543-L1549
 You can see that it multiplies R24 with R22 and stores the result in R24, and 
clobbers R22 in the process. But no other registers.
2. In this code sample , avr-gcc doesn't save 
`char c` (`r20`) across the `__mulqi3` and `__mulhi3` calls.

Therefore, I think we need to be a bit more careful with defining these AVR 
builtins and check the ABI in avr-gcc first.
Also, we can make use of this and optimize the AVR backend more (you can see 
that the Clang generated code is much worse than avr-gcc in the above examples).


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[PATCH] D124815: [libclang] Fall back to getMainExecutable when dladdr fails

2022-05-11 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

This file is also linked to `libclang.a`.

When linking `libclang.a` on Alpine Linux, `dladdr` is not available and the 
only fallback I can think of is `getMainExecutable`.


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[PATCH] D86629: [AVR][clang] Pass the address of the data section to the linker for ATmega328

2020-09-21 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Looks reasonable to me, although I can't really comment on the contents of this 
as I'm not very familiar with this code.

I would like to see just a single MCU table that contains all the information 
(including start addresses). Maybe it can even be generated from ATDF files 
(http://packs.download.atmel.com/), at least the first time. However, this is a 
good start (not least because now it warns when producing invalid binaries).




Comment at: clang/lib/Driver/ToolChains/AVR.cpp:40
 
+llvm::Optional GetMcuSectionAddressData(StringRef MCU) {
+  return llvm::StringSwitch>(MCU)

I don't think the LLVM coding style says something about this, but coming from 
Go I'm more used to capitalized abbreviations (`MCU`, 
`GetMCUSectionAddressData`).

However, this is just a superficial thing, feel free to ignore.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2020-10-31 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

ping?


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[PATCH] D88410: [clang][AVR] Improve avr-ld command line options

2020-10-31 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I haven't verified this all but this looks reasonable to me, at least until a 
better way is figured out to store MCU specific information in the compiler.

The tests may be a little bit excessive though, they all seem to be testing the 
same thing.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2021-01-23 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2325157c0568: [Clang] Move assembler into a separate file 
(authored by aykevl).

Changed prior to commit:
  https://reviews.llvm.org/D63852?vs=206769&id=318750#toc

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Files:
  clang/include/clang/Frontend/AssemblerInvocation.h
  clang/lib/Frontend/AssemblerInvocation.cpp
  clang/lib/Frontend/CMakeLists.txt
  clang/tools/driver/cc1as_main.cpp

Index: clang/lib/Frontend/CMakeLists.txt
===
--- clang/lib/Frontend/CMakeLists.txt
+++ clang/lib/Frontend/CMakeLists.txt
@@ -9,6 +9,7 @@
   )
 
 add_clang_library(clangFrontend
+  AssemblerInvocation.cpp
   ASTConsumers.cpp
   ASTMerge.cpp
   ASTUnit.cpp
Index: clang/tools/driver/cc1as_main.cpp
===
--- clang/tools/driver/cc1as_main.cpp
+++ clang/tools/driver/cc1as_main.cpp
@@ -15,6 +15,7 @@
 #include "clang/Basic/DiagnosticOptions.h"
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
+#include "clang/Frontend/AssemblerInvocation.h"
 #include "clang/Frontend/FrontendDiagnostic.h"
 #include "clang/Frontend/TextDiagnosticPrinter.h"
 #include "clang/Frontend/Utils.h"
@@ -56,493 +57,9 @@
 #include 
 #include 
 using namespace clang;
-using namespace clang::driver;
-using namespace clang::driver::options;
 using namespace llvm;
 using namespace llvm::opt;
 
-namespace {
-
-/// Helper class for representing a single invocation of the assembler.
-struct AssemblerInvocation {
-  /// @name Target Options
-  /// @{
-
-  /// The name of the target triple to assemble for.
-  std::string Triple;
-
-  /// If given, the name of the target CPU to determine which instructions
-  /// are legal.
-  std::string CPU;
-
-  /// The list of target specific features to enable or disable -- this should
-  /// be a list of strings starting with '+' or '-'.
-  std::vector Features;
-
-  /// The list of symbol definitions.
-  std::vector SymbolDefs;
-
-  /// @}
-  /// @name Language Options
-  /// @{
-
-  std::vector IncludePaths;
-  unsigned NoInitialTextSection : 1;
-  unsigned SaveTemporaryLabels : 1;
-  unsigned GenDwarfForAssembly : 1;
-  unsigned RelaxELFRelocations : 1;
-  unsigned DwarfVersion;
-  std::string DwarfDebugFlags;
-  std::string DwarfDebugProducer;
-  std::string DebugCompilationDir;
-  std::map DebugPrefixMap;
-  llvm::DebugCompressionType CompressDebugSections =
-  llvm::DebugCompressionType::None;
-  std::string MainFileName;
-  std::string SplitDwarfOutput;
-
-  /// @}
-  /// @name Frontend Options
-  /// @{
-
-  std::string InputFile;
-  std::vector LLVMArgs;
-  std::string OutputPath;
-  enum FileType {
-FT_Asm,  ///< Assembly (.s) output, transliterate mode.
-FT_Null, ///< No output, for timing purposes.
-FT_Obj   ///< Object file output.
-  };
-  FileType OutputType;
-  unsigned ShowHelp : 1;
-  unsigned ShowVersion : 1;
-
-  /// @}
-  /// @name Transliterate Options
-  /// @{
-
-  unsigned OutputAsmVariant;
-  unsigned ShowEncoding : 1;
-  unsigned ShowInst : 1;
-
-  /// @}
-  /// @name Assembler Options
-  /// @{
-
-  unsigned RelaxAll : 1;
-  unsigned NoExecStack : 1;
-  unsigned FatalWarnings : 1;
-  unsigned NoWarn : 1;
-  unsigned IncrementalLinkerCompatible : 1;
-  unsigned EmbedBitcode : 1;
-
-  /// The name of the relocation model to use.
-  std::string RelocationModel;
-
-  /// The ABI targeted by the backend. Specified using -target-abi. Empty
-  /// otherwise.
-  std::string TargetABI;
-
-  /// @}
-
-public:
-  AssemblerInvocation() {
-Triple = "";
-NoInitialTextSection = 0;
-InputFile = "-";
-OutputPath = "-";
-OutputType = FT_Asm;
-OutputAsmVariant = 0;
-ShowInst = 0;
-ShowEncoding = 0;
-RelaxAll = 0;
-NoExecStack = 0;
-FatalWarnings = 0;
-NoWarn = 0;
-IncrementalLinkerCompatible = 0;
-DwarfVersion = 0;
-EmbedBitcode = 0;
-  }
-
-  static bool CreateFromArgs(AssemblerInvocation &Res,
- ArrayRef Argv,
- DiagnosticsEngine &Diags);
-};
-
-}
-
-bool AssemblerInvocation::CreateFromArgs(AssemblerInvocation &Opts,
- ArrayRef Argv,
- DiagnosticsEngine &Diags) {
-  bool Success = true;
-
-  // Parse the arguments.
-  const OptTable &OptTbl = getDriverOptTable();
-
-  const unsigned IncludedFlagsBitmask = options::CC1AsOption;
-  unsigned MissingArgIndex, MissingArgCount;
-  InputArgList Args = OptTbl.ParseArgs(Argv, MissingArgIndex, MissingArgCount,
-   IncludedFlagsBitmask);
-
-  // Check for missing argument error.
-  if (MissingArgCount) {
-Diags.Report(diag::err_drv_missing_argument)
-<< Args.getArgString(MissingArgIndex) << Mi

[PATCH] D63852: [Clang] Move assembler into a separate file

2021-01-23 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Thanks! I have updated this patch to match LLVM main and committed it.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2021-01-23 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Well that didn't quite work. I get errors like this:

  
tools/clang/lib/Frontend/CMakeFiles/obj.clangFrontend.dir/AssemblerInvocation.cpp.o:(.toc+0x0):
 undefined reference to `vtable for llvm::MCSubtargetInfo'
  
tools/clang/lib/Frontend/CMakeFiles/obj.clangFrontend.dir/AssemblerInvocation.cpp.o:
 In function `clang::ExecuteAssembler(clang::AssemblerInvocation&, 
clang::DiagnosticsEngine&)':
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x418):
 undefined reference to `llvm::MCTargetOptions::MCTargetOptions()'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x564):
 undefined reference to `llvm::MCContext::MCContext(llvm::MCAsmInfo const*, 
llvm::MCRegisterInfo const*, llvm::MCObjectFileInfo const*, llvm::SourceMgr 
const*, llvm::MCTargetOptions const*, bool)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x5c0):
 undefined reference to 
`llvm::MCObjectFileInfo::InitMCObjectFileInfo(llvm::Triple const&, bool, 
llvm::MCContext&, bool)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x71c):
 undefined reference to 
`llvm::MCContext::addDebugPrefixMapEntry(std::__cxx11::basic_string, std::allocator > const&, 
std::__cxx11::basic_string, std::allocator > 
const&)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0xa1c):
 undefined reference to 
`llvm::MCAsmBackend::createDwoObjectWriter(llvm::raw_pwrite_stream&, 
llvm::raw_pwrite_stream&) const'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0xea0):
 undefined reference to `llvm::MCContext::setGenDwarfRootFile(llvm::StringRef, 
llvm::StringRef)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x11d8):
 undefined reference to `llvm::createAsmStreamer(llvm::MCContext&, 
std::unique_ptr >, bool, bool, 
llvm::MCInstPrinter*, std::unique_ptr >&&, 
std::unique_ptr 
>&&, bool)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x137c):
 undefined reference to `llvm::createMCAsmParser(llvm::SourceMgr&, 
llvm::MCContext&, llvm::MCStreamer&, llvm::MCAsmInfo const&, unsigned int)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1460):
 undefined reference to `llvm::MCContext::setSymbolValue(llvm::MCStreamer&, 
llvm::StringRef, unsigned long)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1500):
 undefined reference to `llvm::MCContext::setSymbolValue(llvm::MCStreamer&, 
llvm::StringRef, unsigned long)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x16dc):
 undefined reference to `llvm::MCContext::~MCContext()'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1be8):
 undefined reference to `llvm::createELFStreamer(llvm::MCContext&, 
std::unique_ptr 
>&&, std::unique_ptr >&&, 
std::unique_ptr 
>&&, bool)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1c08):
 undefined reference to `llvm::createXCOFFStreamer(llvm::MCContext&, 
std::unique_ptr 
>&&, std::unique_ptr >&&, 
std::unique_ptr 
>&&, bool)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1d20):
 undefined reference to `llvm::MCContext::getMachOSection(llvm::StringRef, 
llvm::StringRef, unsigned int, unsigned int, llvm::SectionKind, char const*)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1d54):
 undefined reference to `llvm::MCStreamer::emitZeros(unsigned long)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x1d68):
 undefined reference to 
`llvm::MCAsmParser::setTargetParser(llvm::MCTargetAsmParser&)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x2090):
 undefined reference to 
`llvm::MCAsmBackend::createObjectWriter(llvm::raw_pwrite_stream&) const'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x2128):
 undefined reference to `llvm::createNullStreamer(llvm::MCContext&)'
  
AssemblerInvocation.cpp:(.text._ZN5clang16ExecuteAssemblerERNS_19AssemblerInvocationERNS_17DiagnosticsEngineE+0x24e0):
 undefined reference to `llvm::createMachOStreamer(llvm::MCContext&, 
std::unique_ptr 
>&&, std::unique_ptr >&&, 
std::

[PATCH] D63852: [Clang] Move assembler into a separate file

2021-01-23 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

@echristo do you have an idea what's going on or how to fix this? I suspect I'm 
not including a required dependency or maybe I've put `AssemblerInvocation` in 
the wrong directory/library.
I'm not very familiar with CMake or C++ so I'm not sure how to best fix this.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2021-01-23 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Yeah I was wondering the same thing when I saw the failure. Unfortunately such 
design is a bit outside of my LLVM knowledge. I would just like to use 
cc1as_main.cpp functionality outside of LLVM without needing to update my copy 
of cc1as with every LLVM update.


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[PATCH] D86546: [compiler-rt][builtins] Use explicitly-sized integer types for LibCalls

2021-02-11 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

This looks good to me, although I would like someone else to take a look as 
well. I can confirm that these changes fix an issue on AVR: this patch 
(together with D86547 ) make `__floatsisf` 
correct on AVR while it would previously do something incorrect.

What I am somewhat worried about is that some of these functions 
(`__floatsisf`, `__floatunsisf`) do not have tests. I think the test for the 
*vfp variants could be shared between the *vfp and non-*vfp variants. But I 
think this is best done separately.


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[PATCH] D86547: [compiler-rt][builtins] Use c[tl]zsi macro instead of __builtin_c[tl]z

2021-02-11 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I checked this, and it seems good to me although I would like someone else to 
also take a look.

In D86547#2287353 , @atrosinenko wrote:

> In D86547#2284095 , @MaskRay wrote:
>
>> The `(aWidth - 1) - clzsi(a)` change is correct, but why is the ctz change?
>
> `d.s.low` and `d.s.high` are `su_int`. While some helpers from `libgcc` are 
> documented with `int`, `long`, etc. types //for simplicity// and use machine 
> modes under the hood, the `__builtin_ctz()` function (as well as clz), on the 
> other hand, seems to **really** accept an `int`-sized argument:

I can confirm this. This is why I introduced the `clzsi` and `ctzsi` macros in 
D78662 . They are not intended for use with 
plain `int` types, but for use with `si_int` / `su_int` types (that are always 
32-bit, unlike `int`).


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[PATCH] D96853: [clang][AVR] Support variable decorator '__flash'

2021-02-20 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I am not very familiar with Clang so I can't say much about it. Although I 
wonder whether the macro is the right way to implement this? Is there something 
similar in other targets? (GPUs tend to have lots of address spaces, you could 
take a look there).




Comment at: clang/test/CodeGen/address-space-avr.c:3-4
 
 // Test that function declarations in nonzero address spaces without prototype
 // are called correctly.
 

This comment is now out of date.


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[PATCH] D97669: [clang][AVR] Add avr-libc/include to clang system include paths

2021-03-01 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Looks reasonable to me. But again, I would like this to be reviewed also by 
someone familiar with the internals of Clang (I'm not).


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[PATCH] D128133: [Driver] Support linking to compiler-rt for target AVR

2022-08-13 Thread Ayke via Phabricator via cfe-commits
aykevl accepted this revision.
aykevl added a comment.
This revision is now accepted and ready to land.

Looks good to me!




Comment at: clang/lib/Driver/ToolChains/AVR.cpp:539
+// Link to compiler-rt. We directly put the libclang.builtins.a
+// as input file, other than '-lclang.builtins'.
+if (RtLib == ToolChain::RLT_CompilerRT) {

Suggestion for the second sentence:

> We directly use libclang.builtins.a as input file, instead of using 
> '-lclang.builtins'.


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[PATCH] D139305: [clang][driver] Support option '-mcpu' on target AVR.

2022-12-22 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I think having `-mcpu` as an alias for `-mmcu` on AVR is fine, but I don't 
think it's very useful to be honest. The `-mmcu` (or `-mcpu`) flag is 
inherently specific to that particular chip anyway so compatibility is not an 
issue. In fact, having two flags may even introduce noise and confusion.

In D139305#3987969 , @MaskRay wrote:

> Does GCC prefer `-mcpu=` as well? If not, raise a PR there? This seems like a 
> decision we should not unilaterally make on llvm-project side: it's certainly 
> something GCC cares about as well.

I guess, but avr-gcc is already barely maintained. Most people use an older 
version (like 5.2.0) because the newer versions produce absolutely terrible 
code. So I don't think it matters much.


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[PATCH] D137520: [AVR][Clang] Move family names into MCU list

2022-11-06 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
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This simplifies the code by avoiding some special cases for family names (as 
opposed to device names).

This patch is just a refactor, the next patch will have a meaningful 
improvement.


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Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/test/Misc/target-invalid-cpu-note.c

Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -77,7 +77,7 @@
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'
-// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, ata6616c, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, ata6617c, ata664251, atmega8u2, atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmega8a, ata6285, ata6286, ata6612c, atmega48, atmega48a, atmega48pa, atmega48pb, atmega48p, atmega88, atmega88a, atmega88p, atmega88pa, atmega88pb, atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, ata5702m322, ata5782, ata5790, ata5790n, ata5791, ata5795, ata5831, ata6613c, ata6614q, ata8210, ata8510, atmega16, atmega16a, atmega161, atmega162, atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a, atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa, atmega168pb, atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega32a, atmega323, atmega324a, atmega324p, atmega324pa, atmega324pb, atmega325, atmega325a, atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, atmega328, atmega328p, atmega328pb, atmega329, atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a, atmega640, atmega644, atmega644a, atmega644p, atmega644pa, atmega645, atmega645a, atmega645p, atmega649, atmega649a, atmega649p, atmega6450, atmega6450a, atmega6450p, atmega6490, atmega6490a, atmega6490p, atmega64rfr2, atmega644rfr2, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb, atmega64hve, atmega64hve2, at90can32, at90can64, at90pwm161, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at90scr100, at94k, m3000, atmega128, atmega128a, atmega1280, atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2, atmega1284rfr2, at90can128, at90usb1286, at90usb1287, atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2, atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega32a4, atxmega32a4u, atxmega32c3, atxmega32c4, atxmega32d3, atxmega32d4, atxmega32e5, atxmega16e5, atxmega8e5, atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3, atxmega64c3, atxmega64d3, atxmega64d4, atxmega64a1, atxmega64a1u, atxmega128a3, atxmega128a3u, atxmega128b1, atxmega128b3, atxmega128c3, atxmega128d3, atxmega128d4, atxmega192a3, atxmega192a3u, atxmega192c3, atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b, atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3, atxmega384d3, atxmega128a1, atxmega128a1u, atxmega128a4u, attiny4, attiny5, attiny9, attiny10, attiny20, attiny40, attiny102, attiny104, attiny202, attiny402, attiny204, attiny404, attiny804, attiny1604, attiny406, attiny806, attiny1606, attiny807, attiny1607, attiny212, attiny412, attiny214, attiny414, attiny814, attiny1614, attiny416, attiny816, attiny1616, attiny3216, attiny417, attiny817, attiny1617, attiny3217, attiny1624, attiny1626, attiny1627, atmega808, atmega809, atmega1608, atmega1609, atmega3208, atmega3209, atmega4808, atmega4809
+// AVR-NEXT: note: valid target CPU values are: avr1, at90s1200, attiny11, attiny12, attiny15, attiny28, avr2, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, avr25, ata5272, 

[PATCH] D137521: [AVR][Clang] Implement __AVR_ARCH__ macro

2022-11-06 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
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This macro is defined in avr-gcc, and is very useful especially in assembly 
code to check whether particular instructions are supported. It is also the 
basis for other macros like `__AVR_HAVE_ELPM__`.


Repository:
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Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c

Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -2,6 +2,7 @@
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+// CHECK: #define __AVR_ARCH__ 100
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -2,6 +2,7 @@
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+// CHECK: #define __AVR_ARCH__ 5
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.h
===
--- clang/lib/Basic/Targets/AVR.h
+++ clang/lib/Basic/Targets/AVR.h
@@ -175,6 +175,7 @@
   std::string CPU;
   StringRef ABI;
   StringRef DefineName;
+  StringRef Arch;
   int NumFlashBanks;
 };
 
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -23,326 +23,326 @@
 struct LLVM_LIBRARY_VISIBILITY MCUInfo {
   const char *Name;
   const char *DefineName;
+  StringRef Arch; // The __AVR_ARCH__ value.
   const int NumFlashBanks; // Set to 0 for the devices do not support LPM/ELPM.
-  bool IsTiny; // Set to true for the devices belong to the avrtiny family.
 };
 
 // NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
 static MCUInfo AVRMcus[] = {
-{"avr1", NULL, 0, false},
-{"at90s1200", "__AVR_AT90S1200__", 0, false},
-{"attiny11", "__AVR_ATtiny11__", 0, false},
-{"attiny12", "__AVR_ATtiny12__", 0, false},
-{"attiny15", "__AVR_ATtiny15__", 0, false},
-{"attiny28", "__AVR_ATtiny28__", 0, false},
-{"avr2", NULL, 1, false},
-{"at90s2313", "__AVR_AT90S2313__", 1, false},
-{"at90s2323", "__AVR_AT90S2323__", 1, false},
-{"at90s2333", "__AVR_AT90S2333__", 1, false},
-{"at90s2343", "__AVR_AT90S2343__", 1, false},
-{"attiny22", "__AVR_ATtiny22__", 1, false},
-{"attiny26", "__AVR_ATtiny26__", 1, false},
-{"at86rf401", "__AVR_AT86RF401__", 1, false},
-{"at90s4414", "__AVR_AT90S4414__", 1, false},
-{"at90s4433", "__AVR_AT90S4433__", 1, false},
-{"at90s4434", "__AVR_AT90S4434__", 1, false},
-{"at90s8515", "__AVR_AT90S8515__", 1, false},
-{"at90c8534", "__AVR_AT90c8534__", 1, false},
-{"at90s8535", "__AVR_AT90S8535__", 1, false},
-{"avr25", NULL, 1, false},
-{"ata5272", "__AVR_ATA5272__", 1, false},
-{"ata6616c", "__AVR_ATA6616c__", 1, false},
-{"attiny13", "__AVR_ATtiny13__", 1, false},
-{"attiny13a", "__AVR_ATtiny13A__", 1, false},
-{"attiny2313", "__AVR_ATtiny2313__", 1, false},
-{"attiny2313a", "__AVR_ATtiny2313A__", 1, false},
-{"attiny24", "__AVR_ATtiny24__", 1, false},
-{"attiny24a", "__AVR_ATtiny24A__", 1, false},
-{"attiny4313", "__AVR_ATtiny4313__", 1, false},
-{"attiny44", "__AVR_ATtiny44__", 1, false},
-{"attiny44a", "__AVR_ATtiny44A__", 1, false},
-{"attiny84", "__AVR_ATtiny84__", 1, false},
-{"attiny84a", "__AVR_ATtiny84A__", 1, false},
-{"attiny25", "__AVR_ATtiny25__", 1, false},
-{"attiny45", "__AVR_ATtiny45__", 1, false},
-{"attiny85", "__AVR_ATtiny85__", 1, false},
-{"attiny261", "__AVR_ATtiny261__", 1, false},
-{"attiny261a", "__AVR_ATtiny261A__", 1, false},
-{"attiny441", "__AVR_ATtiny441__", 1, false},
-{"attiny461", "__AVR_ATtiny461__", 1, false},
-{"attiny461a", "__AVR_ATtiny461A__", 1, false},
-{"attiny841", "__AVR_ATtiny841__", 1, false},
-{"attiny861", "__AVR_ATtiny861__", 1, false},
-{"attiny861a", "__AVR_ATtiny861A__", 1, false},
-{"attiny87", "__AVR_ATtiny87__", 1, false},
-{"attiny43u", "__AVR_ATtiny43U__", 1, false},
-{"attiny48", "__AVR_ATtiny48__", 1, false},
-{"attiny88", "__AVR_ATtiny88__", 1, false},
-{"attiny828", "__AVR_ATtiny828__", 1, false},
-{"avr3", NULL, 1, false},
-{"at43usb355", "__AVR_AT43USB355__", 1, false},
-{"at76c711", "__AVR_AT76C

[PATCH] D137572: [AVR][Clang] Implement __AVR_HAVE_*__ macros

2022-11-07 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: benshi001, dylanmckay.
Herald added a subscriber: Jim.
Herald added a project: All.
aykevl requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

These macros are defined in avr-gcc and are useful when working with assembly.
For example, startup code needs to copy the contents of .data from flash to 
RAM, but should use elpm (instead of lpm) on devices with more than 64kB flash. 
Without `__AVR_HAVE_ELPM__`, there is no way to know whether the elpm 
instruction is supported.

Depends on D137521 .


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137572

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c

Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -4,5 +4,6 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ARCH__ 100
 // CHECK: #define __AVR_ATtiny104__ 1
+// CHECK-NOT: #define __AVR_HAVE_MUL__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -4,5 +4,9 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ARCH__ 5
 // CHECK: #define __AVR_ATmega328P__ 1
+// CHECK-NOT: #define __AVR_HAVE_EIJMP_EICALL__
+// CHECK: #define __AVR_HAVE_LPMX__ 1
+// CHECK: #define __AVR_HAVE_MOVW__ 1
+// CHECK: #define __AVR_HAVE_MUL__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -12,6 +12,7 @@
 
 #include "AVR.h"
 #include "clang/Basic/MacroBuilder.h"
+#include "llvm/ADT/StringSwitch.h"
 
 using namespace clang;
 using namespace clang::targets;
@@ -348,6 +349,53 @@
 } // namespace targets
 } // namespace clang
 
+static bool ArchHasELPM(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("31", "51", "6", true)
+.Cases("104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasELPMX(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("51", "6", true)
+.Cases("104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasMOVW(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("25", "35", "4", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasLPMX(StringRef Arch) {
+  return ArchHasMOVW(Arch); // same architectures
+}
+
+static bool ArchHasMUL(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("4", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasJMPCALL(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("3", "31", "35", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHas3BytePC(StringRef Arch) {
+  // These devices have more than 128kB of program memory.
+  return llvm::StringSwitch(Arch)
+.Case("6", true)
+.Cases("106", "107", true)
+.Default(false);
+}
+
 bool AVRTargetInfo::isValidCPUName(StringRef Name) const {
   return llvm::any_of(
   AVRMcus, [&](const MCUInfo &Info) { return Info.Name == Name; });
@@ -390,6 +438,25 @@
 
   Builder.defineMacro("__AVR_ARCH__", Arch);
 
+  if (ArchHasELPM(Arch))
+Builder.defineMacro("__AVR_HAVE_ELPM__");
+  if (ArchHasELPMX(Arch))
+Builder.defineMacro("__AVR_HAVE_ELPMX__");
+  if (ArchHasMOVW(Arch))
+Builder.defineMacro("__AVR_HAVE_MOVW__");
+  if (ArchHasLPMX(Arch))
+Builder.defineMacro("__AVR_HAVE_LPMX__");
+  if (ArchHasMUL(Arch))
+Builder.defineMacro("__AVR_HAVE_MUL__");
+  if (ArchHasJMPCALL(Arch))
+Builder.defineMacro("__AVR_HAVE_JMP_CALL__");
+  if (ArchHas3BytePC(Arch)) {
+Builder.defineMacro("__AVR_HAVE_EIJMP_EICALL__");
+Builder.defineMacro("__AVR_3_BYTE_PC__");
+  } else {
+Builder.defineMacro("__AVR_2_BYTE_PC__");
+  }
+
   if (NumFlashBanks >= 1)
 Builder.defineMacro("__flash", "__attribute__((address_space(1)))");
   if (NumFlashBanks >= 2)
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[PATCH] D137572: [AVR][Clang] Implement __AVR_HAVE_*__ macros

2022-11-15 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 475419.
aykevl added a comment.

- Fix ArchHas3BytePC to remove arch 107 (of which no chips have more than 128kB 
flash)
- Fix ArchHasELPM/ArchHasELPMX to add arch 102 (it does support elpm even 
though avr-gcc claims it doesn't).
- Add notes where the provided macros may not be correct in all cases. It's 
still better than avr-gcc though.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137572/new/

https://reviews.llvm.org/D137572

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c

Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -4,5 +4,6 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ARCH__ 100
 // CHECK: #define __AVR_ATtiny104__ 1
+// CHECK-NOT: #define __AVR_HAVE_MUL__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -4,5 +4,9 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ARCH__ 5
 // CHECK: #define __AVR_ATmega328P__ 1
+// CHECK-NOT: #define __AVR_HAVE_EIJMP_EICALL__
+// CHECK: #define __AVR_HAVE_LPMX__ 1
+// CHECK: #define __AVR_HAVE_MOVW__ 1
+// CHECK: #define __AVR_HAVE_MUL__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -12,6 +12,7 @@
 
 #include "AVR.h"
 #include "clang/Basic/MacroBuilder.h"
+#include "llvm/ADT/StringSwitch.h"
 
 using namespace clang;
 using namespace clang::targets;
@@ -348,6 +349,58 @@
 } // namespace targets
 } // namespace clang
 
+static bool ArchHasELPM(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("31", "51", "6", true)
+.Cases("102", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasELPMX(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("51", "6", true)
+.Cases("102", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasMOVW(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("25", "35", "4", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasLPMX(StringRef Arch) {
+  return ArchHasMOVW(Arch); // same architectures
+}
+
+static bool ArchHasMUL(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("4", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasJMPCALL(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("3", "31", "35", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHas3BytePC(StringRef Arch) {
+  // These devices have more than 128kB of program memory.
+  // Note:
+  //   - Not fully correct for arch 106: only about half the chips have more
+  // than 128kB program memory and therefore a 3 byte PC.
+  //   - Doesn't match GCC entirely: avr-gcc thinks arch 107 goes beyond 128kB
+  // but in fact it doesn't.
+  return llvm::StringSwitch(Arch)
+.Case("6", true)
+.Case("106", true)
+.Default(false);
+}
+
 bool AVRTargetInfo::isValidCPUName(StringRef Name) const {
   return llvm::any_of(
   AVRMcus, [&](const MCUInfo &Info) { return Info.Name == Name; });
@@ -390,6 +443,30 @@
 
   Builder.defineMacro("__AVR_ARCH__", Arch);
 
+  // TODO: perhaps we should use the information from AVRDevices.td instead?
+  if (ArchHasELPM(Arch))
+Builder.defineMacro("__AVR_HAVE_ELPM__");
+  if (ArchHasELPMX(Arch))
+Builder.defineMacro("__AVR_HAVE_ELPMX__");
+  if (ArchHasMOVW(Arch))
+Builder.defineMacro("__AVR_HAVE_MOVW__");
+  if (ArchHasLPMX(Arch))
+Builder.defineMacro("__AVR_HAVE_LPMX__");
+  if (ArchHasMUL(Arch))
+Builder.defineMacro("__AVR_HAVE_MUL__");
+  if (ArchHasJMPCALL(Arch))
+Builder.defineMacro("__AVR_HAVE_JMP_CALL__");
+  if (ArchHas3BytePC(Arch)) {
+// Note: some devices do support eijmp/eicall even though this macro isn't
+// set. This is the case if they have less than 128kB flash and so
+// eijmp/eicall isn't very useful anyway. (This matches gcc, although it's
+// debatable whether we should be bug-compatible in this case).
+Builder.defineMacro("__AVR_HAVE_EIJMP_EICALL__");
+Builder.defineMacro("__AVR_3_BYTE_PC__");
+  } else {
+Builder.defineMacro("__AVR_2_BYTE_PC__");
+  }
+
   if (NumFlashBanks >= 1)
 Builder.defineMacro("__flash", "__attribute__((address_space(1)))");
   if (NumFla

[PATCH] D137572: [AVR][Clang] Implement __AVR_HAVE_*__ macros

2022-11-15 Thread Ayke via Phabricator via cfe-commits
aykevl added inline comments.



Comment at: clang/lib/Basic/Targets/AVR.cpp:355
+.Cases("31", "51", "6", true)
+.Cases("104", "105", "106", "107", true)
+.Default(false);

benshi001 wrote:
> benshi001 wrote:
> > ATxmega16a4 with family code 102 also supports ELPM. Could you please make 
> > a careful check on ELPM and all other features? 
> > 
> > Generally speaking I am very glad to have this patch committed, since it 
> > fixes
> > 
> > https://github.com/llvm/llvm-project/issues/56157
> > 
> I suggest that you can make your code in accordance with 
> https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AVR/AVRDevices.td
I checked all 102 family chips and indeed they all support ELPM. This looks 
like a bug in avr-gcc, which claims these devices don't support ELPM.

I did check AVRDevices.td but apparently I made some mistakes. I've checked 
again and fixed a few small issues. There are still some left but they are 
difficult to fix without reading AVRDevices.td directly.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D137572/new/

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[PATCH] D137520: [AVR][Clang] Move family names into MCU list

2022-11-15 Thread Ayke via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd2563775cd6e: [AVR][Clang] Move family names into MCU list 
(authored by aykevl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137520/new/

https://reviews.llvm.org/D137520

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/test/Misc/target-invalid-cpu-note.c

Index: clang/test/Misc/target-invalid-cpu-note.c
===
--- clang/test/Misc/target-invalid-cpu-note.c
+++ clang/test/Misc/target-invalid-cpu-note.c
@@ -77,7 +77,7 @@
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'
-// AVR-NEXT: note: valid target CPU values are: avr1, avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega1, avrxmega2, avrxmega3, avrxmega4, avrxmega5, avrxmega6, avrxmega7, avrtiny, at90s1200, attiny11, attiny12, attiny15, attiny28, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, ata5272, ata6616c, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny441, attiny461, attiny461a, attiny841, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, attiny828, at43usb355, at76c711, atmega103, at43usb320, attiny167, at90usb82, at90usb162, ata5505, ata6617c, ata664251, atmega8u2, atmega16u2, atmega32u2, attiny1634, atmega8, ata6289, atmega8a, ata6285, ata6286, ata6612c, atmega48, atmega48a, atmega48pa, atmega48pb, atmega48p, atmega88, atmega88a, atmega88p, atmega88pa, atmega88pb, atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, ata5702m322, ata5782, ata5790, ata5790n, ata5791, ata5795, ata5831, ata6613c, ata6614q, ata8210, ata8510, atmega16, atmega16a, atmega161, atmega162, atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a, atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa, atmega168pb, atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega32a, atmega323, atmega324a, atmega324p, atmega324pa, atmega324pb, atmega325, atmega325a, atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, atmega328, atmega328p, atmega328pb, atmega329, atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a, atmega640, atmega644, atmega644a, atmega644p, atmega644pa, atmega645, atmega645a, atmega645p, atmega649, atmega649a, atmega649p, atmega6450, atmega6450a, atmega6450p, atmega6490, atmega6490a, atmega6490p, atmega64rfr2, atmega644rfr2, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb, atmega64hve, atmega64hve2, at90can32, at90can64, at90pwm161, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at90scr100, at94k, m3000, atmega128, atmega128a, atmega1280, atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2, atmega1284rfr2, at90can128, at90usb1286, at90usb1287, atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2, atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega32a4, atxmega32a4u, atxmega32c3, atxmega32c4, atxmega32d3, atxmega32d4, atxmega32e5, atxmega16e5, atxmega8e5, atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3, atxmega64c3, atxmega64d3, atxmega64d4, atxmega64a1, atxmega64a1u, atxmega128a3, atxmega128a3u, atxmega128b1, atxmega128b3, atxmega128c3, atxmega128d3, atxmega128d4, atxmega192a3, atxmega192a3u, atxmega192c3, atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b, atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3, atxmega384d3, atxmega128a1, atxmega128a1u, atxmega128a4u, attiny4, attiny5, attiny9, attiny10, attiny20, attiny40, attiny102, attiny104, attiny202, attiny402, attiny204, attiny404, attiny804, attiny1604, attiny406, attiny806, attiny1606, attiny807, attiny1607, attiny212, attiny412, attiny214, attiny414, attiny814, attiny1614, attiny416, attiny816, attiny1616, attiny3216, attiny417, attiny817, attiny1617, attiny3217, attiny1624, attiny1626, attiny1627, atmega808, atmega809, atmega1608, atmega1609, atmega3208, atmega3209, atmega4808, atmega4809
+// AVR-NEXT: note: valid target CPU values are: avr1, at90s1200, attiny11, attiny12, attiny15, attiny28, avr2, at90s2313, at90s2323, at90s2333, at90s2343, attiny22, attiny26, at86rf401, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535, avr25, ata5272, ata6616c, attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25, at

[PATCH] D137521: [AVR][Clang] Implement __AVR_ARCH__ macro

2022-11-15 Thread Ayke via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG09ab9d4d111f: [AVR][Clang] Implement __AVR_ARCH__ macro 
(authored by aykevl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137521/new/

https://reviews.llvm.org/D137521

Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c

Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -2,6 +2,7 @@
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+// CHECK: #define __AVR_ARCH__ 100
 // CHECK: #define __AVR_ATtiny104__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -2,6 +2,7 @@
 
 // CHECK: #define AVR 1
 // CHECK: #define __AVR 1
+// CHECK: #define __AVR_ARCH__ 5
 // CHECK: #define __AVR_ATmega328P__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.h
===
--- clang/lib/Basic/Targets/AVR.h
+++ clang/lib/Basic/Targets/AVR.h
@@ -175,6 +175,7 @@
   std::string CPU;
   StringRef ABI;
   StringRef DefineName;
+  StringRef Arch;
   int NumFlashBanks;
 };
 
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -23,326 +23,326 @@
 struct LLVM_LIBRARY_VISIBILITY MCUInfo {
   const char *Name;
   const char *DefineName;
+  StringRef Arch; // The __AVR_ARCH__ value.
   const int NumFlashBanks; // Set to 0 for the devices do not support LPM/ELPM.
-  bool IsTiny; // Set to true for the devices belong to the avrtiny family.
 };
 
 // NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
 static MCUInfo AVRMcus[] = {
-{"avr1", NULL, 0, false},
-{"at90s1200", "__AVR_AT90S1200__", 0, false},
-{"attiny11", "__AVR_ATtiny11__", 0, false},
-{"attiny12", "__AVR_ATtiny12__", 0, false},
-{"attiny15", "__AVR_ATtiny15__", 0, false},
-{"attiny28", "__AVR_ATtiny28__", 0, false},
-{"avr2", NULL, 1, false},
-{"at90s2313", "__AVR_AT90S2313__", 1, false},
-{"at90s2323", "__AVR_AT90S2323__", 1, false},
-{"at90s2333", "__AVR_AT90S2333__", 1, false},
-{"at90s2343", "__AVR_AT90S2343__", 1, false},
-{"attiny22", "__AVR_ATtiny22__", 1, false},
-{"attiny26", "__AVR_ATtiny26__", 1, false},
-{"at86rf401", "__AVR_AT86RF401__", 1, false},
-{"at90s4414", "__AVR_AT90S4414__", 1, false},
-{"at90s4433", "__AVR_AT90S4433__", 1, false},
-{"at90s4434", "__AVR_AT90S4434__", 1, false},
-{"at90s8515", "__AVR_AT90S8515__", 1, false},
-{"at90c8534", "__AVR_AT90c8534__", 1, false},
-{"at90s8535", "__AVR_AT90S8535__", 1, false},
-{"avr25", NULL, 1, false},
-{"ata5272", "__AVR_ATA5272__", 1, false},
-{"ata6616c", "__AVR_ATA6616c__", 1, false},
-{"attiny13", "__AVR_ATtiny13__", 1, false},
-{"attiny13a", "__AVR_ATtiny13A__", 1, false},
-{"attiny2313", "__AVR_ATtiny2313__", 1, false},
-{"attiny2313a", "__AVR_ATtiny2313A__", 1, false},
-{"attiny24", "__AVR_ATtiny24__", 1, false},
-{"attiny24a", "__AVR_ATtiny24A__", 1, false},
-{"attiny4313", "__AVR_ATtiny4313__", 1, false},
-{"attiny44", "__AVR_ATtiny44__", 1, false},
-{"attiny44a", "__AVR_ATtiny44A__", 1, false},
-{"attiny84", "__AVR_ATtiny84__", 1, false},
-{"attiny84a", "__AVR_ATtiny84A__", 1, false},
-{"attiny25", "__AVR_ATtiny25__", 1, false},
-{"attiny45", "__AVR_ATtiny45__", 1, false},
-{"attiny85", "__AVR_ATtiny85__", 1, false},
-{"attiny261", "__AVR_ATtiny261__", 1, false},
-{"attiny261a", "__AVR_ATtiny261A__", 1, false},
-{"attiny441", "__AVR_ATtiny441__", 1, false},
-{"attiny461", "__AVR_ATtiny461__", 1, false},
-{"attiny461a", "__AVR_ATtiny461A__", 1, false},
-{"attiny841", "__AVR_ATtiny841__", 1, false},
-{"attiny861", "__AVR_ATtiny861__", 1, false},
-{"attiny861a", "__AVR_ATtiny861A__", 1, false},
-{"attiny87", "__AVR_ATtiny87__", 1, false},
-{"attiny43u", "__AVR_ATtiny43U__", 1, false},
-{"attiny48", "__AVR_ATtiny48__", 1, false},
-{"attiny88", "__AVR_ATtiny88__", 1, false},
-{"attiny828", "__AVR_ATtiny828__", 1, false},
-{"avr3", NULL, 1, false},
-{"at43usb355", "__AVR_AT43USB355__", 1, false},
-{"at76c711", "__AVR_AT76C711__", 1, false},
-{"avr31", NULL, 1, false},
-{"atmega103", "__AVR_ATmega103__", 1, false},
-{"at43usb320", "__AVR_AT43USB320__", 1, false},
-{

[PATCH] D138125: [clang] Fix wrong ABI on AVRTiny

2022-11-16 Thread Ayke via Phabricator via cfe-commits
aykevl added inline comments.



Comment at: clang/test/CodeGen/avr/struct.c:37
+long long fooi64(void) {
+  return 0xaa5533;
+}

benshi001 wrote:
> This file should be renamed to return.c instead of current struct.c, I will 
> do that in another patch, just let you see clearly what I have changed.
You can do that in the same patch. Phabricator should detect the renamed file 
and display it just like it does now.


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[PATCH] D124815: [libclang] Fall back to getMainExecutable when dladdr fails

2022-05-29 Thread Ayke via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG75d12e49c729: [libclang] Fall back to getMainExecutable when 
dladdr fails (authored by aykevl).

Repository:
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Files:
  clang/tools/libclang/CIndexer.cpp


Index: clang/tools/libclang/CIndexer.cpp
===
--- clang/tools/libclang/CIndexer.cpp
+++ clang/tools/libclang/CIndexer.cpp
@@ -125,13 +125,23 @@
 #elif defined(_AIX)
   getClangResourcesPathImplAIX(LibClangPath);
 #else
-  // This silly cast below avoids a C++ warning.
   Dl_info info;
-  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) == 0)
-llvm_unreachable("Call to dladdr() failed");
+  std::string Path;
+  // This silly cast below avoids a C++ warning.
+  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) != 0) {
+// We now have the CIndex directory, locate clang relative to it.
+LibClangPath += info.dli_fname;
+  } else if (!(Path = llvm::sys::fs::getMainExecutable(nullptr, 
nullptr)).empty()) {
+// If we can't get the path using dladdr, try to get the main executable
+// path. This may be needed when we're statically linking libclang with
+// musl libc, for example.
+LibClangPath += Path;
+  } else {
+// It's rather unlikely we end up here. But it could happen, so report an
+// error instead of crashing.
+llvm::report_fatal_error("Could not locate Clang resource path");
+  }
 
-  // We now have the CIndex directory, locate clang relative to it.
-  LibClangPath += info.dli_fname;
 #endif
 
   // Cache our result.


Index: clang/tools/libclang/CIndexer.cpp
===
--- clang/tools/libclang/CIndexer.cpp
+++ clang/tools/libclang/CIndexer.cpp
@@ -125,13 +125,23 @@
 #elif defined(_AIX)
   getClangResourcesPathImplAIX(LibClangPath);
 #else
-  // This silly cast below avoids a C++ warning.
   Dl_info info;
-  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) == 0)
-llvm_unreachable("Call to dladdr() failed");
+  std::string Path;
+  // This silly cast below avoids a C++ warning.
+  if (dladdr((void *)(uintptr_t)clang_createTranslationUnit, &info) != 0) {
+// We now have the CIndex directory, locate clang relative to it.
+LibClangPath += info.dli_fname;
+  } else if (!(Path = llvm::sys::fs::getMainExecutable(nullptr, nullptr)).empty()) {
+// If we can't get the path using dladdr, try to get the main executable
+// path. This may be needed when we're statically linking libclang with
+// musl libc, for example.
+LibClangPath += Path;
+  } else {
+// It's rather unlikely we end up here. But it could happen, so report an
+// error instead of crashing.
+llvm::report_fatal_error("Could not locate Clang resource path");
+  }
 
-  // We now have the CIndex directory, locate clang relative to it.
-  LibClangPath += info.dli_fname;
 #endif
 
   // Cache our result.
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[PATCH] D137572: [AVR][Clang] Implement __AVR_HAVE_*__ macros

2022-11-22 Thread Ayke via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa8efcb96e6db: [AVR][Clang] Implement __AVR_HAVE_*__ macros 
(authored by aykevl).

Repository:
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Files:
  clang/lib/Basic/Targets/AVR.cpp
  clang/test/Preprocessor/avr-atmega328p.c
  clang/test/Preprocessor/avr-attiny104.c

Index: clang/test/Preprocessor/avr-attiny104.c
===
--- clang/test/Preprocessor/avr-attiny104.c
+++ clang/test/Preprocessor/avr-attiny104.c
@@ -4,5 +4,6 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ARCH__ 100
 // CHECK: #define __AVR_ATtiny104__ 1
+// CHECK-NOT: #define __AVR_HAVE_MUL__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/test/Preprocessor/avr-atmega328p.c
===
--- clang/test/Preprocessor/avr-atmega328p.c
+++ clang/test/Preprocessor/avr-atmega328p.c
@@ -4,5 +4,9 @@
 // CHECK: #define __AVR 1
 // CHECK: #define __AVR_ARCH__ 5
 // CHECK: #define __AVR_ATmega328P__ 1
+// CHECK-NOT: #define __AVR_HAVE_EIJMP_EICALL__
+// CHECK: #define __AVR_HAVE_LPMX__ 1
+// CHECK: #define __AVR_HAVE_MOVW__ 1
+// CHECK: #define __AVR_HAVE_MUL__ 1
 // CHECK: #define __AVR__ 1
 // CHECK: #define __ELF__ 1
Index: clang/lib/Basic/Targets/AVR.cpp
===
--- clang/lib/Basic/Targets/AVR.cpp
+++ clang/lib/Basic/Targets/AVR.cpp
@@ -12,6 +12,7 @@
 
 #include "AVR.h"
 #include "clang/Basic/MacroBuilder.h"
+#include "llvm/ADT/StringSwitch.h"
 
 using namespace clang;
 using namespace clang::targets;
@@ -348,6 +349,58 @@
 } // namespace targets
 } // namespace clang
 
+static bool ArchHasELPM(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("31", "51", "6", true)
+.Cases("102", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasELPMX(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("51", "6", true)
+.Cases("102", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasMOVW(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("25", "35", "4", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasLPMX(StringRef Arch) {
+  return ArchHasMOVW(Arch); // same architectures
+}
+
+static bool ArchHasMUL(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("4", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHasJMPCALL(StringRef Arch) {
+  return llvm::StringSwitch(Arch)
+.Cases("3", "31", "35", "5", "51", "6", true)
+.Cases("102", "103", "104", "105", "106", "107", true)
+.Default(false);
+}
+
+static bool ArchHas3BytePC(StringRef Arch) {
+  // These devices have more than 128kB of program memory.
+  // Note:
+  //   - Not fully correct for arch 106: only about half the chips have more
+  // than 128kB program memory and therefore a 3 byte PC.
+  //   - Doesn't match GCC entirely: avr-gcc thinks arch 107 goes beyond 128kB
+  // but in fact it doesn't.
+  return llvm::StringSwitch(Arch)
+.Case("6", true)
+.Case("106", true)
+.Default(false);
+}
+
 bool AVRTargetInfo::isValidCPUName(StringRef Name) const {
   return llvm::any_of(
   AVRMcus, [&](const MCUInfo &Info) { return Info.Name == Name; });
@@ -390,6 +443,30 @@
 
   Builder.defineMacro("__AVR_ARCH__", Arch);
 
+  // TODO: perhaps we should use the information from AVRDevices.td instead?
+  if (ArchHasELPM(Arch))
+Builder.defineMacro("__AVR_HAVE_ELPM__");
+  if (ArchHasELPMX(Arch))
+Builder.defineMacro("__AVR_HAVE_ELPMX__");
+  if (ArchHasMOVW(Arch))
+Builder.defineMacro("__AVR_HAVE_MOVW__");
+  if (ArchHasLPMX(Arch))
+Builder.defineMacro("__AVR_HAVE_LPMX__");
+  if (ArchHasMUL(Arch))
+Builder.defineMacro("__AVR_HAVE_MUL__");
+  if (ArchHasJMPCALL(Arch))
+Builder.defineMacro("__AVR_HAVE_JMP_CALL__");
+  if (ArchHas3BytePC(Arch)) {
+// Note: some devices do support eijmp/eicall even though this macro isn't
+// set. This is the case if they have less than 128kB flash and so
+// eijmp/eicall isn't very useful anyway. (This matches gcc, although it's
+// debatable whether we should be bug-compatible in this case).
+Builder.defineMacro("__AVR_HAVE_EIJMP_EICALL__");
+Builder.defineMacro("__AVR_3_BYTE_PC__");
+  } else {
+Builder.defineMacro("__AVR_2_BYTE_PC__");
+  }
+
   if (NumFlashBanks >= 1)
 Builder.defineMacro("__flash", "__attribute__((address_space(1)))");
   if (NumFlashBanks >= 2)
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[PATCH] D138681: [AVR] Fix broken bitcast for aliases in non-zero address space

2022-11-24 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: benshi001, dylanmckay, rjmccall, MaskRay.
Herald added subscribers: jeroen.dobbelaere, StephenFan, Jim, arichardson.
Herald added a project: All.
aykevl requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This was triggered by some code in picolibc. The minimal version looks like 
this:

  double infinity(void) {
 return 5;
  }
  
  extern long double infinityl() __attribute__((__alias__("infinity")));

These two declarations have a different type (not because of the 'long double', 
which is also 'double' in IR, but because infinityl has no `(void)` and is 
therefore a variadic function). This led to a crash in the bitcast which 
assumed address space 0.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138681

Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/avr/alias-avr.c


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,7 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that 
needs
+// a pointer cast.
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a 
new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,7 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that needs
+// a pointer cast.
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return
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[PATCH] D138681: [AVR] Fix broken bitcast for aliases in non-zero address space

2022-11-24 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 477827.
aykevl added a comment.

- add `CHECK:` line that I forgot


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/avr/alias-avr.c


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,7 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that 
needs
+// a pointer cast.
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a 
new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,7 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that needs
+// a pointer cast.
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return
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[PATCH] D138681: [AVR] Fix broken bitcast for aliases in non-zero address space

2022-11-24 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 477828.
aykevl added a comment.

- now _actually_ add that `CHECK` line


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138681/new/

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Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/avr/alias-avr.c


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,8 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that 
needs
+// a pointer cast.
+// CHECK: @smallmul = alias i8 (i16, i16), ptr addrspace(1) @mul
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a 
new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,8 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that needs
+// a pointer cast.
+// CHECK: @smallmul = alias i8 (i16, i16), ptr addrspace(1) @mul
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return
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[PATCH] D138681: [AVR] Fix broken bitcast for aliases in non-zero address space

2022-11-27 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG131cddcba2c4: [AVR] Fix broken bitcast for aliases in 
non-zero address space (authored by aykevl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138681/new/

https://reviews.llvm.org/D138681

Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGen/avr/alias-avr.c


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,8 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that 
needs
+// a pointer cast.
+// CHECK: @smallmul = alias i8 (i16, i16), ptr addrspace(1) @mul
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a 
new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return


Index: clang/test/CodeGen/avr/alias-avr.c
===
--- clang/test/CodeGen/avr/alias-avr.c
+++ clang/test/CodeGen/avr/alias-avr.c
@@ -6,3 +6,8 @@
 
 // CHECK: @multiply ={{.*}} alias i16 (i16, i16), ptr addrspace(1) @mul
 int multiply(int x, int y) __attribute__((alias("mul")));
+
+// Make sure the correct address space is used when creating an alias that needs
+// a pointer cast.
+// CHECK: @smallmul = alias i8 (i16, i16), ptr addrspace(1) @mul
+char smallmul(int a, int b) __attribute__((alias("mul")));
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4002,7 +4002,8 @@
 // (If function is requested for a definition, we always need to create a new
 // function, not just return a bitcast.)
 if (!IsForDefinition)
-  return llvm::ConstantExpr::getBitCast(Entry, Ty->getPointerTo());
+  return llvm::ConstantExpr::getBitCast(
+  Entry, Ty->getPointerTo(Entry->getAddressSpace()));
   }
 
   // This function doesn't have a complete type (for example, the return
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[PATCH] D66324: clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM

2020-04-02 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I have the same issue as @wenju. The second time I call 
`ExecuteCompilerInvocation` it will give the error above, leading me to believe 
some memory isn't properly cleared.

Note: the `--pgo-warn-misexpect` option is not passed in the compiler 
invocation.


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[PATCH] D63852: [Clang] Move assembler into a separate file

2019-12-03 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

Ping?
This would be super useful to have: it avoids copying most of cc1as.


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[PATCH] D76181: [AVR] Add support for the -mdouble=x flag

2020-03-14 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: dylanmckay, MaskRay, hfinkel, rnk, rsmith.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.

This flag is used by avr-gcc (starting with v10) to set the width of the double 
type. The double type is by default interpreted as a 32-bit floating point 
number in avr-gcc instead of a 64-bit floating point number as is common on 
other architectures. Starting with GCC 10, a new option has been added to 
control this behavior:
https://gcc.gnu.org/wiki/avr-gcc#Deviations_from_the_Standard

This commit keeps the default double at 32 bits but adds support for the 
`-mdouble` flag (`-mdouble=32` and `-mdouble=64`) to control this behavior.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76181

Files:
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/mdouble.c
  clang/test/Driver/mdouble.c

Index: clang/test/Driver/mdouble.c
===
--- /dev/null
+++ clang/test/Driver/mdouble.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target avr-unknown-unknown -c -### %s -mdouble=64 2>&1 | FileCheck %s
+
+// CHECK: "-mdouble=64"
+
+// RUN: %clang -target aarch64 -c -### %s -mdouble=64 2>&1 | FileCheck --check-prefix=ERR %s
+
+// ERR: error: unsupported option '-mdouble=64' for target 'aarch64'
Index: clang/test/CodeGen/mdouble.c
===
--- /dev/null
+++ clang/test/CodeGen/mdouble.c
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=64 | \
+// RUN:   FileCheck --check-prefix=AVR-FP64 %s
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=32 | \
+// RUN:   FileCheck --check-prefix=AVR-FP32 %s
+
+double x = 0;
+int size = sizeof(x);
+
+// FIXME: the double should have an alignment of 1 on AVR, not 4 or 8.
+// AVR-FP64: @x = global double {{.*}}, align 8
+// AVR-FP64: @size = global i16 8
+// AVR-FP32: @x = global float {{.*}}, align 4
+// AVR-FP32: @size = global i16 4
Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -2937,6 +2937,7 @@
   Opts.PackStruct = getLastArgIntValue(Args, OPT_fpack_struct_EQ, 0, Diags);
   Opts.MaxTypeAlign = getLastArgIntValue(Args, OPT_fmax_type_align_EQ, 0, Diags);
   Opts.AlignDouble = Args.hasArg(OPT_malign_double);
+  Opts.DoubleSize = getLastArgIntValue(Args, OPT_mdouble_EQ, 0, Diags);
   Opts.LongDoubleSize = Args.hasArg(OPT_mlong_double_128)
 ? 128
 : Args.hasArg(OPT_mlong_double_64) ? 64 : 0;
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4591,6 +4591,14 @@
   << A->getAsString(Args) << TripleStr;
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_mdouble_EQ)) {
+if (TC.getArch() == llvm::Triple::avr)
+  A->render(Args, CmdArgs);
+else
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getAsString(Args) << TripleStr;
+  }
+
   // Decide whether to use verbose asm. Verbose assembly is the default on
   // toolchains which have the integrated assembler on by default.
   bool IsIntegratedAssemblerDefault = TC.IsIntegratedAssemblerDefault();
Index: clang/lib/Basic/TargetInfo.cpp
===
--- clang/lib/Basic/TargetInfo.cpp
+++ clang/lib/Basic/TargetInfo.cpp
@@ -380,6 +380,20 @@
 LongDoubleFormat = &llvm::APFloat::IEEEquad();
   }
 
+  if (Opts.DoubleSize) {
+if (Opts.DoubleSize == 32) {
+  DoubleWidth = 32;
+  LongDoubleWidth = 32;
+  DoubleFormat = &llvm::APFloat::IEEEsingle();
+  LongDoubleFormat = &llvm::APFloat::IEEEsingle();
+} else if (Opts.DoubleSize == 64) {
+  DoubleWidth = 64;
+  LongDoubleWidth = 64;
+  DoubleFormat = &llvm::APFloat::IEEEdouble();
+  LongDoubleFormat = &llvm::APFloat::IEEEdouble();
+}
+  }
+
   if (Opts.LongDoubleSize) {
 if (Opts.LongDoubleSize == DoubleWidth) {
   LongDoubleWidth = DoubleWidth;
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -2179,6 +2179,8 @@
 def mfancy_math_387 : Flag<["-"], "mfancy-math-387">, Group;
 def mlong_calls : Flag<["-"], "mlong-calls">, Group,
   HelpText<"Generate branches with extended addressability, usually via indirect jumps.">;
+def mdouble_EQ : Joined<["-"], "mdouble=">, Group, Values<"32,64">, Flags<[CC1Option]>,
+  HelpText<"

[PATCH] D76182: [AVR] Support aliases in non-zero address space

2020-03-14 Thread Ayke via Phabricator via cfe-commits
aykevl created this revision.
aykevl added reviewers: dylanmckay, rsmith, rjmccall.
Herald added subscribers: cfe-commits, Jim.
Herald added a project: clang.

This fixes code like the following on AVR:

  void foo(void) {
  }
  void bar(void) __attribute__((alias("foo")));

Code like this is present in compiler-rt, which I'm trying to build.

---

I'm not sure how to add a test for this, are there any examples I can look at? 
And does this need a test at all, considering how trivial the change is?


Repository:
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Files:
  clang/lib/CodeGen/CodeGenModule.cpp


Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4547,8 +4547,9 @@
   }
 
   // Create the new alias itself, but don't set a name yet.
+  unsigned AS = cast(Aliasee->getType())->getAddressSpace();
   auto *GA =
-  llvm::GlobalAlias::create(DeclTy, 0, LT, "", Aliasee, &getModule());
+  llvm::GlobalAlias::create(DeclTy, AS, LT, "", Aliasee, &getModule());
 
   if (Entry) {
 if (GA->getAliasee() == Entry) {


Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4547,8 +4547,9 @@
   }
 
   // Create the new alias itself, but don't set a name yet.
+  unsigned AS = cast(Aliasee->getType())->getAddressSpace();
   auto *GA =
-  llvm::GlobalAlias::create(DeclTy, 0, LT, "", Aliasee, &getModule());
+  llvm::GlobalAlias::create(DeclTy, AS, LT, "", Aliasee, &getModule());
 
   if (Entry) {
 if (GA->getAliasee() == Entry) {
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[PATCH] D76181: [AVR] Add support for the -mdouble=x flag

2020-03-15 Thread Ayke via Phabricator via cfe-commits
aykevl updated this revision to Diff 250418.
aykevl added a comment.

Fixed nits.


Repository:
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Files:
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/mdouble.c
  clang/test/Driver/mdouble.c

Index: clang/test/Driver/mdouble.c
===
--- /dev/null
+++ clang/test/Driver/mdouble.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target avr -c -### %s -mdouble=64 2>&1 | FileCheck %s
+
+// CHECK: "-mdouble=64"
+
+// RUN: %clang -target aarch64 -c -### %s -mdouble=64 2>&1 | FileCheck --check-prefix=ERR %s
+
+// ERR: error: unsupported option '-mdouble=64' for target 'aarch64'
Index: clang/test/CodeGen/mdouble.c
===
--- /dev/null
+++ clang/test/CodeGen/mdouble.c
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=64 | \
+// RUN:   FileCheck --check-prefix=AVR-FP64 %s
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=32 | \
+// RUN:   FileCheck --check-prefix=AVR-FP32 %s
+
+double x = 0;
+int size = sizeof(x);
+
+// FIXME: the double should have an alignment of 1 on AVR, not 4 or 8.
+// AVR-FP64: @x = global double {{.*}}, align 8
+// AVR-FP64: @size = global i16 8
+// AVR-FP32: @x = global float {{.*}}, align 4
+// AVR-FP32: @size = global i16 4
Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -2937,6 +2937,7 @@
   Opts.PackStruct = getLastArgIntValue(Args, OPT_fpack_struct_EQ, 0, Diags);
   Opts.MaxTypeAlign = getLastArgIntValue(Args, OPT_fmax_type_align_EQ, 0, Diags);
   Opts.AlignDouble = Args.hasArg(OPT_malign_double);
+  Opts.DoubleSize = getLastArgIntValue(Args, OPT_mdouble_EQ, 0, Diags);
   Opts.LongDoubleSize = Args.hasArg(OPT_mlong_double_128)
 ? 128
 : Args.hasArg(OPT_mlong_double_64) ? 64 : 0;
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4580,6 +4580,14 @@
   RenderFloatingPointOptions(TC, D, OFastEnabled, Args, CmdArgs,
  JA.getOffloadingDeviceKind());
 
+  if (Arg *A = Args.getLastArg(options::OPT_mdouble_EQ)) {
+if (TC.getArch() == llvm::Triple::avr)
+  A->render(Args, CmdArgs);
+else
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getAsString(Args) << TripleStr;
+  }
+
   if (Arg *A = Args.getLastArg(options::OPT_LongDouble_Group)) {
 if (TC.getTriple().isX86())
   A->render(Args, CmdArgs);
Index: clang/lib/Basic/TargetInfo.cpp
===
--- clang/lib/Basic/TargetInfo.cpp
+++ clang/lib/Basic/TargetInfo.cpp
@@ -380,6 +380,20 @@
 LongDoubleFormat = &llvm::APFloat::IEEEquad();
   }
 
+  if (Opts.DoubleSize) {
+if (Opts.DoubleSize == 32) {
+  DoubleWidth = 32;
+  LongDoubleWidth = 32;
+  DoubleFormat = &llvm::APFloat::IEEEsingle();
+  LongDoubleFormat = &llvm::APFloat::IEEEsingle();
+} else if (Opts.DoubleSize == 64) {
+  DoubleWidth = 64;
+  LongDoubleWidth = 64;
+  DoubleFormat = &llvm::APFloat::IEEEdouble();
+  LongDoubleFormat = &llvm::APFloat::IEEEdouble();
+}
+  }
+
   if (Opts.LongDoubleSize) {
 if (Opts.LongDoubleSize == DoubleWidth) {
   LongDoubleWidth = DoubleWidth;
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -2179,6 +2179,8 @@
 def mfancy_math_387 : Flag<["-"], "mfancy-math-387">, Group;
 def mlong_calls : Flag<["-"], "mlong-calls">, Group,
   HelpText<"Generate branches with extended addressability, usually via indirect jumps.">;
+def mdouble_EQ : Joined<["-"], "mdouble=">, Group, Values<"32,64">, Flags<[CC1Option]>,
+  HelpText<"Force double to be 32 bits or 64 bits">;
 def LongDouble_Group : OptionGroup<"">, Group,
   DocName<"Long double flags">,
   DocBrief<[{Selects the long double implementation}]>;
Index: clang/include/clang/Basic/LangOptions.def
===
--- clang/include/clang/Basic/LangOptions.def
+++ clang/include/clang/Basic/LangOptions.def
@@ -176,6 +176,7 @@
 VALUE_LANGOPT(MaxTypeAlign  , 32, 0,
   "default maximum alignment for types")
 VALUE_LANGOPT(AlignDouble, 1, 0, "Controls if doubles should be aligned to 8 bytes (x8

[PATCH] D76181: [AVR] Add support for the -mdouble=x flag

2020-03-15 Thread Ayke via Phabricator via cfe-commits
aykevl marked 3 inline comments as done.
aykevl added a comment.

In D76181#1923176 , @MaskRay wrote:

> The GCC side commits can be found on 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055
>  So it seems that we will have both `-mlong-double-{64,80,128}` (80 is used 
> by x86 fp80) and `-mlong-double={32,64}`... (I actually prefer `=` to `-`)


Yeah I honestly think the `-mlong-double-{64,80,128}` flags are pretty ugly, 
they should have been `-mlong-double={64,80,128}`. Unfortunately I don't think 
that can be changed anymore.
I briefly considered using the `-mdouble-{32,64}` format for AVR but apart from 
it being rather ugly, avr-gcc uses `-mdouble={32,64}` (with `=` instead of 
`-`). That means there will be two closely related flags in Clang with a 
different format. I can change it if necessary, although I have a slight 
preference to match avr-gcc.




Comment at: clang/test/CodeGen/mdouble.c:1
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=64 
| \
+// RUN:   FileCheck --check-prefix=AVR-FP64 %s

MaskRay wrote:
> Maybe name this file `avr-mdouble.c`
I named this mdouble.c instead of avr-mdouble.c as it seems to me that this 
flag may be useful for other targets as well and tests can be added to the same 
file. I can rename this if you think avr-mdouble.c is more appropriate.


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[PATCH] D76181: [AVR] Add support for the -mdouble=x flag

2020-03-17 Thread Ayke via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4add24920550: [AVR] Add support for the -mdouble=x flag 
(authored by aykevl).

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Files:
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/mdouble.c
  clang/test/Driver/mdouble.c

Index: clang/test/Driver/mdouble.c
===
--- /dev/null
+++ clang/test/Driver/mdouble.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target avr -c -### %s -mdouble=64 2>&1 | FileCheck %s
+
+// CHECK: "-mdouble=64"
+
+// RUN: %clang -target aarch64 -c -### %s -mdouble=64 2>&1 | FileCheck --check-prefix=ERR %s
+
+// ERR: error: unsupported option '-mdouble=64' for target 'aarch64'
Index: clang/test/CodeGen/mdouble.c
===
--- /dev/null
+++ clang/test/CodeGen/mdouble.c
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=64 | \
+// RUN:   FileCheck --check-prefix=AVR-FP64 %s
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=avr-unknown-unknown -mdouble=32 | \
+// RUN:   FileCheck --check-prefix=AVR-FP32 %s
+
+double x = 0;
+int size = sizeof(x);
+
+// FIXME: the double should have an alignment of 1 on AVR, not 4 or 8.
+// AVR-FP64: @x = global double {{.*}}, align 8
+// AVR-FP64: @size = global i16 8
+// AVR-FP32: @x = global float {{.*}}, align 4
+// AVR-FP32: @size = global i16 4
Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -2937,6 +2937,7 @@
   Opts.PackStruct = getLastArgIntValue(Args, OPT_fpack_struct_EQ, 0, Diags);
   Opts.MaxTypeAlign = getLastArgIntValue(Args, OPT_fmax_type_align_EQ, 0, Diags);
   Opts.AlignDouble = Args.hasArg(OPT_malign_double);
+  Opts.DoubleSize = getLastArgIntValue(Args, OPT_mdouble_EQ, 0, Diags);
   Opts.LongDoubleSize = Args.hasArg(OPT_mlong_double_128)
 ? 128
 : Args.hasArg(OPT_mlong_double_64) ? 64 : 0;
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4580,6 +4580,14 @@
   RenderFloatingPointOptions(TC, D, OFastEnabled, Args, CmdArgs,
  JA.getOffloadingDeviceKind());
 
+  if (Arg *A = Args.getLastArg(options::OPT_mdouble_EQ)) {
+if (TC.getArch() == llvm::Triple::avr)
+  A->render(Args, CmdArgs);
+else
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getAsString(Args) << TripleStr;
+  }
+
   if (Arg *A = Args.getLastArg(options::OPT_LongDouble_Group)) {
 if (TC.getTriple().isX86())
   A->render(Args, CmdArgs);
Index: clang/lib/Basic/TargetInfo.cpp
===
--- clang/lib/Basic/TargetInfo.cpp
+++ clang/lib/Basic/TargetInfo.cpp
@@ -380,6 +380,20 @@
 LongDoubleFormat = &llvm::APFloat::IEEEquad();
   }
 
+  if (Opts.DoubleSize) {
+if (Opts.DoubleSize == 32) {
+  DoubleWidth = 32;
+  LongDoubleWidth = 32;
+  DoubleFormat = &llvm::APFloat::IEEEsingle();
+  LongDoubleFormat = &llvm::APFloat::IEEEsingle();
+} else if (Opts.DoubleSize == 64) {
+  DoubleWidth = 64;
+  LongDoubleWidth = 64;
+  DoubleFormat = &llvm::APFloat::IEEEdouble();
+  LongDoubleFormat = &llvm::APFloat::IEEEdouble();
+}
+  }
+
   if (Opts.LongDoubleSize) {
 if (Opts.LongDoubleSize == DoubleWidth) {
   LongDoubleWidth = DoubleWidth;
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -2179,6 +2179,8 @@
 def mfancy_math_387 : Flag<["-"], "mfancy-math-387">, Group;
 def mlong_calls : Flag<["-"], "mlong-calls">, Group,
   HelpText<"Generate branches with extended addressability, usually via indirect jumps.">;
+def mdouble_EQ : Joined<["-"], "mdouble=">, Group, Values<"32,64">, Flags<[CC1Option]>,
+  HelpText<"Force double to be 32 bits or 64 bits">;
 def LongDouble_Group : OptionGroup<"">, Group,
   DocName<"Long double flags">,
   DocBrief<[{Selects the long double implementation}]>;
Index: clang/include/clang/Basic/LangOptions.def
===
--- clang/include/clang/Basic/LangOptions.def
+++ clang/include/clang/Basic/LangOptions.def
@@ -176,6 +176,7 @@
 VALUE_LANGOPT(MaxTypeAlign  , 32, 0,
   "default maximum alignment for types")
 VALUE_LAN

[PATCH] D117423: [AVR][clang] Reject non assembly source files for the avr1 family

2022-01-18 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

I'm not sure this is the correct location for these checks. You're essentially 
checking whether the compilation looks like a C/C++ compilation or an assembly 
compilation based on the flags and the file name. However, the Clang driver 
already does something like this: it converts the command line arguments and 
files into a list of jobs to perform. This is done in `Driver::BuildActions`, 
`Driver::BuildJobs`, `Clang::ConstructJob`, and other places.
I think a better place to do this check is in `Clang::ConstructJob`. There is 
already something similar here:

https://github.com/llvm/llvm-project/blob/10ed1eca241f893085b8db40138e588e72aaee3a/clang/lib/Driver/ToolChains/Clang.cpp#L4396-L4398

  // C++ is not supported for IAMCU.
  if (IsIAMCU && types::isCXX(Input.getType()))
D.Diag(diag::err_drv_clang_unsupported) << "C++ for IAMCU";

I think something like this will work, in `Clang::ConstructJob`:

  bool IsAVR = ...
  ...
  
  if (IsAVR) {
  D.Diag(diag::err_drv_clang_unsupported) << "C/C++ for AVR";

There is a different `ConstructJob` for assembly, so this works.




Comment at: clang/lib/Driver/ToolChains/AVR.h:22
 class LLVM_LIBRARY_VISIBILITY AVRToolChain : public Generic_ELF {
+  std::string AVRMcu;
+

I think I would have called this `CPU` not `AVRMcu`, but `AVRMcu` is fine.



Comment at: clang/test/Driver/avr-mmcu.S:4
+// RUN: %clang -### -target avr -no-canonical-prefixes -mmcu=attiny11 %s -c 
2>&1 | FileCheck -check-prefix=CHECKA %s
+// CHECKA-NOT: error: CPU 'attiny11' does not support {{.*}} language mode
+

Is there a reason why you used `{{.*}}` instead of the actual value?


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[PATCH] D115982: [clang][AVR] Implement '__flashN' for variables on different flash banks

2022-01-18 Thread Ayke via Phabricator via cfe-commits
aykevl accepted this revision.
aykevl added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: jacquesguan.

Looks good to me!




Comment at: clang/lib/Basic/Targets/AVR.cpp:27
   const char *DefineName;
+  const int MaxFlashBank; // -1 means the device does not support LPM/ELPM.
 };

This works and is fine, but I think you could also name it `NumFlashBanks` so 
that it is the number of flash banks supported on the device (0 if LPM/ELPM is 
not supported). With 0 for the attiny11 (which has no accessible flash banks) 
and 1 for the attiny22 (because it has only one flash bank that can be 
accessed: flash bank 0).

Just a suggestion, the current system looks good to me.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:8290
+if (isTargetAddressSpace(AS) && 1 <= toTargetAddressSpace(AS) &&
+toTargetAddressSpace(AS) <= 6 && !D->getType().isConstQualified())
   CGM.getDiags().Report(D->getLocation(),

These hardcoded numbers are a bit unfortunate, but OK.



Comment at: clang/test/Sema/avr-flash.c:10
+  static __flash5 const int a5[] = {4, 6}; // expected-error {{unknown type 
name '__flash5'}}
+  // TODO: It would be better to report "'__flash5' is not supported on 
at908515".
+  return a0[n] + a1[n];

I think this can be implemented by always setting the `__flash*` defines and 
checking whether they are valid for the current device in 
`getGlobalVarAddressSpace`.


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[PATCH] D115982: [clang][AVR] Implement '__flashN' for variables on different flash banks

2022-01-03 Thread Ayke via Phabricator via cfe-commits
aykevl added a comment.

avr-gcc checks whether the device supports the flash bank used. For example:

  $ cat test.c
  int d = 5;
  const int ro = 5;
  __flash const int f = 5;
  __flash1 const int f1 = 5;
  __flash2 const int f2 = 5;
  
  $ avr-gcc -mmcu=attiny84 -Os -c -o test.o test.c
  test.c:4:20: error: variable ‘f1’ located in address space ‘__flash1’ beyond 
flash of 64 KiB
   __flash1 const int f1 = 5;
  ^
  test.c:5:20: error: variable ‘f2’ located in address space ‘__flash2’ beyond 
flash of 64 KiB
   __flash2 const int f2 = 5;
  ^

It does not appear that this patch has a similar check, while I think that 
would be useful. Or did you leave it out intentionally?


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[PATCH] D86546: [compiler-rt][builtins] Use explicitly-sized integer types for LibCalls

2022-01-17 Thread Ayke via Phabricator via cfe-commits
aykevl accepted this revision.
aykevl added a comment.
This revision is now accepted and ready to land.

I've looked through the code again. It looks correct and (in past testing) it 
fixed a bug I had, so I'm going to accept this.

@atrosinenko do you have commit access? If not, I can commit it for you.


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[PATCH] D86547: [compiler-rt][builtins] Use c[tl]zsi macro instead of __builtin_c[tl]z

2022-01-17 Thread Ayke via Phabricator via cfe-commits
aykevl accepted this revision.
aykevl added a comment.
This revision is now accepted and ready to land.

Looks good to me.




Comment at: compiler-rt/lib/builtins/fp_extend.h:32-39
 #if defined __LP64__
   return __builtin_clzl(a);
 #else
   if (a & REP_C(0x))
-return __builtin_clz(a >> 32);
+return clzsi(a >> 32);
   else
+return 32 + clzsi(a & REP_C(0x));

Perhaps more reliable would be the following:

```
#if ULONG_MAX == 0x
  return __builtin_clzl(a);
#elif ULLONG_MAX == 0x
  return __builtin_clzll(a);
#else
  #error Unsupported platform
#endif
```

This is what I've also used in int_types.h to detect clzsi etc. It probably 
would need to be tested on some more architectures though (32 and 64 bit).


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[PATCH] D86547: [compiler-rt][builtins] Use c[tl]zsi macro instead of __builtin_c[tl]z

2022-01-17 Thread Ayke via Phabricator via cfe-commits
aykevl added inline comments.



Comment at: compiler-rt/lib/builtins/fp_extend.h:32-39
 #if defined __LP64__
   return __builtin_clzl(a);
 #else
   if (a & REP_C(0x))
-return __builtin_clz(a >> 32);
+return clzsi(a >> 32);
   else
+return 32 + clzsi(a & REP_C(0x));

aykevl wrote:
> Perhaps more reliable would be the following:
> 
> ```
> #if ULONG_MAX == 0x
>   return __builtin_clzl(a);
> #elif ULLONG_MAX == 0x
>   return __builtin_clzll(a);
> #else
>   #error Unsupported platform
> #endif
> ```
> 
> This is what I've also used in int_types.h to detect clzsi etc. It probably 
> would need to be tested on some more architectures though (32 and 64 bit).
In fact, it might be possible to use `__builtin_clzll` for all platforms (it 
maps to 'long long', which I think is 64-bit practically everywhere).


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