[PATCH] D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag.

[Zakk Chen via Phabricator via cfe-commits]

khchen added inline comments.



Comment at: llvm/test/CodeGen/RISCV/module-target-abi-tests.ll:5
+; RUN: cat %s > %t.emptyabi
+; RUN: echo '!0 = !{i32 1, !"target-abi", !""}' >> %t.emptyabi
+; RUN: llc -mtriple=riscv32 < %t.emptyabi -o /dev/null

jrtc27 wrote:
> khchen wrote:
> > khchen wrote:
> > > luismarques wrote:
> > > > Is this something that we are handling in general, having such flag 
> > > > without a value?
> > > Good cached, in general the target-abi is not empty, I updated the 
> > > current implementation, thanks!
> > @luismarques 
> > 
> > Sorry, I forget that the empty target-abi are coming from some clang cc1 
> > tests. 
> > They are missing -target-abi option in clang cc1 so target-abi module flag 
> > is empty.
> >  
> > ```
> > CodeGen/RISCV/riscv-atomics.c
> > CodeGen/RISCV/riscv-inline-asm-rvv.c
> > CodeGen/RISCV/riscv-inline-asm-xsfvfhbfmin.c
> > CodeGen/RISCV/riscv-inline-asm.c
> > ```
> > 
> > Maybe we need to calculate the default target-abi if it's empty? or handle 
> > empty target-abi in the backend?
> > 
> I do think we should be filling in the default ABI here, otherwise it's very 
> fragile.
Do you mean cc1 need to calculate the default target-abi and fill it in IR? 


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[PATCH] D103527: [Clang][RISCV] Implement vlseg and vlsegff.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

Ping. Is it possible to land these Zvlsseg patches before LLVM 13 branch 
created?


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[PATCH] D49864: [clang-tidy] The script clang-tidy-diff.py doesn't accept 'pass by' options (--)

[Jano Simas via Phabricator via cfe-commits]

janosimas added a comment.

That makes sense.
Should I add it somewhere? Or do I need to talk to someone?


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[PATCH] D105421: [analyzer] Handle << operator for std::unique_ptr

[Deep Majumder via Phabricator via cfe-commits]

RedDocMD created this revision.
RedDocMD added reviewers: NoQ, vsavchenko, xazax.hun, teemperor.
Herald added subscribers: manas, steakhal, ASDenysPetrov, martong, dkrupp, 
donat.nagy, Szelethus, mikhail.ramalho, a.sidorin, rnkovacs, szepet, 
baloghadamsoftware.
RedDocMD requested review of this revision.
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Herald added a subscriber: cfe-commits.

This patch handles the `<<` operator defined for `std::unique_ptr` in
the std namespace (ignores custom overloads of the operator).


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Files:
  clang/lib/StaticAnalyzer/Checkers/SmartPtr.h
  clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp


Index: clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
===
--- clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
+++ clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
@@ -81,6 +81,20 @@
 
 REGISTER_MAP_WITH_PROGRAMSTATE(TrackedRegionMap, const MemRegion *, SVal)
 
+// Checks if RD has name in Names and is in std namespace
+bool hasStdClassWithName(const CXXRecordDecl *RD,
+ const SmallVectorImpl &Names) {
+  if (!RD || !RD->getDeclContext()->isStdNamespace())
+return false;
+  if (RD->getDeclName().isIdentifier()) {
+StringRef Name = RD->getName();
+return llvm::any_of(Names, [&Name](StringRef GivenName) -> bool {
+  return Name == GivenName;
+});
+  }
+  return false;
+}
+
 // Define the inter-checker API.
 namespace clang {
 namespace ento {
@@ -89,16 +103,16 @@
   const auto *MethodDecl = dyn_cast_or_null(Call.getDecl());
   if (!MethodDecl || !MethodDecl->getParent())
 return false;
+  return isStdSmartPtr(MethodDecl->getParent());
+}
 
-  const auto *RecordDecl = MethodDecl->getParent();
-  if (!RecordDecl || !RecordDecl->getDeclContext()->isStdNamespace())
-return false;
+bool isStdSmartPtr(const CXXRecordDecl *RD) {
+  return hasStdClassWithName(
+  RD, SmallVector{"shared_ptr", "unique_ptr", "weak_ptr"});
+}
 
-  if (RecordDecl->getDeclName().isIdentifier()) {
-StringRef Name = RecordDecl->getName();
-return Name == "shared_ptr" || Name == "unique_ptr" || Name == "weak_ptr";
-  }
-  return false;
+bool isStdSmartPtr(const Expr *E) {
+  return isStdSmartPtr(E->getType()->getAsCXXRecordDecl());
 }
 
 bool isNullSmartPtr(const ProgramStateRef State, const MemRegion *ThisRegion) {
@@ -175,9 +189,35 @@
   return CD && CD->getConversionType()->isBooleanType();
 }
 
+bool isStdBasicOstream(const Expr *E) {
+  const auto *RD = E->getType()->getAsCXXRecordDecl();
+  return hasStdClassWithName(RD, SmallVector{"basic_ostream"});
+}
+
+bool isStdOstreamOperatorCall(const CallEvent &Call) {
+  if (Call.getNumArgs() != 2 ||
+  !Call.getDecl()->getDeclContext()->isStdNamespace())
+return false;
+  const auto *FC = dyn_cast(&Call);
+  if (!FC)
+return false;
+  const FunctionDecl *FD = FC->getDecl();
+  if (!FD->isOverloadedOperator())
+return false;
+  const OverloadedOperatorKind OOK = FD->getOverloadedOperator();
+  if (OOK != clang::OO_LessLess)
+return false;
+  return smartptr::isStdSmartPtr(Call.getArgExpr(1)) &&
+ isStdBasicOstream(Call.getArgExpr(0));
+}
+
 bool SmartPtrModeling::evalCall(const CallEvent &Call,
 CheckerContext &C) const {
   ProgramStateRef State = C.getState();
+
+  if (isStdOstreamOperatorCall(Call))
+return true;
+
   if (!smartptr::isStdSmartPtrCall(Call))
 return false;
 
Index: clang/lib/StaticAnalyzer/Checkers/SmartPtr.h
===
--- clang/lib/StaticAnalyzer/Checkers/SmartPtr.h
+++ clang/lib/StaticAnalyzer/Checkers/SmartPtr.h
@@ -22,6 +22,8 @@
 
 /// Returns true if the event call is on smart pointer.
 bool isStdSmartPtrCall(const CallEvent &Call);
+bool isStdSmartPtr(const CXXRecordDecl *RD);
+bool isStdSmartPtr(const Expr *E);
 
 /// Returns whether the smart pointer is null or not.
 bool isNullSmartPtr(const ProgramStateRef State, const MemRegion *ThisRegion);


Index: clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
===
--- clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
+++ clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
@@ -81,6 +81,20 @@
 
 REGISTER_MAP_WITH_PROGRAMSTATE(TrackedRegionMap, const MemRegion *, SVal)
 
+// Checks if RD has name in Names and is in std namespace
+bool hasStdClassWithName(const CXXRecordDecl *RD,
+ const SmallVectorImpl &Names) {
+  if (!RD || !RD->getDeclContext()->isStdNamespace())
+return false;
+  if (RD->getDeclName().isIdentifier()) {
+StringRef Name = RD->getName();
+return llvm::any_of(Names, [&Name](StringRef GivenName) -> bool {
+  return Name == GivenName;
+});
+  }
+  return false;
+}
+
 // Define the inter-checker API.
 namespace clang {
 namespace ento {
@@

[clang] 3697f26 - [docs] Fix linking issues in LibASTMatchers tutorial

[Georgy Komarov via cfe-commits]

Author: Georgy Komarov
Date: 2021-07-05T12:11:25+03:00
New Revision: 3697f2683695a5e67184c4b348415f4da028133c

URL: 
https://github.com/llvm/llvm-project/commit/3697f2683695a5e67184c4b348415f4da028133c
DIFF: 
https://github.com/llvm/llvm-project/commit/3697f2683695a5e67184c4b348415f4da028133c.diff

LOG: [docs] Fix linking issues in LibASTMatchers tutorial

Update CMakeLists.txt in the tutorial to reflect the latest changes in
LLVM. The demo project cannot be linked without added libraries.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D105409

Added: 


Modified: 
clang/docs/LibASTMatchersTutorial.rst

Removed: 




diff  --git a/clang/docs/LibASTMatchersTutorial.rst 
b/clang/docs/LibASTMatchersTutorial.rst
index f70173e9f83c9..3f396dd39ded1 100644
--- a/clang/docs/LibASTMatchersTutorial.rst
+++ b/clang/docs/LibASTMatchersTutorial.rst
@@ -105,9 +105,12 @@ CMakeLists.txt should have the following contents:
 )
   target_link_libraries(loop-convert
 PRIVATE
-clangTooling
-clangBasic
+clangAST
 clangASTMatchers
+clangBasic
+clangFrontend
+clangSerialization
+clangTooling
 )
 
 With that done, Ninja will be able to compile our tool. Let's give it



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[PATCH] D105409: [docs] Fix linking issues in LibASTMatchers tutorial

[Georgy Komarov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
jubnzv marked an inline comment as done.
Closed by commit rG3697f2683695: [docs] Fix linking issues in LibASTMatchers 
tutorial (authored by jubnzv).
Herald added a project: clang.
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Files:
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Index: clang/docs/LibASTMatchersTutorial.rst
===
--- clang/docs/LibASTMatchersTutorial.rst
+++ clang/docs/LibASTMatchersTutorial.rst
@@ -105,9 +105,12 @@
 )
   target_link_libraries(loop-convert
 PRIVATE
-clangTooling
-clangBasic
+clangAST
 clangASTMatchers
+clangBasic
+clangFrontend
+clangSerialization
+clangTooling
 )
 
 With that done, Ninja will be able to compile our tool. Let's give it


Index: clang/docs/LibASTMatchersTutorial.rst
===
--- clang/docs/LibASTMatchersTutorial.rst
+++ clang/docs/LibASTMatchersTutorial.rst
@@ -105,9 +105,12 @@
 )
   target_link_libraries(loop-convert
 PRIVATE
-clangTooling
-clangBasic
+clangAST
 clangASTMatchers
+clangBasic
+clangFrontend
+clangSerialization
+clangTooling
 )
 
 With that done, Ninja will be able to compile our tool. Let's give it
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[PATCH] D104797: [WebAssembly] Implementation of global.get/set for reftypes in LLVM IR

[Paulo Matos via Phabricator via cfe-commits]

pmatos added a comment.

D105423  implements the required support in 
LLT of opaque types for this patch to work again.


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[PATCH] D94366: [Clang] Emit mustprogress for infinite C++ loops

[Florian Hahn via Phabricator via cfe-commits]

fhahn requested changes to this revision.
fhahn added a comment.
This revision now requires changes to proceed.

I think this has been addressed by some commits a while ago. Marking as changes 
requested to clear up review queue. Please feel free to update the patch in 
case there’s anything I missed.


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[PATCH] D105414: Add x86 and x86_64 to the BareMetal toolchain

[Hafiz Abid Qadeer via Phabricator via cfe-commits]

abidh added a comment.

You need to add some tests that check the functionality that you are adding.  
Look at clang/test/Driver/baremetal.cpp for an example.


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[PATCH] D100136: Allow applying attributes to subset of allowed subjects.

[Bruno De Fraine via Phabricator via cfe-commits]

brunodf added a comment.

This change is important make better use of `#pragma clang attribute` (which is 
cool!), but for some uses the check still seems to restrictive.

Concretely, for an attribute where `Subjects` includes `FunctionLike`, I can 
only match it using the rule `hasType(functionType)` but not with a `function` 
rule. E.g. if I want to apply it to C++ methods, the rule `function(is_member)` 
is rejected (as `attribute ... can't be applied to 'function(is_member)'`).

If I change the subject list of my attribute to include `Function` in addition 
to `FunctionLike`, it does work, but I don't know if there are other effects.

I'm not exactly sure what is the purpose of the check, since there is already a 
warning when your pragma does not match anything? If an attribute is updated to 
allow more subjects, how does that affect matching of existing rules?


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[clang] 85255a0 - [C++][Sema] Ignore top-level qualifiers in casts

[Ole Strohm via cfe-commits]

Author: Ole Strohm
Date: 2021-07-05T12:22:08+01:00
New Revision: 85255a04e5729c03214c51177aa885c055f3e242

URL: 
https://github.com/llvm/llvm-project/commit/85255a04e5729c03214c51177aa885c055f3e242
DIFF: 
https://github.com/llvm/llvm-project/commit/85255a04e5729c03214c51177aa885c055f3e242.diff

LOG: [C++][Sema] Ignore top-level qualifiers in casts

Ignore top-level qualifiers in casts, which fixes issues in reinterpret_cast.

This rule comes from [expr.type]/8.2.2 which explains that casting to a
pr-qualified type should actually cast to the unqualified type. In C++
this is only done for types that aren't classes or arrays.

Fixes: PR49221

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D102689

Added: 


Modified: 
clang/lib/Sema/SemaCast.cpp
clang/test/CodeGenOpenCLCXX/reinterpret_cast.clcpp
clang/test/SemaCXX/reinterpret-cast.cpp
clang/test/SemaCXX/warn-reinterpret-base-class.cpp
clang/test/SemaOpenCLCXX/addrspace_cast.clcpp
clang/test/SemaOpenCLCXX/reinterpret-cast.clcpp

Removed: 




diff  --git a/clang/lib/Sema/SemaCast.cpp b/clang/lib/Sema/SemaCast.cpp
index 1e2113b58f81..869e414c7095 100644
--- a/clang/lib/Sema/SemaCast.cpp
+++ b/clang/lib/Sema/SemaCast.cpp
@@ -61,6 +61,15 @@ namespace {
 ValueKind(Expr::getValueKindForType(destType)),
 Kind(CK_Dependent), IsARCUnbridgedCast(false) {
 
+  // C++ [expr.type]/8.2.2:
+  //   If a pr-value initially has the type cv-T, where T is a
+  //   cv-unqualified non-class, non-array type, the type of the
+  //   expression is adjusted to T prior to any further analysis.
+  if (!S.Context.getLangOpts().ObjC && !DestType->isRecordType() &&
+  !DestType->isArrayType()) {
+DestType = DestType.getUnqualifiedType();
+  }
+
   if (const BuiltinType *placeholder =
 src.get()->getType()->getAsPlaceholderType()) {
 PlaceholderKind = placeholder->getKind();

diff  --git a/clang/test/CodeGenOpenCLCXX/reinterpret_cast.clcpp 
b/clang/test/CodeGenOpenCLCXX/reinterpret_cast.clcpp
index 430223f337b7..3771e1b1e090 100644
--- a/clang/test/CodeGenOpenCLCXX/reinterpret_cast.clcpp
+++ b/clang/test/CodeGenOpenCLCXX/reinterpret_cast.clcpp
@@ -11,6 +11,17 @@ void bar(global int2 *in) {
   //CHECK: bitcast i64 %{{[0-9]+}} to <2 x i32>
   auto i2 = reinterpret_cast(l);
 
+  __private short s1;
+  // CHECK: %{{[0-9]+}} = load i16, i16* %s1, align 2
+  // CHECK-NEXT: store i16 %{{[0-9]+}}, i16* %s2, align 2
+  auto s2 = reinterpret_cast<__private short>(s1);
+  // CHECK: %{{[0-9]+}} = load i16, i16* %s1, align 2
+  // CHECK-NEXT: store i16 %{{[0-9]+}}, i16* %s3, align 2
+  auto s3 = reinterpret_cast(s1);
+  // CHECK: %{{[0-9]+}} = load i16, i16* %s1, align 2
+  // CHECK-NEXT: store i16 %{{[0-9]+}}, i16* %s4, align 2
+  auto s4 = reinterpret_cast<__global short>(s1);
+
   int4 i4;
   //CHECK: bitcast <4 x i32> %{{[0-9]+}} to <2 x i64>
   auto l2 = reinterpret_cast(i4);

diff  --git a/clang/test/SemaCXX/reinterpret-cast.cpp 
b/clang/test/SemaCXX/reinterpret-cast.cpp
index 6cc46d8b0d9f..6a4bc9166544 100644
--- a/clang/test/SemaCXX/reinterpret-cast.cpp
+++ b/clang/test/SemaCXX/reinterpret-cast.cpp
@@ -25,6 +25,9 @@ void self_conversion()
   const int structure::*psi = 0;
   (void)reinterpret_cast(psi);
 
+  const int ci = 0;
+  (void)reinterpret_cast(i);
+
   structure s;
   (void)reinterpret_cast(s); // expected-error {{reinterpret_cast 
from 'structure' to 'structure' is not allowed}}
 
@@ -68,6 +71,16 @@ void constness()
   (void)reinterpret_cast(ip);
   // Valid: T*** -> T2 const* const* const*
   (void)reinterpret_cast(ipppc);
+
+  // C++ [expr.type]/8.2.2:
+  //   If a pr-value initially has the type cv-T, where T is a
+  //   cv-unqualified non-class, non-array type, the type of the
+  //   expression is adjusted to T prior to any further analysis.
+  int i = 0;
+  // Valid: T -> T (top level const is ignored)
+  (void)reinterpret_cast(i);
+  // Valid: T* -> T* (top level const is ignored)
+  (void)reinterpret_cast(ip);
 }
 
 void fnptrs()

diff  --git a/clang/test/SemaCXX/warn-reinterpret-base-class.cpp 
b/clang/test/SemaCXX/warn-reinterpret-base-class.cpp
index d73b4872117f..55bc777ce2e0 100644
--- a/clang/test/SemaCXX/warn-reinterpret-base-class.cpp
+++ b/clang/test/SemaCXX/warn-reinterpret-base-class.cpp
@@ -298,7 +298,7 @@ void 
diff erent_subobject_downcast(E *e, F *f, A *a) {
 #endif
   (void)reinterpret_cast(a);
 
-  // expected-warning@+2 {{'reinterpret_cast' to class 'L' (aka 'const F 
*volatile') from its base at non-zero offset 'E *' behaves 
diff erently from 'static_cast'}}
+  // expected-warning@+2 {{'reinterpret_cast' to class 'K' (aka 'const F *') 
from its base at non-zero offset 'E *' behaves 
diff erently from 'static_cast'}}
   // expected-note@+1 {{use 'static_cast' to adjust the pointer correctly 
while downcasting}}
   (void)reinterpret_cast(e);
  

[PATCH] D102689: [C++] Ignore top-level qualifiers in casts

[Ole Strohm via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG85255a04e572: [C++][Sema] Ignore top-level qualifiers in 
casts (authored by olestrohm).

Changed prior to commit:
  https://reviews.llvm.org/D102689?vs=350560&id=356472#toc

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Files:
  clang/lib/Sema/SemaCast.cpp
  clang/test/CodeGenOpenCLCXX/reinterpret_cast.clcpp
  clang/test/SemaCXX/reinterpret-cast.cpp
  clang/test/SemaCXX/warn-reinterpret-base-class.cpp
  clang/test/SemaOpenCLCXX/addrspace_cast.clcpp
  clang/test/SemaOpenCLCXX/reinterpret-cast.clcpp

Index: clang/test/SemaOpenCLCXX/reinterpret-cast.clcpp
===
--- clang/test/SemaOpenCLCXX/reinterpret-cast.clcpp
+++ clang/test/SemaOpenCLCXX/reinterpret-cast.clcpp
@@ -4,6 +4,11 @@
 typedef int int3 __attribute__((ext_vector_type(3)));
 typedef int int4 __attribute__((ext_vector_type(4)));
 
+struct X {};
+
+__global int g = 0;
+__global int *__global g_ptr = &g;
+
 kernel void foo() {
   // Testing conversions between vectors and vectors/scalars
   long l1;
@@ -13,6 +18,18 @@
   auto i2_to_i = reinterpret_cast(i2); // expected-error{{reinterpret_cast from vector 'int2' (vector of 2 'int' values) to scalar 'int' of different size}}
   auto i2_to_i2 = reinterpret_cast(i2);
 
+  // Testing reinterpret_cast with address spaces.
+  __private short s;
+  auto s2 = reinterpret_cast<__private short>(s);
+  auto s3 = reinterpret_cast(s);
+  auto s4 = reinterpret_cast<__global short>(s);
+
+  __private X x;
+  auto x2 = reinterpret_cast<__private X>(x); // expected-error{{reinterpret_cast from '__private X' to '__private X' is not allowed}}
+
+  auto ptr = reinterpret_cast<__global int* __private>(g_ptr);
+  (void)reinterpret_cast<__private int* __private>(g_ptr); // expected-error{{reinterpret_cast from '__global int *' to '__private int *' is not allowed}}
+
   // Only integral types (and pointer/references) can be reinterpret casted to themselves.
   // Currently this does not include any opencl types.
   reserve_id_t r_id1;
Index: clang/test/SemaOpenCLCXX/addrspace_cast.clcpp
===
--- clang/test/SemaOpenCLCXX/addrspace_cast.clcpp
+++ clang/test/SemaOpenCLCXX/addrspace_cast.clcpp
@@ -22,7 +22,7 @@
 void test_temp(__global int *par) {
   T *var1 = addrspace_cast(par); //expected-error{{addrspace_cast from '__global int *__private' to '__private int *' converts between mismatching address spaces}}
   __private T *var2 = addrspace_cast<__private T *>(par); //expected-error{{addrspace_cast from '__global int *__private' to '__private int *' converts between mismatching address spaces}}
-  T var3 = addrspace_cast(par); //expected-error{{addrspace_cast from '__global int *__private' to '__private int' is not allowed}}
+  T var3 = addrspace_cast(par); //expected-error{{addrspace_cast from '__global int *__private' to 'int' is not allowed}}
 }
 
 void bar() {
Index: clang/test/SemaCXX/warn-reinterpret-base-class.cpp
===
--- clang/test/SemaCXX/warn-reinterpret-base-class.cpp
+++ clang/test/SemaCXX/warn-reinterpret-base-class.cpp
@@ -298,7 +298,7 @@
 #endif
   (void)reinterpret_cast(a);
 
-  // expected-warning@+2 {{'reinterpret_cast' to class 'L' (aka 'const F *volatile') from its base at non-zero offset 'E *' behaves differently from 'static_cast'}}
+  // expected-warning@+2 {{'reinterpret_cast' to class 'K' (aka 'const F *') from its base at non-zero offset 'E *' behaves differently from 'static_cast'}}
   // expected-note@+1 {{use 'static_cast' to adjust the pointer correctly while downcasting}}
   (void)reinterpret_cast(e);
   // CHECK: fix-it:"{{.*}}":{[[@LINE-1]]:9-[[@LINE-1]]:25}:"static_cast"
Index: clang/test/SemaCXX/reinterpret-cast.cpp
===
--- clang/test/SemaCXX/reinterpret-cast.cpp
+++ clang/test/SemaCXX/reinterpret-cast.cpp
@@ -25,6 +25,9 @@
   const int structure::*psi = 0;
   (void)reinterpret_cast(psi);
 
+  const int ci = 0;
+  (void)reinterpret_cast(i);
+
   structure s;
   (void)reinterpret_cast(s); // expected-error {{reinterpret_cast from 'structure' to 'structure' is not allowed}}
 
@@ -68,6 +71,16 @@
   (void)reinterpret_cast(ip);
   // Valid: T*** -> T2 const* const* const*
   (void)reinterpret_cast(ipppc);
+
+  // C++ [expr.type]/8.2.2:
+  //   If a pr-value initially has the type cv-T, where T is a
+  //   cv-unqualified non-class, non-array type, the type of the
+  //   expression is adjusted to T prior to any further analysis.
+  int i = 0;
+  // Valid: T -> T (top level const is ignored)
+  (void)reinterpret_cast(i);
+  // Valid: T* -> T* (top level const is ignored)
+  (void)reinterpret_cast(ip);
 }
 
 void f

[PATCH] D105426: [clangd] WIP: Unused header warnings

[Kirill Bobyrev via Phabricator via cfe-commits]

kbobyrev created this revision.
Herald added subscribers: usaxena95, kadircet, arphaman, mgrang, mgorny.
kbobyrev requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay, ilya-biryukov.
Herald added a project: clang-tools-extra.

Based on https://reviews.llvm.org/D100540.

This isn't a real patch yet, this is mostly to track progress and back up the
existing work.


Repository:
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Files:
  clang-tools-extra/clangd/CMakeLists.txt
  clang-tools-extra/clangd/Headers.cpp
  clang-tools-extra/clangd/Headers.h
  clang-tools-extra/clangd/IWYU.cpp
  clang-tools-extra/clangd/IWYU.h
  clang-tools-extra/clangd/ParsedAST.cpp
  clang-tools-extra/clangd/ParsedAST.h
  clang-tools-extra/clangd/unittests/CMakeLists.txt
  clang-tools-extra/clangd/unittests/IWYUTests.cpp

Index: clang-tools-extra/clangd/unittests/IWYUTests.cpp
===
--- /dev/null
+++ clang-tools-extra/clangd/unittests/IWYUTests.cpp
@@ -0,0 +1,117 @@
+//===-- IWYUTests.cpp -*- C++ -*---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Annotations.h"
+#include "IWYU.h"
+#include "TestTU.h"
+#include "index/FileIndex.h"
+#include "index/Index.h"
+#include "index/MemIndex.h"
+#include "index/Merge.h"
+#include "index/Symbol.h"
+#include "clang/Index/IndexSymbol.h"
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+
+namespace clang {
+namespace clangd {
+namespace {
+using testing::ElementsAreArray;
+
+TEST(ReferencedLocations, All) {
+  struct TestCase {
+const char *HeaderCode;
+const char *MainCode;
+  };
+  TestCase Cases[] = {{
+  "int ^x();",
+  "int y = x();",
+  },
+  {
+  "class ^X;",
+  "X *y;",
+  },
+  {
+  "template  class ^X;",
+  "X *y;",
+  },
+  {
+  "using ^Integer = int;",
+  "Integer x;",
+  },
+  {
+  "struct X{int ^a;}; X ^foo();",
+  "int y = foo().a;",
+  },
+  {
+  "class ^X{}; X ^foo();",
+  "auto bar() { return foo(); }",
+  },
+  {
+  "class ^X; class ^X{}; class ^X;",
+  "X *y;",
+  },
+  {
+  // FIXME: should report the using decl too.
+  // This information is not preserved in the AST.
+  "namespace ns { class ^X; }; using ns::X;",
+  "X *y;",
+  }};
+  for (const TestCase &T : Cases) {
+TestTU TU;
+TU.Code = T.MainCode;
+Annotations Header(T.HeaderCode);
+TU.HeaderCode = Header.code().str();
+auto AST = TU.build();
+
+std::vector Points;
+for (SourceLocation Loc : findReferencedLocations(AST).AllLocations) {
+  if (AST.getSourceManager().getBufferName(Loc).endswith(
+  TU.HeaderFilename)) {
+Points.push_back(offsetToPosition(
+TU.HeaderCode, AST.getSourceManager().getFileOffset(Loc)));
+  }
+}
+llvm::sort(Points);
+
+EXPECT_EQ(Points, Header.points()) << T.HeaderCode << "\n---\n"
+   << T.MainCode;
+  }
+}
+
+TEST(ReferencedLocations, Stdlib) {
+  struct TestCase {
+const char *HeaderCode;
+const char *MainCode;
+std::vector StdlibHeaders;
+  };
+  TestCase Cases[] = {
+  {
+  "template class vector{};",
+  "std::vector *x;",
+  {""},
+  },
+  {
+  "namespace foo { class vector; }",
+  "std::foo::vector *x;",
+  {},
+  }};
+  for (const TestCase &T : Cases) {
+TestTU TU;
+TU.Code = T.MainCode;
+TU.HeaderCode = std::string("namespace std {\n") + T.HeaderCode + "\n}";
+auto AST = TU.build();
+
+auto StdlibHeaders = findReferencedLocations(AST).StandardLibraryHeaders;
+EXPECT_THAT(StdlibHeaders, ElementsAreArray(T.StdlibHeaders));
+  }
+}
+
+} // namespace
+} // namespace clangd
+} // namespace clang
Index: clang-tools-extra/clangd/unittests/CMakeLists.txt
===
--- clang-tools-extra/clangd/unittests/CMakeLists.txt
+++ clang-tools-extra/clangd/unittests/CMakeLists.txt
@@ -61,6 +61,7 @@
   Index

[PATCH] D104858: [OpenCL][ARM] Fix ICE when compiling a kernel

[Anastasia Stulova via Phabricator via cfe-commits]

Anastasia added a comment.

In D104858#2849268 , 
@pekka.jaaskelainen wrote:

> Does this break clSetKernelArg() for ARM CPUs in PoCL? I believe so far it 
> has worked for ARM - just wondering why you decide to drop it now?
>
> https://github.com/pocl/pocl/issues/1

The reason why we would like to fix it is that upstream clang has a crash 
currently when OpenCL sources are compiled for any Arm CPU: 
https://bugs.llvm.org/show_bug.cgi?id=50841. Do you have any other suggestions 
to avoid this problem?

FYI clang also emits kernel metadata that can be used to detect kernels...


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[clang-tools-extra] de8274a - [clangd] NFC: Remove outdated comment

[Kirill Bobyrev via cfe-commits]

Author: Kirill Bobyrev
Date: 2021-07-05T13:58:54+02:00
New Revision: de8274a1b912687ca7b182ce28b34b0e66b2b0e3

URL: 
https://github.com/llvm/llvm-project/commit/de8274a1b912687ca7b182ce28b34b0e66b2b0e3
DIFF: 
https://github.com/llvm/llvm-project/commit/de8274a1b912687ca7b182ce28b34b0e66b2b0e3.diff

LOG: [clangd] NFC: Remove outdated comment

Added: 


Modified: 
clang-tools-extra/clangd/index/dex/Dex.h

Removed: 




diff  --git a/clang-tools-extra/clangd/index/dex/Dex.h 
b/clang-tools-extra/clangd/index/dex/Dex.h
index abfad98fab3d..3153360323d4 100644
--- a/clang-tools-extra/clangd/index/dex/Dex.h
+++ b/clang-tools-extra/clangd/index/dex/Dex.h
@@ -34,11 +34,6 @@ namespace clangd {
 namespace dex {
 
 /// In-memory Dex trigram-based index implementation.
-// FIXME(kbobyrev): Introduce serialization and deserialization of the symbol
-// index so that it can be loaded from the disk. Since static index is not
-// changed frequently, it's safe to assume that it has to be built only once
-// (when the clangd process starts). Therefore, it can be easier to store built
-// index on disk and then load it if available.
 class Dex : public SymbolIndex {
 public:
   // All data must outlive this index.



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[PATCH] D104858: [OpenCL][ARM] Fix ICE when compiling a kernel

[Pekka Jääskeläinen via Phabricator via cfe-commits]

pekka.jaaskelainen added a comment.

> The reason why we would like to fix it is that upstream clang has a crash 
> currently when OpenCL sources are compiled for any Arm CPU: 
> https://bugs.llvm.org/show_bug.cgi?id=50841. Do you have any other 
> suggestions to avoid this problem?
>
> FYI clang also emits kernel metadata that can be used to detect kernels...

Unfortunately I cannot look at this in detail right now, but I'll reply quickly 
for a heads up: The problem was not how to detect kernels, but the ABI/CC 
mismatch to the
clSetKerneArg() with (user facing) arguments that get split to multiple args or 
vice versa. E.g. x86 ABI had a CC where 2xfloat gets to 1xdouble in the 
generated function
finger print, thus there was no 1:1 match of the kernel arguments to the 
OpenCL-facing ones (making clSetKernelArg calls difficult to implement 
robustly).

IIRC, SPIR_KERNEL CC was used to force the 1:1 mapping and produce a portable 
way to handle this OpenCL API e.g. with struct args etc.


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[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

[Amy Kwan via Phabricator via cfe-commits]

amyk added inline comments.



Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1534
+  Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>;
 }

Is there an unintended change at the end?



Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:2841
+let Predicates = [HasP8Altivec] in {
+  def : Pat<(int_ppc_lwarx xoaddr:$dst),
+(LWARX xoaddr:$dst)>;

Why are these patterns in `PPCInstrPrefix.td`? Shouldn't they be in 
`PPCInstrInfo.td`?
Also, you can probably use `ForceXForm` instead of `xoaddr` here. 


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[PATCH] D92004: [OpenCL] add CL 3.0 optional feature support to opencl-c.h

[Anastasia Stulova via Phabricator via cfe-commits]

Anastasia added a comment.

In D92004#2857511 , @airlied wrote:

> I'll have to rebase/rebuild my build env, I'll try and have something 
> rebasing this cleaner soon.

Cool, thanks! If you could split/partition into multiple patches in some way it 
would be good. FYI the clang 13 release branch will be taken in a few weeks 
(before end of July!) so we still have time to get this into the upcoming 
release.


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[PATCH] D102875: [PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility

[Amy Kwan via Phabricator via cfe-commits]

amyk added inline comments.



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-compare-64bit-only.ll:39
+
+attributes #0 = { noinline nounwind optnone "frame-pointer"="none" 
"min-legal-vector-width"="0" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="pwr9" 
"target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx,-privileged,-rop-protect,-spe"
 }
+attributes #1 = { nounwind readnone }

Are the attributes needed?



Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-compare.ll:41
+
+attributes #0 = { noinline nounwind optnone "frame-pointer"="none" 
"min-legal-vector-width"="0" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="pwr9" 
"target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx,-privileged,-rop-protect,-spe"
 }
+attributes #1 = { nounwind readnone }

Same question here (and the remaining tests).



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-multiply-64bit-only.ll:7
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+

Does it make sense to add pre-P9 for `mulhd`/`mulhdu` since they existed prior 
to P9?



Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-multiply.ll:9
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
+

Does it make sense to add pre-P9 for these instructions that existed prior to 
P9?


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[PATCH] D105360: [PowerPC] Fix popcntb XL Compat Builtin for 32bit

[Amy Kwan via Phabricator via cfe-commits]

amyk added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCInstr64Bit.td:830
 
-def POPCNTB : XForm_11<31, 122, (outs g8rc:$rA), (ins g8rc:$rS),
-   "popcntb $rA, $rS", IIC_IntGeneral,
-   [(set i64:$rA, (int_ppc_popcntb i64:$rS))]>;
+let isCodeGenOnly = 1 in
+def POPCNTB8 : XForm_11<31, 122, (outs g8rc:$rA), (ins g8rc:$rS),

Can we add a comment on why this is needed?



Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll:1
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN: -mcpu=pwr7 < %s | FileCheck %s

You can use `update_llc_test_checks.py` to update these. 
Also nit, but might be nice to add `-ppc-asm-full-reg-names`.


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[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

[Amy Kwan via Phabricator via cfe-commits]

amyk added inline comments.



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-error.c:11
+
+long long lla, llb;
+int ia, ib;

nit: Have these variables as `extern` like the other patches do.



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-trap.c:14
+
+long long lla, llb;
+double da;

nit: Have these variables as `extern` like the other patches do.



Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:2233
 
+def : InstAlias<"tdlle $rA, $rB", (TD 6, g8rc:$rA, g8rc:$rB)>;
+def : InstAlias<"tdlge $rA, $rB", (TD 5, g8rc:$rA, g8rc:$rB)>;

Are `tdne`, `tweq` supposed to be aliases that are intended to be added here, 
too?



Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:2840
+
+// XL Compatibility
+// twne

Question: Why are these in `PPCInstrPrefix.td`? Shouldn't they be in 
`PPCInstrInfo.td` instead?


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[PATCH] D103967: [Analyzer][solver] Add dump methods for (dis)equality classes.

[Gabor Marton via Phabricator via cfe-commits]

martong reopened this revision.
martong added a comment.
This revision is now accepted and ready to land.

I have changed the dump methods to order the equivalence classes and the 
disequality info available before printing them out. The ordering is done based 
on their string representation. This comes necessarily with some performance 
penalty, though otherwise it is impossible (or practically way too cumbersome) 
to write deterministic tests. Also, the dump is used either from the debugger 
or from small test cases or when we create an exploded graph (which is again 
intended to be used during debugging), so I think that the penalty induced by 
the sorting won't be an issue.


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[PATCH] D103967: [Analyzer][solver] Add dump methods for (dis)equality classes.

[Gabor Marton via Phabricator via cfe-commits]

martong updated this revision to Diff 356502.
martong added a comment.
Herald added a subscriber: mgrang.

- Change the dump methods to order the equivalence classes and the disequality 
info available before printing them out


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Files:
  clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
  clang/test/Analysis/expr-inspection-printState-diseq-info.c
  clang/test/Analysis/expr-inspection-printState-eq-classes.c
  clang/test/Analysis/expr-inspection.c

Index: clang/test/Analysis/expr-inspection.c
===
--- clang/test/Analysis/expr-inspection.c
+++ clang/test/Analysis/expr-inspection.c
@@ -38,6 +38,8 @@
 // CHECK-NEXT:   "constraints": [
 // CHECK-NEXT: { "symbol": "reg_$0", "range": "{ [-2147483648, 13] }" }
 // CHECK-NEXT:   ],
+// CHECK-NEXT:   "equivalence_classes": null,
+// CHECK-NEXT:   "disequality_info": null,
 // CHECK-NEXT:   "dynamic_types": null,
 // CHECK-NEXT:   "dynamic_casts": null,
 // CHECK-NEXT:   "constructing_objects": null,
Index: clang/test/Analysis/expr-inspection-printState-eq-classes.c
===
--- /dev/null
+++ clang/test/Analysis/expr-inspection-printState-eq-classes.c
@@ -0,0 +1,21 @@
+// RUN: %clang_analyze_cc1 \
+// RUN:  -analyzer-checker=debug.ExprInspection %s 2>&1 | FileCheck %s
+
+void clang_analyzer_printState();
+
+void test_equivalence_classes(int a, int b, int c, int d) {
+  if (a + b != c)
+return;
+  if (a != d)
+return;
+  if (b != 0)
+return;
+  clang_analyzer_printState();
+  (void)(a * b * c * d);
+  return;
+}
+
+ // CHECK:  "equivalence_classes": [
+ // CHECK-NEXT:   [ "(reg_$0) + (reg_$1)", "reg_$0", "reg_$2", "reg_$3" ],
+ // CHECK-NEXT:   [ "((reg_$0) + (reg_$1)) != (reg_$2)", "(reg_$0) != (reg_$2)" ]
+ // CHECK-NEXT: ],
Index: clang/test/Analysis/expr-inspection-printState-diseq-info.c
===
--- /dev/null
+++ clang/test/Analysis/expr-inspection-printState-diseq-info.c
@@ -0,0 +1,34 @@
+// RUN: %clang_analyze_cc1 \
+// RUN:  -analyzer-checker=debug.ExprInspection %s 2>&1 | FileCheck %s
+
+void clang_analyzer_printState();
+
+void test_disequality_info(int e0, int b0, int b1, int c0) {
+  int e1 = e0 - b0;
+  if (b0 == 2) {
+int e2 = e1 - b1;
+if (e2 > 0) {
+  if (b1 != c0)
+clang_analyzer_printState();
+}
+  }
+}
+
+ // CHECK:"disequality_info": [
+ // CHECK-NEXT: {
+ // CHECK-NEXT:   "class": [ "(reg_$0) - 2" ],
+ // CHECK-NEXT:   "disequal_to": [
+ // CHECK-NEXT: [ "reg_$2" ]]
+ // CHECK-NEXT: },
+ // CHECK-NEXT: {
+ // CHECK-NEXT:   "class": [ "reg_$2" ],
+ // CHECK-NEXT:   "disequal_to": [
+ // CHECK-NEXT: [ "(reg_$0) - 2" ],
+ // CHECK-NEXT: [ "reg_$3" ]]
+ // CHECK-NEXT: },
+ // CHECK-NEXT: {
+ // CHECK-NEXT:   "class": [ "reg_$3" ],
+ // CHECK-NEXT:   "disequal_to": [
+ // CHECK-NEXT: [ "reg_$2" ]]
+ // CHECK-NEXT: }
+ // CHECK-NEXT:   ],
Index: clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
===
--- clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
+++ clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
@@ -592,6 +592,11 @@
   RangeSet::Factory &F,
   ProgramStateRef State);
 
+  void dumpToStream(ProgramStateRef State, raw_ostream &os) const;
+  LLVM_DUMP_METHOD void dump(ProgramStateRef State) const {
+dumpToStream(State, llvm::errs());
+  }
+
   /// Check equivalence data for consistency.
   LLVM_NODISCARD LLVM_ATTRIBUTE_UNUSED static bool
   isClassDataConsistent(ProgramStateRef State);
@@ -1405,6 +1410,15 @@
 
   void printJson(raw_ostream &Out, ProgramStateRef State, const char *NL = "\n",
  unsigned int Space = 0, bool IsDot = false) const override;
+  void printConstraints(raw_ostream &Out, ProgramStateRef State,
+const char *NL = "\n", unsigned int Space = 0,
+bool IsDot = false) const;
+  void printEquivalenceClasses(raw_ostream &Out, ProgramStateRef State,
+   const char *NL = "\n", unsigned int Space = 0,
+   bool IsDot = false) const;
+  void printDisequalities(raw_ostream &Out, ProgramStateRef State,
+  const char *NL = "\n", unsigned int Space = 0,
+  bool IsDot = false) const;
 
   //===--===//
   // Implementation for interface from RangedConstraintManager.
@@ -1628,6 +1642,15 @@
 // EqualityClass implementation details
 //===

[PATCH] D103967: [Analyzer][solver] Add dump methods for (dis)equality classes.

[Gabor Marton via Phabricator via cfe-commits]

martong added inline comments.



Comment at: clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp:2583
+
+  llvm::SmallSet MembersStr;
+  for (std::pair ClassToSymbolSet : Members)

Ah, `SmallSet` is not sorted :( I am gonna have to change this to either 
`std::set` or to a sorted vector :(


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[PATCH] D103967: [Analyzer][solver] Add dump methods for (dis)equality classes.

[Gabor Marton via Phabricator via cfe-commits]

martong updated this revision to Diff 356504.
martong added a comment.

- Use std::set for ordering


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Files:
  clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
  clang/test/Analysis/expr-inspection-printState-diseq-info.c
  clang/test/Analysis/expr-inspection-printState-eq-classes.c
  clang/test/Analysis/expr-inspection.c

Index: clang/test/Analysis/expr-inspection.c
===
--- clang/test/Analysis/expr-inspection.c
+++ clang/test/Analysis/expr-inspection.c
@@ -38,6 +38,8 @@
 // CHECK-NEXT:   "constraints": [
 // CHECK-NEXT: { "symbol": "reg_$0", "range": "{ [-2147483648, 13] }" }
 // CHECK-NEXT:   ],
+// CHECK-NEXT:   "equivalence_classes": null,
+// CHECK-NEXT:   "disequality_info": null,
 // CHECK-NEXT:   "dynamic_types": null,
 // CHECK-NEXT:   "dynamic_casts": null,
 // CHECK-NEXT:   "constructing_objects": null,
Index: clang/test/Analysis/expr-inspection-printState-eq-classes.c
===
--- /dev/null
+++ clang/test/Analysis/expr-inspection-printState-eq-classes.c
@@ -0,0 +1,21 @@
+// RUN: %clang_analyze_cc1 \
+// RUN:  -analyzer-checker=debug.ExprInspection %s 2>&1 | FileCheck %s
+
+void clang_analyzer_printState();
+
+void test_equivalence_classes(int a, int b, int c, int d) {
+  if (a + b != c)
+return;
+  if (a != d)
+return;
+  if (b != 0)
+return;
+  clang_analyzer_printState();
+  (void)(a * b * c * d);
+  return;
+}
+
+  // CHECK:  "equivalence_classes": [
+  // CHECK-NEXT:   [ "((reg_$0) + (reg_$1)) != (reg_$2)", "(reg_$0) != (reg_$2)" ],
+  // CHECK-NEXT:   [ "(reg_$0) + (reg_$1)", "reg_$0", "reg_$2", "reg_$3" ]
+  // CHECK-NEXT: ],
Index: clang/test/Analysis/expr-inspection-printState-diseq-info.c
===
--- /dev/null
+++ clang/test/Analysis/expr-inspection-printState-diseq-info.c
@@ -0,0 +1,34 @@
+// RUN: %clang_analyze_cc1 \
+// RUN:  -analyzer-checker=debug.ExprInspection %s 2>&1 | FileCheck %s
+
+void clang_analyzer_printState();
+
+void test_disequality_info(int e0, int b0, int b1, int c0) {
+  int e1 = e0 - b0;
+  if (b0 == 2) {
+int e2 = e1 - b1;
+if (e2 > 0) {
+  if (b1 != c0)
+clang_analyzer_printState();
+}
+  }
+}
+
+ // CHECK:"disequality_info": [
+ // CHECK-NEXT: {
+ // CHECK-NEXT:   "class": [ "(reg_$0) - 2" ],
+ // CHECK-NEXT:   "disequal_to": [
+ // CHECK-NEXT: [ "reg_$2" ]]
+ // CHECK-NEXT: },
+ // CHECK-NEXT: {
+ // CHECK-NEXT:   "class": [ "reg_$2" ],
+ // CHECK-NEXT:   "disequal_to": [
+ // CHECK-NEXT: [ "(reg_$0) - 2" ],
+ // CHECK-NEXT: [ "reg_$3" ]]
+ // CHECK-NEXT: },
+ // CHECK-NEXT: {
+ // CHECK-NEXT:   "class": [ "reg_$3" ],
+ // CHECK-NEXT:   "disequal_to": [
+ // CHECK-NEXT: [ "reg_$2" ]]
+ // CHECK-NEXT: }
+ // CHECK-NEXT:   ],
Index: clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
===
--- clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
+++ clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
@@ -592,6 +592,11 @@
   RangeSet::Factory &F,
   ProgramStateRef State);
 
+  void dumpToStream(ProgramStateRef State, raw_ostream &os) const;
+  LLVM_DUMP_METHOD void dump(ProgramStateRef State) const {
+dumpToStream(State, llvm::errs());
+  }
+
   /// Check equivalence data for consistency.
   LLVM_NODISCARD LLVM_ATTRIBUTE_UNUSED static bool
   isClassDataConsistent(ProgramStateRef State);
@@ -1405,6 +1410,15 @@
 
   void printJson(raw_ostream &Out, ProgramStateRef State, const char *NL = "\n",
  unsigned int Space = 0, bool IsDot = false) const override;
+  void printConstraints(raw_ostream &Out, ProgramStateRef State,
+const char *NL = "\n", unsigned int Space = 0,
+bool IsDot = false) const;
+  void printEquivalenceClasses(raw_ostream &Out, ProgramStateRef State,
+   const char *NL = "\n", unsigned int Space = 0,
+   bool IsDot = false) const;
+  void printDisequalities(raw_ostream &Out, ProgramStateRef State,
+  const char *NL = "\n", unsigned int Space = 0,
+  bool IsDot = false) const;
 
   //===--===//
   // Implementation for interface from RangedConstraintManager.
@@ -1628,6 +1642,15 @@
 // EqualityClass implementation details
 //===--===//
 
+LLVM_DUMP_METHOD void EquivalenceClass::dumpToStream(ProgramStateRef State,
+   

[PATCH] D105408: [clang-format] Pass a TextDiagnosticPrinter when we can not create tempory file.

[MyDeveloperDay via Phabricator via cfe-commits]

MyDeveloperDay requested changes to this revision.
MyDeveloperDay added a comment.
This revision now requires changes to proceed.

Including clangFrontend has been discourage many times before, we don't want to 
add that to the list of dependencies please see D90121: clang-format: Add a 
consumer to diagnostics engine 


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[PATCH] D105408: [clang-format] Pass a TextDiagnosticPrinter when we can not create tempory file.

[MyDeveloperDay via Phabricator via cfe-commits]

MyDeveloperDay added a comment.

also D68554: [clang-format] Proposal for clang-format to give compiler style 
warnings 


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[PATCH] D98429: [clang-format] Add new option to clang-format: SpaceBeforeForLoopSemiColon

[MyDeveloperDay via Phabricator via cfe-commits]

MyDeveloperDay added a comment.

Can you show `for (;;) {}` in your tests?


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[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1724
+
+let Predicates = [HasP8Altivec] in {
+  def : Pat<(int_ppc_stdcx xoaddr:$dst, g8rc:$A),

lkail wrote:
> IIRC, `l(w|d)arx`, `st(w|d)cx` are supported very early and don't need 
> altivec support.
Agreed. This does not require ISA 2.07 and definitely doesn't require Altivec.


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[PATCH] D104616: [analyzer] Model comparision methods of std::unique_ptr

[Gábor Horváth via Phabricator via cfe-commits]

xazax.hun requested changes to this revision.
xazax.hun added inline comments.
This revision now requires changes to proceed.



Comment at: clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp:350
+QualType Type = getInnerPointerType(C, E->getType()->getAsCXXRecordDecl());
+std::tie(Val, NewState) = retrieveOrConjureInnerPtrVal(Reg, E, Type, C);
+return {Val, NewState};

Nit: couldn't you just ` return retrieveOrConjureInnerPtrVal(Reg, E, Type, C);` 
instead of all the ceremony with `std::tie`?



Comment at: clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp:365
+  std::tie(FirstPtrVal, State) = makeSValFor(FirstExpr, First);
+  std::tie(SecondPtrVal, State) = makeSValFor(SecondExpr, Second);
+  BinaryOperatorKind BOK =

I think we might end up losing some information here. Imagine both 
`makeSValFor` conjuring a new symbol. Only one of the symbols will be stored in 
the state since capturing happend once, when you created the lambda. Maybe it 
is better to ask for a state in `makeSValFor` as a parameter instead of doing a 
lambda capture. 


Moreover, `retrieveOrConjureInnerPtrVal` will not even look at the state 
captured by `makeSValFor`. It will ask the `CheckerContext` to get the state, 
but that state is the state from the beginning of the function that does not 
have any of the modifications you made to it.


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[PATCH] D105354: [clang][AST] Add support for DecompositionDecl to ASTImporter.

[Gabor Marton via Phabricator via cfe-commits]

martong added inline comments.



Comment at: clang/lib/AST/ASTImporter.cpp:2305-2309
+  BindingDecl *ToD;
+  if (GetImportedOrCreateDecl(ToD, D, Importer.getToContext(), DC, Loc,
+  Name.getAsIdentifierInfo()))
+return ToD;
+

So, we moved the import of the binding before importing the decomposition decl 
to avoid an infinite recursion. But why can't we have an infinit recursion this 
way?

Perhaps, it would be useful to have a test case that triggered the infinity in 
case of the original order of the import calls.


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[PATCH] D105360: [PowerPC] Fix popcntb XL Compat Builtin for 32bit

[Victor Huang via Phabricator via cfe-commits]

NeHuang added inline comments.



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-sync.c:240
+void test_icbt() {
+  __icbt(c);
 }

From the document, `__icbt` only valid when -qarch is set to target pwr8 or 
higher processors. It looks like target cpu sema checking and error case are 
missing. If you are working on another patch to fix it, please put fixme 
comments for the __icbt implementation and test case in this patch. 



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-sync.c:467
+//
+void test_builtin_ppc_icbt() {
+  __builtin_ppc_icbt(c);

same as above.



Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll:83
+  %0 = load i8*, i8** %a, align 8
+  call void @llvm.ppc.icbt(i8* %0)
+; CHECK: icbt 0, 0, 3

same here, pwr8 (or later processors) only


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[PATCH] D105436: [analyzer][solver] Use all sources of constraints

[Valeriy Savchenko via Phabricator via cfe-commits]

vsavchenko created this revision.
vsavchenko added reviewers: NoQ, xazax.hun, martong, steakhal, Szelethus, 
ASDenysPetrov, manas, RedDocMD.
Herald added subscribers: dkrupp, donat.nagy, mikhail.ramalho, a.sidorin, 
rnkovacs, szepet, baloghadamsoftware.
vsavchenko requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Prior to this patch, we always gave priority to constraints that we
actually know about symbols in question.  However, these can get
outdated and we can get better results if we look at all possible
sources of knowledge, including sub-expressions.


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Files:
  clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
  clang/test/Analysis/constant-folding.c


Index: clang/test/Analysis/constant-folding.c
===
--- clang/test/Analysis/constant-folding.c
+++ clang/test/Analysis/constant-folding.c
@@ -179,6 +179,36 @@
   }
 }
 
+unsigned reset();
+
+void testCombinedSources(unsigned a, unsigned b) {
+  if (b >= 10 && (a | b) <= 30) {
+// Check that we can merge constraints from (a | b), a, and b.
+// Because of the order of assumptions, we already know that (a | b) is 
[10, 30].
+clang_analyzer_eval((a | b) >= 10 && (a | b) <= 30); // 
expected-warning{{TRUE}}
+  }
+
+  a = reset();
+  b = reset();
+
+  if ((a | b) <= 30 && b >= 10) {
+// Check that we can merge constraints from (a | b), a, and b.
+// At this point, we know that (a | b) is [0, 30], but the knowledge
+// of b >= 10 added later can help us to refine it and change it to [10, 
30].
+clang_analyzer_eval(10 <= (a | b) && (a | b) <= 30); // 
expected-warning{{TRUE}}
+  }
+
+  a = reset();
+  b = reset();
+
+  unsigned c = (a | b) & (a != b);
+  if (c <= 40 && a == b) {
+// Even though we have a directo constraint for c [0, 40],
+// we can get a more precise range by looking at the expression itself.
+clang_analyzer_eval(c == 0); // expected-warning{{TRUE}}
+  }
+}
+
 void testRemainderRules(unsigned int a, unsigned int b, int c, int d) {
   // Check that we know that remainder of zero divided by any number is still 
0.
   clang_analyzer_eval((0 % c) == 0); // expected-warning{{TRUE}}
Index: clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
===
--- clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
+++ clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
@@ -884,26 +884,28 @@
   }
 
   RangeSet infer(SymbolRef Sym) {
-if (Optional ConstraintBasedRange = intersect(
-RangeFactory, getConstraint(State, Sym),
-// If Sym is a difference of symbols A - B, then maybe we have 
range
-// set stored for B - A.
-//
-// If we have range set stored for both A - B and B - A then
-// calculate the effective range set by intersecting the range set
-// for A - B and the negated range set of B - A.
-getRangeForNegatedSub(Sym), getRangeForEqualities(Sym))) {
-  return *ConstraintBasedRange;
-}
-
-// If Sym is a comparison expression (except <=>),
-// find any other comparisons with the same operands.
-// See function description.
-if (Optional CmpRangeSet = getRangeForComparisonSymbol(Sym)) {
-  return *CmpRangeSet;
-}
-
-return Visit(Sym);
+return intersect(
+RangeFactory,
+// Of course, we should take the constraint directly associated with
+// this symbol into consideration.
+getConstraint(State, Sym),
+// If Sym is a difference of symbols A - B, then maybe we have range
+// set stored for B - A.
+//
+// If we have range set stored for both A - B and B - A then
+// calculate the effective range set by intersecting the range set
+// for A - B and the negated range set of B - A.
+getRangeForNegatedSub(Sym),
+// If Sym is (dis)equality, we might have some information on that
+// in our equality classes data structure.
+getRangeForEqualities(Sym),
+// If Sym is a comparison expression (except <=>),
+// find any other comparisons with the same operands.
+// See function description.
+getRangeForComparisonSymbol(Sym),
+// Apart from the Sym itself, we can infer quite a lot if we look
+// into subexpressions of Sym.
+Visit(Sym));
   }
 
   RangeSet infer(EquivalenceClass Class) {


Index: clang/test/Analysis/constant-folding.c
===
--- clang/test/Analysis/constant-folding.c
+++ clang/test/Analysis/constant-folding.c
@@ -179,6 +179,36 @@
   }
 }
 
+unsigned reset();
+
+void testCombinedSources(unsigned a, unsigned b) {
+  if (b >= 10 && (a | b) <= 30) {
+// Check that we can merge constraints 

[PATCH] D105436: [analyzer][solver] Use all sources of constraints

[Valeriy Savchenko via Phabricator via cfe-commits]

vsavchenko added a comment.

I compared issues produced by this patch to the issues produced before that on 
all projects from `clang/utils/analyzer/projects`, and didn't find any 
difference.

Performance measurements also show the we are within the same margins.
F17774659: photo_2021-07-05 19.39.43.jpeg 


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[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Christopher Di Bella via Phabricator via cfe-commits]

cjdb created this revision.
cjdb added reviewers: aaron.ballman, rsmith, manojgupta, gbiv, ldionne, EricWF.
Herald added a reviewer: george.burgess.iv.
cjdb requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

libc++ has started splicing standard library headers into much more
fine-grained content for maintainability. It's very likely that outdated
and naive tooling (some of which is outside of LLVM's scope) will
suggest users include things such as `<__algorithm/find.h>` instead of
``, and Hyrum's law suggests that users will eventually begin
to rely on this without the help of tooling. As such, this commit
intends to protect users from themselves, by making it a hard error for
anyone outside of the standard library to include libc++ detail headers.


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Files:
  clang/include/clang/Basic/DiagnosticLexKinds.td
  clang/lib/Lex/ModuleMap.cpp
  clang/test/Modules/Inputs/libcxx-reserved/__libcxx/horde_prime.h
  clang/test/Modules/Inputs/libcxx-reserved/__libcxx/princesses/she-ra.h
  clang/test/Modules/Inputs/libcxx-reserved/module.modulemap
  clang/test/Modules/Inputs/libcxx-reserved/princesses.h
  clang/test/Modules/libcxx-reserved.cpp

Index: clang/test/Modules/libcxx-reserved.cpp
===
--- /dev/null
+++ clang/test/Modules/libcxx-reserved.cpp
@@ -0,0 +1,14 @@
+// RUN: rm -rf %t
+// RUN: %clang_cc1 -fmodules -fmodules-cache-path=%t \
+// RUN:-fmodule-map-file=%S/Inputs/libcxx-reserved/module.modulemap \
+// RUN:-fmodules-local-submodule-visibility -I%S/Inputs/libcxx-reserved -verify %s
+// RUN: ls %t
+
+#include "princesses.h"
+#include "__libcxx/princesses/she-ra.h"
+// expected-error@-1{{header '__libcxx/princesses/she-ra.h' is a libc++ detail header and can't be included by users; include '' instead, which is user-facing}}
+#include "__libcxx/horde_prime.h"
+// expected-error@-1{{header '__libcxx/horde_prime.h' is a libc++ detail header and can't be included by users}}
+
+int main()
+{}
Index: clang/test/Modules/Inputs/libcxx-reserved/princesses.h
===
--- /dev/null
+++ clang/test/Modules/Inputs/libcxx-reserved/princesses.h
@@ -0,0 +1,7 @@
+#ifndef PUBLIC_HEADER_1
+#define PUBLIC_HEADER_1
+
+#include "__libcxx/horde_prime.h"
+#include "__libcxx/princesses/she-ra.h"
+
+#endif // PUBLIC_HEADER_1
Index: clang/test/Modules/Inputs/libcxx-reserved/module.modulemap
===
--- /dev/null
+++ clang/test/Modules/Inputs/libcxx-reserved/module.modulemap
@@ -0,0 +1,12 @@
+module std {
+  module princesses {
+header "princesses.h"
+export *
+
+module __princesses {
+  module she_ra { header "__libcxx/princesses/she-ra.h" }
+}
+  }
+
+  module __horde_prime { header "__libcxx/horde_prime.h" }
+}
Index: clang/test/Modules/Inputs/libcxx-reserved/__libcxx/princesses/she-ra.h
===
--- /dev/null
+++ clang/test/Modules/Inputs/libcxx-reserved/__libcxx/princesses/she-ra.h
@@ -0,0 +1,6 @@
+#ifndef PRIVATE_HEADER_1
+#define PRIVATE_HEADER_1
+
+using i32 = int;
+
+#endif // PRIVATE_HEADER_1
Index: clang/test/Modules/Inputs/libcxx-reserved/__libcxx/horde_prime.h
===
--- /dev/null
+++ clang/test/Modules/Inputs/libcxx-reserved/__libcxx/horde_prime.h
@@ -0,0 +1 @@
+// This file is intentionally empty
Index: clang/lib/Lex/ModuleMap.cpp
===
--- clang/lib/Lex/ModuleMap.cpp
+++ clang/lib/Lex/ModuleMap.cpp
@@ -470,6 +470,26 @@
   return M ? M->getTopLevelModule() : nullptr;
 }
 
+static bool implementationHeaderUsedExternally(const Module *RequestingModule,
+   StringRef Filename) {
+  return Filename.startswith("__libcxx") &&
+ (RequestingModule == nullptr ||
+  RequestingModule->getTopLevelModuleName() != "std");
+}
+
+static std::string FindAppropriateStdlibHeader(const Module *StdlibModule) {
+  const Module *OriginalModule = StdlibModule;
+  while (StdlibModule->Parent && StdlibModule->Parent->Name != "std") {
+StdlibModule = StdlibModule->Parent;
+  }
+
+  if (StdlibModule == OriginalModule || StdlibModule->Headers[0].empty()) {
+return "";
+  }
+
+  return StdlibModule->Headers[0][0].NameAsWritten;
+}
+
 void ModuleMap::diagnoseHeaderInclusion(Module *RequestingModule,
 bool RequestingModuleIsModuleInterface,
 SourceLocation FilenameLoc,
@@ -488,6 +508,7 @@
   bool Excluded = false;
   Module *Private = nullptr;
   Module *NotUsed = nullptr;
+  Module *StdlibImplModule = nullptr;
 
   HeadersMap::iterator Known = findKnownHeader(File);
   if (Known != Headers.end()) {
@

[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Christopher Di Bella via Phabricator via cfe-commits]

cjdb added a comment.

A few notes to reviewers:

- The patch assumes everything is under a top-level `__libcxx` directory, 
because it seems there are other system headers that could be prefixed with 
`__`. libc++ currently has many top-level directories, following the trend of 
`__${STD_LIB_HEADER}/`. I see two solutions going forward:
  1. libc++ moves everything into a top-level `__libcxx` directory, which 
minimises the chances of clashing with pre-existing top-level directories that 
we don't own. Once this patch is committed, it probably won't need to be 
updated (sans bug fixes).
  2. This patch adopts a set of "blessed" directories that needs to be 
consistently updated as we splice more and more headers (and as WG21 adds more 
headers to C++).
- The patch could probably do with more testing, but I'm coming up dry :-(


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[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Arthur O'Dwyer via Phabricator via cfe-commits]

Quuxplusone requested changes to this revision.
Quuxplusone added a comment.
This revision now requires changes to proceed.

Step 1 should be to find out if this is even a problem at all. For example, try 
using one of these tools to compile a C++ program against GNU libstdc++, or 
against a library like range-v3, both of which already uses many small detail 
headers. Is the tool's output confusing or incorrect for //those// libraries? 
Only if it's actually a problem, should Clang itself try to solve problems with 
those tool/library combos by adding special-case code into the Clang codebase.


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[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Roman Lebedev via Phabricator via cfe-commits]

lebedev.ri added a comment.

Why not solve this in the headers themselves?
Just `#error` in implementation header if some macro isn't defined, and define 
said macro in parent header before including implementation detail headers?


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[PATCH] D104616: [analyzer] Model comparision methods of std::unique_ptr

[Deep Majumder via Phabricator via cfe-commits]

RedDocMD updated this revision to Diff 356526.
RedDocMD added a comment.

Major bug fix


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Files:
  clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerHelpers.h
  clang/lib/StaticAnalyzer/Checkers/SmartPtr.h
  clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
  clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp
  clang/test/Analysis/Inputs/system-header-simulator-cxx.h
  clang/test/Analysis/smart-ptr.cpp

Index: clang/test/Analysis/smart-ptr.cpp
===
--- clang/test/Analysis/smart-ptr.cpp
+++ clang/test/Analysis/smart-ptr.cpp
@@ -457,3 +457,52 @@
 P->foo(); // expected-warning {{Dereference of null smart pointer 'P' [alpha.cplusplus.SmartPtr]}}
   }
 }
+
+// The following is a silly function,
+// but serves to test if we are picking out
+// standard comparision functions from custom ones.
+template 
+bool operator<(std::unique_ptr &x, double d);
+
+void uniquePtrComparision(std::unique_ptr unknownPtr) {
+  auto ptr = std::unique_ptr(new int(13));
+  auto nullPtr = std::unique_ptr();
+  auto otherPtr = std::unique_ptr(new int(29));
+
+  clang_analyzer_eval(ptr == ptr); // expected-warning{{TRUE}}
+  clang_analyzer_eval(ptr > ptr);  // expected-warning{{FALSE}}
+  clang_analyzer_eval(ptr <= ptr); // expected-warning{{TRUE}}
+
+  clang_analyzer_eval(nullPtr <= unknownPtr); // expected-warning{{TRUE}}
+  clang_analyzer_eval(unknownPtr >= nullPtr); // expected-warning{{TRUE}}
+
+  clang_analyzer_eval(ptr != otherPtr); // expected-warning{{TRUE}}
+  clang_analyzer_eval(ptr > nullPtr);   // expected-warning{{TRUE}}
+
+  clang_analyzer_eval(ptr != nullptr);// expected-warning{{TRUE}}
+  clang_analyzer_eval(nullPtr != nullptr);// expected-warning{{FALSE}}
+  clang_analyzer_eval(nullptr <= unknownPtr); // expected-warning{{TRUE}}
+}
+
+void uniquePtrComparisionStateSplitting(std::unique_ptr unknownPtr) {
+  auto ptr = std::unique_ptr(new int(13));
+
+  clang_analyzer_eval(ptr > unknownPtr); // expected-warning{{TRUE}}
+  // expected-warning@-1{{FALSE}}
+}
+
+void uniquePtrComparisionDifferingTypes(std::unique_ptr unknownPtr) {
+  auto ptr = std::unique_ptr(new int(13));
+  auto nullPtr = std::unique_ptr();
+  auto otherPtr = std::unique_ptr(new double(3.14));
+
+  clang_analyzer_eval(nullPtr <= unknownPtr); // expected-warning{{TRUE}}
+  clang_analyzer_eval(unknownPtr >= nullPtr); // expected-warning{{TRUE}}
+
+  clang_analyzer_eval(ptr != otherPtr); // expected-warning{{TRUE}}
+  clang_analyzer_eval(ptr > nullPtr);   // expected-warning{{TRUE}}
+
+  clang_analyzer_eval(ptr != nullptr);// expected-warning{{TRUE}}
+  clang_analyzer_eval(nullPtr != nullptr);// expected-warning{{FALSE}}
+  clang_analyzer_eval(nullptr <= unknownPtr); // expected-warning{{TRUE}}
+}
Index: clang/test/Analysis/Inputs/system-header-simulator-cxx.h
===
--- clang/test/Analysis/Inputs/system-header-simulator-cxx.h
+++ clang/test/Analysis/Inputs/system-header-simulator-cxx.h
@@ -978,6 +978,61 @@
 void swap(unique_ptr &x, unique_ptr &y) noexcept {
   x.swap(y);
 }
+
+template 
+bool operator==(const unique_ptr &x, const unique_ptr &y);
+
+template 
+bool operator!=(const unique_ptr &x, const unique_ptr &y);
+
+template 
+bool operator<(const unique_ptr &x, const unique_ptr &y);
+
+template 
+bool operator>(const unique_ptr &x, const unique_ptr &y);
+
+template 
+bool operator<=(const unique_ptr &x, const unique_ptr &y);
+
+template 
+bool operator>=(const unique_ptr &x, const unique_ptr &y);
+
+template 
+bool operator==(const unique_ptr &x, nullptr_t y);
+
+template 
+bool operator!=(const unique_ptr &x, nullptr_t y);
+
+template 
+bool operator<(const unique_ptr &x, nullptr_t y);
+
+template 
+bool operator>(const unique_ptr &x, nullptr_t y);
+
+template 
+bool operator<=(const unique_ptr &x, nullptr_t y);
+
+template 
+bool operator>=(const unique_ptr &x, nullptr_t y);
+
+template 
+bool operator==(nullptr_t x, const unique_ptr &y);
+
+template 
+bool operator!=(nullptr_t x, const unique_ptr &y);
+
+template 
+bool operator>(nullptr_t x, const unique_ptr &y);
+
+template 
+bool operator<(nullptr_t x, const unique_ptr &y);
+
+template 
+bool operator>=(nullptr_t x, const unique_ptr &y);
+
+template 
+bool operator<=(nullptr_t x, const unique_ptr &y);
+
 } // namespace std
 #endif
 
Index: clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp
===
--- clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp
+++ clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp
@@ -148,5 +148,39 @@
   return IntValue.getSExtValue();
 }
 
+OperatorKind operationKindFromOverloadedOperator(OverloadedOperatorKind OOK,
+ bool IsBinary) {
+  llvm::StringMap BinOps{
+#defin

[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Arthur O'Dwyer via Phabricator via cfe-commits]

Quuxplusone added a comment.

I should add that if any particular library really wants to //enforce// "thou 
shalt not deep-link  detail 
headers" (instead of just documenting it and/or relying on the 
user-programmer's common sense) they can do it pretty cleanly via macros:

  // toplevel.h
  #pragma once
  #define DONT_INCLUDE_DETAIL_HEADERS_DIRECTLY(x, y)
  #include <__utility/foo.h>
  #include <__various/bar.h>
  #undef DONT_INCLUDE_DETAIL_HEADERS_DIRECTLY
  // more code here

and then

  // __utility/foo.h
  #pragma once
  DONT_INCLUDE_DETAIL_HEADERS_DIRECTLY(instead, include )
  class Foo {};
  void foo();

I don't know how you'd achieve a similar effect with C++20 Modules, but I 
certainly hope it's possible somehow.


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[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356527.
Conanap added a comment.

Moved the pattern definitions and removed unnecessary guard.


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Files:
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Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1532,3 +1532,4 @@
   def int_ppc_ldarx : GCCBuiltin<"__builtin_ppc_ldarx">,
   Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>;
 }
+


Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1532,3 +1532,4 @@
   def int_ppc_ldarx : GCCBuiltin<"__builtin_ppc_ldarx">,
   Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrNoMem]>;
 }
+
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[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356528.
Conanap added a comment.

Properly updated the diff with arc.


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-atomicLoadStore-64-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-atomicLoadStore.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-atomicLoadStore.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-atomicLoadStore.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-atomicLoadStore-64-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-atomicLoadStore-64-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+  (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+  (STWCX gprc:$A, xoaddr:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1720,3 +

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356532.
Conanap added a comment.

Changed test case file names


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-atomicLoadStore.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+  (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+  (STWCX gprc:$A, xoaddr:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ llvm/lib/Target/PowerPC

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356533.
Conanap added a comment.

Updated C test case name


Repository:
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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+  (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+  (STWCX gprc:$A, xoaddr:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ llvm/lib/Target/PowerP

[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Christopher Di Bella via Phabricator via cfe-commits]

cjdb added a comment.

In D105439#2858291 , @Quuxplusone 
wrote:

> Step 1 should be to find out if this is even a problem at all. For example, 
> try using one of these tools to compile a C++ program against GNU libstdc++, 
> or against a library like range-v3, both of which already uses many small 
> detail headers. Is the tool's output confusing or incorrect for //those// 
> libraries? Only if it's actually a problem, should Clang itself try to solve 
> problems with those tool/library combos by adding special-case code into the 
> Clang codebase.

I didn't say that any tool's output is "confusing or incorrect". I said that 
tooling will accidentally include libc++'s detail headers, which is 
undesirable, as it is non-portable. You've also disregarded my statement about 
Hyrum's law, which points out that users will come to rely on 
`<__algorithm/find.h>` with or **without** tooling. Tooling only accelerates 
the problem of including detail headers.

In D105439#2858295 , @lebedev.ri 
wrote:

> Why not solve this in the headers themselves?
> Just `#error` in implementation header if some macro isn't defined, and 
> define said macro in parent header before including implementation detail 
> headers?

Do you mean like this?

  #define _LIBCXX_DETAIL_HEADERS_ALLOWED
  
  #include <__algorithm/find.h>
  ...
  
  #undef _LIBCXX_DETAIL_HEADERS_ALLOWED

That would cover headers too (very good), but I'm not sure how it will play 
with Clang's modules.


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap marked 3 inline comments as done.
Conanap added a comment.

Addressed comments


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[PATCH] D104616: [analyzer] Model comparision methods of std::unique_ptr

[Gábor Horváth via Phabricator via cfe-commits]

xazax.hun accepted this revision.
xazax.hun added a comment.
This revision is now accepted and ready to land.

The latest version looks good to me, let's land this!


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[PATCH] D105112: [clang] Add -fdump-record-layouts-canonical option

[Steven Wan via Phabricator via cfe-commits]

stevewan accepted this revision.
stevewan added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks.


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Victor Huang via Phabricator via cfe-commits]

NeHuang added a comment.

Please add the sema check & error test case for the two 64 bit only builtins 
`ldarx` and `stdcx`




Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll:10
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:

remove `local_unnamed_addr #0`



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll:22
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:

remove `local_unnamed_addr #0`



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:12
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr 
#0 {
+; CHECK-64-LABEL: test_lwarx:

remove `local_unnamed_addr #0`



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:30
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) 
local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:

remove `local_unnamed_addr #0`


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[PATCH] D105268: [X86] AVX512FP16 instructions enabling 5/6

[Sanjay Patel via Phabricator via cfe-commits]

spatel added inline comments.



Comment at: llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl-fma.ll:193-194
+define <8 x half> @stack_fold_fmsub123ph(<8 x half> %a0, <8 x half> %a1, <8 x 
half> %a2) {
+  ;check-label: stack_fold_fmsub123ph:
+  ;check:   vfmsub213ph {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, 
{{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte folded reload
+  %1 = tail call <2 x i64> asm sideeffect "nop", 
"=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{flags}"()

I was just scanning through this patch and noticed the capitalization mismatch 
on these lines and others. This test has no valid checks as written?


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356542.
Conanap added a comment.

Added error test cases and sema checking


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  clang/test/CodeGen/builtins-ppc-xlcompat-error.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+  (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+  (STWCX gprc:$A, xoaddr:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
==

[PATCH] D103615: [Clang] Add option to handle behaviour of vector bool/vector pixel.

[Bardia Mahjour via Phabricator via cfe-commits]

bmahjour added a comment.

In D103615#2852430 , @krasimir wrote:

> I'm unfamiliar with the altivec API. What's a reasonable source code update 
> that preserves the current default behavior `-altivec-src-compat=mixed` under 
> `-altivec-src-compat=xl`, i.e., under `-altivec-src-compat=xl` how would we 
> compare vector bool or vector pixel to produce a vector?

For `vector bool` comparison one could use `vec_cmpeq` and `vec_compne` (see 
https://www.ibm.com/docs/en/xl-c-and-cpp-linux/16.1.1?topic=functions-vec-cmpeq).
 However, `vec_cmp*` interfaces do not currently support `vector pixel`. Do you 
have a concrete use case for comparing `vector pixel`s? If so I think we should 
consider adding corresponding overloads to `altivec.h`.


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356545.
Conanap added a comment.

Updated 64 bit error test cases


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) local_unnamed_addr #0 {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) local_unnamed_addr #0 {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+  (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+  (STWCX gprc:$A, xoaddr:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Stefan Pintilie via Phabricator via cfe-commits]

stefanp added a comment.

Overall I think this is fine. I just have a few nits.




Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c:11
+int test_lwarx(volatile int* a) {
+  // CHECK: entry:
+  // CHECK: %0 = bitcast i32* %a to i8*

Please check that this "entry:" is printed out when asserts are on and when 
asserts are off you may want to remove it at this point.

I would prefer you check the name of the function instead of "entry". You can 
use `CHECK-LABEL` to do that. 



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-error.c:18
+}
+#endif

This entire test is for 32 bit Power PC. There is only one run line and that is 
what is specified.
Why are you checking the macros? 



Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:1529
+  def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">,
+  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], 
[IntrWriteMem]>;
+  def int_ppc_lwarx : GCCBuiltin<"__builtin_ppc_lwarx">,

nit:
Does this go past the 80 char limit?



Repository:
  rG LLVM Github Monorepo

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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356546.
Conanap marked 2 inline comments as done.
Conanap added a comment.

Updated IR test cases


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105236/new/

https://reviews.llvm.org/D105236

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx xoaddr:$dst),
+  (LWARX xoaddr:$dst)>;
+def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
+  (STWCX gprc:$A, xoaddr:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356549.
Conanap added a comment.

Changed to ForceXForm


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103668/new/

https://reviews.llvm.org/D103668

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx ForceXForm:$dst),
+  (LWARX ForceXForm:$dst)>;
+def : Pat<(int_ppc_stwcx ForceXForm:$dst, gprc:$A),
+  (STWCX gprc:$A, ForceXForm:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/PowerP

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356550.
Conanap added a comment.

Changed to ForceXForm


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103668/new/

https://reviews.llvm.org/D103668

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx ForceXForm:$dst),
+  (LWARX ForceXForm:$dst)>;
+def : Pat<(int_ppc_stwcx ForceXForm:$dst, gprc:$A),
+  (STWCX gprc:$A, ForceXForm:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/PowerP

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356551.
Conanap added a comment.

Changed to ForceXForm


Repository:
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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx ForceXForm:$dst),
+  (LWARX ForceXForm:$dst)>;
+def : Pat<(int_ppc_stwcx ForceXForm:$dst, gprc:$A),
+  (STWCX gprc:$A, ForceXForm:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/PowerP

[PATCH] D104601: [Preprocessor] Implement -fnormalize-whitespace.

[Michael Kruse via Phabricator via cfe-commits]

Meinersbur added a comment.

ping


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[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356552.
Conanap added a comment.

Fixed incorrect diff update


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-conversionfunc.c
  clang/test/CodeGen/builtins-ppc-xlcompat-error.c
  clang/test/CodeGen/builtins-ppc-xlcompat-trap.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.ll
@@ -0,0 +1,139 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+
+; tw
+declare void @llvm.ppc.tw(i32 %a, i32 %b, i32 %c)
+define dso_local void @test__twlgt(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twlgt:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twlgt 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 1)
+  ret void
+}
+
+define dso_local void @test__twllt(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twllt:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twllt 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 2)
+  ret void
+}
+
+define dso_local void @test__twne3(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twne3:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twne 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 3)
+  ret void
+}
+
+define dso_local void @test__tweq(i32 %a, i32 %b) {
+; CHECK-LABEL: test__tweq:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tweq 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 4)
+  ret void
+}
+
+define dso_local void @test__twlge(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twlge:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tw 5, 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 5)
+  ret void
+}
+
+define dso_local void @test__twlle(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twlle:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tw 6, 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 6)
+  ret void
+}
+
+define dso_local void @test__twgt(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twgt:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twgt 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 8)
+  ret void
+}
+
+define dso_local void @test__twge(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twge:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tw 12, 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 12)
+  ret void
+}
+
+define dso_local void @test__twlt(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twlt:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twlt 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 16)
+  ret void
+}
+
+define dso_local void @test__twle(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twle:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tw 20, 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 20)
+  ret void
+}
+
+define dso_local void @test__twne24(i32 %a, i32 %b) {
+; CHECK-LABEL: test__twne24:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twne 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 24)
+  ret void
+}
+
+define dso_local void @test__tweq31(i32 %a, i32 %b) {
+; CHECK-LABEL: test__tweq31:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tweq 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 31)
+  ret void
+}
+
+define dso_local void @test__tw_no_match(i32 %a, i32 %b) {
+; CHECK-LABEL: test__tw_no_match:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:tw 13, 3, 4
+; CHECK-NEXT:blr
+  call void @llvm.ppc.tw(i32 %a, i32 %b, i32 13)
+  ret void
+}
+
+; trap
+declare void @llvm.ppc.trap(i32 %a)
+define dso_local void @test__trap(i32 %a) {
+; CHECK-LABEL: test__trap:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:twnei 3, 0
+; CHECK-NEXT:blr
+  call void @llvm.ppc.trap(i32 %a)
+  ret void
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-64bit-only.ll
==

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Victor Huang via Phabricator via cfe-commits]

NeHuang added inline comments.



Comment at: 
clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c:1
+// RUN: not %clang_cc1 -triple=powerpc-unknown-aix -O2 -S -emit-llvm %s -o - 
2>&1 |\
+// RUN: FileCheck %s --check-prefix=CHECK32-ERROR

`-S` seems redundant.
Any reason we need `-O2` for these tests?



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c:1
+// RUN: %clang_cc1 -triple=powerpc-unknown-aix -O2 -S -emit-llvm %s -o - | \
+// RUN: FileCheck %s

same as above.



Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c:11
+int test_lwarx(volatile int* a) {
+  // CHECK: entry:
+  // CHECK: %0 = bitcast i32* %a to i8*

stefanp wrote:
> Please check that this "entry:" is printed out when asserts are on and when 
> asserts are off you may want to remove it at this point.
> 
> I would prefer you check the name of the function instead of "entry". You can 
> use `CHECK-LABEL` to do that. 
Agreed. We should first do `CHECK-LABEL` with the function name.


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[PATCH] D98798: Produce warning for performing pointer arithmetic on a null pointer.

[Jamie Schmeiser via Phabricator via cfe-commits]

jamieschmeiser added a comment.

@rsmith @thakis @efriedma  If there are no more changes required, please 
approve.


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356559.
Conanap marked 4 inline comments as done.
Conanap added a comment.

Updated test cases


Repository:
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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx ForceXForm:$dst),
+  (LWARX ForceXForm:$dst)>;
+def : Pat<(int_ppc_stwcx ForceXForm:$dst, gprc:$A),
+  (STWCX gprc:$A, ForceXForm:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap marked an inline comment as done.
Conanap added a comment.

addressed comments


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[PATCH] D104556: [InstrProfiling] Make CountersPtr in __profd_ relative

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added a comment.

@davidxl @vsk 😃


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[clang] 52f3467 - [AIX] Add _AIX73 version macro

[Steven Wan via cfe-commits]

Author: Jake Egan
Date: 2021-07-05T16:28:48-04:00
New Revision: 52f34673ead32e6818d337207661597de52b9808

URL: 
https://github.com/llvm/llvm-project/commit/52f34673ead32e6818d337207661597de52b9808
DIFF: 
https://github.com/llvm/llvm-project/commit/52f34673ead32e6818d337207661597de52b9808.diff

LOG: [AIX] Add _AIX73 version macro

This patch defines _AIX73 version macro for AIX 7.3.

It extends the following patch https://reviews.llvm.org/D61530.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D105185

Added: 


Modified: 
clang/lib/Basic/Targets/OSTargets.h
clang/test/Preprocessor/init-ppc.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/OSTargets.h 
b/clang/lib/Basic/Targets/OSTargets.h
index 335ca5635642c..fd1b15c512a2f 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -700,6 +700,7 @@ class AIXTargetInfo : public OSTargetInfo {
 if (OsVersion >= std::make_pair(6, 1)) Builder.defineMacro("_AIX61");
 if (OsVersion >= std::make_pair(7, 1)) Builder.defineMacro("_AIX71");
 if (OsVersion >= std::make_pair(7, 2)) Builder.defineMacro("_AIX72");
+if (OsVersion >= std::make_pair(7, 3)) Builder.defineMacro("_AIX73");
 
 // FIXME: Do not define _LONG_LONG when -fno-long-long is specified.
 Builder.defineMacro("_LONG_LONG");

diff  --git a/clang/test/Preprocessor/init-ppc.c 
b/clang/test/Preprocessor/init-ppc.c
index 5301c7e3f59df..f59edd119ab0b 100644
--- a/clang/test/Preprocessor/init-ppc.c
+++ b/clang/test/Preprocessor/init-ppc.c
@@ -585,6 +585,20 @@
 // PPC-AIX:#define __powerpc__ 1
 // PPC-AIX:#define __ppc__ 1
 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.3.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX73 %s
+//
+// PPC-AIX73:#define _AIX32 1
+// PPC-AIX73:#define _AIX41 1
+// PPC-AIX73:#define _AIX43 1
+// PPC-AIX73:#define _AIX50 1
+// PPC-AIX73:#define _AIX51 1
+// PPC-AIX73:#define _AIX52 1
+// PPC-AIX73:#define _AIX53 1
+// PPC-AIX73:#define _AIX61 1
+// PPC-AIX73:#define _AIX71 1
+// PPC-AIX73:#define _AIX72 1
+// PPC-AIX73:#define _AIX73 1
+
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.2.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX72 %s
 //
 // PPC-AIX72:#define _AIX32 1
@@ -597,6 +611,7 @@
 // PPC-AIX72:#define _AIX61 1
 // PPC-AIX72:#define _AIX71 1
 // PPC-AIX72:#define _AIX72 1
+// PPC-AIX72-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.1.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX71 %s
 //
@@ -610,6 +625,7 @@
 // PPC-AIX71:#define _AIX61 1
 // PPC-AIX71:#define _AIX71 1
 // PPC-AIX71-NOT:#define _AIX72 1
+// PPC-AIX71-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix6.1.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX61 %s
 //
@@ -623,6 +639,7 @@
 // PPC-AIX61:#define _AIX61 1
 // PPC-AIX61-NOT:#define _AIX71 1
 // PPC-AIX61-NOT:#define _AIX72 1
+// PPC-AIX61-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.3.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX53 %s
 // PPC-AIX53:#define _AIX32 1
@@ -635,6 +652,7 @@
 // PPC-AIX53-NOT:#define _AIX61 1
 // PPC-AIX53-NOT:#define _AIX71 1
 // PPC-AIX53-NOT:#define _AIX72 1
+// PPC-AIX53-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.2.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX52 %s
 // PPC-AIX52:#define _AIX32 1
@@ -647,6 +665,7 @@
 // PPC-AIX52-NOT:#define _AIX61 1
 // PPC-AIX52-NOT:#define _AIX71 1
 // PPC-AIX52-NOT:#define _AIX72 1
+// PPC-AIX52-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.1.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX51 %s
 // PPC-AIX51:#define _AIX32 1
@@ -659,6 +678,7 @@
 // PPC-AIX51-NOT:#define _AIX61 1
 // PPC-AIX51-NOT:#define _AIX71 1
 // PPC-AIX51-NOT:#define _AIX72 1
+// PPC-AIX51-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.0.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX50 %s
 // PPC-AIX50:#define _AIX32 1
@@ -671,6 +691,7 @@
 // PPC-AIX50-NOT:#define _AIX61 1
 // PPC-AIX50-NOT:#define _AIX71 1
 // PPC-AIX50-NOT:#define _AIX72 1
+// PPC-AIX50-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix4.3.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX43 %s
 // PPC-AIX43:#define _AIX32 1
@@ -683,6 +704,7 @@
 // PPC-AIX43-NOT:#define _AIX61 1
 // PPC-AIX43-NOT:#define _AIX71 1
 // PPC-AIX43-NOT:#define _AIX72 1
+// PPC-AIX43-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix4.1.0.0 < 
/dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX41 %s
 // PPC-AIX41:#define _AI

[PATCH] D105185: [AIX] Add _AIX73 version macro

[Steven Wan via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG52f34673ead3: [AIX] Add _AIX73 version macro (authored by 
Jake-Egan, committed by stevewan).

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Files:
  clang/lib/Basic/Targets/OSTargets.h
  clang/test/Preprocessor/init-ppc.c

Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -585,6 +585,20 @@
 // PPC-AIX:#define __powerpc__ 1
 // PPC-AIX:#define __ppc__ 1
 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.3.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX73 %s
+//
+// PPC-AIX73:#define _AIX32 1
+// PPC-AIX73:#define _AIX41 1
+// PPC-AIX73:#define _AIX43 1
+// PPC-AIX73:#define _AIX50 1
+// PPC-AIX73:#define _AIX51 1
+// PPC-AIX73:#define _AIX52 1
+// PPC-AIX73:#define _AIX53 1
+// PPC-AIX73:#define _AIX61 1
+// PPC-AIX73:#define _AIX71 1
+// PPC-AIX73:#define _AIX72 1
+// PPC-AIX73:#define _AIX73 1
+
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.2.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX72 %s
 //
 // PPC-AIX72:#define _AIX32 1
@@ -597,6 +611,7 @@
 // PPC-AIX72:#define _AIX61 1
 // PPC-AIX72:#define _AIX71 1
 // PPC-AIX72:#define _AIX72 1
+// PPC-AIX72-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix7.1.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX71 %s
 //
@@ -610,6 +625,7 @@
 // PPC-AIX71:#define _AIX61 1
 // PPC-AIX71:#define _AIX71 1
 // PPC-AIX71-NOT:#define _AIX72 1
+// PPC-AIX71-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix6.1.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX61 %s
 //
@@ -623,6 +639,7 @@
 // PPC-AIX61:#define _AIX61 1
 // PPC-AIX61-NOT:#define _AIX71 1
 // PPC-AIX61-NOT:#define _AIX72 1
+// PPC-AIX61-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.3.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX53 %s
 // PPC-AIX53:#define _AIX32 1
@@ -635,6 +652,7 @@
 // PPC-AIX53-NOT:#define _AIX61 1
 // PPC-AIX53-NOT:#define _AIX71 1
 // PPC-AIX53-NOT:#define _AIX72 1
+// PPC-AIX53-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.2.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX52 %s
 // PPC-AIX52:#define _AIX32 1
@@ -647,6 +665,7 @@
 // PPC-AIX52-NOT:#define _AIX61 1
 // PPC-AIX52-NOT:#define _AIX71 1
 // PPC-AIX52-NOT:#define _AIX72 1
+// PPC-AIX52-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.1.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX51 %s
 // PPC-AIX51:#define _AIX32 1
@@ -659,6 +678,7 @@
 // PPC-AIX51-NOT:#define _AIX61 1
 // PPC-AIX51-NOT:#define _AIX71 1
 // PPC-AIX51-NOT:#define _AIX72 1
+// PPC-AIX51-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix5.0.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX50 %s
 // PPC-AIX50:#define _AIX32 1
@@ -671,6 +691,7 @@
 // PPC-AIX50-NOT:#define _AIX61 1
 // PPC-AIX50-NOT:#define _AIX71 1
 // PPC-AIX50-NOT:#define _AIX72 1
+// PPC-AIX50-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix4.3.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX43 %s
 // PPC-AIX43:#define _AIX32 1
@@ -683,6 +704,7 @@
 // PPC-AIX43-NOT:#define _AIX61 1
 // PPC-AIX43-NOT:#define _AIX71 1
 // PPC-AIX43-NOT:#define _AIX72 1
+// PPC-AIX43-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix4.1.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX41 %s
 // PPC-AIX41:#define _AIX32 1
@@ -695,6 +717,7 @@
 // PPC-AIX41-NOT:#define _AIX61 1
 // PPC-AIX41-NOT:#define _AIX71 1
 // PPC-AIX41-NOT:#define _AIX72 1
+// PPC-AIX41-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-ibm-aix3.2.0.0 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX32 %s
 // PPC-AIX32:#define _AIX32 1
@@ -707,6 +730,7 @@
 // PPC-AIX32-NOT:#define _AIX61 1
 // PPC-AIX32-NOT:#define _AIX71 1
 // PPC-AIX32-NOT:#define _AIX72 1
+// PPC-AIX32-NOT:#define _AIX73 1
 
 // RUN: %clang_cc1 -x c++ -E -dM -ffreestanding -triple=powerpc-ibm-aix7.1.0.0 -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPC-AIX-CXX %s
 //
Index: clang/lib/Basic/Targets/OSTargets.h
===
--- clang/lib/Basic/Targets/OSTargets.h
+++ clang/lib/Basic/Targets/OSTargets.h
@@ -700,6 +700,7 @@
 if (OsVersion >= std::make_pair(6, 1)) Builder.defineMacro("_AIX61");
 if (OsVersion >= std::make_pa

[PATCH] D99381: [compiler-rt][hwasan] Add Fuchsia-specific sanitizer platform limits

[Roland McGrath via Phabricator via cfe-commits]

mcgrathr added a comment.

Frankly I don't think it makes sense to have __sanitizer_mallinfo and those 
other allocator functions declared in hwasan_interface_internal.h at all.
Those are neither APIs that the compiler emits nor ones that anyone else should 
use.  They are just implementation details of the allocator interceptors.
I think a better cleanup is to move those declarations out of that file.  I 
don't see why they need to be in any header file rather than just in 
hwasan_allocation_functions.cpp.


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Victor Huang via Phabricator via cfe-commits]

NeHuang accepted this revision as: NeHuang.
NeHuang added a comment.
This revision is now accepted and ready to land.

Overall LGTM.


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[PATCH] D103544: [compiler-rt][Fuchsia] Disable interceptors while enabling new/delete replacements

[Roland McGrath via Phabricator via cfe-commits]

mcgrathr accepted this revision.
mcgrathr added a comment.
This revision is now accepted and ready to land.

lgtm


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[PATCH] D103936: [compiler-rt][hwasan] Define fuchsia implementations of required hwasan functions

[Roland McGrath via Phabricator via cfe-commits]

mcgrathr accepted this revision.
mcgrathr added a comment.
This revision is now accepted and ready to land.

lgtm with minor changes + clang-format.




Comment at: compiler-rt/lib/hwasan/hwasan_fuchsia.cpp:29
+  // now. Otherwise, ShadowBounds will be a zero-initialized global.
+  ShadowBounds = __sanitizer_shadow_bounds();
+  CHECK_NE(__sanitizer::ShadowBounds.shadow_limit, 0);

It feels sketchy to modify a variable defined in sanitizer_common directly like 
that.
Let's move this call into an `InitShadowBounds()` in 
sanitizer_common/sanitizer_fuchsia.h factored out of GetMaxUserVirtualAddress.




Comment at: compiler-rt/lib/hwasan/hwasan_fuchsia.cpp:37
+  // This initializes __sanitizer::ShadowBounds.
+  kHighMemEnd = GetMaxUserVirtualAddress();
+  kHighMemBeg = __sanitizer::ShadowBounds.shadow_limit;

leonardchan wrote:
> mcgrathr wrote:
> > Isn't this `__sanitizer::GetMaxUserVirtualAddress()` ?
> It is. It looks there's
> 
> ```
> namespace __hwasan {
> using namespace __sanitizer;
> }
> ```
> 
> in `sanitizer_internal_defs.h` included through `hwasan.h`. Will add the 
> `__sanitizer::` bits.
On further reflection, it's suboptimal that GetMaxUserVirtualAddress always 
resets the global.  It does that because in the asan implementation it's only 
called once at startup anyway so that was the minimal refactoring there.

Here since we're using ShadowBounds directly in this same code, I think using 
it directly here is more readable (as well as more optimal).



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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 356562.
Conanap added a comment.

Removed entry from check


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Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Basic/Targets/PPC.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
  clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+
+declare i32 @llvm.ppc.lwarx(i8*)
+define dso_local signext i32 @test_lwarx(i32* readnone %a) {
+; CHECK-64-LABEL: test_lwarx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:lwarx 3, 0, 3
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_lwarx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:lwarx 3, 0, 3
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.lwarx(i8* %0)
+  ret i32 %1
+}
+
+declare i32 @llvm.ppc.stwcx(i8*, i32)
+define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
+; CHECK-64-LABEL: test_stwcx:
+; CHECK-64:   # %bb.0: # %entry
+; CHECK-64-NEXT:stwcx. 4, 0, 3
+; CHECK-64-NEXT:mfocrf 3, 128
+; CHECK-64-NEXT:srwi 3, 3, 28
+; CHECK-64-NEXT:extsw 3, 3
+; CHECK-64-NEXT:blr
+;
+; CHECK-32-LABEL: test_stwcx:
+; CHECK-32:   # %bb.0: # %entry
+; CHECK-32-NEXT:stwcx. 4, 0, 3
+; CHECK-32-NEXT:mfocrf 3, 128
+; CHECK-32-NEXT:srwi 3, 3, 28
+; CHECK-32-NEXT:blr
+entry:
+  %0 = bitcast i32* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
+  ret i32 %1
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK
+
+declare i64 @llvm.ppc.ldarx(i8*)
+define dso_local i64 @test_ldarx(i64* readnone %a) {
+; CHECK-LABEL: test_ldarx:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:ldarx 3, 0, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i64 @llvm.ppc.ldarx(i8* %0)
+  ret i64 %1
+}
+
+declare i32 @llvm.ppc.stdcx(i8*, i64)
+define dso_local i64 @test(i64* %a, i64 %b) {
+; CHECK-LABEL: test:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:stdcx. 4, 0, 3
+; CHECK-NEXT:mfocrf 3, 128
+; CHECK-NEXT:srwi 3, 3, 28
+; CHECK-NEXT:extsw 3, 3
+; CHECK-NEXT:blr
+entry:
+  %0 = bitcast i64* %a to i8*
+  %1 = tail call i32 @llvm.ppc.stdcx(i8* %0, i64 %b)
+  %conv = sext i32 %1 to i64
+  ret i64 %conv
+}
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
===
--- llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5411,3 +5411,8 @@
 // swap the high word and low word.
 def : Pat<(i64 (bitreverse i64:$A)),
   (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
+
+def : Pat<(int_ppc_lwarx ForceXForm:$dst),
+  (LWARX ForceXForm:$dst)>;
+def : Pat<(int_ppc_stwcx ForceXForm:$dst, gprc:$A),
+  (STWCX gprc:$A, ForceXForm:$dst)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===
--- llvm/lib/Target/Pow

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Amy Kwan via Phabricator via cfe-commits]

amyk accepted this revision as: amyk.
amyk added a comment.

Also LGTM overall.




Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK

nit: Add `-ppc-asm-full-reg-names`.



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond.ll:3
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \

nit: Add `-ppc-asm-full-reg-names`.


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[PATCH] D104085: [compiler-rt][hwasan] Setup hwasan thread handling on Fuchsia

[Roland McGrath via Phabricator via cfe-commits]

mcgrathr accepted this revision.
mcgrathr added a comment.
This revision is now accepted and ready to land.

lgtm


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[PATCH] D105380: [clang] fixes named return of variables with dependent alignment

[Aaron Puchert via Phabricator via cfe-commits]

aaronpuchert added a comment.

I'd leave it to @rsmith to decide whether this makes sense in Sema.h.

I tend to follow the rule that if it's just used once I keep it local, but you 
might have good reasons for making it public.




Comment at: clang/lib/Sema/SemaDecl.cpp:13316
+  return VD->getType()->isDependentType() ||
+ std::any_of(range.begin(), range.end(), [](const AlignedAttr *AA) {
+   return AA->isAlignmentDependent();

From `llvm/include/llvm/ADT/STLExtras.h`.



Comment at: clang/lib/Sema/SemaDecl.cpp:13317
+ std::any_of(range.begin(), range.end(), [](const AlignedAttr *I) {
+   return I->isAlignmentDependent();
+ });

mizvekov wrote:
> Quuxplusone wrote:
> > Tangent: It would be nice to rename `isAlignmentDependent` into 
> > `hasDependentAlignment` or simply `isDependent`. IIUC, the intended meaning 
> > is "Is this alignment attribute 'dependent'?" and not (as the name would 
> > naturally parse) "is this alignment attribute 'alignment-dependent'?"
> > 
> > Arguably, it could also work to say `I->isDependentAlignment()` in the same 
> > way that we say `getType()->isDependentType()`.
> > 
> > Speaking of which, maybe `I` should be renamed to `AA` or something? Is `I` 
> > really the right abbreviation for an `AlignedAttr`?
> I agree, but it is not so simple. This attribute class is autogenerated from 
> `clang/include/clang/Basic/Attr.td` and it's not obvious to me where that 
> method name comes from. Probably the tablegen backend. But that is another 
> area that I am not familiar with yet.
> And there are a few users, and also a method named 
> `isAlignmentErrorDependent` which would benefit from the same kind of rename.
> This DR is supposed to be a quick fix for a regression, I better leave that 
> tangent for another time :)
> 
> The second rename, well it is very common to name a predicate variable as 
> `I`, but I renamed to `AA` as that is also good.
Seems plausible that it comes from

```
let Args = [ExprArgument<"Alignment">];
```

in `AlignValue`. An expression can be dependent, and to distinguish expression 
arguments, it probably generates functions `isXXXDependent` for 
`ExprArgument<"XXX">`. But I'm just guessing.

But yeah, nothing we can easily change here.


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai accepted this revision.
nemanjai added a comment.

LGTM aside from a small nit.




Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK

amyk wrote:
> nit: Add `-ppc-asm-full-reg-names`.
+1


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[PATCH] D69764: [clang-format] Add East/West Const fixer capability

[Florin Iucha via Phabricator via cfe-commits]

0x8000- added a comment.

Is it possible to have this rebased on top of LLVM12 for those of us who find 
the trade-offs acceptable? I prefer a consistent formatting of const placement, 
and my code base does not have issues with the macros - if we find one that 
break the build, I'll suggest it here as a test case ;)


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[clang] 9964b0e - [clang] Add -fdump-record-layouts-canonical option

[Steven Wan via cfe-commits]

Author: David Tenty
Date: 2021-07-05T17:35:37-04:00
New Revision: 9964b0ef828b685dc575a50f75bb1780b84b95c8

URL: 
https://github.com/llvm/llvm-project/commit/9964b0ef828b685dc575a50f75bb1780b84b95c8
DIFF: 
https://github.com/llvm/llvm-project/commit/9964b0ef828b685dc575a50f75bb1780b84b95c8.diff

LOG: [clang] Add -fdump-record-layouts-canonical option

This option implies -fdump-record-layouts but dumps record layout information 
with canonical field types, which can be more useful in certain cases when 
comparing structure layouts.

Reviewed By: stevewan

Differential Revision: https://reviews.llvm.org/D105112

Added: 
clang/test/Layout/dump-canonical.cpp

Modified: 
clang/include/clang/Basic/LangOptions.def
clang/include/clang/Driver/Options.td
clang/lib/AST/RecordLayoutBuilder.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/LangOptions.def 
b/clang/include/clang/Basic/LangOptions.def
index b18e957a58f4c..8420a97376c38 100644
--- a/clang/include/clang/Basic/LangOptions.def
+++ b/clang/include/clang/Basic/LangOptions.def
@@ -269,6 +269,7 @@ BENIGN_LANGOPT(ModulesDebugInfo , 1, 0, "Modules debug 
info")
 BENIGN_LANGOPT(ElideConstructors , 1, 1, "C++ copy constructor elision")
 BENIGN_LANGOPT(DumpRecordLayouts , 1, 0, "dumping the layout of IRgen'd 
records")
 BENIGN_LANGOPT(DumpRecordLayoutsSimple , 1, 0, "dumping the layout of IRgen'd 
records in a simple form")
+BENIGN_LANGOPT(DumpRecordLayoutsCanonical , 1, 0, "dumping the AST layout of 
records using canonical field types")
 BENIGN_LANGOPT(DumpRecordLayoutsComplete , 1, 0, "dumping the AST layout of 
all complete records")
 BENIGN_LANGOPT(DumpVTableLayouts , 1, 0, "dumping the layouts of emitted 
vtables")
 LANGOPT(NoConstantCFStrings , 1, 0, "no constant CoreFoundation strings")

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 41b7299b02745..c2b21d9851241 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5405,13 +5405,16 @@ def stats_file : Joined<["-"], "stats-file=">,
 def fdump_record_layouts_simple : Flag<["-"], "fdump-record-layouts-simple">,
   HelpText<"Dump record layout information in a simple form used for testing">,
   MarshallingInfoFlag>;
+def fdump_record_layouts_canonical : Flag<["-"], 
"fdump-record-layouts-canonical">,
+  HelpText<"Dump record layout information with canonical field types">,
+  MarshallingInfoFlag>;
 def fdump_record_layouts_complete : Flag<["-"], 
"fdump-record-layouts-complete">,
   HelpText<"Dump record layout information for all complete types">,
   MarshallingInfoFlag>;
 def fdump_record_layouts : Flag<["-"], "fdump-record-layouts">,
   HelpText<"Dump record layout information">,
   MarshallingInfoFlag>,
-  ImpliedByAnyOf<[fdump_record_layouts_simple.KeyPath, 
fdump_record_layouts_complete.KeyPath]>;
+  ImpliedByAnyOf<[fdump_record_layouts_simple.KeyPath, 
fdump_record_layouts_complete.KeyPath, fdump_record_layouts_canonical.KeyPath]>;
 def fix_what_you_can : Flag<["-"], "fix-what-you-can">,
   HelpText<"Apply fix-it advice even in the presence of unfixable errors">,
   MarshallingInfoFlag>;

diff  --git a/clang/lib/AST/RecordLayoutBuilder.cpp 
b/clang/lib/AST/RecordLayoutBuilder.cpp
index beb111e2e9718..6ee4178248b92 100644
--- a/clang/lib/AST/RecordLayoutBuilder.cpp
+++ b/clang/lib/AST/RecordLayoutBuilder.cpp
@@ -3577,7 +3577,10 @@ static void DumpRecordLayout(raw_ostream &OS, const 
RecordDecl *RD,
 } else {
   PrintOffset(OS, FieldOffset, IndentLevel);
 }
-OS << Field.getType().getAsString() << ' ' << Field << '\n';
+const QualType &FieldType = C.getLangOpts().DumpRecordLayoutsCanonical
+? Field.getType().getCanonicalType()
+: Field.getType();
+OS << FieldType.getAsString() << ' ' << Field << '\n';
   }
 
   // Dump virtual bases.

diff  --git a/clang/test/Layout/dump-canonical.cpp 
b/clang/test/Layout/dump-canonical.cpp
new file mode 100644
index 0..c7216169efdd9
--- /dev/null
+++ b/clang/test/Layout/dump-canonical.cpp
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -emit-llvm-only -fdump-record-layouts %s | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm-only -fdump-record-layouts-canonical %s | 
FileCheck %s -check-prefix CANONICAL
+
+typedef long foo_t;
+
+
+struct a {
+  foo_t x;
+} b;
+
+struct c {
+  typedef foo_t bar_t;
+  bar_t x;
+} d;
+
+// CHECK:  0 | foo_t
+// CHECK:  0 | c::bar_t
+// CANONICAL-NOT:  0 | foo_t
+// CANONICAL-NOT:  0 | c::bar_t
+// CANONICAL:  0 | long



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[PATCH] D105112: [clang] Add -fdump-record-layouts-canonical option

[Steven Wan via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9964b0ef828b: [clang] Add -fdump-record-layouts-canonical 
option (authored by daltenty, committed by stevewan).

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Files:
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/dump-canonical.cpp


Index: clang/test/Layout/dump-canonical.cpp
===
--- /dev/null
+++ clang/test/Layout/dump-canonical.cpp
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -emit-llvm-only -fdump-record-layouts %s | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm-only -fdump-record-layouts-canonical %s | 
FileCheck %s -check-prefix CANONICAL
+
+typedef long foo_t;
+
+
+struct a {
+  foo_t x;
+} b;
+
+struct c {
+  typedef foo_t bar_t;
+  bar_t x;
+} d;
+
+// CHECK:  0 | foo_t
+// CHECK:  0 | c::bar_t
+// CANONICAL-NOT:  0 | foo_t
+// CANONICAL-NOT:  0 | c::bar_t
+// CANONICAL:  0 | long
Index: clang/lib/AST/RecordLayoutBuilder.cpp
===
--- clang/lib/AST/RecordLayoutBuilder.cpp
+++ clang/lib/AST/RecordLayoutBuilder.cpp
@@ -3577,7 +3577,10 @@
 } else {
   PrintOffset(OS, FieldOffset, IndentLevel);
 }
-OS << Field.getType().getAsString() << ' ' << Field << '\n';
+const QualType &FieldType = C.getLangOpts().DumpRecordLayoutsCanonical
+? Field.getType().getCanonicalType()
+: Field.getType();
+OS << FieldType.getAsString() << ' ' << Field << '\n';
   }
 
   // Dump virtual bases.
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -5405,13 +5405,16 @@
 def fdump_record_layouts_simple : Flag<["-"], "fdump-record-layouts-simple">,
   HelpText<"Dump record layout information in a simple form used for testing">,
   MarshallingInfoFlag>;
+def fdump_record_layouts_canonical : Flag<["-"], 
"fdump-record-layouts-canonical">,
+  HelpText<"Dump record layout information with canonical field types">,
+  MarshallingInfoFlag>;
 def fdump_record_layouts_complete : Flag<["-"], 
"fdump-record-layouts-complete">,
   HelpText<"Dump record layout information for all complete types">,
   MarshallingInfoFlag>;
 def fdump_record_layouts : Flag<["-"], "fdump-record-layouts">,
   HelpText<"Dump record layout information">,
   MarshallingInfoFlag>,
-  ImpliedByAnyOf<[fdump_record_layouts_simple.KeyPath, 
fdump_record_layouts_complete.KeyPath]>;
+  ImpliedByAnyOf<[fdump_record_layouts_simple.KeyPath, 
fdump_record_layouts_complete.KeyPath, fdump_record_layouts_canonical.KeyPath]>;
 def fix_what_you_can : Flag<["-"], "fix-what-you-can">,
   HelpText<"Apply fix-it advice even in the presence of unfixable errors">,
   MarshallingInfoFlag>;
Index: clang/include/clang/Basic/LangOptions.def
===
--- clang/include/clang/Basic/LangOptions.def
+++ clang/include/clang/Basic/LangOptions.def
@@ -269,6 +269,7 @@
 BENIGN_LANGOPT(ElideConstructors , 1, 1, "C++ copy constructor elision")
 BENIGN_LANGOPT(DumpRecordLayouts , 1, 0, "dumping the layout of IRgen'd 
records")
 BENIGN_LANGOPT(DumpRecordLayoutsSimple , 1, 0, "dumping the layout of IRgen'd 
records in a simple form")
+BENIGN_LANGOPT(DumpRecordLayoutsCanonical , 1, 0, "dumping the AST layout of 
records using canonical field types")
 BENIGN_LANGOPT(DumpRecordLayoutsComplete , 1, 0, "dumping the AST layout of 
all complete records")
 BENIGN_LANGOPT(DumpVTableLayouts , 1, 0, "dumping the layouts of emitted 
vtables")
 LANGOPT(NoConstantCFStrings , 1, 0, "no constant CoreFoundation strings")


Index: clang/test/Layout/dump-canonical.cpp
===
--- /dev/null
+++ clang/test/Layout/dump-canonical.cpp
@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 -emit-llvm-only -fdump-record-layouts %s | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm-only -fdump-record-layouts-canonical %s | FileCheck %s -check-prefix CANONICAL
+
+typedef long foo_t;
+
+
+struct a {
+  foo_t x;
+} b;
+
+struct c {
+  typedef foo_t bar_t;
+  bar_t x;
+} d;
+
+// CHECK:  0 | foo_t
+// CHECK:  0 | c::bar_t
+// CANONICAL-NOT:  0 | foo_t
+// CANONICAL-NOT:  0 | c::bar_t
+// CANONICAL:  0 | long
Index: clang/lib/AST/RecordLayoutBuilder.cpp
===
--- clang/lib/AST/RecordLayoutBuilder.cpp
+++ clang/lib/AST/RecordLayoutBuilder.cpp
@@ -3577,7 +3577,10 @@
 } else {
   PrintOffset(OS, FieldOffset, IndentLevel);
 }
-OS << Field.get

[PATCH] D105380: [clang] fixes named return of variables with dependent alignment

[Matheus Izvekov via Phabricator via cfe-commits]

mizvekov added a comment.

In D105380#2858638 , @aaronpuchert 
wrote:

> I tend to follow the rule that if it's just used once I keep it local, but 
> you might have good reasons for making it public.

Well it is used twice.
Notice how I replaced a pre-existing static function called 
`hasDependentAlignment` with a static class member with the same name.
Since I kept the name, and it was used from a Sema member function, I did not 
have to change the code in the call site, hence it did not show up in the diff 
:)




Comment at: clang/lib/Sema/SemaDecl.cpp:13316
+  return VD->getType()->isDependentType() ||
+ std::any_of(range.begin(), range.end(), [](const AlignedAttr *AA) {
+   return AA->isAlignmentDependent();

aaronpuchert wrote:
> From `llvm/include/llvm/ADT/STLExtras.h`.
That looks much better, thanks!


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[PATCH] D69764: [clang-format] Add East/West Const fixer capability

[MyDeveloperDay via Phabricator via cfe-commits]

MyDeveloperDay updated this revision to Diff 356565.
MyDeveloperDay removed reviewers: klimek, djasper.
MyDeveloperDay added a comment.

Rebase on clang12 as requested


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Files:
  clang/docs/ClangFormatStyleOptions.rst
  clang/docs/ReleaseNotes.rst
  clang/include/clang/Format/Format.h
  clang/lib/Format/CMakeLists.txt
  clang/lib/Format/EastWestConstFixer.cpp
  clang/lib/Format/EastWestConstFixer.h
  clang/lib/Format/Format.cpp
  clang/tools/clang-format/ClangFormat.cpp
  clang/unittests/Format/FormatTest.cpp

Index: clang/unittests/Format/FormatTest.cpp
===
--- clang/unittests/Format/FormatTest.cpp
+++ clang/unittests/Format/FormatTest.cpp
@@ -18202,6 +18202,13 @@
   CHECK_PARSE("ContinuationIndentWidth: 11", ContinuationIndentWidth, 11u);
   CHECK_PARSE("CommentPragmas: '// abc$'", CommentPragmas, "// abc$");
 
+  Style.ConstPlacement = FormatStyle::CS_West;
+  CHECK_PARSE("ConstPlacement: Leave", ConstPlacement, FormatStyle::CS_Leave);
+  CHECK_PARSE("ConstPlacement: East", ConstPlacement, FormatStyle::CS_East);
+  CHECK_PARSE("ConstPlacement: West", ConstPlacement, FormatStyle::CS_West);
+  CHECK_PARSE("ConstPlacement: Right", ConstPlacement, FormatStyle::CS_East);
+  CHECK_PARSE("ConstPlacement: Left", ConstPlacement, FormatStyle::CS_West);
+
   Style.AlignConsecutiveAssignments = FormatStyle::ACS_Consecutive;
   CHECK_PARSE("AlignConsecutiveAssignments: None", AlignConsecutiveAssignments,
   FormatStyle::ACS_None);
@@ -22146,6 +22153,330 @@
   "}";
   EXPECT_EQ(Code, format(Code, Style));
 }
+
+TEST_F(FormatTest, EastWestConst) {
+  FormatStyle Style = getLLVMStyle();
+
+  // keep the const style unaltered
+  verifyFormat("const int a;", Style);
+  verifyFormat("const int *a;", Style);
+  verifyFormat("const int &a;", Style);
+  verifyFormat("const int &&a;", Style);
+  verifyFormat("int const b;", Style);
+  verifyFormat("int const *b;", Style);
+  verifyFormat("int const &b;", Style);
+  verifyFormat("int const &&b;", Style);
+  verifyFormat("int const *b const;", Style);
+  verifyFormat("int *const c;", Style);
+
+  verifyFormat("const Foo a;", Style);
+  verifyFormat("const Foo *a;", Style);
+  verifyFormat("const Foo &a;", Style);
+  verifyFormat("const Foo &&a;", Style);
+  verifyFormat("Foo const b;", Style);
+  verifyFormat("Foo const *b;", Style);
+  verifyFormat("Foo const &b;", Style);
+  verifyFormat("Foo const &&b;", Style);
+  verifyFormat("Foo const *b const;", Style);
+
+  verifyFormat("LLVM_NODISCARD const int &Foo();", Style);
+  verifyFormat("LLVM_NODISCARD int const &Foo();", Style);
+
+  verifyFormat("volatile const int *restrict;", Style);
+  verifyFormat("const volatile int *restrict;", Style);
+  verifyFormat("const int volatile *restrict;", Style);
+}
+
+TEST_F(FormatTest, EastConst) {
+  FormatStyle Style = getLLVMStyle();
+  Style.ConstPlacement = FormatStyle::CS_East;
+
+  verifyFormat("int const a;", Style);
+  verifyFormat("int const *a;", Style);
+  verifyFormat("int const &a;", Style);
+  verifyFormat("int const &&a;", Style);
+  verifyFormat("int const b;", Style);
+  verifyFormat("int const *b;", Style);
+  verifyFormat("int const &b;", Style);
+  verifyFormat("int const &&b;", Style);
+  verifyFormat("int const *b const;", Style);
+  verifyFormat("int *const c;", Style);
+
+  verifyFormat("Foo const a;", Style);
+  verifyFormat("Foo const *a;", Style);
+  verifyFormat("Foo const &a;", Style);
+  verifyFormat("Foo const &&a;", Style);
+  verifyFormat("Foo const b;", Style);
+  verifyFormat("Foo const *b;", Style);
+  verifyFormat("Foo const &b;", Style);
+  verifyFormat("Foo const &&b;", Style);
+  verifyFormat("Foo const *b const;", Style);
+  verifyFormat("Foo *const b;", Style);
+  verifyFormat("Foo const *const b;", Style);
+  verifyFormat("auto const v = get_value();", Style);
+  verifyFormat("long long const &a;", Style);
+  verifyFormat("unsigned char const *a;", Style);
+  verifyFormat("int main(int const argc, char const *const *const argv)",
+   Style);
+
+  verifyFormat("LLVM_NODISCARD int const &Foo();", Style);
+  verifyFormat("SourceRange getSourceRange() const override LLVM_READONLY",
+   Style);
+  verifyFormat("void foo() const override;", Style);
+  verifyFormat("void foo() const override LLVM_READONLY;", Style);
+  verifyFormat("void foo() const final;", Style);
+  verifyFormat("void foo() const final LLVM_READONLY;", Style);
+  verifyFormat("void foo() const LLVM_READONLY;", Style);
+
+  verifyFormat(
+  "template  explicit Action(Action const &action);",
+  Style);
+  verifyFormat(
+  "template  explicit Action(Action const &action);",
+  "template  explicit Action(const Action& action);",
+  Style);
+  verifyFormat(
+  "template  explicit Action(Action const &action);",
+  "template \nexplicit Action(const Action& acti

[PATCH] D105380: [clang] fixes named return of variables with dependent alignment

[Matheus Izvekov via Phabricator via cfe-commits]

mizvekov updated this revision to Diff 356568.
mizvekov added a comment.

- Use llvm::any_of.


Repository:
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Files:
  clang/include/clang/Sema/Sema.h
  clang/lib/Sema/SemaDecl.cpp
  clang/lib/Sema/SemaStmt.cpp
  clang/test/CodeGen/nrvo-tracking.cpp

Index: clang/test/CodeGen/nrvo-tracking.cpp
===
--- clang/test/CodeGen/nrvo-tracking.cpp
+++ clang/test/CodeGen/nrvo-tracking.cpp
@@ -1,9 +1,9 @@
 // RUN: %clang_cc1 -std=c++20 -fblocks -Wno-return-stack-address -triple x86_64-unknown-unknown-gnu -emit-llvm -O1 -fexperimental-new-pass-manager -o - %s | FileCheck %s
 
-struct X {
-X();
-X(const X&);
-X(X&&);
+struct alignas(4) X {
+  X();
+  X(const X &);
+  X(X &&);
 };
 
 #define L(A, B, C) void l##A() {\
@@ -210,3 +210,75 @@
 };
   }()();
 }
+
+namespace test_alignas {
+
+template  X t1() {
+  X a [[gnu::aligned(A)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi4EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<4>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi8EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+template X t1<8>();
+
+template  X t2() {
+  X a [[gnu::aligned(1)]] [[gnu::aligned(A)]] [[gnu::aligned(2)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t2<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi4EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t2<4>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi8EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+template X t2<8>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t3Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+X t3() {
+  X a [[gnu::aligned(1)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t4Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+X t4() {
+  X a [[gnu::aligned(8)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t5Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+X t5() {
+  X a [[gnu::aligned(1)]] [[gnu::aligned(8)]];
+  return a;
+}
+
+} // namespace test_alignas
Index: clang/lib/Sema/SemaStmt.cpp
===
--- clang/lib/Sema/SemaStmt.cpp
+++ clang/lib/Sema/SemaStmt.cpp
@@ -3395,7 +3395,7 @@
 
   // Variables with higher required alignment than their type's ABI
   // alignment cannot use NRVO.
-  if (!VDType->isDependentType() && VD->hasAttr() &&
+  if (!hasDependentAlignment(VD) &&
   Context.getDeclAlign(VD) > Context.getTypeAlignInChars(VDType))
 Info.S = NamedReturnInfo::MoveEligible;
 
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -43,6 +43,7 @@
 #include "clang/Sema/ScopeInfo.h"
 #include "clang/Sema/SemaInternal.h"
 #include "clang/Sema/Template.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/Triple.h"
 #include 
@@ -13310,14 +13311,11 @@
 CheckCompleteDecompositionDeclaration(DD);
 }
 
-/// Determines if a variable's alignment is dependent.
-static bool hasDependentAlignment(VarDecl *VD) {
-  if (VD->getType()->isDependentType())
-return true;
-  for (auto *I : VD->specific_attrs())
-if (I->isAlignmentDependent())
-  return true;
-  return false;
+bool Sema::hasDependentAlignment(const VarDecl *VD) {
+  return VD->getType()->isDependentType() ||
+ llvm::any_of(
+ VD->specific_attrs(),
+ [](const AlignedAttr *AA) { return AA->isAlignmentDependent(); });
 }
 
 /// Check if VD needs to be dllexport/dllimport due to being in a
Index: clang/include/clang/Sema/Sema.h
===
--- clang/include/clang/Sema/Sema.h
+++ clang/include/clang/Sema/Sema.h
@@ -2666,6 +2666,9 @@
   /// it looks like the user is trying to modify the shadowing declaration.
   llvm::DenseMap ShadowingDecls;
 
+  /// Determines if a variable's alignment is dependent.
+  static bool hasDependentAlignment(const VarDecl *VD);
+
 public:
   void CheckCastAlign(Expr *Op, QualType T, So

[PATCH] D69764: [clang-format] Add East/West Const fixer capability

[Florin Iucha via Phabricator via cfe-commits]

0x8000- added a comment.

In D69764#2858656 , @MyDeveloperDay 
wrote:

> Rebase on clang12 as requested

Thank you!


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[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

[Albion Fung via Phabricator via cfe-commits]

Conanap marked 3 inline comments as done.
Conanap added inline comments.



Comment at: 
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK

nemanjai wrote:
> amyk wrote:
> > nit: Add `-ppc-asm-full-reg-names`.
> +1
The AIX assembler cannot understand register prefixes, so I'll leave the test 
cases as is. 


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[PATCH] D105446: [clang] fix constexpr code generation for user conversions.

[Matheus Izvekov via Phabricator via cfe-commits]

mizvekov created this revision.
mizvekov requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

When building the member call to a user conversion function during an
implicit cast, the expression was not being checked for immediate
invocation, so we were never adding the ConstantExpr node to AST.

This would cause the call to the user conversion operator to be emitted
even if it was constantexpr evaluated, and this would even trip an
assert when said user conversion was declared consteval:
`Assertion failed: !cast(GD.getDecl())->isConsteval() && 
"consteval function should never be emitted", file 
clang\lib\CodeGen\CodeGenModule.cpp, line 3530`

Fixes PR48855.

Signed-off-by: Matheus Izvekov 


Repository:
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Files:
  clang/lib/Sema/SemaExprCXX.cpp
  clang/test/CodeGenCXX/cxx2a-consteval.cpp


Index: clang/test/CodeGenCXX/cxx2a-consteval.cpp
===
--- clang/test/CodeGenCXX/cxx2a-consteval.cpp
+++ clang/test/CodeGenCXX/cxx2a-consteval.cpp
@@ -210,3 +210,15 @@
   AggCtor C(i);
   return C.a + C.b;
 }
+
+struct UserConv {
+  consteval operator int() const noexcept { return 42; }
+};
+
+// EVAL-FN-LABEL: @_Z13test_UserConvv(
+// EVAL-FN-NEXT:  entry:
+// EVAL-FN-NEXT:ret i32 42
+//
+int test_UserConv() {
+  return UserConv();
+}
Index: clang/lib/Sema/SemaExprCXX.cpp
===
--- clang/lib/Sema/SemaExprCXX.cpp
+++ clang/lib/Sema/SemaExprCXX.cpp
@@ -7786,7 +7786,8 @@
 Method->getType()->castAs()))
 return ExprError();
 
-  return CE;
+  return CheckForImmediateInvocation(MaybeBindToTemporary(CE),
+ CE->getMethodDecl());
 }
 
 ExprResult Sema::BuildCXXNoexceptExpr(SourceLocation KeyLoc, Expr *Operand,


Index: clang/test/CodeGenCXX/cxx2a-consteval.cpp
===
--- clang/test/CodeGenCXX/cxx2a-consteval.cpp
+++ clang/test/CodeGenCXX/cxx2a-consteval.cpp
@@ -210,3 +210,15 @@
   AggCtor C(i);
   return C.a + C.b;
 }
+
+struct UserConv {
+  consteval operator int() const noexcept { return 42; }
+};
+
+// EVAL-FN-LABEL: @_Z13test_UserConvv(
+// EVAL-FN-NEXT:  entry:
+// EVAL-FN-NEXT:ret i32 42
+//
+int test_UserConv() {
+  return UserConv();
+}
Index: clang/lib/Sema/SemaExprCXX.cpp
===
--- clang/lib/Sema/SemaExprCXX.cpp
+++ clang/lib/Sema/SemaExprCXX.cpp
@@ -7786,7 +7786,8 @@
 Method->getType()->castAs()))
 return ExprError();
 
-  return CE;
+  return CheckForImmediateInvocation(MaybeBindToTemporary(CE),
+ CE->getMethodDecl());
 }
 
 ExprResult Sema::BuildCXXNoexceptExpr(SourceLocation KeyLoc, Expr *Operand,
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[PATCH] D105112: [clang] Add -fdump-record-layouts-canonical option

[Nico Weber via Phabricator via cfe-commits]

thakis added a comment.

Hi, you have to bump clang/include/clang/Serialization/ASTBitCodes.h's 
VERSION_MAJOR after adding a LangOption, else builds with LLVM_APPEND_VC_REV=NO 
won't invalidate their module cache correctly. See e.g. 
https://reviews.llvm.org/rGb8b7a9dcdcbc Without that, tests are broken on bots 
with  LLVM_APPEND_VC_REV=NO , eg http://45.33.8.238/linux/50460/step_7.txt


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[PATCH] D105447: [analyzer] Allow cmake options to be passed to satest container

[Manas Gupta via Phabricator via cfe-commits]

manas created this revision.
Herald added subscribers: steakhal, ASDenysPetrov, dkrupp, donat.nagy, 
Szelethus, mikhail.ramalho, a.sidorin, szepet, baloghadamsoftware, xazax.hun.
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manas requested review of this revision.
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This patch selects all cmake options and passes them to global cmake
command while building LLVM inside satest docker container.

Prior to this, the cmake command was hard-coded and this would consume
a huge amount of memory while building. There was no support to pass
extra cmake options for the build, except for changing the command
manually. This patch allows testers to pass all "-D*" cmake options to
the build.

It also removes -DLLVM_BUILD_RUNTIME cmake option from the hard-coded
cmake command as it was allowing the build to hog up a lot of memory.


Repository:
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Files:
  clang/utils/analyzer/entrypoint.py


Index: clang/utils/analyzer/entrypoint.py
===
--- clang/utils/analyzer/entrypoint.py
+++ clang/utils/analyzer/entrypoint.py
@@ -9,10 +9,11 @@
 
 def main():
 settings, rest = parse_arguments()
+cmake_opts = list(filter(lambda cmd: cmd[:2]=='-D', rest))
 if settings.wait:
 wait()
 if settings.build_llvm or settings.build_llvm_only:
-build_llvm()
+build_llvm(cmake_opts)
 if settings.build_llvm_only:
 return
 sys.exit(test(rest))
@@ -33,11 +34,11 @@
 return parser.parse_known_args()
 
 
-def build_llvm():
+def build_llvm(cmake_options):
 os.chdir('/build')
 try:
 if is_cmake_needed():
-cmake()
+cmake(cmake_options)
 ninja()
 except CalledProcessError:
 print("Build failed!")
@@ -50,13 +51,14 @@
 
 CMAKE_COMMAND = "cmake -G Ninja -DCMAKE_BUILD_TYPE=Release " \
 "-DCMAKE_INSTALL_PREFIX=/analyzer -DLLVM_TARGETS_TO_BUILD=X86 " \
-"-DLLVM_ENABLE_PROJECTS=\"clang;openmp\" -DLLVM_BUILD_RUNTIME=OFF " \
+"-DLLVM_ENABLE_PROJECTS=\"clang;openmp\" " \
 "-DLLVM_ENABLE_TERMINFO=OFF -DCLANG_ENABLE_ARCMT=OFF " \
 "-DCLANG_ENABLE_STATIC_ANALYZER=ON"
 
 
-def cmake():
-check_call(CMAKE_COMMAND + ' /llvm-project/llvm', shell=True)
+def cmake(cmake_options):
+check_call(CMAKE_COMMAND + ' '.join(cmake_options) + ' /llvm-project/llvm',
+shell=True)
 
 
 def ninja():


Index: clang/utils/analyzer/entrypoint.py
===
--- clang/utils/analyzer/entrypoint.py
+++ clang/utils/analyzer/entrypoint.py
@@ -9,10 +9,11 @@
 
 def main():
 settings, rest = parse_arguments()
+cmake_opts = list(filter(lambda cmd: cmd[:2]=='-D', rest))
 if settings.wait:
 wait()
 if settings.build_llvm or settings.build_llvm_only:
-build_llvm()
+build_llvm(cmake_opts)
 if settings.build_llvm_only:
 return
 sys.exit(test(rest))
@@ -33,11 +34,11 @@
 return parser.parse_known_args()
 
 
-def build_llvm():
+def build_llvm(cmake_options):
 os.chdir('/build')
 try:
 if is_cmake_needed():
-cmake()
+cmake(cmake_options)
 ninja()
 except CalledProcessError:
 print("Build failed!")
@@ -50,13 +51,14 @@
 
 CMAKE_COMMAND = "cmake -G Ninja -DCMAKE_BUILD_TYPE=Release " \
 "-DCMAKE_INSTALL_PREFIX=/analyzer -DLLVM_TARGETS_TO_BUILD=X86 " \
-"-DLLVM_ENABLE_PROJECTS=\"clang;openmp\" -DLLVM_BUILD_RUNTIME=OFF " \
+"-DLLVM_ENABLE_PROJECTS=\"clang;openmp\" " \
 "-DLLVM_ENABLE_TERMINFO=OFF -DCLANG_ENABLE_ARCMT=OFF " \
 "-DCLANG_ENABLE_STATIC_ANALYZER=ON"
 
 
-def cmake():
-check_call(CMAKE_COMMAND + ' /llvm-project/llvm', shell=True)
+def cmake(cmake_options):
+check_call(CMAKE_COMMAND + ' '.join(cmake_options) + ' /llvm-project/llvm',
+shell=True)
 
 
 def ninja():
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[PATCH] D105439: [clang] protects users from relying on libc++ detail headers

[Christopher Di Bella via Phabricator via cfe-commits]

cjdb added a comment.

I should note that I didn't use private headers in libc++'s `modules.modulemap` 
because it created a very noticeable impact to our test suite's run-time.


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[PATCH] D105380: [clang] fixes named return of variables with dependent alignment

[Richard Smith - zygoloid via Phabricator via cfe-commits]

rsmith accepted this revision.
rsmith added inline comments.
This revision is now accepted and ready to land.



Comment at: clang/lib/Sema/SemaDecl.cpp:13314
 
-/// Determines if a variable's alignment is dependent.
-static bool hasDependentAlignment(VarDecl *VD) {
-  if (VD->getType()->isDependentType())
-return true;
-  for (auto *I : VD->specific_attrs())
-if (I->isAlignmentDependent())
-  return true;
-  return false;
+bool Sema::hasDependentAlignment(const VarDecl *VD) {
+  return VD->getType()->isDependentType() ||

It doesn't look like this has any particular relationship to Sema. Consider 
making this a member of `VarDecl` instead.


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[PATCH] D105447: [analyzer] Allow cmake options to be passed to satest container

[Manas Gupta via Phabricator via cfe-commits]

manas updated this revision to Diff 356574.
manas added a comment.

Restore global cmake command


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Files:
  clang/utils/analyzer/entrypoint.py


Index: clang/utils/analyzer/entrypoint.py
===
--- clang/utils/analyzer/entrypoint.py
+++ clang/utils/analyzer/entrypoint.py
@@ -9,10 +9,11 @@
 
 def main():
 settings, rest = parse_arguments()
+cmake_opts = list(filter(lambda cmd: cmd[:2]=='-D', rest))
 if settings.wait:
 wait()
 if settings.build_llvm or settings.build_llvm_only:
-build_llvm()
+build_llvm(cmake_opts)
 if settings.build_llvm_only:
 return
 sys.exit(test(rest))
@@ -33,11 +34,11 @@
 return parser.parse_known_args()
 
 
-def build_llvm():
+def build_llvm(cmake_options):
 os.chdir('/build')
 try:
 if is_cmake_needed():
-cmake()
+cmake(cmake_options)
 ninja()
 except CalledProcessError:
 print("Build failed!")
@@ -55,8 +56,9 @@
 "-DCLANG_ENABLE_STATIC_ANALYZER=ON"
 
 
-def cmake():
-check_call(CMAKE_COMMAND + ' /llvm-project/llvm', shell=True)
+def cmake(cmake_options):
+check_call(CMAKE_COMMAND + ' '.join(cmake_options) + ' /llvm-project/llvm',
+shell=True)
 
 
 def ninja():


Index: clang/utils/analyzer/entrypoint.py
===
--- clang/utils/analyzer/entrypoint.py
+++ clang/utils/analyzer/entrypoint.py
@@ -9,10 +9,11 @@
 
 def main():
 settings, rest = parse_arguments()
+cmake_opts = list(filter(lambda cmd: cmd[:2]=='-D', rest))
 if settings.wait:
 wait()
 if settings.build_llvm or settings.build_llvm_only:
-build_llvm()
+build_llvm(cmake_opts)
 if settings.build_llvm_only:
 return
 sys.exit(test(rest))
@@ -33,11 +34,11 @@
 return parser.parse_known_args()
 
 
-def build_llvm():
+def build_llvm(cmake_options):
 os.chdir('/build')
 try:
 if is_cmake_needed():
-cmake()
+cmake(cmake_options)
 ninja()
 except CalledProcessError:
 print("Build failed!")
@@ -55,8 +56,9 @@
 "-DCLANG_ENABLE_STATIC_ANALYZER=ON"
 
 
-def cmake():
-check_call(CMAKE_COMMAND + ' /llvm-project/llvm', shell=True)
+def cmake(cmake_options):
+check_call(CMAKE_COMMAND + ' '.join(cmake_options) + ' /llvm-project/llvm',
+shell=True)
 
 
 def ninja():
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[PATCH] D105447: [analyzer] Allow cmake options to be passed to satest container

[Manas Gupta via Phabricator via cfe-commits]

manas added a comment.

In D105447#2858740 , @manas wrote:

> Restore global cmake command

Apparently, my initial observation of `LLVM_BUILD_RUNTIME=OFF` hogging up 
memory was false and I also didn't know what was the default value for this 
option. Hence, I have restored the global cmake command to its previous state.


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[PATCH] D105447: [analyzer] Allow cmake options to be passed to satest container

[Manas Gupta via Phabricator via cfe-commits]

manas updated this revision to Diff 356575.
manas edited the summary of this revision.
manas added a comment.

Edit summary


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Files:
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Index: clang/utils/analyzer/entrypoint.py
===
--- clang/utils/analyzer/entrypoint.py
+++ clang/utils/analyzer/entrypoint.py
@@ -9,10 +9,11 @@
 
 def main():
 settings, rest = parse_arguments()
+cmake_opts = list(filter(lambda cmd: cmd[:2]=='-D', rest))
 if settings.wait:
 wait()
 if settings.build_llvm or settings.build_llvm_only:
-build_llvm()
+build_llvm(cmake_opts)
 if settings.build_llvm_only:
 return
 sys.exit(test(rest))
@@ -33,11 +34,11 @@
 return parser.parse_known_args()
 
 
-def build_llvm():
+def build_llvm(cmake_options):
 os.chdir('/build')
 try:
 if is_cmake_needed():
-cmake()
+cmake(cmake_options)
 ninja()
 except CalledProcessError:
 print("Build failed!")
@@ -55,8 +56,9 @@
 "-DCLANG_ENABLE_STATIC_ANALYZER=ON"
 
 
-def cmake():
-check_call(CMAKE_COMMAND + ' /llvm-project/llvm', shell=True)
+def cmake(cmake_options):
+check_call(CMAKE_COMMAND + ' '.join(cmake_options) + ' /llvm-project/llvm',
+shell=True)
 
 
 def ninja():


Index: clang/utils/analyzer/entrypoint.py
===
--- clang/utils/analyzer/entrypoint.py
+++ clang/utils/analyzer/entrypoint.py
@@ -9,10 +9,11 @@
 
 def main():
 settings, rest = parse_arguments()
+cmake_opts = list(filter(lambda cmd: cmd[:2]=='-D', rest))
 if settings.wait:
 wait()
 if settings.build_llvm or settings.build_llvm_only:
-build_llvm()
+build_llvm(cmake_opts)
 if settings.build_llvm_only:
 return
 sys.exit(test(rest))
@@ -33,11 +34,11 @@
 return parser.parse_known_args()
 
 
-def build_llvm():
+def build_llvm(cmake_options):
 os.chdir('/build')
 try:
 if is_cmake_needed():
-cmake()
+cmake(cmake_options)
 ninja()
 except CalledProcessError:
 print("Build failed!")
@@ -55,8 +56,9 @@
 "-DCLANG_ENABLE_STATIC_ANALYZER=ON"
 
 
-def cmake():
-check_call(CMAKE_COMMAND + ' /llvm-project/llvm', shell=True)
+def cmake(cmake_options):
+check_call(CMAKE_COMMAND + ' '.join(cmake_options) + ' /llvm-project/llvm',
+shell=True)
 
 
 def ninja():
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[PATCH] D105380: [clang] fixes named return of variables with dependent alignment

[Matheus Izvekov via Phabricator via cfe-commits]

mizvekov updated this revision to Diff 356576.
mizvekov added a comment.

- Move it to VarDecl.


Repository:
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Files:
  clang/include/clang/AST/Decl.h
  clang/lib/AST/Decl.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/lib/Sema/SemaStmt.cpp
  clang/test/CodeGen/nrvo-tracking.cpp

Index: clang/test/CodeGen/nrvo-tracking.cpp
===
--- clang/test/CodeGen/nrvo-tracking.cpp
+++ clang/test/CodeGen/nrvo-tracking.cpp
@@ -1,9 +1,9 @@
 // RUN: %clang_cc1 -std=c++20 -fblocks -Wno-return-stack-address -triple x86_64-unknown-unknown-gnu -emit-llvm -O1 -fexperimental-new-pass-manager -o - %s | FileCheck %s
 
-struct X {
-X();
-X(const X&);
-X(X&&);
+struct alignas(4) X {
+  X();
+  X(const X &);
+  X(X &&);
 };
 
 #define L(A, B, C) void l##A() {\
@@ -210,3 +210,75 @@
 };
   }()();
 }
+
+namespace test_alignas {
+
+template  X t1() {
+  X a [[gnu::aligned(A)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi4EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<4>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi8EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+template X t1<8>();
+
+template  X t2() {
+  X a [[gnu::aligned(1)]] [[gnu::aligned(A)]] [[gnu::aligned(2)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t2<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi4EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t2<4>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi8EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+template X t2<8>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t3Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+X t3() {
+  X a [[gnu::aligned(1)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t4Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+X t4() {
+  X a [[gnu::aligned(8)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t5Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+X t5() {
+  X a [[gnu::aligned(1)]] [[gnu::aligned(8)]];
+  return a;
+}
+
+} // namespace test_alignas
Index: clang/lib/Sema/SemaStmt.cpp
===
--- clang/lib/Sema/SemaStmt.cpp
+++ clang/lib/Sema/SemaStmt.cpp
@@ -3395,7 +3395,7 @@
 
   // Variables with higher required alignment than their type's ABI
   // alignment cannot use NRVO.
-  if (!VDType->isDependentType() && VD->hasAttr() &&
+  if (!VD->hasDependentAlignment() &&
   Context.getDeclAlign(VD) > Context.getTypeAlignInChars(VDType))
 Info.S = NamedReturnInfo::MoveEligible;
 
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -13310,16 +13310,6 @@
 CheckCompleteDecompositionDeclaration(DD);
 }
 
-/// Determines if a variable's alignment is dependent.
-static bool hasDependentAlignment(VarDecl *VD) {
-  if (VD->getType()->isDependentType())
-return true;
-  for (auto *I : VD->specific_attrs())
-if (I->isAlignmentDependent())
-  return true;
-  return false;
-}
-
 /// Check if VD needs to be dllexport/dllimport due to being in a
 /// dllexport/import function.
 void Sema::CheckStaticLocalForDllExport(VarDecl *VD) {
@@ -13408,7 +13398,7 @@
   if (unsigned MaxAlign = Context.getTargetInfo().getMaxTLSAlign()) {
 // Protect the check so that it's not performed on dependent types and
 // dependent alignments (we can't determine the alignment in that case).
-if (VD->getTLSKind() && !hasDependentAlignment(VD) &&
+if (VD->getTLSKind() && !VD->hasDependentAlignment() &&
 !VD->isInvalidDecl()) {
   CharUnits MaxAlignChars = Context.toCharUnitsFromBits(MaxAlign);
   if (Context.getDeclAlign(VD) > MaxAlignChars) {
Index: clang/lib/AST/Decl.cpp
===
--- clang/lib/AST/Decl.cpp
+++ clang/lib/AST/Decl.cpp
@@ -2534,6 +2534,13 @@
   return hasAttr() && !NonParmVarDeclBits.EscapingByref;
 }
 
+bool VarDecl::hasDependentAlignment() const {
+  return getType()->isDependentTy

[clang] e2904c8 - [clang] unbreak Index/preamble-reparse-changed-module.m with LLVM_APPEND_VC_REV=NO after 9964b0e

[Steven Wan via cfe-commits]

Author: Steven Wan
Date: 2021-07-05T19:51:00-04:00
New Revision: e2904c8e0fa901adeefe579297cb2ece2757fb18

URL: 
https://github.com/llvm/llvm-project/commit/e2904c8e0fa901adeefe579297cb2ece2757fb18
DIFF: 
https://github.com/llvm/llvm-project/commit/e2904c8e0fa901adeefe579297cb2ece2757fb18.diff

LOG: [clang] unbreak Index/preamble-reparse-changed-module.m with 
LLVM_APPEND_VC_REV=NO after 9964b0e

See revision b8b7a9d for prior art.

Added: 


Modified: 
clang/include/clang/Serialization/ASTBitCodes.h

Removed: 




diff  --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 8edf43da84b90..ca8ffc746612d 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -41,7 +41,7 @@ namespace serialization {
 /// Version 4 of AST files also requires that the version control branch and
 /// revision match exactly, since there is no backward compatibility of
 /// AST files at this time.
-const unsigned VERSION_MAJOR = 14;
+const unsigned VERSION_MAJOR = 15;
 
 /// AST file minor version number supported by this version of
 /// Clang.



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[PATCH] D105112: [clang] Add -fdump-record-layouts-canonical option

[Steven Wan via Phabricator via cfe-commits]

stevewan added a comment.

In D105112#2858702 , @thakis wrote:

> Hi, you have to bump clang/include/clang/Serialization/ASTBitCodes.h's 
> VERSION_MAJOR after adding a LangOption, else builds with 
> LLVM_APPEND_VC_REV=NO won't invalidate their module cache correctly. See e.g. 
> https://reviews.llvm.org/rGb8b7a9dcdcbc Without that, tests are broken on 
> bots with  LLVM_APPEND_VC_REV=NO , eg 
> http://45.33.8.238/linux/50460/step_7.txt

Posted fix rGe2904c8e0fa901adeefe579297cb2ece2757fb18 
. Sorry 
for the churn.


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[PATCH] D105112: [clang] Add -fdump-record-layouts-canonical option

[Nico Weber via Phabricator via cfe-commits]

thakis added a comment.

Thanks for the fix :)


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[clang] 2110638 - [clang] fixes named return of variables with dependent alignment

[Matheus Izvekov via cfe-commits]

Author: Matheus Izvekov
Date: 2021-07-06T02:30:44+02:00
New Revision: 21106388eb96c87b3f580c42a322c76a61605261

URL: 
https://github.com/llvm/llvm-project/commit/21106388eb96c87b3f580c42a322c76a61605261
DIFF: 
https://github.com/llvm/llvm-project/commit/21106388eb96c87b3f580c42a322c76a61605261.diff

LOG: [clang] fixes named return of variables with dependent alignment

Named return of a variable with aligned attribute would
trip an assert in case alignment was dependent.

Signed-off-by: Matheus Izvekov 

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D105380

Added: 


Modified: 
clang/include/clang/AST/Decl.h
clang/lib/AST/Decl.cpp
clang/lib/Sema/SemaDecl.cpp
clang/lib/Sema/SemaStmt.cpp
clang/test/CodeGen/nrvo-tracking.cpp

Removed: 




diff  --git a/clang/include/clang/AST/Decl.h b/clang/include/clang/AST/Decl.h
index 020df62755706..d22594ae8442a 100644
--- a/clang/include/clang/AST/Decl.h
+++ b/clang/include/clang/AST/Decl.h
@@ -1494,6 +1494,9 @@ class VarDecl : public DeclaratorDecl, public 
Redeclarable {
 NonParmVarDeclBits.EscapingByref = true;
   }
 
+  /// Determines if this variable's alignment is dependent.
+  bool hasDependentAlignment() const;
+
   /// Retrieve the variable declaration from which this variable could
   /// be instantiated, if it is an instantiation (rather than a non-template).
   VarDecl *getTemplateInstantiationPattern() const;

diff  --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index 5047dc19b0c6f..a92d3726e8474 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -2534,6 +2534,13 @@ bool VarDecl::isNonEscapingByref() const {
   return hasAttr() && !NonParmVarDeclBits.EscapingByref;
 }
 
+bool VarDecl::hasDependentAlignment() const {
+  return getType()->isDependentType() ||
+ llvm::any_of(specific_attrs(), [](const AlignedAttr *AA) 
{
+   return AA->isAlignmentDependent();
+ });
+}
+
 VarDecl *VarDecl::getTemplateInstantiationPattern() const {
   const VarDecl *VD = this;
 

diff  --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp
index 0075464552321..9e1f42a15e556 100644
--- a/clang/lib/Sema/SemaDecl.cpp
+++ b/clang/lib/Sema/SemaDecl.cpp
@@ -13310,16 +13310,6 @@ void Sema::CheckCompleteVariableDeclaration(VarDecl 
*var) {
 CheckCompleteDecompositionDeclaration(DD);
 }
 
-/// Determines if a variable's alignment is dependent.
-static bool hasDependentAlignment(VarDecl *VD) {
-  if (VD->getType()->isDependentType())
-return true;
-  for (auto *I : VD->specific_attrs())
-if (I->isAlignmentDependent())
-  return true;
-  return false;
-}
-
 /// Check if VD needs to be dllexport/dllimport due to being in a
 /// dllexport/import function.
 void Sema::CheckStaticLocalForDllExport(VarDecl *VD) {
@@ -13408,7 +13398,7 @@ void Sema::FinalizeDeclaration(Decl *ThisDecl) {
   if (unsigned MaxAlign = Context.getTargetInfo().getMaxTLSAlign()) {
 // Protect the check so that it's not performed on dependent types and
 // dependent alignments (we can't determine the alignment in that case).
-if (VD->getTLSKind() && !hasDependentAlignment(VD) &&
+if (VD->getTLSKind() && !VD->hasDependentAlignment() &&
 !VD->isInvalidDecl()) {
   CharUnits MaxAlignChars = Context.toCharUnitsFromBits(MaxAlign);
   if (Context.getDeclAlign(VD) > MaxAlignChars) {

diff  --git a/clang/lib/Sema/SemaStmt.cpp b/clang/lib/Sema/SemaStmt.cpp
index 1e86f382f060b..506c06b412b6f 100644
--- a/clang/lib/Sema/SemaStmt.cpp
+++ b/clang/lib/Sema/SemaStmt.cpp
@@ -3395,7 +3395,7 @@ Sema::NamedReturnInfo Sema::getNamedReturnInfo(const 
VarDecl *VD) {
 
   // Variables with higher required alignment than their type's ABI
   // alignment cannot use NRVO.
-  if (!VDType->isDependentType() && VD->hasAttr() &&
+  if (!VD->hasDependentAlignment() &&
   Context.getDeclAlign(VD) > Context.getTypeAlignInChars(VDType))
 Info.S = NamedReturnInfo::MoveEligible;
 

diff  --git a/clang/test/CodeGen/nrvo-tracking.cpp 
b/clang/test/CodeGen/nrvo-tracking.cpp
index 7893140e1010a..2d6eb9efeca20 100644
--- a/clang/test/CodeGen/nrvo-tracking.cpp
+++ b/clang/test/CodeGen/nrvo-tracking.cpp
@@ -1,9 +1,9 @@
 // RUN: %clang_cc1 -std=c++20 -fblocks -Wno-return-stack-address -triple 
x86_64-unknown-unknown-gnu -emit-llvm -O1 -fexperimental-new-pass-manager -o - 
%s | FileCheck %s
 
-struct X {
-X();
-X(const X&);
-X(X&&);
+struct alignas(4) X {
+  X();
+  X(const X &);
+  X(X &&);
 };
 
 #define L(A, B, C) void l##A() {\
@@ -210,3 +210,75 @@ void b_attr() {
 };
   }()();
 }
+
+namespace test_alignas {
+
+template  X t1() {
+  X a [[gnu::aligned(A)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi4EEE1Xv

[PATCH] D105380: [clang] fixes named return of variables with dependent alignment

[Matheus Izvekov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG21106388eb96: [clang] fixes named return of variables with 
dependent alignment (authored by mizvekov).

Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105380/new/

https://reviews.llvm.org/D105380

Files:
  clang/include/clang/AST/Decl.h
  clang/lib/AST/Decl.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/lib/Sema/SemaStmt.cpp
  clang/test/CodeGen/nrvo-tracking.cpp

Index: clang/test/CodeGen/nrvo-tracking.cpp
===
--- clang/test/CodeGen/nrvo-tracking.cpp
+++ clang/test/CodeGen/nrvo-tracking.cpp
@@ -1,9 +1,9 @@
 // RUN: %clang_cc1 -std=c++20 -fblocks -Wno-return-stack-address -triple x86_64-unknown-unknown-gnu -emit-llvm -O1 -fexperimental-new-pass-manager -o - %s | FileCheck %s
 
-struct X {
-X();
-X(const X&);
-X(X&&);
+struct alignas(4) X {
+  X();
+  X(const X &);
+  X(X &&);
 };
 
 #define L(A, B, C) void l##A() {\
@@ -210,3 +210,75 @@
 };
   }()();
 }
+
+namespace test_alignas {
+
+template  X t1() {
+  X a [[gnu::aligned(A)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi4EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t1<4>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t1ILi8EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+template X t1<8>();
+
+template  X t2() {
+  X a [[gnu::aligned(1)]] [[gnu::aligned(A)]] [[gnu::aligned(2)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi1EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t2<1>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi4EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+template X t2<4>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t2ILi8EEE1Xv
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+template X t2<8>();
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t3Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  ret void
+X t3() {
+  X a [[gnu::aligned(1)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t4Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+X t4() {
+  X a [[gnu::aligned(8)]];
+  return a;
+}
+
+// CHECK-LABEL: define{{.*}} void @_ZN12test_alignas2t5Ev
+// CHECK:   call {{.*}} @_ZN1XC1Ev
+// CHECK-NEXT:  call {{.*}} @_ZN1XC1EOS_
+// CHECK-NEXT:  call void @llvm.lifetime.end
+X t5() {
+  X a [[gnu::aligned(1)]] [[gnu::aligned(8)]];
+  return a;
+}
+
+} // namespace test_alignas
Index: clang/lib/Sema/SemaStmt.cpp
===
--- clang/lib/Sema/SemaStmt.cpp
+++ clang/lib/Sema/SemaStmt.cpp
@@ -3395,7 +3395,7 @@
 
   // Variables with higher required alignment than their type's ABI
   // alignment cannot use NRVO.
-  if (!VDType->isDependentType() && VD->hasAttr() &&
+  if (!VD->hasDependentAlignment() &&
   Context.getDeclAlign(VD) > Context.getTypeAlignInChars(VDType))
 Info.S = NamedReturnInfo::MoveEligible;
 
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -13310,16 +13310,6 @@
 CheckCompleteDecompositionDeclaration(DD);
 }
 
-/// Determines if a variable's alignment is dependent.
-static bool hasDependentAlignment(VarDecl *VD) {
-  if (VD->getType()->isDependentType())
-return true;
-  for (auto *I : VD->specific_attrs())
-if (I->isAlignmentDependent())
-  return true;
-  return false;
-}
-
 /// Check if VD needs to be dllexport/dllimport due to being in a
 /// dllexport/import function.
 void Sema::CheckStaticLocalForDllExport(VarDecl *VD) {
@@ -13408,7 +13398,7 @@
   if (unsigned MaxAlign = Context.getTargetInfo().getMaxTLSAlign()) {
 // Protect the check so that it's not performed on dependent types and
 // dependent alignments (we can't determine the alignment in that case).
-if (VD->getTLSKind() && !hasDependentAlignment(VD) &&
+if (VD->getTLSKind() && !VD->hasDependentAlignment() &&
 !VD->isInvalidDecl()) {
   CharUnits MaxAlignChars = Context.toCharUnitsFromBits(MaxAlign);
   if (Context.getDeclAlign(VD) > MaxAlignChars) {
Index: clang/lib/AST/Decl.cpp
===
--- clang/lib/AST/Decl.cpp
+++ clang/lib/AST/Decl.cpp
@@ -2534,6 +2534,13 @@
   return hasAttr() && !NonParmVarDeclBits.E

[PATCH] D105236: [PowerPC] Implement Load and Reserve and Store Conditional Builtins

[Stefan Pintilie via Phabricator via cfe-commits]

stefanp accepted this revision.
stefanp added a comment.

Thank you!
LGTM.


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[PATCH] D105236: [PowerPC] Implement Load and Reserve and Store Conditional Builtins

[Kai Luo via Phabricator via cfe-commits]

lkail accepted this revision.
lkail added a comment.

lgtm,thanks.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D105236

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