[Bug ld/13621] dangling global hidden symbol in symtab

2012-01-27 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=13621

Richard Henderson  changed:

   What|Removed |Added

 CC||rth at gcc dot gnu.org

--- Comment #3 from Richard Henderson  2012-01-27 
20:39:23 UTC ---
__TMC_END__ isn't placed in the .bss section.  You'd have seen that
in the object file.  Of course that doesn't happen because there is
a section attribute.

There is something odd happening though.  The .tm_clone_table section
is zero sized (which makes sense for all programs that don't use TM).
The section is layed out in the map file:

.tm_clone_table
0x006008a00x0
 .tm_clone_table
0x006008a00x0 z.o

but the section is not present in the output (presumably due to the
size being zero?).  But the two symbols that were in the section get
arbitrarily moved to .data:

  [24] .data PROGBITS 00600898  0898
   0004    WA   0 0 4
...
69: 006008a0 0 OBJECT  GLOBAL HIDDEN24 __TMC_LIST__
70: 006008a0 0 OBJECT  GLOBAL HIDDEN24 __TMC_END__

(I adjusted the test case so that the start symbol was also global,
so that I could see it in all the output files.)

My current guess is that there's some "unused section" pruning code
that's triggering to remove the section.  My guess is that it should
avoid doing that if there are symbols present in the section.

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[Bug ld/13621] dangling global hidden symbol in symtab

2012-01-27 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=13621

Richard Henderson  changed:

   What|Removed |Added

 CC|rth at redhat dot com   |

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[Bug ld/13621] dangling global hidden symbol in symtab

2012-01-27 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=13621

--- Comment #4 from Richard Henderson  2012-01-27 
21:07:21 UTC ---
FYI, gold gets this correct:

  [25] .tm_clone_table   PROGBITS 004018c8  08c8
       WA   0 0 8
...
18: 004018c8 0 OBJECT  LOCAL  HIDDEN25 __TMC_LIST__
19: 004018c8 0 OBJECT  LOCAL  HIDDEN25 __TMC_END__

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[Bug ld/13621] dangling global hidden symbol in symtab

2012-01-29 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=13621

Richard Henderson  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
 AssignedTo|unassigned at sourceware|rth at gcc dot gnu.org
   |dot org |

--- Comment #6 from Richard Henderson  2012-01-30 
00:58:32 UTC ---
Proposed patch:

http://sourceware.org/ml/binutils/2012-01/msg00269.html

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[Bug ld/13621] dangling global hidden symbol in symtab

2012-02-13 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=13621

Richard Henderson  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED

--- Comment #8 from Richard Henderson  2012-02-13 
18:12:27 UTC ---
Fixed.

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[Bug gas/14445] New: Missing risbgz alternative mnemonic

2012-08-08 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=14445

 Bug #: 14445
   Summary: Missing risbgz alternative mnemonic
   Product: binutils
   Version: unspecified
Status: NEW
  Severity: enhancement
  Priority: P2
 Component: gas
AssignedTo: unassig...@sourceware.org
ReportedBy: r...@gcc.gnu.org
Classification: Unclassified


The PoO sez:

The high-level assembler (HLASM) provides an
alternative mnemonic for the zero-remaining-bits
version of the instruction, as shown below:
 RISBGZ R5,R7,40,43,0
The "Z" suffix to the mnemonic indicates that the
specified I4 field is ORed with a value of X'80'
when generating the object code.

and similar for R[NXO]SBGT.

It would be Very Nice to have those in gas+objdump as well.

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[Bug gas/14445] Missing risbgz alternative mnemonic

2012-08-08 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=14445

Richard Henderson  changed:

   What|Removed |Added

 Target||s390*-*

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[Bug gas/15138] New: thumb2 ldr insn incorrectly rejected

2013-02-12 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=15138

 Bug #: 15138
   Summary: thumb2 ldr insn incorrectly rejected
   Product: binutils
   Version: unspecified
Status: NEW
  Severity: normal
  Priority: P2
 Component: gas
AssignedTo: unassig...@sourceware.org
ReportedBy: r...@gcc.gnu.org
Classification: Unclassified


.thumb
.arch armv6t2
ldrr2, [lr, r2]
.inst0b110000100010

The insn on line 3 can be encoded using form T2,
as shown by the bit pattern on line 3.  However,
it is rejected with

z.s:3: Error: lo register required -- `ldr r2,[lr,r2]'

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[Bug gas/15138] thumb2 ldr insn incorrectly rejected

2013-02-12 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=15138

Richard Henderson  changed:

   What|Removed |Added

 Target||arm-linux-gnueabi
Version|unspecified |2.24 (HEAD)

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[Bug gas/15138] thumb2 ldr insn incorrectly rejected

2013-02-13 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=15138

Richard Henderson  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||INVALID

--- Comment #1 from Richard Henderson  2013-02-13 
18:10:33 UTC ---
Blah, user error: a failure to use ".syntax unified".

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[Bug ld/5276] linking fails with large C++ projects with -Wl,--relax

2013-07-17 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=5276

Richard Henderson  changed:

   What|Removed |Added

 CC||rth at gcc dot gnu.org

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[Bug ld/5276] linking fails with large C++ projects with -Wl,--relax

2014-05-28 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=5276

Richard Henderson  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
Version|2.21|2.25 (HEAD)
 Resolution|--- |FIXED

--- Comment #11 from Richard Henderson  ---
Should be fixed on mainline as of d1c109de72f880ea2a761fccb41f330672674fd9

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[Bug ld/17166] New: Incorrect processing of GOT relocations against local symbols

2014-07-16 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=17166

Bug ID: 17166
   Summary: Incorrect processing of GOT relocations against local
symbols
   Product: binutils
   Version: unspecified
Status: NEW
  Severity: normal
  Priority: P2
 Component: ld
  Assignee: unassigned at sourceware dot org
  Reporter: rth at gcc dot gnu.org

Original report is 
https://sourceware.org/ml/binutils/2014-07/msg00130.html

One can observe the problem with

$ cat ~/z.s
.text
.globalmain
.typemain, %function
main:
adrpx2, :got:foo
ldrx1, [x2, :got_lo12:foo]
ldrw0, [x1]
ret

.data
.align8
.long0
foo:.long0

which will segfault with the current linker.
If one adds ".global foo", the test case will succeed.

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[Bug ld/17166] Incorrect processing of GOT relocations against local symbols

2014-07-16 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=17166

Richard Henderson  changed:

   What|Removed |Added

 Target||aarch64-elf
   Assignee|unassigned at sourceware dot org   |rth at gcc dot gnu.org

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[Bug ld/17166] Incorrect processing of GOT relocations against local symbols

2014-07-16 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=17166

Richard Henderson  changed:

   What|Removed |Added

 CC||david.abdurachmanov at gmail 
dot c
   ||om

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[Bug binutils/22740] New: sparc linker does not honor --no-relax

2018-01-23 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22740

Bug ID: 22740
   Summary: sparc linker does not honor --no-relax
   Product: binutils
   Version: 2.29
Status: NEW
  Severity: normal
  Priority: P2
 Component: binutils
  Assignee: unassigned at sourceware dot org
  Reporter: rth at gcc dot gnu.org
  Target Milestone: ---

In bfd/elfxx-sparc.c, there are several code sequences that are
adjusted by various relocations.  None of them should occur when
we tell the linker not to change them.

In particular, R_SPARC_TLS_IE_LD{,X} should not optimize instructions
to NOP.  There is a current gcc bug with respect to emitting this
relocation; it would have been handy to work around the bug by turning
off the linker optimization.

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[Bug binutils/22740] sparc linker does not honor --no-relax

2018-01-23 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22740

Richard Henderson  changed:

   What|Removed |Added

 Target||sparc-elf, sparc64-elf
 CC||peter.maydell at linaro dot org

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[Bug gas/22988] New: aarch64 sve invalid addressing mode

2018-03-20 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22988

Bug ID: 22988
   Summary: aarch64 sve invalid addressing mode
   Product: binutils
   Version: 2.29
Status: NEW
  Severity: normal
  Priority: P2
 Component: gas
  Assignee: unassigned at sourceware dot org
  Reporter: rth at gcc dot gnu.org
  Target Milestone: ---

.arch   armv8-a+sve
ldff1b  z0.b, p1/z, [x0]

z.s: Assembler messages:
z.s:2: Error: invalid addressing mode at operand 3 -- `ldff1b z0.b,p1/z,[x0]'

According to the ARM ARM, this is supposed to be encoded as [x0, xzr].

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[Bug gas/22988] aarch64 sve invalid addressing mode

2018-03-20 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22988

Richard Henderson  changed:

   What|Removed |Added

 Target||aarch64

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[Bug gas/22988] aarch64 sve invalid addressing mode

2018-03-21 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=22988

--- Comment #2 from Richard Henderson  ---
Note that SVE is not itegrated into the main ARM ARM yet.  See

https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a

from which you can get a zip file, which contains html.
Then, within DDI0584A_d_SVE/SVE_xml/xhtml/ldff1b_z_p_br.html,
is the quote

Is the optional 64-bit name of the general-purpose offset
register, defaulting to XZR, encoded in the "Rm" field.

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[Bug gas/24258] New: v8.5 extension "frintts" missing as a separate feature

2019-02-22 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24258

Bug ID: 24258
   Summary: v8.5 extension "frintts" missing as a separate feature
   Product: binutils
   Version: 2.33 (HEAD)
Status: NEW
  Severity: normal
  Priority: P2
 Component: gas
  Assignee: unassigned at sourceware dot org
  Reporter: rth at gcc dot gnu.org
  Target Milestone: ---

The frintts feature was added with

2018-10-09  Sudakshina Das  

* opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
(AARCH64_FEATURE_FRINTTS): New.
(AARCH64_ARCH_V8_5): Add both by default.

and the instructions added the same day.  However the
feature was not added to 

static const struct aarch64_option_cpu_value_table aarch64_features[]

within gas/config/tc-aarch64.c.

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[Bug gas/24258] v8.5 extension "frintts" missing as a separate feature

2019-02-22 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24258

Richard Henderson  changed:

   What|Removed |Added

 Target||aarch64-*
 CC||sudi at gcc dot gnu.org

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[Bug gas/24279] New: ARMv8.5 extension incorrectly named "predres" instead of "predinv"

2019-02-27 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24279

Bug ID: 24279
   Summary: ARMv8.5 extension incorrectly named "predres" instead
of "predinv"
   Product: binutils
   Version: 2.33 (HEAD)
Status: NEW
  Severity: normal
  Priority: P2
 Component: gas
  Assignee: unassigned at sourceware dot org
          Reporter: rth at gcc dot gnu.org
  Target Milestone: ---

commit dad0c3bfb5e32ff3f2a03830dc189fe207c7ae00
Author: Sudakshina Das 
Date:   Fri Oct 5 10:51:22 2018 +0100

[Arm, 3/3] Add Execution and Data Prediction instructions for AArch32

This patch is part of the patch series to add support for ARMv8.5-A
extensions.

   
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/
exploration-tools)

This patch adds the Execution and Data Prediction Restriction
instructions (that is, cfprctx, dvprxtc, cpprctx). These are all
aliases to MCR and are disassembled as such.

This instruction is retrospectively made optional for all versions of
the architecture from ARMv8.0 to ARMv8.4 and is mandatory from
ARMv8.5.  Hence adding a new +predres for older versions of the
architecture.

-

The official name of the extension is v8.0-PredInv.
(You can see this used in the xml descriptions for the new insns, eg:
https://developer.arm.com/docs/ddi0595/b/aarch64-system-instructions/cfp-rctx )

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[Bug gas/24279] ARMv8.5 extension incorrectly named "predres" instead of "predinv"

2019-02-27 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24279

Richard Henderson  changed:

   What|Removed |Added

 Target||aarch64-*
 CC||sudi at gcc dot gnu.org

--- Comment #1 from Richard Henderson  ---
I can only presume that this has been renamed from "restriction"
to "invalidation" at some later version of the spec than when it
was implemented for binutils last October.

I received push-back on matching the "predres" naming within qemu,
and I think we should be consistent across the development environment
while this is still brand new.

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[Bug gas/24258] v8.5 extension "frintts" missing as a separate feature

2019-02-28 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24258

--- Comment #4 from Richard Henderson  ---
But we *do* make every other feature optional.
That is exactly my point -- frintts is the odd man out.

See aarch64_features[], where we currently list 24 of these.

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[Bug gas/24279] ARMv8.5 extension incorrectly named "predres" instead of "predinv"

2019-02-28 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24279

Richard Henderson  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |WONTFIX

--- Comment #3 from Richard Henderson  ---
Ah, well.  Too late, I suppose.

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[Bug gas/24258] v8.5 extension "frintts" missing as a separate feature

2019-02-28 Thread rth at gcc dot gnu.org
https://sourceware.org/bugzilla/show_bug.cgi?id=24258

--- Comment #6 from Richard Henderson  ---
All you've told me here so far is that there are more missing bits.

So, what, is ARM changing its collective mind about maintaining
aarch64_features?

If you're going to stop adding flags to .arch, what is the point of
having .arch at all?  You might as well go the way of x86 and just
accept all opcodes all of the time.  Save the programmer the hassle
of trying to work out what spelling turns on the insn within the assembler.

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[Bug gas/12610] gas calculates wrong difference between two labels

2011-03-29 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=12610

Richard Henderson  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
 CC||rth at gcc dot gnu.org
 AssignedTo|unassigned at sources dot   |rth at gcc dot gnu.org
   |redhat.com  |

--- Comment #4 from Richard Henderson  2011-03-29 
17:16:25 UTC ---
Confirmed.  The label is getting attached to the end of the alignment,
rather than the beginning.  Examine the following with and without the
fixme label:

.text
unop
unop
unop
unop
$LEHB25:
jsr$26,_Unwind_Resume
$LEHE25:
$fixme:
.align4
fnop

.data
.long$LEHE25 - $LEHB25

Somewhat amusingly, we get the correct answer *with* fixme present.

I have some vague rememberance that the old coff assembler had some
sort of auto-alignment feature, which got copied into the elf assembler.
I suspect this is what is causing the problem.

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[Bug gas/12610] gas calculates wrong difference between two labels

2011-03-29 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=12610

Richard Henderson  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED

--- Comment #6 from Richard Henderson  2011-03-29 
18:26:33 UTC ---
Fixed.  More commentary at

http://sourceware.org/ml/binutils/2011-03/msg00525.html

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[Bug gas/12915] mips64-linux-as aborts with assertion error building a Linux/MIPS kernel

2011-06-21 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=12915

Richard Henderson  changed:

   What|Removed |Added

   Attachment #5810|application/octet-stream|text/plain
  mime type||

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[Bug ld/12928] Wrong linker relaxation with DTPREL relocation on alpha

2011-06-24 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=12928

Richard Henderson  changed:

   What|Removed |Added

 CC||rth at gcc dot gnu.org
 AssignedTo|unassigned at sources dot   |rth at gcc dot gnu.org
   |redhat.com  |

--- Comment #3 from Richard Henderson  2011-06-24 
17:18:59 UTC ---
Confirmed.

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[Bug ld/12928] Wrong linker relaxation with DTPREL relocation on alpha

2011-06-24 Thread rth at gcc dot gnu.org
http://sourceware.org/bugzilla/show_bug.cgi?id=12928

Richard Henderson  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #5 from Richard Henderson  2011-06-24 
17:50:31 UTC ---
Fixed.

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