Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-02 Thread Kugan
I'd like to ping this patch 1 of 2 that removes redundant zero/sign extension using value range information. Bootstrapped and no new regression for x86_64-unknown-linux-gnu and arm-none-linux-gnueabi. Thanks you for your time. Kugan n 14/08/13 16:49, Kugan wrote: Hi Richard, Here

Re: [PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2013-09-02 Thread Kugan
I'd like to ping this patch 2 of 2 that removes redundant zero/sign extension using value range information. Bootstrapped and no new regression for x86_64-unknown-linux-gnu and arm-none-linux-gnueabi. Thanks you for your time. Kugan On 14/08/13 16:59, Kugan wrote: Hi Eric, Thank

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-03 Thread Kugan
Thanks Richard for reviewing. On 02/09/13 22:15, Richard Biener wrote: On Wed, Jul 3, 2013 at 2:25 PM, Kugan wrote: On 17/06/13 18:33, Richard Biener wrote: On Mon, 17 Jun 2013, Kugan wrote: +/* Extract the value range of assigned exprassion for GIMPLE_ASSIGN stmt. + If the extracted

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-08 Thread Kugan
On 06/09/13 16:16, Richard Biener wrote: On 9/3/13 2:15 PM, Kugan wrote: Thanks Richard for reviewing. On 02/09/13 22:15, Richard Biener wrote: On Wed, Jul 3, 2013 at 2:25 PM, Kugan wrote: On 17/06/13 18:33, Richard Biener wrote: On Mon, 17 Jun 2013, Kugan wrote: +/* Extract the value

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-09 Thread Kugan
On 09/09/13 19:01, Richard Biener wrote: On Mon, Sep 9, 2013 at 1:09 AM, Kugan wrote: On 06/09/13 16:16, Richard Biener wrote: On 9/3/13 2:15 PM, Kugan wrote: Thanks Richard for reviewing. On 02/09/13 22:15, Richard Biener wrote: On Wed, Jul 3, 2013 at 2:25 PM, Kugan wrote: On 17/06

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-10 Thread Kugan
On 10/09/13 22:47, Richard Biener wrote: On Tue, 10 Sep 2013, Kugan wrote: On 09/09/13 19:01, Richard Biener wrote: On Mon, Sep 9, 2013 at 1:09 AM, Kugan wrote: On 06/09/13 16:16, Richard Biener wrote: On 9/3/13 2:15 PM, Kugan wrote: Thanks Richard for reviewing. On 02/09/13 22:15

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-10 Thread Kugan
is bigger than max double_int, then it is [min,+infinity] merged with [-infinity,max] range (i.e. -[max+1,min-1])? Ok, I will change this too. Thanks, Kugan Micha just suggested union vrp_info_type { /* Pointer attributes used for alias analysis. */ struct GTY ((tag ("0&q

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-12 Thread Kugan
. Is this Ok, Thanks, Kugan +2013-09-12 Kugan Vivekanandarajah + + * cfgexpand.c (maybe_dump_rtl_for_gimple_stmt) : Add range to dump. + * gimple-pretty-print.c (print_double_int) : New function. + * gimple-pretty-print.c (dump_gimple_phi) : Dump range info

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-15 Thread Kugan
Hi, Updated the patch to the latest changes in trunk that splits tree.h. I also noticed an error in printing double_int and fixed it. Is this OK? Thanks, Kugan +2013-09-12 Kugan Vivekanandarajah + + * cfgexpand.c (maybe_dump_rtl_for_gimple_stmt) : Add range to dump

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-17 Thread Kugan
Thanks Richard for the review. On 16/09/13 23:43, Richard Biener wrote: On Mon, 16 Sep 2013, Kugan wrote: Hi, Updated the patch to the latest changes in trunk that splits tree.h. I also noticed an error in printing double_int and fixed it. Is this OK? print_gimple_stmt (dump_file

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-18 Thread Kugan
Thanks Richard for the review. On 18/09/13 18:55, Richard Biener wrote: On Wed, 18 Sep 2013, Kugan wrote: Thanks Richard for the review. On 16/09/13 23:43, Richard Biener wrote: On Mon, 16 Sep 2013, Kugan wrote: [Snip] +2013-09-17 Kugan Vivekanandarajah + + * gimple-pretty

Re: [ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL

2013-09-24 Thread Kugan
On 24/09/13 19:23, Richard Biener wrote: On Mon, Sep 23, 2013 at 10:34 PM, Eric Botcazou wrote: I have committed it for you (rev 202831), with a few modifications (ChangeLog formatting, typos). Here is what I have committed: 2013-09-23 Kugan Vivekanandarajah * gimple-pretty-print.c

[ARM, PR58578] Split shift di patterns

2013-10-01 Thread Kugan
Hi, I am attaching a patch that reverts Split shift di patterns (r197527) as it introduced PR58578. I am also attaching a patch to add a testcase based on this failiures. No regression on qemu for arm-none-eabi and new testcase now passes. Is this OK? Thanks, Kugan diff --git a/gcc/ChangeLog b

Re: [PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2013-10-08 Thread Kugan
Ping~ Thanks, Kugan +2013-09-25 Kugan Vivekanandarajah + + * dojump.c (do_compare_and_jump): Generate rtl without + zero/sign extension if redundant. + * cfgexpand.c (expand_gimple_stmt_1): Likewise. + * gimple.c (gimple_assign_is_zero_sign_ext_redundant) : New

[PING^2][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2013-10-15 Thread Kugan
Hi Eric, Can you please help to review this patch? http://gcc.gnu.org/ml/gcc-patches/2013-10/msg00452.html Thanks, Kugan > +2013-09-25 Kugan Vivekanandarajah > + > + * dojump.c (do_compare_and_jump): Generate rtl without > + zero/sign extension if redundant. > +

Re: [PING^2][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2013-10-15 Thread Kugan
Thanks Richard for the review. On 15/10/13 23:55, Richard Biener wrote: > On Tue, 15 Oct 2013, Kugan wrote: > >> Hi Eric, >> >> Can you please help to review this patch? >> http://gcc.gnu.org/ml/gcc-patches/2013-10/msg00452.html > > I think that gimple_assig

Re: [PING^2][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2013-10-22 Thread Kugan
The same applies to signed types if you do not want to rely > on signed overflow being undefined of course. > Thanks for the explanation. I now get it and I will rework the patch. Thanks, Kugan

[ARM][PATCH] Fix testsuite testcase neon-vcond-[ltgt,unordered].c

2013-10-23 Thread Kugan
K? Thanks, Kugan 2013-10-23 Kugan Vivekanandarajah * gcc.target/arm/neon-vcond-ltgt.c: Scan for vbsl or vbit or vbif. * gcc.target/arm/neon-vcond-unordered.c: Scan for vbsl or vbit or vbif. diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c b/gcc/testsuite/gcc.targe

Re: [ARM][PATCH] Fix testsuite testcase neon-vcond-[ltgt,unordered].c

2013-10-24 Thread Kugan
de=arm --with-arch=armv5te --with-float=soft You can also find the logs here in http://cbuild.validation.linaro.org/build/gcc-linaro-4.8-2013.10/logs/armv7l-precise-cbuild461-calxeda02_21_00_precise_armel-armv5r2/ I changed neon-vcond-gt.c too. Thanks, Kugan 2013-10-23 Kugan Vivekanandarajah

Re: [ARM][PATCH] Fix testsuite testcase neon-vcond-[ltgt,unordered].c

2013-10-28 Thread Kugan
On 25/10/13 19:04, Kyrill Tkachov wrote: > On 24/10/13 20:03, Kugan wrote: >> >> Hi Kyrill, >> >> It happens for armv5te arm-none-linux-gnueabi. --with-mode=arm >> --with-arch=armv5te --with-float=soft > > Ah ok, I can reproduce it now. So, while I agree th

Remove redundant unshare_expr from ipa-prop

2016-01-21 Thread Kugan
Hi, There is a redundant unshare_expr in ipa-prop. Attached patch removes it. Bootstrapped and regression tested on x86_64-pc-linux-gnu with no new regressions. Is this OK for trunk? Thanks, Kugan gcc/ChangeLog: 2016-01-22 Kugan Vivekanandarajah * ipa-prop.c (ipa_set_jf_constant

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

2016-01-25 Thread Kugan
This issue also remains in 4.9 and 5.0 branches. Is this OK to backport to the release branches. Thanks, Kugan On 02/12/15 10:00, Kugan wrote: > >>> >>> gcc/ChangeLog: >>> >>> 2015-11-18 Kugan Vivekanandarajah >>> &g

Re: [PR66726] Fixe regression caused by Factor conversion out of COND_EXPR

2016-02-11 Thread kugan
On 12/02/16 17:18, Markus Trippelsdorf wrote: On 2016.02.08 at 09:49 -0700, Jeff Law wrote: On 01/18/2016 08:52 PM, Kugan wrote: 2016-01-19 Kugan Vivekanandarajah PR middle-end/66726 * tree-ssa-reassoc.c (optimize_range_tests): Handle tcc_compare stmt whose

[RFC][PATCH][PR40921] Convert x + (-y * z * z) into x - y * z * z

2016-02-25 Thread kugan
Hi, This is an attempt to fix missed optimization: x + (-y * z * z) => x - y * z * z as reported in PR40921. Regression tested and bootstrapped on x86-64-linux-gnu with no new regressions. Is this OK for next stage1? Thanks, Kugan gcc/ChangeLog: 2016-02-26 Kugan Vivekanandara

[RFC][PATCH][PR63586] Convert x+x+x+x into 4*x

2016-02-25 Thread kugan
Hi, This is an attempt to fix missed optimization: x+x+x+x -> 4*x as reported in PR63586. Regression tested and bootstrapped on x86-64-linux-gnu with no new regressions. Is this OK for next stage1? Thanks, Kugan gcc/testsuite/ChangeLog: 2016-02-26 Kugan Vivekanandara

Re: [RFC][PATCH][PR63586] Convert x+x+x+x into 4*x

2016-02-28 Thread kugan
doing any modification to the ops vector. Hi Richard, Is the attached patch looks better? Thanks, Kugan diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr63586.c b/gcc/testsuite/gcc.dg/tree-ssa/pr63586.c index e69de29..a002bdd 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr63586.c +++ b/gcc/testsuite/gcc.d

Re: [RFC][PATCH][PR40921] Convert x + (-y * z * z) into x - y * z * z

2016-02-29 Thread kugan
the updated patch along what you suggested. Does this look better ? Thanks, Kugan diff --git a/gcc/tree-ssa-reassoc.c b/gcc/tree-ssa-reassoc.c index 17eb64f..bbb5ffb 100644 --- a/gcc/tree-ssa-reassoc.c +++ b/gcc/tree-ssa-reassoc.c @@ -4674,6 +4674,41 @@ attempt_builtin_powi (gimple *stmt, vec *ops

[RFC][PR69708] IPA inline not working for function reference in static const struc

2016-02-29 Thread kugan
added a check at determine_locally_known_aggregate_parts to detect this. This fixes the testcase and passes x86-64-linux-gnu lto bootstrap and regression testing with no new regression. Does this look sensible place to fix this? Thanks, Kugan gcc/ChangeLog: 2016-03-01 Kugan Vivekanandarajah

Re: [RFC][LIBGCC][2 of 2] 64 bit divide implementation for processor without hw divide instruction

2013-11-26 Thread Kugan
On 27/11/13 02:07, Richard Earnshaw wrote: > On 23/11/13 01:54, Kugan wrote: [snip] >> +2013-11-22 Kugan Vivekanandarajah >> + >> +* libgcc/config/arm/pbapi-lib.h (HAVE_NO_HW_DIVIDE): Define for > > It's bpabi-lib.h Thanks for the review. >> +

Re: [RFC][LIBGCC][2 of 2] 64 bit divide implementation for processor without hw divide instruction

2013-12-02 Thread Kugan
ping Thanks, Kugan On 27/11/13 15:30, Kugan wrote: > On 27/11/13 02:07, Richard Earnshaw wrote: >> On 23/11/13 01:54, Kugan wrote: > > [snip] > >>> +2013-11-22 Kugan Vivekanandarajah >>> + >>> + * libgcc/config/arm/pbapi-lib.h (HAVE_NO_

AARCH64 configure check for gas -mabi support

2013-12-04 Thread Kugan
and prompts upgradation. Is this Ok? Thanks, Kugan +2013-12-05 Kugan Vivekanandarajah + * configure.ac: Add checks for aarch64 assembler -mabi support. + * configure: Regenerate. + diff --git a/gcc/configure b/gcc/configure index fdf0cd0..17b6e85 100755 --- a/gcc/configure +++ b/gcc

Re: [PING^2][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2013-12-05 Thread Kugan
igned types if you do not want to rely >> on signed overflow being undefined of course. >> > > Thanks for the explanation. I now get it and I will rework the patch. > I have attempted to implement what Richard suggested. If you think this is what you want, I will go ahead and implemen

Re: AARCH64 configure check for gas -mabi support

2013-12-09 Thread Kugan
ption], >> + gcc_cv_as_aarch64_mabi,, >> + [-mabi=lp64], [.text],,,) >> +if test x$gcc_cv_as_aarch64_mabi = xno; then >> +AC_MSG_ERROR([Assembler support for -mabi=lp64 is required. >> Upgrade the Assembler.]) >> +fi >> +;; >> + &

Re: AARCH64 configure check for gas -mabi support

2013-12-09 Thread Kugan
ested gcc for -mabi=lp64 (compiles) and -mabi=ilp32 (compiles) b. Bootstrap with --with-multilibs-list=lp64,ilp32 works and tested gcc for -mabi=lp64 compiles and -mabi=ilp32 compiles(* gives linker error in my setup - aarch64:ilp32 architecture of input file `/tmp/ccIFqSxU.o'

Re: AARCH64 configure check for gas -mabi support

2013-12-10 Thread Kugan
ther areas of configure.ac, it seems using a similar indent convention > as in .c files. > Thanks Yufeng. I have updated the patch based on the comments above. Marcus, is this OK for trunk now? Thanks, Kugan gcc/ +2013-12-11 Kugan Vivekanandarajah + * configure.ac: Add che

Re: [PING^2][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2014-01-07 Thread Kugan
ping ? I have reorganised the last patch and now handling only VIEW_CONVERT_EXPR, CONVERT_EXPR and NOP_EXPR. Once it is reviewed and necessary changes are made, I will address the other cases as a separate patch (when it reaches that stage). Thanks, Kugan gcc/ +2014-01-07 Kugan

Re: [PING^2][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP

2014-01-07 Thread Kugan
On 07/01/14 23:23, Richard Biener wrote: > On Tue, 7 Jan 2014, Kugan wrote: [snip] > Note that VIEW_CONVERT_EXPR is wrong here. I think you are > handling this wrong still. From a quick look you want to avoid > the actual promotion for > > reg_1 = > > when re

[AARCH64][PATCH] PR59695

2014-01-11 Thread Kugan
. Tested on aarch64-none-linux-gnu with no new regressions. Is this OK for trunk? Thanks, Kugan gcc/ +2013-10-15 Matthew Gretton-Dann + Kugan Vivekanandarajah + + PR target/59588 + * config/aarch64/aarch64.c (aarch64_build_constant): Fix incorrect + truncation. + gcc

Re: [AARCH64][PATCH] PR59695

2014-01-15 Thread Kugan
On 13/01/14 21:05, Richard Earnshaw wrote: > On 11/01/14 23:42, Kugan wrote: >> Hi, >> >> aarch64_build_constant incorrectly truncates the immediate when >> constants are generated with MOVN. This causes coinor-osi tests to fail >> (tracked also in https://b

Re: [PR66726] Factor conversion out of COND_EXPR

2015-07-09 Thread Kugan
On 08/07/15 00:41, Jeff Law wrote: > On 07/07/2015 06:50 AM, Kugan wrote: >> >> Thanks for the review. I have addressed your comments above in the >> attached patch. >> >> I have one question with respect to unary operation. For generic unary >> operation

Re: [PR66726] Factor conversion out of COND_EXPR

2015-07-12 Thread Kugan
On 11/07/15 06:40, Jeff Law wrote: > On 07/09/2015 05:08 PM, Kugan wrote: > >> Done. Bootstrapped and regression tested on x86-64-none-linux-gnu with >> no new regressions. Is this OK for trunk? > Thanks for the additional testcases. > > > >> + else

Re: [PR66726] Factor conversion out of COND_EXPR

2015-07-15 Thread Kugan
present. Does this make sense? Thanks, Kugan gcc/ChangeLog: 2015-07-15 Kugan Vivekanandarajah PR middle-end/66726 * tree-ssa-reassoc.c (optimize_range_tests): Handle sinking the cast after PHI. (final_range_test_p): Detect sinking the cast after PHI

Re: [PR66726] Factor conversion out of COND_EXPR

2015-07-15 Thread Kugan
ce that issue is addressed, this will be good for the trunk. > Thanks for the review. How about: - if (!INTEGRAL_TYPE_P (TREE_TYPE (lhs)) - || TREE_CODE (rhs) != SSA_NAME - || TREE_CODE (TREE_TYPE (rhs)) != BOOLEAN_TYPE) + if (gimple_assign_cast_p (stmt) + && (!INTEGRA

Re: [PATCH 2/2] Set REG_EQUAL

2015-07-17 Thread Kugan
Ping? On 28/06/15 21:30, Kugan wrote: > This patch sets REG_EQUAL when emitting arm_emit_movpair. > > Thanks, > Kugan > > gcc/testsuite/ChangeLog: > > 2015-06-26 Kugan Vivekanandarajah > > * gcc.target/arm/reg_equal_test.c: New test. > > gcc. >

Re: [PATCH 1/2] Allow REG_EQUAL for ZERO_EXTRACT

2015-07-19 Thread Kugan
x27;s scripts with no new regression. (http://people.linaro.org/~christophe.lyon/cross-validation/gcc-test-patches/225987-reg4/report-build-info.html) Is this OK for trunk, Thanks, Kugan gcc/ChangeLog: 2015-07-20 Kugan Vivekanandarajah * cse.c (cse_insn): Fix missing chec

Re: [PATCH 1/2] Allow REG_EQUAL for ZERO_EXTRACT

2015-07-26 Thread Kugan
On 27/07/15 05:38, Andreas Schwab wrote: > Kugan writes: > >> * cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor >> clean up. > > This breaks > > gcc.target/m68k/tls-ie-xgot.c scan-assembler jsr __m68k_read_tp > gcc.target

Re: [PR66726] Factor conversion out of COND_EXPR

2015-07-26 Thread Kugan
On 24/07/15 05:05, Jeff Law wrote: > On 07/15/2015 11:52 PM, Kugan wrote: >> >>>> >>>> diff --git a/gcc/tree-ssa-reassoc.c b/gcc/tree-ssa-reassoc.c >>>> index 932c83a..3058eb5 100644 >>>> --- a/gcc/tree-ssa-reassoc.c >>>> ++

Re: [PATCH 1/2] Allow REG_EQUAL for ZERO_EXTRACT

2015-07-28 Thread Kugan
On 27/07/15 05:38, Andreas Schwab wrote: > Kugan writes: > >> * cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor >> clean up. > > This breaks > > gcc.target/m68k/tls-ie-xgot.c scan-assembler jsr __m68k_read_tp > gcc.target

Re: [RFC] Elimination of zext/sext - type promotion pass

2015-08-04 Thread kugan
mpare-1.c -O3 -g (test for excess errors) gcc.dg/tree-ssa/20030729-1.c scan-tree-dump-times dom2 "\\(unsigned int\\)" 0 gcc.dg/tree-ssa/pr54245.c scan-tree-dump-times slsr "Inserting initializer" 0 gcc.dg/tree-ssa/shorten-1.c scan-tree-dump-not optimized "\\(int\\)"

[AARCH64] Add missing entries in iterator vwcore

2015-10-01 Thread Kugan
nal.c:4524 Attached patch fixes this. Bootstrapped and regression tested for aarch64-none-linux-gnu with no new regression. Is this OK for trunk? Thanks, Kugan gcc/ChangeLog: 2015-10-02 Kugan Vivekanandarajah * config/aarch64/iterators.md: Add missing core element mode for mode. gcc

Re: [AARCH64] Add missing entries in iterator vwcore

2015-10-05 Thread Kugan
On 05/10/15 21:33, James Greenhalgh wrote: > On Thu, Oct 01, 2015 at 09:41:20PM +0100, Kugan wrote: >> Hi, >> >> In "aarch64_get_lane" operand 0 is VEL, so for %0, >> iterator vwcore should (?) support all the modes in VEL. >> >> Ran into follow

Re: [3/7] Optimize ZEXT_EXPR with tree-vrp

2015-10-06 Thread kugan
Hi Richard, Thanks for the review. On 15/09/15 23:08, Richard Biener wrote: On Mon, Sep 7, 2015 at 4:58 AM, Kugan wrote: This patch tree-vrp handling and optimization for ZEXT_EXPR. + else if (code == SEXT_EXPR) +{ + gcc_assert (range_int_cst_p (&vr1)); + unsigned int

Re: [4/7] Use correct promoted mode sign for result of GIMPLE_CALL

2015-10-06 Thread kugan
can use DECL_VALUE_EXPR to fixup the IL, not sure. Or we can do this in the promotion pass as well. I will try doing this see if I can do this. Thanks, Kugan Richard. Jim

Re: [3/7] Optimize ZEXT_EXPR with tree-vrp

2015-10-07 Thread Kugan
On 07/10/15 19:20, Richard Biener wrote: > On Wed, Oct 7, 2015 at 1:12 AM, kugan > wrote: >> >> Hi Richard, >> >> Thanks for the review. >> >> On 15/09/15 23:08, Richard Biener wrote: >>> >>> On Mon, Sep 7, 2015 at 4:58 AM,

Re: [3/7] Optimize ZEXT_EXPR with tree-vrp

2015-10-10 Thread Kugan
min))); > + wide_int mask = wi::shwi (((1ULL << (prec - 1)) - 1), > + TYPE_PRECISION (TREE_TYPE (vr0.max))); > > this has the same host precision issues of 1ULL (HOST_WIDE_INT). > There is wi::mask, eventually you can use

Re: [1/7] Add new tree code SEXT_EXPR

2015-10-11 Thread Kugan
On 15/09/15 23:18, Richard Biener wrote: > On Mon, Sep 7, 2015 at 4:55 AM, Kugan > wrote: >> >> This patch adds support for new tree code SEXT_EXPR. > > diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c > index d567a87..bbc3c10 100644 > --- a/gcc/cfgexpand.c > +

Re: [5/7] Allow gimple debug stmt in widen mode

2015-10-14 Thread Kugan
On 15/09/15 22:57, Richard Biener wrote: > On Tue, Sep 8, 2015 at 2:00 AM, Kugan > wrote: >> >> Thanks for the review. >> >> On 07/09/15 23:20, Michael Matz wrote: >>> Hi, >>> >>> On Mon, 7 Sep 2015, Kugan wrote: >>> >>&g

Re: [1/7] Add new tree code SEXT_EXPR

2015-10-14 Thread Kugan
On 12/10/15 23:21, Richard Biener wrote: > On Sun, Oct 11, 2015 at 12:35 PM, Kugan > wrote: >> >> >> On 15/09/15 23:18, Richard Biener wrote: >>> On Mon, Sep 7, 2015 at 4:55 AM, Kugan >>> wrote: >>>> >>>> This patch

Re: [2/7] Add new type promotion pass

2015-10-14 Thread Kugan
On 07/09/15 12:56, Kugan wrote: > > This pass applies type promotion to SSA names in the function and > inserts appropriate truncations to preserve the semantics. Idea of this > pass is to promote operations such a way that we can minimize generation > of subreg in RTL, that in

Re: [5/7] Allow gimple debug stmt in widen mode

2015-10-18 Thread Kugan
} > > which is in place to ensure the debug insns are "valid" in some form(?) > On what kind of insn does the assert trigger with your patch so that > you have to remove it? Thanks for the review. Please find the attached patch this removes it and does the conve

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-10-20 Thread Kugan
On 07/09/15 12:53, Kugan wrote: > > This a new version of the patch posted in > https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00226.html. I have done > more testing and spitted the patch to make it more easier to review. > There are still couple of issues to be addressed and

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-10-22 Thread Kugan
On 21/10/15 23:45, Richard Biener wrote: > On Tue, Oct 20, 2015 at 10:03 PM, Kugan > wrote: >> >> >> On 07/09/15 12:53, Kugan wrote: >>> >>> This a new version of the patch posted in >>> https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00226.html.

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-10-26 Thread kugan
On 23/10/15 01:23, Richard Biener wrote: On Thu, Oct 22, 2015 at 12:50 PM, Kugan wrote: On 21/10/15 23:45, Richard Biener wrote: On Tue, Oct 20, 2015 at 10:03 PM, Kugan wrote: On 07/09/15 12:53, Kugan wrote: This a new version of the patch posted in https://gcc.gnu.org/ml/gcc

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-11-02 Thread Kugan
On 29/10/15 02:45, Richard Biener wrote: > On Tue, Oct 27, 2015 at 1:50 AM, kugan > wrote: >> >> >> On 23/10/15 01:23, Richard Biener wrote: >>> >>> On Thu, Oct 22, 2015 at 12:50 PM, Kugan >>> wrote: >>>> >>>> >>

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-11-08 Thread Kugan
assign_rhs_code (stmt); > > I think the description can be improved. This is about stray bits set > beyond the original type, correct? > > Please use NOP_EXPR wherever you use CONVERT_EXPR right how. > > + if (TREE_CODE_CLASS (code) > +

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-11-11 Thread Kugan
moment their handling is interwinded with the def > promotion > code. That makes the whole thing hard to follow. I have updated the comments with: +/* Promote constants in STMT to TYPE. If PROMOTE_COND_EXPR is true, + promote only the constants in conditions part of the COND_EXPR. + +

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-11-13 Thread Kugan
default (even though the patch as it stands enabled by default - I am doing it for testing purposes). Thanks, Kugan >From 8e71ea17eaf6f282325076f588dbdf4f53c8b865 Mon Sep 17 00:00:00 2001 From: Kugan Vivekanandarajah Date: Thu, 22 Oct 2015 10:53:56 +1100 Subject: [PATC

Incorrect code due to indirect tail call of varargs function with hard float ABI

2015-11-16 Thread Kugan
a non-variadic function and will return the value in floating point register for TARGET_HARD_FLOAT. Thus we should not be doing sibcall here. Attached patch fixes this. Bootstrap and regression testing is ongoing. Is this OK if no issues with the testing? Thanks, Kugan gcc/Change

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

2015-11-16 Thread Kugan
On 17/11/15 12:00, Charles Baylis wrote: > On 16 November 2015 at 22:24, Kugan wrote: > >> Please note that we have a sibcall from "broken" to "indirect". >> >> "direct" is variadic function so it is conforming to AAPCS base standard. >

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

2015-11-16 Thread Kugan
On 17/11/15 12:00, Charles Baylis wrote: > On 16 November 2015 at 22:24, Kugan wrote: > >> Please note that we have a sibcall from "broken" to "indirect". >> >> "direct" is variadic function so it is conforming to AAPCS base standard. >

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

2015-11-17 Thread Kugan
On 17/11/15 21:05, Ramana Radhakrishnan wrote: > Hi Kugan, > > It does look like an issue. > > Please open a bug report. > >> >> >> On 17/11/15 12:00, Charles Baylis wrote: >>> On 16 November 2015 at 22:24, Kugan >>> wrote: >&g

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

2015-11-17 Thread Kugan
> Hi Ramana, > > Thanks for the review. I have opened a gcc bug-report for this. I tested > the attached patch for arm-none-linux-gnueabihf and > arm-none-linux-gnueabi with no new regressions. Is this OK? > > > Thanks, > Kugan > > gcc/ChangeLog: >

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-11-23 Thread Kugan
Hi Richard, Thanks for you comments. I am attaching an updated patch with details below. On 19/11/15 02:06, Richard Biener wrote: > On Wed, Nov 18, 2015 at 3:04 PM, Richard Biener > wrote: >> On Sat, Nov 14, 2015 at 2:15 AM, Kugan >> wrote: >>> >>> Attache

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

2015-12-01 Thread Kugan
>> >> gcc/ChangeLog: >> >> 2015-11-18 Kugan Vivekanandarajah >> >> PR target/68390 >> * config/arm/arm.c (arm_function_ok_for_sibcall): Get function type >> for indirect function call. >> >> gcc/testsuite/ChangeLog: >

Re: [PATCH] Fix phiopt ICE in Factor conversion in COND_EXPR (PR tree-optimization/66949)

2015-12-08 Thread Kugan
; With this patch we won't ICE (and PRE should clean this up anyway), but I > don't know, > maybe I should try harder to optimize even this problematical case (not sure > how hard > it would be...)? Hi Marek, Thanks for fixing this. Yes, we can try remove the PHI in factor_out_c

Re: [0/7] Type promotion pass and elimination of zext/sext

2015-12-09 Thread Kugan
://gcc.gnu.org/bugzilla/show_bug.cgi?id=67714. I don't think there is any agreement on this. Or is there any better place to fix this? Thanks, Kugan

Re: [PATCH GCC][4/5]Improve loop distribution to handle hmmer

2017-06-07 Thread kugan
bdata->sccs_to_merge, component)) +cbdata->alias_ddrs->safe_splice (edata->alias_ddrs); +} + +/* This is the main function breaking strong conected components in + PARTITIONS giving reduced depdendence graph RDG and data dependences + in DDR_TABLE. Store data dependence relation

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-08-06 Thread Kugan
On 06/08/14 23:29, Richard Biener wrote: > On Wed, Aug 6, 2014 at 3:21 PM, Kugan > wrote: >> On 06/08/14 22:09, Richard Biener wrote: >>> On Tue, Aug 5, 2014 at 4:21 PM, Jakub Jelinek wrote: >>>> On Tue, Aug 05, 2014 at 04:17:41PM +0200, Richard Biener wr

PR tree-optimization/52904 testcase

2014-08-09 Thread Kugan
requested there in the PR, I am sending this patch to add the test-case to test-suite. Is this OK ? Thanks, Kugan gcc/testsuite 2014-08-09 Kugan Vivekanandarajah PR tree-optimization/52904 * gcc.dg/PR52904.c: New test. diff --git a/gcc/testsuite/gcc.dg/PR52904.c b/gcc

Re: PR tree-optimization/52904 testcase

2014-08-11 Thread Kugan
On 11/08/14 18:03, Richard Biener wrote: > On Sat, Aug 9, 2014 at 2:33 PM, Kugan > wrote: >> Hi, >> >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52904 >> >> Tescase was generating warning: assuming signed overflow does not occur >> when simplifying

Re: PR tree-optimization/52904 testcase

2014-08-12 Thread Kugan
>> >> Is this OK? > > Err. > > @@ -0,0 +1,24 @@ > + > > Excessive vertical space > > +/* { dg-do compile } */ > +/* { dg-options "-Wstrict-overflow -O2" } */ > +/* { dg-bogus "assuming signed overflow does not occur when simplifying&quo

Re: [PATCH AArch64 3/3] Fix XOR_one_cmpl pattern; add SIMD-reg variants for BIC,ORN,EON

2014-08-12 Thread Kugan
MD registers so the vector variant must be split. +(define_insn_and_split "*xor_one_cmpl3" + [(set (match_operand:GPI 0 "register_operand" "=r,w") +(not:GPI (xor:GPI (match_operand:GPI 1 "register_operand" "r,?w") Hi Alan, Is

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-08-27 Thread Kugan
On 27/08/14 20:01, Uros Bizjak wrote: > Hello! > >> 2014-08-07 Kugan Vivekanandarajah >> >> * calls.c (precompute_arguments): Check >> promoted_for_signed_and_unsigned_p and set the promoted mode. >> (promoted_for_signed_and_unsigned_p): New func

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-08-27 Thread Kugan
On 27/08/14 23:02, Kugan wrote: > On 27/08/14 20:01, Uros Bizjak wrote: >> Hello! >> >>> 2014-08-07 Kugan Vivekanandarajah >>> >>> * calls.c (precompute_arguments): Check >>> promoted_for_signed_and_unsigned_p and set the promoted mode. >

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-08-28 Thread Kugan
On 28/08/14 16:44, Marc Glisse wrote: > On Thu, 28 Aug 2014, Kugan wrote: > >> On 27/08/14 23:02, Kugan wrote: >>> On 27/08/14 20:01, Uros Bizjak wrote: >>>> Hello! >>>> >>>>> 2014-08-07 Kugan Vivekanand

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-08-28 Thread Kugan
On 27/08/14 20:07, Richard Biener wrote: > On Wed, Aug 27, 2014 at 12:01 PM, Uros Bizjak wrote: >> Hello! >> >>> 2014-08-07 Kugan Vivekanandarajah >>> >>> * calls.c (precompute_arguments): Check >>> promoted_

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-09-03 Thread Kugan
ld need is VRP computing value-ranges in the promoted > mode from the start (and it doesn't do that). Hi Richard, Here is an attempt to do the value range computation in promoted_mode's type when it is overflowing. Bootstrapped on x86-84. Based on your feedback, I will do

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-09-04 Thread Kugan
idence. Can we rely on this? Is there anyway we can fix this? Thanks again, Kugan

pr43550 - remove unnecessary uxts in bswap

2014-09-04 Thread Kugan
regression tested on x86_64 and arm. Thanks, Kugan gcc/testsuite 2014-09-05 Kugan Vivekanandarajah PR target/43550 * gcc.target/arm/pr43550.c: New test. gcc/ 2014-09-05 Kugan Vivekanandarajah PR target/43550 * builtins.c (expand_builtin_bswap): Generate promoted

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-09-07 Thread Kugan
e overflow/wrap around. Will that be something acceptable? Thanks again, Kugan

[RFC][LIBGCC][0 of 2] 64 bit divide implementation for processor without hw divide instruction

2013-11-22 Thread Kugan
better for processor without hw divide instruction. On a chromebook, when K is large (close to 64) this performs on an average ~10% faster. When K is small (8 to 24), it performs about ~100% faster on an average. Regression tested on arm-none-linux-gnueabi with no issues. OK? Thanks, Kugan

Re: [RFC][LIBGCC][1 of 2] 64 bit divide implementation for processor without hw divide instruction

2013-11-22 Thread Kugan
Hi All, This RFC patch series implements a simple align divisor shift dividend method. Regression tested on arm-none-linux-gnueabi with no issues. OK? Thanks, Kugan +2013-11-22 Kugan Vivekanandarajah + + * libgcc/libgcc2.c (__udivmoddi4): Define new implementation when

Re: [RFC][LIBGCC][2 of 2] 64 bit divide implementation for processor without hw divide instruction

2013-11-22 Thread Kugan
Hi All, This RFC patch enables new divide algorithm for ARMV7-A Regression tested on arm-none-linux-gnueabi with no issues. OK? Thanks, Kugan +2013-11-22 Kugan Vivekanandarajah + + * libgcc/config/arm/pbapi-lib.h (HAVE_NO_HW_DIVIDE): Define for + __ARM_ARCH_7_A__. + diff --git

Re: [RFC][LIBGCC][1 of 2] 64 bit divide implementation for processor without hw divide instruction

2013-11-25 Thread Kugan
On 24/11/13 02:14, Ian Lance Taylor wrote: > Kugan writes: > >> This RFC patch series implements a simple align divisor shift dividend >> method. >> >> Regression tested on arm-none-linux-gnueabi with no issues. >> >> OK? >> >> Than

Re: [RFC][ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook

2014-06-09 Thread Kugan
re are no mrc/mcr versions of these instructions in thumb1. So these should be conditional on not being ARM_THUMB1. Is this OK. Regression tested with no new refression on qemu for arm-none-linux-gnueabi -march=armv7-a and on arm-none-linux-gnueabi --with-mode=thumb and -march=armv5t. Is this OK? Th

[PATCH 0/2] Zext/sext elimination using value range

2014-06-24 Thread Kugan
r0, lsr #1 eorne r0, r0, #2 movne r0, r0, lsr #1 orrne r0, r0, #32768 - andsr3, r3, #255 + subsr2, r2, #1 bne .L3 bx lr Tested both patches on x86_64-unknown-linux-gnu and arm-none-linux-gnueabi with no new regressions. Is this OK? Thanks, Kugan

[PATCH 1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED)

2014-06-24 Thread Kugan
Changes the the SUBREG flags to be able to set promoted for sign (SRP_SIGNED), unsigned (SRP_UNSIGNED), sign and unsigned (SPR_SIGNED_AND_UNSIGNED) in SUBREG_PROMOTED_VAR_P. Thanks, Kugan gcc/ 2014-06-24 Kugan Vivekanandarajah * gcc/calls.c (precompute_arguments): Use new

[PATCH 2/2] Enable elimination of zext/sext

2014-06-24 Thread Kugan
Sets proper flags on the SUBREG based on value range info and enables elimination of zext/sext when possible. Thanks, Kugan gcc/ 2014-06-24 Kugan Vivekanandarajah * gcc/calls.c (precompute_arguments: Check is_promoted_for_type and set the promoted mode

Re: [PATCH 1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED)

2014-06-25 Thread Kugan
TED_UNSIGNED_P(RTX) \ RTL_FLAG_CHECK1 ("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil)\ + (RTX)->unchanging) == 0) ? -1 : ((RTX)->volatil == 1)) Am I missing anything here? Please let me know. I am attaching the patch based on this with your other

Re: [PATCH 2/2] Enable elimination of zext/sext

2014-06-25 Thread Kugan
On 24/06/14 22:21, Jakub Jelinek wrote: > On Tue, Jun 24, 2014 at 09:53:35PM +1000, Kugan wrote: >> 2014-06-24 Kugan Vivekanandarajah >> >> * gcc/calls.c (precompute_arguments: Check is_promoted_for_type >> and set the promoted mode. >> (is_

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