On 30/05/14 18:35, Ramana Radhakrishnan wrote:
>> +  if (!TARGET_VFP)
>> +    return;
>> +
>> +  /* Generate the equivalence of :
> 
> s/equivalence/equivalent.
> 
> Ok with that change and if no regressions.

Hi Ramana,

Sorry, I missed the thumb1 part. There are no mrc/mcr  versions of these
instructions in thumb1. So these should be conditional on not being
ARM_THUMB1.

Is this OK. Regression tested with no new refression on qemu for
arm-none-linux-gnueabi -march=armv7-a and on arm-none-linux-gnueabi
--with-mode=thumb and -march=armv5t.

Is this OK?

Thanks,
Kugan

gcc/

2014-06-10  Kugan Vivekanandarajah  <kug...@linaro.org>

        * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
        default_atomic_assign_expand_fenv for TARGET_THUMB1.
        (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
        __builtins_arm_get_fpscr only when !TARGET_THUMB1.
        * config/arm/vfp.md (set_fpscr): Make pattern conditional on
        !TARGERT_THUMB1.
        (get_fpscr) : Likewise.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index f8575b9..c9f02df 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -24760,7 +24760,7 @@ arm_init_builtins (void)
   if (TARGET_CRC32)
     arm_init_crc32_builtins ();
 
-  if (TARGET_VFP)
+  if (TARGET_VFP && !TARGET_THUMB1)
     {
       tree ftype_set_fpscr
        = build_function_type_list (void_type_node, unsigned_type_node, NULL);
@@ -31452,8 +31452,8 @@ arm_atomic_assign_expand_fenv (tree *hold, tree *clear, 
tree *update)
   tree new_fenv_var, reload_fenv, restore_fnenv;
   tree update_call, atomic_feraiseexcept, hold_fnclex;
 
-  if (!TARGET_VFP)
-    return;
+  if (!TARGET_VFP || TARGET_THUMB1)
+    return default_atomic_assign_expand_fenv (hold, clear, update);
 
   /* Generate the equivalent of :
        unsigned int fenv_var;
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index a8b27bc..44d2f38 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -1325,7 +1325,7 @@
 ;; Write Floating-point Status and Control Register.
 (define_insn "set_fpscr"
   [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] 
VUNSPEC_SET_FPSCR)]
-  "TARGET_VFP"
+  "TARGET_VFP && !TARGET_THUMB1"
   "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR"
   [(set_attr "type" "mrs")])
 
@@ -1333,7 +1333,7 @@
 (define_insn "get_fpscr"
   [(set (match_operand:SI 0 "register_operand" "=r")
         (unspec_volatile:SI [(const_int 0)] VUNSPEC_GET_FPSCR))]
-  "TARGET_VFP"
+  "TARGET_VFP && !TARGET_THUMB1"
   "mrc\\tp10, 7, %0, cr1, cr0, 0\\t @GET_FPSCR"
   [(set_attr "type" "mrs")])
 

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