[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

@@ -59,16 +59,26 @@ let TargetPrefix = "riscv" in { [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg>, ImmArg>]>; + def int_riscv_cv_alu_slet : ScalarCoreVAluGprGprIntrinsic; jeremybennett wrote: >

[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

@@ -59,16 +59,26 @@ let TargetPrefix = "riscv" in { [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg>, ImmArg>]>; + def int_riscv_cv_alu_slet : ScalarCoreVAluGprGprIntrinsic; jeremybennett wrote: >

[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

@@ -59,16 +59,26 @@ let TargetPrefix = "riscv" in { [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg>, ImmArg>]>; + def int_riscv_cv_alu_slet : ScalarCoreVAluGprGprIntrinsic; jeremybennett wrote: >

[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

@@ -59,16 +59,26 @@ let TargetPrefix = "riscv" in { [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg>, ImmArg>]>; + def int_riscv_cv_alu_slet : ScalarCoreVAluGprGprIntrinsic; jeremybennett wrote: H