[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-03 Thread Deric Cheung via cfe-commits
@@ -19105,6 +19105,51 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID, return nullptr; switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { Icohedron wrote: `__builtin_addc` was not able to be used to implement `AddUint

[clang] [llvm] Reland "[HLSL] Implement the reflect HLSL function" (PR #125599)

2025-02-03 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron created https://github.com/llvm/llvm-project/pull/125599 This PR relands #122992. A reland was attempted before (#123853), but it [failed to pass the `sanitizer-aarch64-linux-bootstrap-hwasan` buildbot](https://github.com/llvm/llvm-project/pull/123853#issuecomment

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -359,18 +359,21 @@ class OpLowerer { return lowerToBindAndAnnotateHandle(F); } - Error replaceSplitDoubleCallUsages(CallInst *Intrin, CallInst *Op) { + Error replaceExtractElementTypeOfCallUsages(CallInst *Intrin, CallInst *Op) { for (Use &U : make_early_inc_ra

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -359,18 +359,21 @@ class OpLowerer { return lowerToBindAndAnnotateHandle(F); } - Error replaceSplitDoubleCallUsages(CallInst *Intrin, CallInst *Op) { + Error replaceExtractElementTypeOfCallUsages(CallInst *Intrin, CallInst *Op) { for (Use &U : make_early_inc_ra

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125319 >From 1e194fdf6dc731276cd867501708b348e3bbc97c Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/5] Implement AddUint64 HLSL codegen and sema --- clang/include/

[clang] [llvm] Reland "[HLSL] Implement the reflect HLSL function" (PR #125599)

2025-02-04 Thread Deric Cheung via cfe-commits
Icohedron wrote: @vitalybuka Could you get more details as to why the original PR failed in the hwasan-check from the `sanitizer-aarch64-linux-bootstrap-hwasan` buildbot? The buildbot's report is linked here: [https://lab.llvm.org/buildbot/#/builders/55/builds/5962](https://lab.llvm.org/buildb

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -10623,7 +10623,7 @@ def err_second_argument_to_cwsc_not_pointer : Error< "second argument to __builtin_call_with_static_chain must be of pointer type">; def err_vector_incorrect_num_elements : Error< - "%select{too many|too few}0 elements in vector %select{initializat

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -2023,6 +2024,18 @@ static bool CheckAllArgsHaveFloatRepresentation(Sema *S, CallExpr *TheCall) { checkAllFloatTypes); } +static bool CheckUnsignedIntegerRepresentation(Sema *S, CallExpr *TheCall) { + auto checkUnsignedInteger = [](clan

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -10623,7 +10623,7 @@ def err_second_argument_to_cwsc_not_pointer : Error< "second argument to __builtin_call_with_static_chain must be of pointer type">; def err_vector_incorrect_num_elements : Error< - "%select{too many|too few}0 elements in vector %select{initializat

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125319 >From 1e194fdf6dc731276cd867501708b348e3bbc97c Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/4] Implement AddUint64 HLSL codegen and sema --- clang/include/

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,17 @@ +; RUN: not opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s 2>&1 | FileCheck %s + +; DXIL operation UAddc only supports i32. Other integer types are unsupported. +; CHECK: in function uaddc_i16 Icohedron wrote: LLVM ERROR is not

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,46 @@ +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm-only -disable-llvm-passes -verify + +uint2 test_too_few_arg() { + return __builtin_hlsl_adduint64(); + // expected-error@-1 {{too few arguments

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -21,6 +21,7 @@ #include "clang/AST/Type.h" #include "clang/AST/TypeLoc.h" #include "clang/Basic/Builtins.h" +#include "clang/Basic/DiagnosticParse.h" Icohedron wrote: Removed with commit [28b7eb8](https://github.com/llvm/llvm-project/pull/125319/commits/28

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,46 @@ +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm-only -disable-llvm-passes -verify + +uint2 test_too_few_arg() { + return __builtin_hlsl_adduint64(); + // expected-error@-1 {{too few arguments

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -2214,6 +2227,42 @@ static bool CheckResourceHandle( // returning an ExprError bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { +if (SemaRef.checkArgCount(TheCall, 2))

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -10623,7 +10623,7 @@ def err_second_argument_to_cwsc_not_pointer : Error< "second argument to __builtin_call_with_static_chain must be of pointer type">; def err_vector_incorrect_num_elements : Error< - "%select{too many|too few}0 elements in vector %select{initializat

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -359,18 +359,21 @@ class OpLowerer { return lowerToBindAndAnnotateHandle(F); } - Error replaceSplitDoubleCallUsages(CallInst *Intrin, CallInst *Op) { + Error replaceExtractElementTypeOfCallUsages(CallInst *Intrin, CallInst *Op) { for (Use &U : make_early_inc_ra

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -359,18 +359,21 @@ class OpLowerer { return lowerToBindAndAnnotateHandle(F); } - Error replaceSplitDoubleCallUsages(CallInst *Intrin, CallInst *Op) { + Error replaceExtractElementTypeOfCallUsages(CallInst *Intrin, CallInst *Op) { for (Use &U : make_early_inc_ra

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
@@ -359,18 +359,21 @@ class OpLowerer { return lowerToBindAndAnnotateHandle(F); } - Error replaceSplitDoubleCallUsages(CallInst *Intrin, CallInst *Op) { + Error replaceExtractElementTypeOfCallUsages(CallInst *Intrin, CallInst *Op) { for (Use &U : make_early_inc_ra

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-04 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-06 Thread Deric Cheung via cfe-commits
@@ -19105,6 +19105,51 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID, return nullptr; switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { Icohedron wrote: Do you think it is something I should do for this implementati

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
@@ -10623,7 +10623,7 @@ def err_second_argument_to_cwsc_not_pointer : Error< "second argument to __builtin_call_with_static_chain must be of pointer type">; def err_vector_incorrect_num_elements : Error< - "%select{too many|too few}0 elements in vector %select{initializat

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125319 >From 1e194fdf6dc731276cd867501708b348e3bbc97c Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/6] Implement AddUint64 HLSL codegen and sema --- clang/include/

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125319 >From 1e194fdf6dc731276cd867501708b348e3bbc97c Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/6] Implement AddUint64 HLSL codegen and sema --- clang/include/

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125319 >From 1e194fdf6dc731276cd867501708b348e3bbc97c Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/8] Implement AddUint64 HLSL codegen and sema --- clang/include/

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-05 Thread Deric Cheung via cfe-commits
@@ -12553,6 +12553,8 @@ def err_std_initializer_list_malformed : Error< "%0 layout not recognized. Must be a non-polymorphic class type with no bases and two fields: a 'const E *' and either another 'const E *' or a 'std::size_t'">; // HLSL Diagnostics +def err_hlsl_adduin

[clang] [llvm] Reland "[HLSL] Implement the reflect HLSL function" (PR #125599)

2025-02-10 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125599 >From dc616212f496098776d30f56151213d530917ba2 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 3 Feb 2025 23:10:16 + Subject: [PATCH 1/2] Reapply "Reland "[HLSL] Implement the `reflect` HLSL function"

[clang] [llvm] Reland "[HLSL] Implement the reflect HLSL function" (PR #125599)

2025-02-10 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125599 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-11 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/125319 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-02-10 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,40 @@ +; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s + +; CHECK: %dx.types.i32c = type { i32, i1 } Icohedron wrote: Perhaps I made the incorrect assumption that UAddc only accepts scalars. In the current imple

[clang] [llvm] Reland "[HLSL] Implement the reflect HLSL function" (PR #125599)

2025-02-11 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron ready_for_review https://github.com/llvm/llvm-project/pull/125599 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Reland "[HLSL] Implement the reflect HLSL function" (PR #125599)

2025-02-11 Thread Deric Cheung via cfe-commits
Icohedron wrote: To get the PR up and running, I am just marking hwasan as unsupported for now. A proper fix will be implemented later. The Issue #124045 will remain open to track this. https://github.com/llvm/llvm-project/pull/125599 ___ cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-01-31 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron created https://github.com/llvm/llvm-project/pull/125319 This PR addresses #99205 - Implements the HLSL intrinsic `AddUint64` used to perform unsigned 64-bit integer addition by using pairs of unsigned 32-bit integers instead of native 64-bit types - The LLVM i

[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

2025-01-31 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/125319 >From 1e194fdf6dc731276cd867501708b348e3bbc97c Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/3] Implement AddUint64 HLSL codegen and sema --- clang/include/

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-09 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From 07112471edfc569eb12b2a6178ddc28b4f3a36d5 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH 1/5] Implement D3DCOLORtoUBYTE4 intrinsic --- clang/lib/Headers/hl

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-09 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From 5610b225e76b046e911c1a7a0c1e4ccc128d35a1 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH] [HLSL] Implement the D3DCOLORtoUBYTE4 intrinsic --- clang/lib/Hea

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-10 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From 5610b225e76b046e911c1a7a0c1e4ccc128d35a1 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH 1/2] [HLSL] Implement the D3DCOLORtoUBYTE4 intrinsic --- clang/lib

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-21 Thread Deric Cheung via cfe-commits
Icohedron wrote: > Will a follow-up issue be created to move the useful Sema helpers into a > common file? I just created issue #123831 for this. https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] [llvm] Reland "[HLSL] Implement the `reflect` HLSL function" (PR #123853)

2025-01-21 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron created https://github.com/llvm/llvm-project/pull/123853 This PR relands [#122992](https://github.com/llvm/llvm-project/pull/122992). Some machines were failing to run the `reflect-error.ll` test due to the RUN lines ```llvm ; RUN: not %if spirv-tools %{ llc -O0 -m

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-21 Thread Deric Cheung via cfe-commits
@@ -34,6 +34,7 @@ #include "llvm/IR/IntrinsicsSPIRV.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" Icohedron wrote: I don't recall adding that. I think my IDE did that for me :P I will remove

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-17 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122992 >From 7ddd5b264731ef375d99d012d9fbfd54c744e5b2 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 13 Jan 2025 21:23:31 + Subject: [PATCH 1/5] Implement `reflect` HLSL function --- clang/include/clang/Ba

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-20 Thread Deric Cheung via cfe-commits
@@ -3030,6 +3031,15 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg, return selectExtInst(ResVReg, ResType, I, CL::fract, GL::Fract); case Intrinsic::spv_normalize: return selectExtInst(ResVReg, ResType, I, CL::normalize, GL::Normalize); + case In

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-20 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122992 >From f9fd109c4038f5646586c70c40bc298c20996d40 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 13 Jan 2025 21:23:31 + Subject: [PATCH 1/2] Implement the `reflect` HLSL function --- clang/include/clan

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-21 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-21 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,22 @@ +; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s +; RUN: not %if spirv-tools %{ llc -O0 -

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-13 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From 5610b225e76b046e911c1a7a0c1e4ccc128d35a1 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH 1/3] [HLSL] Implement the D3DCOLORtoUBYTE4 intrinsic --- clang/lib

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-13 Thread Deric Cheung via cfe-commits
@@ -41,6 +41,14 @@ constexpr enable_if_t bit_cast(T F) { return __builtin_bit_cast(U, F); } +constexpr vector d3d_color_to_ubyte4_impl(vector V) { + // Use the same scaling factor used by FXC (i.e., 255.001953) + // Excerpt from stackoverflow discussion: + // "Built-in r

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implement `reflect` HLSL function (PR #122992)

2025-01-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron created https://github.com/llvm/llvm-project/pull/122992 Fixes #99152 Tasks completed: - Implement `reflect` in `clang/lib/Headers/hlsl/hlsl_intrinsics.h` - Implement the `reflect` SPIR-V target built-in in `clang/include/clang/Basic/BuiltinsSPIRV.td` - Add a SPIR

[clang] [llvm] [HLSL] Implement `reflect` HLSL function (PR #122992)

2025-01-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-16 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122992 >From 3f3b8c75c14bb9b3ed611c9cddec49d0e9339705 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 13 Jan 2025 21:23:31 + Subject: [PATCH 1/3] Implement `reflect` HLSL function --- clang/include/clang/Ba

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-16 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122992 >From 3f3b8c75c14bb9b3ed611c9cddec49d0e9339705 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 13 Jan 2025 21:23:31 + Subject: [PATCH 1/4] Implement `reflect` HLSL function --- clang/include/clang/Ba

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-16 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-08 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron created https://github.com/llvm/llvm-project/pull/122202 Fixes #99092. 1. Defines the function `D3DCOLORtoUBYTE4` in `clang/lib/Headers/hlsl/hlsl_intrinsics.h`. 2. Implements the function `D3DCOLORtoUBYTE4` as `d3d_color_to_ubyte4` in `clang/lib/Headers/hlsl/hlsl_

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-09 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/122202 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-09 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From 0ef5e0217c04aa16c2f54b5f0edf0a6dc4cdc28d Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH 1/4] Implement D3DCOLORtoUBYTE4 intrinsic --- clang/lib/Headers/hl

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-10 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From 5610b225e76b046e911c1a7a0c1e4ccc128d35a1 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH 1/2] [HLSL] Implement the D3DCOLORtoUBYTE4 intrinsic --- clang/lib

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-09 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/122202 >From f76d5038811c72d1e185cdceeb24d5014c5c8281 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Thu, 9 Jan 2025 01:14:52 + Subject: [PATCH 1/5] Implement D3DCOLORtoUBYTE4 intrinsic --- clang/lib/Headers/hl

[clang] [HLSL] Implement D3DCOLORtoUBYTE4 intrinsic (PR #122202)

2025-01-09 Thread Deric Cheung via cfe-commits
@@ -33,6 +33,14 @@ constexpr enable_if_t bit_cast(T F) { return __builtin_bit_cast(U, F); } +constexpr vector d3d_color_to_ubyte4(vector V) { + // Use the same scaling factor used by FXC (i.e., 255.001953) + // Excerpt from stackoverflow discussion: + // "Built-in roundi

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-15 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,195 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 +// RUN: %clang_cc1 -finclude-default-header -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \ +// RUN: -emit-llvm -O1 -o - | FileChe

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-15 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,33 @@ +; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s Icohedron wrote: Changing the triple to `-mtriple=spirv32-unknown-unknown` does indeed cause the test to fail at instruction selection ``` FAIL: LLVM ::

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-15 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron converted_to_draft https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-15 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,195 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 +// RUN: %clang_cc1 -finclude-default-header -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \ +// RUN: -emit-llvm -O1 -o - | FileChe

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-15 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,195 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 +// RUN: %clang_cc1 -finclude-default-header -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \ +// RUN: -emit-llvm -O1 -o - | FileChe

[clang] [llvm] [HLSL] Implement the `reflect` HLSL function (PR #122992)

2025-01-16 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron ready_for_review https://github.com/llvm/llvm-project/pull/122992 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/127137 >From 4fae5642c6e8e305cdc687b4968ba5eabaa44b50 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/4] Add the AddUint64 HLSL builtin function - Defines the AddUint

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/127098 >From 5b093ca42fdc24f89bfccac25e6f2e17155432f6 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Wed, 12 Feb 2025 21:24:00 + Subject: [PATCH 1/4] Implement the 'and' HLSL function --- clang/include/clang/Ba

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2079,6 +2079,14 @@ static bool CheckFloatingOrIntRepresentation(Sema *S, CallExpr *TheCall) { checkAllSignedTypes); } +static bool CheckBoolRepresentation(Sema *S, CallExpr *TheCall) { + auto checkAllBoolTypes = [](clang::QualType Pass

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2229,6 +2241,41 @@ static bool CheckResourceHandle( // returning an ExprError bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { +if (SemaRef.checkArgCount(TheCall, 2))

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2245,6 +2245,17 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { break; } + case Builtin::BI__builtin_hlsl_and: { +if (SemaRef.checkArgCount(TheCall, 2)) + return true; +if (CheckVectorElementCallArgs(&SemaRef, TheCal

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,27 @@ +// RUN: %clang_cc1 -finclude-default-header -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s \ +// RUN: -emit-llvm -O1 -verify + +bool test_too_few_arg(bool a) { + return __builtin_hlsl_and(a); + // expected-error@-1 {{too few arguments to function call

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,27 @@ +// RUN: %clang_cc1 -finclude-default-header -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s \ +// RUN: -emit-llvm -O1 -verify + +bool test_too_few_arg(bool a) { + return __builtin_hlsl_and(a); + // expected-error@-1 {{too few arguments to function call

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -0,0 +1,27 @@ +// RUN: %clang_cc1 -finclude-default-header -triple \ +// RUN: dxil-pc-shadermodel6.3-library %s \ +// RUN: -emit-llvm -O1 -verify + +bool test_too_few_arg(bool a) { + return __builtin_hlsl_and(a); + // expected-error@-1 {{too few arguments to function call

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2229,6 +2241,41 @@ static bool CheckResourceHandle( // returning an ExprError bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { +if (SemaRef.checkArgCount(TheCall, 2))

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127137 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127137 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/127098 >From 5b093ca42fdc24f89bfccac25e6f2e17155432f6 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Wed, 12 Feb 2025 21:24:00 + Subject: [PATCH 1/4] Implement the 'and' HLSL function --- clang/include/clang/Ba

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2245,6 +2245,17 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { break; } + case Builtin::BI__builtin_hlsl_and: { +if (SemaRef.checkArgCount(TheCall, 2)) + return true; +if (CheckVectorElementCallArgs(&SemaRef, TheCal

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -10655,6 +10655,8 @@ def err_second_argument_to_cwsc_not_pointer : Error< def err_vector_incorrect_num_elements : Error< "%select{too many|too few}0 elements in vector %select{initialization|operand}3 (expected %1 elements, have %2)">; +def err_invalid_even_odd_vector_el

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2229,6 +2241,41 @@ static bool CheckResourceHandle( // returning an ExprError bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { +if (SemaRef.checkArgCount(TheCall, 2))

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron updated https://github.com/llvm/llvm-project/pull/127137 >From 4fae5642c6e8e305cdc687b4968ba5eabaa44b50 Mon Sep 17 00:00:00 2001 From: Icohedron Date: Mon, 27 Jan 2025 11:18:09 -0800 Subject: [PATCH 1/3] Add the AddUint64 HLSL builtin function - Defines the AddUint

[clang] [llvm] [HLSL] [DXIL] Implement the AddUint64 HLSL function and the UAddc DXIL op (PR #127137)

2025-02-14 Thread Deric Cheung via cfe-commits
@@ -2229,6 +2241,41 @@ static bool CheckResourceHandle( // returning an ExprError bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { +if (SemaRef.checkArgCount(TheCall, 2))

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-14 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-15 Thread Deric Cheung via cfe-commits
@@ -2245,6 +2245,36 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) { break; } + case Builtin::BI__builtin_hlsl_and: { +if (SemaRef.checkArgCount(TheCall, 2)) + return true; +if (CheckVectorElementCallArgs(&SemaRef, TheCal

[clang] [HLSL] Implement the 'and' HLSL function (PR #127098)

2025-02-15 Thread Deric Cheung via cfe-commits
https://github.com/Icohedron edited https://github.com/llvm/llvm-project/pull/127098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

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