[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

apazos added a comment. Thanks for updating the patch, @spetrovic. Can we have this committed? This patch has shown to produce code size improvements for a number of targets (Mips, X86, ARM, RISC-V). https://reviews.llvm.org/D39053 ___ cfe-commits

[PATCH] D37624: add support for -fno-instrument-functions and -finstrument-functions-exclude-{file, function}-list= to match gcc options.

apazos added a comment. Herald added a subscriber: erik.pilkington. Hello folks, is there a plan to merge this feature still? https://reviews.llvm.org/D37624 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailm

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos updated this revision to Diff 156343. apazos added a comment. - Rebased the patch. - Udpated test case to check for IR attribute. https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td include/clang/Basic/DiagnosticSemaKinds.td lib/Code

[PATCH] D48412: [RISCV] Add support for interrupt attribute

This revision was automatically updated to reflect the committed changes. Closed by commit rC338045: [RISCV] Add support for interrupt attribute (authored by apazos, committed by ). Herald added a subscriber: jrtc27. Repository: rC Clang https://reviews.llvm.org/D48412 Files: include/clang

[PATCH] D43105: [RISCV] Enable __int128_t and uint128_t through clang flag

apazos added inline comments. Comment at: lib/Basic/Targets/RISCV.h:85 + bool hasInt128Type(const LangOptions &Opts) const override { +return Opts.UseInt128; + } kito-cheng wrote: > efriedma wrote: > > Maybe make this a cross-platform flag, rather than risc

[PATCH] D34425: Unified ARM logic for computing target ABI.

apazos created this revision. Herald added subscribers: kristof.beyls, javed.absar, srhines, aemerson. Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser. Modeled Triple::GNU after front end code (aapcs abi) and updated tests that

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos updated this revision to Diff 127170. apazos added a comment. changed label prefix ILP64 to LP64 https://reviews.llvm.org/D41271 Files: lib/Driver/ToolChains/Gnu.cpp test/Driver/riscv-gnutools.c Index: test/Driver/riscv-gnutools.c ===

[PATCH] D39963: [RISCV] Add initial RISC-V target and driver support

apazos accepted this revision. apazos added a comment. This revision is now accepted and ready to land. Please merge this patch, it looks in good shape. This patch is required for any RISCV build. https://reviews.llvm.org/D39963 ___ cfe-commits mai

[PATCH] D40023: [RISCV] Implement ABI lowering

apazos added a comment. Hi Alex, just a reminder, it looks like Eli's and David's comments have not been addressed yet. https://reviews.llvm.org/D40023 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/li

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos added a comment. This is ready to merge, just waiting for the dependence https://reviews.llvm.org/D39963 to be merged first. https://reviews.llvm.org/D41271 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bi

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos updated this revision to Diff 129476. apazos added a comment. Herald added a subscriber: niosHD. Rebased. https://reviews.llvm.org/D41271 Files: lib/Driver/ToolChains/Gnu.cpp test/Driver/riscv-gnutools.c Index: test/Driver/riscv-gnutools.c ==

[PATCH] D44189: [RISCV] Verify the input value of -march=

apazos added inline comments. Comment at: lib/Driver/ToolChains/Arch/RISCV.cpp:48 + break; +default: + // First letter should be 'i' or 'g'. In the switch cases move default to first position. Comment at: lib/Driver/ToolChains/Arc

[PATCH] D48412: [RISCV] Support for __attribute__((interrupt))

apazos created this revision. apazos added a reviewer: asb. Herald added subscribers: rogfer01, mgrang, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar. Clang supports the GNU style ``__attribute__((interrupt))`` attribute on RISCV targets. Permissible

[PATCH] D48412: [RISCV] Support for __attribute__((interrupt))

apazos updated this revision to Diff 152416. apazos added a comment. Herald added subscribers: brucehoult, MartinMosbeck. Hi Simon, I have added a warning for repeated interrupt attributes. https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos added inline comments. Comment at: lib/CodeGen/TargetInfo.cpp:8966 + +const RISCVInterruptAttr *Attr = FD->getAttr(); +if (!Attr) aaron.ballman wrote: > You can use `const auto *` here instead of repeating the type. Thanks Aaron, will do the cleanu

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos updated this revision to Diff 152560. apazos added a comment. Addressed review comments. https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td include/clang/Basic/DiagnosticSemaKinds.td lib/CodeGen/TargetInfo.cpp lib/Sema/SemaDeclAtt

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added inline comments. Herald added subscribers: benna, psnobl. Comment at: lib/Driver/ToolChains/Clang.cpp:1803 + + // Forward the -msmall-data-limit= option. + if (Arg *A = Args.getLastArg(options::OPT_G)) { Might be simpler to just set it to 0, and if

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added inline comments. Comment at: lib/Driver/ToolChains/Clang.cpp:1813 +} + } else if (Arg *A = Args.getLastArg(options::OPT_G)) { +SmallDataLimit = A->getValue(); Why do you we need to set a default? It will cause the optimization to be on now,

[PATCH] D57497: [RISCV] Passing -G value to RISCV backend

apazos added a comment. Hi Shiva, I think you need to check for and pass along the -G option to the linker (gnutools::Linker and RISCV::Linker) and will be available for LTO. Check Hexagon, it passes the threshold value to the assembler (via -gpsize) and linker (via -G). Repository: rC Cl

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Hi Shiva, I will check, but I think you need to also modify gnutools:Linker because riscv::Linker is called for baremetal. I think you need in both places. The way I check is by invoking -flto -v from clang and look at the arguments passed to the compiler and linker Rep

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. I don't see -plugin-opt=-riscv-ssection-threshold=.. being passed. tools::gnutools::Linker::ConstructJob is being invoked with target riscv32-unknown-linux-gnu It has to work for riscv32-unknown-linux-gnu and riscv32-unknown-elf Repository: rC Clang CHANGES SINCE LAST

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. So Eli is concerned we might end up with many globals in the small data section or not picking the best candidates if we pass -G to all files in LTO. I don’t know if anyone has experimented with a heuristic to selectively pick which globals and of which size will be allow

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. If this is a target flag in GCC, shouldn't we make it a LLVM Target feature and pass it as -mattr, just like done for mrelax? Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Thanks for the patch update. I will launch some new correctness runs. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 ___ cfe-commits ma

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Lewis, with this patch we see less failures. But still some tests in SPEC and perennial test suites are failing. Pengxuan and I are trying to triage the failures. Here is what we see in one of the failed tests: Code right before rologue/Epilogue Insertion & Frame Finali

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:631 + MachineBasicBlock::iterator NewMI = + BuildMI(MBB, MI, DL, TII.get(RISCV::PseudoCALL)) + .add(MI->getOperand(0)); Where are we making sure the

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:631 + MachineBasicBlock::iterator NewMI = + BuildMI(MBB, MI, DL, TII.get(RISCV::PseudoCALL)) + .add(MI->getOperand(0)); apazos wrote: > Where are we

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 142279. apazos added a comment. Updated error messages and fixed getExtensionVersion https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDriverKinds.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-arch.c Index: test/Driver/r

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 142459. apazos added a comment. - Simplified hasOtherExtensions() now that we clarified non-standard extensions are separated by '_'. We just need to find the first occurrence of the prefixes. - updated error message, removed "unsupported" from some messages.

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 142502. apazos added a comment. Fixed failure in release mode https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDriverKinds.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-arch.c Index: test/Driver/riscv-arch.c ===

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos added inline comments. Comment at: lib/Driver/ToolChains/Arch/RISCV.cpp:50 + +static void getExtensionVersion(StringRef In, std::string &Version) { + auto I = In.begin(); asb wrote: > You should probably document the limitation that this doesn't currently

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 142716. apazos edited the summary of this revision. https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDriverKinds.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-arch.c Index: test/Driver/riscv-arch.c ===

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos added a comment. Addressed the latest review comments. Added TODOs for validations we cannot do now. https://reviews.llvm.org/D45284 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-co

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos added a comment. Hi Alex, it seems the table expects these extensions in a canonical order too: all x extensions, followed by all s extensions, and then all sx extensions. I can make the change, no problem. I have also coded other error situations described below. But f I cannot push a

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 143674. apazos added a comment. Hi Alex, the refactoring will be simple and can be done later when we need it, all the pieces are already parsed (type, name, major, minor) and are in strings, we will only need to convert to the preferred type (enum, int, etc

[PATCH] D45284: [RISCV] More validations on the input value of -march=

This revision was automatically updated to reflect the committed changes. Closed by commit rL330880: [RISCV] More validations on the input value of -march= (authored by apazos, committed by ). Herald added a subscriber: llvm-commits. Changed prior to commit: https://reviews.llvm.org/D45284?vs=1

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos added inline comments. Comment at: lib/Sema/SemaDeclAttr.cpp:5301 + + if (!isFunctionOrMethod(D)) { +S.Diag(D->getLocation(), diag::warn_attribute_wrong_decl_type) aaron.ballman wrote: > apazos wrote: > > aaron.ballman wrote: > > > I don't think you n

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos updated this revision to Diff 153419. apazos added a comment. Updated tests and removed Subjects from Attr.td https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td include/clang/Basic/DiagnosticSemaKinds.td lib/CodeGen/TargetInfo.cpp

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos added inline comments. Comment at: lib/Sema/SemaDeclAttr.cpp:5305 + + if (hasFunctionProto(D) && getFunctionOrMethodNumParams(D) != 0) { +S.Diag(D->getLocation(), diag::warn_riscv_interrupt_attribute) << 0; aaron.ballman wrote: > I would have assumed

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos updated this revision to Diff 153544. https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td include/clang/Basic/DiagnosticSemaKinds.td lib/CodeGen/TargetInfo.cpp lib/Sema/SemaDeclAttr.cpp test/Sema/riscv-interrupt-attr.c test/Sema/

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos added inline comments. Comment at: test/Sema/riscv-interrupt-attr.c:23 + // expected-note {{repeated RISC-V 'interrupt' attribute is here}} +__attribute__((interrupt("user"))) void foo8() {} +__attribute__((interrupt("s

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos added inline comments. Comment at: test/Sema/riscv-interrupt-attr.c:23 + // expected-note {{repeated RISC-V 'interrupt' attribute is here}} +__attribute__((interrupt("user"))) void foo8() {} +__attribute__((interrupt("s

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos updated this revision to Diff 154322. apazos added a comment. Made the check/warning for prototype explicit. https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td include/clang/Basic/DiagnosticSemaKinds.td lib/CodeGen/TargetInfo.cpp

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos updated this revision to Diff 154447. apazos added a comment. Thanks Aaron, I appreciate you taking the time to review. I have updated the test and removed the warning as discussed. https://reviews.llvm.org/D48412 Files: include/clang/Basic/Attr.td include/clang/Basic/AttrDocs.td

[PATCH] D48412: [RISCV] Add support for interrupt attribute

apazos added a comment. Hi Aaron, I have commit rights and will commit if after Alex and other RISC-V colleagues get a chance to review too. https://reviews.llvm.org/D48412 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.o

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Here is the bugpoint-reduced test case for the SPEC failure when enabling -msave-restore and allowing tail calls: Run the command llc test.ll -mattr=+save-restore -o out.s You will see the code generated is wrong: tail__riscv_restore_2 jr a5 target datala

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Yes Eli thanks for pointing out there are more scenarios that can fail. It looks like the best solution is to permit both flags on, but then bail out from doing this transformation if there is any type of tail call already in the function. This way we avoid messing with

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. > Is it worth trying to disallow tail call optimization completely if this flag > is enabled? I'm not sure what GCC does exactly. but this seems to be the > behaviour. I had reported above that I have already run that test: with "-fno-optimize-sibling-calls -msave-re

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Thanks Lewis, the runs are looking good, no failures, and good code size savings (average 3%) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 _

[PATCH] D84414: [RISCV] Support Shadow Call Stack

apazos added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:95 + .addReg(RISCV::X18) + .addImm(0); +} There are thee things to observe here and other reviewers might have some additional comments: - RISC-V does not have a re

[PATCH] D40023: [RISCV] Implement ABI lowering

apazos added inline comments. Comment at: lib/CodeGen/TargetInfo.cpp:8872 + else +NeededArgGPRs = 1; + Suggestion to make 1 default value when you declare the var Comment at: lib/CodeGen/TargetInfo.cpp:8938 + + // The size of the actual t

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Lewis, is the patch final? It would be good to merge it before the 10.0 release branch creation on Jan 15th Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 ___

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Lewis, your latest patch looks good, we just had another run with no new failures. But we know it will have issues with -g. So I think we should not merge it yet. Do you have a version of the patch that creates the labels for the compiler-generated save/restore lib calls

[PATCH] D93428: [AArch64] Add bti note property when compiling asm files with -mbranch-protection=bti

apazos added a comment. So the intention here is to generate the property when BTI branch protection is enabled, to guarantee the generate .o indeed has the property set, without requiring to pass the flag -mmark-bti-property explicitly. This is convenient for users. Or is there a clear reason

[PATCH] D93428: [AArch64] Add bti note property when compiling asm files with -mbranch-protection=bti

apazos added a comment. Thanks for clarifying - so the property is being set for C/C++ files but not for assembly files. I think it should be set automatically for both when one uses clang driver to compile/assemble. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://re

[PATCH] D93428: [AArch64] Add bti note property when compiling asm files with -mbranch-protection=bti

apazos added a comment. Thanks Daniel for the explanation. Was the support added for GNU assembler as well? Is it the same flag name? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93428/new/ https://reviews.llvm.org/D93428 ___

[PATCH] D102782: Add support for Warning Flag "-Wstack-usage="

apazos added inline comments. Comment at: clang/lib/Basic/Warnings.cpp:101 +Opt = "no-frame-larger-than="; + // Check to see if this warning starts with "no-", if so, this is a Since GCC supports the negative option -Wno-stack-usage, I think it is

[PATCH] D95655: [AArch64] Adding Neon Sm3 & Sm4 Intrinsics

apazos added inline comments. Comment at: clang/test/CodeGen/aarch64-neon-sm4-sm3-invalid.c:8 + +void test_range_check_vsm3tt1a(uint32x4_t a, uint32x4_t b, uint32x4_t c) { + // CHECK-RANGE: error: argument value 5 is outside the valid range [0, 3] Consider renam

[PATCH] D96381: [AArch64] Adding SHA3 Intrinsics support

apazos added inline comments. Comment at: clang/utils/TableGen/NeonEmitter.cpp:2118 Record *R = Def->getRecord(); -if (R->getValueAsBit("isVCVT_N")) { +if (R->getValueAsBit("isVXAR")) { + //VXAR takes an immediate in the range [0, 63] Consider a

[PATCH] D96381: [AArch64] Adding SHA3 Intrinsics support

apazos added a comment. This looks like a straightforward implementation. The only caveat is that the XAR immediate does not represent a lane, and hence the need for a custom immediate range check. Looks sensible to me. @labrinea and others at ARM, do have any other comment before this is merg

[PATCH] D112941: [clang] Add support for the new pointer authentication builtins.

apazos added inline comments. Comment at: clang/include/clang/Basic/DiagnosticSemaKinds.td:839 +def err_ptrauth_disabled : + Error<"pointer authentication is disabled for the current target">; +def err_ptrauth_invalid_key : These two error types are confusing.

[PATCH] D112941: [clang] Add support for the new pointer authentication builtins.

apazos added a comment. The plan to push support for ptrauth_sign_constant, and ptrauth_type_discriminator/ptrauth_string_discriminator in a separate patch is good. This current patch is already big. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

apazos added a comment. Lewis, try rebasing it, not applying cleanly nor https://reviews.llvm.org/D62190 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62686/new/ https://reviews.llvm.org/D62686 ___ cfe

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Herald added subscribers: evandro, luismarques, sameer.abuasal, pzheng, s.egerton, lenary. Shiva, we forgot about this patch. Can you rebase it so we move on with merging. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://r

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Shiva, I see a warning always being printed: '+small-data-limit=' is not a recognized feature for this target (ignoring feature) This is because it is being passed down as a target feature. Might be good to add a test case to make sure the SmallDataLimit module flag is

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Shiva, I am not sure how the SDataLimit is being honored in LTO mode. Where does getModuleMetadata get called? If the SelectSectionForGlobal api is called without getModuleMetadata being called first, it will use the default 8 instead of honoring the SDataLimit. Reposit

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Thanks Shiva, I res-ynced and rebuilt the patch. It is working fine. I see there is a msmall-data-threshold flag used by Mips and Hexagon, and now we are adding a new flag msmall-data-limit. Should't we reuse the flag? Repository: rG LLVM Github Monorepo CHANGES SINC

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Shiva, how about making the flag small-data-limit alias of -msmall-data-threshold? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 ___

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

apazos added a comment. Thanks Shiva, making it alias of -G makes sense, LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 ___ cfe-commits mailing list cfe-

[PATCH] D44189: [RISCV] Verify the input value of -march=

apazos added inline comments. Comment at: lib/Driver/ToolChains/Arch/RISCV.cpp:51 + break; +case 'g': + // g = imafd One more question - how about non-standard extensions (vendor/custom) prefixed with X? Shouldn't we add the logic to process 'Xext'

[PATCH] D44727: [RISCV] Implement getTargetDefines, handleTargetFeatures and hasFeature for RISCVTargetInfo

apazos added inline comments. Comment at: test/Preprocessor/riscv-target-features.c:9 + +// RUN: %clang -target riscv32-unknown-linux-gnu -march=rv32im -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-M-EXT %s +// RUN: %clang -target riscv64-unknown-linux-gnu -march=rv64im -

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mno-relax flag to disable it

apazos added inline comments. Comment at: include/clang/Driver/Options.td:1874 +def mno_relax : Flag<["-"], "mno-relax">, +Group; I think we should define both -mrelax and -mno-relax flags Comment at: lib/Driver/ToolChains/Arch/RISCV.cpp:

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos created this revision. apazos added reviewers: asb, kito-cheng. Herald added subscribers: shiva0217, niosHD, sabuasal, jordy.potman.lists, simoncook, johnrusso, rbar. - Updated diagnostic messages for invalid/unsupported march combinations. - Parsing X, SX and S extensions. https://revi

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 141043. apazos added a comment. updated test case https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDriverKinds.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-arch.c Index: test/Driver/riscv-arch.c ===

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 141048. apazos added a comment. test fix https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDriverKinds.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-arch.c Index: test/Driver/riscv-arch.c

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 141050. apazos added a comment. fixed test merged line https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDriverKinds.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-arch.c Index: test/Driver/riscv-arch.c ==

[PATCH] D45284: [RISCV] More validations on the input value of -march=

apazos updated this revision to Diff 141717. apazos edited the summary of this revision. apazos added a comment. Herald added a subscriber: zzheng. Updated code according to the ISA string rules that have been clarified. https://reviews.llvm.org/D45284 Files: include/clang/Basic/DiagnosticDri

[PATCH] D39963: [RISCV][RFC] Add initial RISC-V target and driver support

apazos added inline comments. Comment at: lib/Driver/ToolChains/RISCV.cpp:86 +CmdArgs.push_back("-lc"); +CmdArgs.push_back("-lgloss"); +CmdArgs.push_back("--end-group"); mgrang wrote: > How about if our sysroot is linux (as opposed to elf)? There won'

[PATCH] D39963: [RISCV][RFC] Add initial RISC-V target and driver support

apazos added a comment. Can you push this as a patch to review/commit instead of RFC? It has received a lot of comments/corrections already and I think it is getting in a shape we can merge. Comment at: lib/Driver/ToolChains/RISCV.cpp:86 +CmdArgs.push_back("-lc"); +Cm

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos added a comment. thanks Alex, I will test on windows before pushing. https://reviews.llvm.org/D41271 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos updated this revision to Diff 129981. apazos added a comment. I tested this on windows and I had to add an assembler placeholder executable, just like it was done with the linker in the RISCV multilib dir checked under Inputs. Other observations, are these known issues? - multilib dir c

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos added a comment. Thanks for the clarifications Alex. No need to fix these known issues right now. I will proceed with checking in this change. https://reviews.llvm.org/D41271 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://li

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

This revision was automatically updated to reflect the committed changes. Closed by commit rL322769: [RISCV] Propagate -mabi and -march values to GNU assembler. (authored by apazos, committed by ). Changed prior to commit: https://reviews.llvm.org/D41271?vs=129981&id=130272#toc Repository: r

[PATCH] D41271: [RISCV] Propagate -mabi and -march values to GNU assembler.

apazos added a comment. Committed R322769 Repository: rL LLVM https://reviews.llvm.org/D41271 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D42666: Revert "Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU assembler."

This revision was automatically updated to reflect the committed changes. Closed by commit rL323894: Revert "Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU… (authored by apazos, committed by ). Herald added a subscriber: llvm-commits. Changed prior to commit: https://reviews.

[PATCH] D42666: Revert "Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU assembler."

This revision was automatically updated to reflect the committed changes. Closed by commit rC323894: Revert "Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU… (authored by apazos, committed by ). Repository: rL LLVM https://reviews.llvm.org/D42666 Files: lib/Driver/ToolChai

[PATCH] D93428: [AArch64] Add bti note property when compiling asm files with -mbranch-protection=bti

apazos added a comment. Can you confirm when the GNU toolchain will have this flag supported in their assembler? Compatibility between LLVM and GNU toolchains is important. Stephen - I think we can abandon this review. Users will need to be made aware of this additional assembler flag when buil