> -----Original Message----- > From: Akihiko Odaki <[email protected]> > Sent: Friday, 14 April 2023 13:37 > Cc: Sriram Yagnaraman <[email protected]>; Jason Wang > <[email protected]>; Dmitry Fleytman <[email protected]>; > Michael S. Tsirkin <[email protected]>; Alex Bennée <[email protected]>; > Philippe Mathieu-Daudé <[email protected]>; Thomas Huth > <[email protected]>; Wainer dos Santos Moschetta > <[email protected]>; Beraldo Leal <[email protected]>; Cleber Rosa > <[email protected]>; Laurent Vivier <[email protected]>; Paolo Bonzini > <[email protected]>; [email protected]; Akihiko Odaki > <[email protected]> > Subject: [PATCH 29/40] igb: Implement MSI-X single vector mode > > Signed-off-by: Akihiko Odaki <[email protected]> > --- > hw/net/igb_core.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index > 429b0ebc03..2013a9a53d 100644 > --- a/hw/net/igb_core.c > +++ b/hw/net/igb_core.c > @@ -1870,7 +1870,7 @@ igb_update_interrupt_state(IGBCore *core) > > icr = core->mac[ICR] & core->mac[IMS]; > > - if (msix_enabled(core->owner)) { > + if (core->mac[GPIE] & E1000_GPIE_MSIX_MODE) { > if (icr) { > causes = 0; > if (icr & E1000_ICR_DRSTA) { @@ -1905,7 +1905,12 @@ > igb_update_interrupt_state(IGBCore *core) > trace_e1000e_irq_pending_interrupts(core->mac[ICR] & core->mac[IMS], > core->mac[ICR], core->mac[IMS]); > > - if (msi_enabled(core->owner)) { > + if (msix_enabled(core->owner)) { > + if (icr) { > + trace_e1000e_irq_msix_notify_vec(0); > + msix_notify(core->owner, 0); > + } > + } else if (msi_enabled(core->owner)) { > if (icr) { > msi_notify(core->owner, 0); > } > -- > 2.40.0
Reviewed-by: Sriram Yagnaraman <[email protected]>
