Now that PIIX3 has the PIC integrated, the ACPI controller can be wired up internally.
Signed-off-by: Bernhard Beschow <[email protected]> Reviewed-by: Michael S. Tsirkin <[email protected]> Message-Id: <[email protected]> --- hw/i386/pc_piix.c | 1 - hw/isa/piix3.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index bd66a5682b..8af4d5aa1b 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -327,7 +327,6 @@ static void pc_init1(MachineState *machine, if (piix4_pm) { smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); - qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]); qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq); pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c")); /* TODO: Populate SPD eeprom data. */ diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index dd8b712085..dfdae27daf 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -338,6 +338,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) { return; } + qdev_connect_gpio_out(DEVICE(&d->pm), 0, d->pic[9]); } } -- 2.39.1
