On 10/13/20 1:38 PM, Peter Maydell wrote:
> * has short-vector support (eg Cortex-A9)
> * v8A, can implement FPSCR.{Stride,Len} as RAZ/WI
> * no short-vector support, Stride/Len can be written
> but the only effect is that some insns must UNDEF
> (eg Cortex-A7)
Yep.
The other thing I wondered is if it was worthwhile to go ahead and split out
ltpsize now, even with MTE not implemented.
Eventually the conditions here would look like
if (m-profile) {
if (mte) {
ltpsize = [18:16];
}
} else {
if (!v8) {
vec_len = [18:16];
vec_stride = [22:20];
}
}
but for now you could leave out the assignment to ltpsize and just leave it
initialized to 4 since reset.
r~
