On Thu, 21 May 2020 at 20:38, Havard Skinnemoen <hskinnem...@google.com> wrote: > > The NPCM730 and NPCM750 SoCs have three timer modules each holding five > timers and some shared registers (e.g. interrupt status). > > Each timer runs at 25 MHz divided by a prescaler, and counts down from a > configurable initial value to zero. When zero is reached, the interrupt > flag for the timer is set, and the timer is disabled (one-shot mode) or > reloaded from its initial value (periodic mode). > > This implementation is sufficient to boot a Linux kernel configured for > NPCM750. Note that the kernel does not seem to actually turn on the > interrupts. > > Reviewed-by: Tyrone Ting <kft...@nuvoton.com> > Signed-off-by: Havard Skinnemoen <hskinnem...@google.com>
Reviewed-by: Joel Stanley <j...@jms.id.au>
