On Fri, 28 Feb 2020 at 18:55, Richard Henderson <[email protected]> wrote: > > On 2/28/20 9:34 AM, Peter Maydell wrote: > > You could refine the valid mask as the & of the bits which we > > do want to exist in aarch32, rather than &~ of the reserved bits: > > > > valid_mask &= TTLBIS | TOCU | TICAB | ... > > > > ? > > Yes, that's a good idea.
It occurs to me that we should check what the required semantics are for the opposite half of the register if the guest writes to one half of it via hcr_writehigh() or hcr_writelow() -- is the un-accessed half supposed to stay exactly as it is, or is it ok for the RES0-for-aarch32 bits to get squashed in the process? That would seem at least a bit odd even if it's valid, so maybe better to do aarch32 RES0 masking in hcr_writehigh() and hcr_writelow()? thanks -- PMM
