On 26 October 2015 at 13:01, Edgar E. Iglesias <[email protected]> wrote: > From: "Edgar E. Iglesias" <[email protected]> > > Hi, > > Another round of patches towards EL2 support. This one adds partial > support for 2-stage MMU. The AArch32/ARMv7 support is untested. > > Some of the details of error reporting are intentionally missing, I > was thinking to add those incrementally as they get quite involved > (e.g the register target and memory access size). > S2 traps during while translating due to ATS writes are not handled > either.
Thanks, applied to target-arm.next. (This is probably the last lot of "preparation for EL2/EL3/etc" stuff we should put in before 2.5 I think.) -- PMM
