From: "Edgar E. Iglesias" <[email protected]> Move declaration of t0sz and t1sz to the top of the function avoiding a mix of code and variable declarations.
No functional change. Signed-off-by: Edgar E. Iglesias <[email protected]> --- target-arm/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 149a857..4d8a25a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6464,6 +6464,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, MMUFaultType fault_type = translation_fault; uint32_t level = 1; uint32_t epd = 0; + int32_t t0sz, t1sz; int32_t tsz; uint32_t tg; uint64_t ttbr; @@ -6519,12 +6520,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * This is a Non-secure PL0/1 stage 1 translation, so controlled by * TTBCR/TTBR0/TTBR1 in accordance with ARM ARM DDI0406C table B-32: */ - int32_t t0sz = extract32(tcr->raw_tcr, 0, 6); + t0sz = extract32(tcr->raw_tcr, 0, 6); if (va_size == 64) { t0sz = MIN(t0sz, 39); t0sz = MAX(t0sz, 16); } - int32_t t1sz = extract32(tcr->raw_tcr, 16, 6); + t1sz = extract32(tcr->raw_tcr, 16, 6); if (va_size == 64) { t1sz = MIN(t1sz, 39); t1sz = MAX(t1sz, 16); -- 1.9.1
