On Thu, Aug 21, 2014 at 6:01 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 21 August 2014 02:36, Alistair Francis <alistai...@gmail.com> wrote: >> This allows the board to set the reset address, which is required >> for some boards (the Netduino Plus 2 for example) >> >> Signed-off-by: Alistair Francis <alistai...@gmail.com> > > This looks a bit odd -- I'm pretty sure the hardware doesn't > get only the reset address from an IMPDEF location. > Are you sure this board doesn't actually have an IMPDEF > reset value for the vector table offset register VTOR? > > Which CPU core is this, anyway? Googling suggests > it's a Cortex-M4, and the M4 TRM suggests that VTOR > always resets to 0.
I'm not sure what you mean about the IMPDEF reset value in the VTOR. The actual board is a Netduino Plus 2, with an STM32F405RG (which is a Cortex-M4, but I'm making do with the M3 for the moment). Not sure if this helps, but to quote the datasheet: "The Cortex ® -M4 with FPU CPU always fetches the reset vector on the ICode bus, which implies to have the boot space available only in the code area (typically, Flash memory)." The reason this is such a problem is that the Netduino Plus 2 maps memory to 0, but the memory that is mapped there can be changed. The actual memory mappings are in different locations, the 0 address is more of a pointer. Thanks, Alistair > > thanks > -- PMM
