This patch seriers add a new model for Cadence GPIO controller which supports 32 pins and interrupts for level-triggered/edge-triggered type on input pins.
Also define new trace functions for analysis purpose and new configuration to enable this model. Kuan-Jui Chiu (1): hw/gpio: Add Cadence GPIO model hw/gpio/Kconfig | 3 + hw/gpio/cadence_gpio.c | 312 +++++++++++++++++++++++++++++++++ hw/gpio/meson.build | 1 + hw/gpio/trace-events | 5 + include/hw/gpio/cadence_gpio.h | 66 +++++++ 5 files changed, 387 insertions(+) create mode 100644 hw/gpio/cadence_gpio.c create mode 100644 include/hw/gpio/cadence_gpio.h -- 2.34.1
