On 2/2/26 23:24, Philippe Mathieu-Daudé wrote:
Have the CPUClass::disas_set_info() handler take a const
CPUState to be sure it is not modified. In order to do that,
first constify few callees (ARM & RISCV).
Philippe Mathieu-Daudé (7):
target/arm: Have arm_feature() take a const @env argument
target/arm: Have cpu_isar_feature() use a const ARMCPU object
target/arm: Have is_64() take a const @env argument
target/arm: Have arm_sctlr_b() take a const @env argument
disas/riscv: Make rv_decode::cfg const
disas: Make disassemble_info::target_info field const
disas: Have disas_set_info() take a const CPUState
Series queued, thanks.
