Hi Chao,
On 2026/1/29 17:39, Chao Liu wrote:
Add a qtest suite for the RISC-V IOMMU PCI device on the virt machine.
The test exercises bare, S-stage, G-stage, and nested translation paths
using iommu-testdev and the qos-riscv-iommu helpers.
The test validates:
- Device context (DC) configuration
- SV39 page table walks for S-stage translation
- SV39x4 page table walks for G-stage translation
- Nested translation combining both stages
- FCTL register constraints
This provides regression coverage for the RISC-V IOMMU implementation
without requiring a full guest OS boot.
Signed-off-by: Chao Liu <[email protected]>
---
MAINTAINERS | 1 +
tests/qtest/iommu-riscv-test.c | 279 +++++++++++++++++++++++++++++++++
tests/qtest/meson.build | 5 +-
3 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 tests/qtest/iommu-riscv-test.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 830f56376b..73daaad841 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -349,6 +349,7 @@ F: common-user/host/riscv*
F: tests/functional/riscv32
F: tests/functional/riscv64
F: tests/tcg/riscv64/
+F: tests/qtest/iommu-riscv-test.c
RISC-V XThead* extensions
M: Christoph Muellner <[email protected]>
diff --git a/tests/qtest/iommu-riscv-test.c b/tests/qtest/iommu-riscv-test.c
new file mode 100644
index 0000000000..5a86b18db9
--- /dev/null
+++ b/tests/qtest/iommu-riscv-test.c
@@ -0,0 +1,279 @@
+/*
+ * QTest testcase for RISC-V IOMMU with iommu-testdev
+ *
+ * This QTest file is used to test the RISC-V IOMMU with iommu-testdev so that
+ * we can test RISC-V IOMMU without any guest kernel or firmware.
+ *
+ * Copyright (c) 2026 Chao Liu <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "libqtest.h"
+#include "libqos/pci.h"
libqtest.h and libqos/pci.h are redundant because they are already
pulled in by libqos/generic-pcihost.h (libqos/pci.h itself includes
libqtest.h)
Besides
Reviewed-by: Tao Tang <[email protected]>
Thanks,
Tao
+#include "libqos/generic-pcihost.h"
+#include "hw/pci/pci_regs.h"
+#include "hw/misc/iommu-testdev.h"
+#include "hw/riscv/riscv-iommu-bits.h"
+#include "libqos/qos-riscv-iommu.h"
+#include "libqos/riscv-iommu.h"
+
+#define DMA_LEN 4
