On 27/01/2026 17.15, [email protected] wrote:
From: Jared Rossi <[email protected]>
Define a new PBT code and IPLB layout in preperation for supporting PCI device
IPL on s390x.
Signed-off-by: Jared Rossi <[email protected]>
---
include/hw/s390x/ipl/qipl.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/include/hw/s390x/ipl/qipl.h b/include/hw/s390x/ipl/qipl.h
index 6dc12dd859..8d3c83a80b 100644
--- a/include/hw/s390x/ipl/qipl.h
+++ b/include/hw/s390x/ipl/qipl.h
@@ -23,6 +23,7 @@
enum S390IplType {
S390_IPL_TYPE_FCP = 0x00,
S390_IPL_TYPE_CCW = 0x02,
+ S390_IPL_TYPE_PCI = 0x04,
S390_IPL_TYPE_PV = 0x05,
S390_IPL_TYPE_QEMU_SCSI = 0xff
};
@@ -108,6 +109,14 @@ struct IplBlockQemuScsi {
} QEMU_PACKED;
typedef struct IplBlockQemuScsi IplBlockQemuScsi;
+struct IplBlockPci {
+ uint32_t reserved0[76];
+ uint8_t opt;
+ uint8_t reserved1[3];
+ uint32_t fid;
+} QEMU_PACKED;
+typedef struct IplBlockPci IplBlockPci;
+
union IplParameterBlock {
struct {
uint32_t len;
@@ -123,6 +132,7 @@ union IplParameterBlock {
IplBlockFcp fcp;
IPLBlockPV pv;
IplBlockQemuScsi scsi;
+ IplBlockPci pci;
};
} QEMU_PACKED;
struct {
Reviewed-by: Thomas Huth <[email protected]>
