On Tue, 30 Sept 2025 at 12:57, Clément Chigot <[email protected]> wrote: > > The first two patches are minor improvements before the core third > patch. > > This was initially a single patch split as per review comments (see [1]) > > [1] https://lists.gnu.org/archive/html/qemu-devel/2025-09/msg05899.html > > Clément Chigot (2): > hw/arm/xlnx-zynqmp: move GIC_NUM_SPI_INTR define in header > hw/arm/xlnx-zynqmp: introduce helper to compute RPU number > > Frederic Konrad (1): > hw/arm/xlnx-zynqmp: wire a second GIC for the Cortex-R5
Applied to target-arm.next, thanks. -- PMM
