On Mon, Sep 29, 2025 at 11:02 PM Valentin Haudiquet
<[email protected]> wrote:
>
> From: vhaudiquet <[email protected]>
>
> Three instructions were not using the endianness swap flag, which resulted in
> a bug on big-endian architectures.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3131
> Buglink: https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/2123828
>
> Signed-off-by: Valentin Haudiquet <[email protected]>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/insn_trans/trans_rvzce.c.inc | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvzce.c.inc
> b/target/riscv/insn_trans/trans_rvzce.c.inc
> index c77c2b927b..dd15af0f54 100644
> --- a/target/riscv/insn_trans/trans_rvzce.c.inc
> +++ b/target/riscv/insn_trans/trans_rvzce.c.inc
> @@ -88,13 +88,13 @@ static bool trans_c_lbu(DisasContext *ctx, arg_c_lbu *a)
> static bool trans_c_lhu(DisasContext *ctx, arg_c_lhu *a)
> {
> REQUIRE_ZCB(ctx);
> - return gen_load(ctx, a, MO_UW);
> + return gen_load(ctx, a, MO_TEUW);
> }
>
> static bool trans_c_lh(DisasContext *ctx, arg_c_lh *a)
> {
> REQUIRE_ZCB(ctx);
> - return gen_load(ctx, a, MO_SW);
> + return gen_load(ctx, a, MO_TESW);
> }
>
> static bool trans_c_sb(DisasContext *ctx, arg_c_sb *a)
> @@ -106,7 +106,7 @@ static bool trans_c_sb(DisasContext *ctx, arg_c_sb *a)
> static bool trans_c_sh(DisasContext *ctx, arg_c_sh *a)
> {
> REQUIRE_ZCB(ctx);
> - return gen_store(ctx, a, MO_UW);
> + return gen_store(ctx, a, MO_TEUW);
> }
>
> #define X_S0 8
> --
> 2.51.0
>
>
