On 25/09/25 11:12PM, Cédric Le Goater wrote:
> On 9/25/25 19:30, Aditya Gupta wrote:
> > Overview
> > ============
> >
> > Add support for Power11 powernv machine type.
> >
> > As Power11 core is same as Power10, hence much of the code has been reused
> > from Power10.
> >
> > Power11 PSeries already added in QEMU in:
> > commit 273db89bcaf4 ("ppc/pseries: Add Power11 cpu type")
> >
> > Git Tree for Testing
> > ====================
> >
> > QEMU: https://github.com/adi-g15-ibm/qemu/tree/p11-powernv-v10
> >
> > The patches apply cleanly on below commit:
> > 95b9e0d2ade5 ("Merge tag 'for-upstream' of
> > https://gitlab.com/bonzini/qemu into staging")
> >
> > Tests ran:
> > * `make check`
> > * '-M powernv' / '-M powernv10' / '-M powernv11'
> > * '-smp' option tested
> > * 'e1000e' device
> > * tested changing irq affinities to remote chips for xive functionality
> > * compile test with --without-default-devices
>
>
> Did you run 'make check-functional' ?
I ran 'make check-functional-ppc64'. Should have mentioned in tests ran.
>
>
> This config looks fine :
>
> Architecture: ppc64le
> Byte Order: Little Endian
> CPU(s): 16
> On-line CPU(s) list: 0-15
> Model name: Power11, altivec supported
> Model: 18.0 (pvr 0082 1200) <-- is that a bug ?
No, it's the PVR is intentionally DD2.0.
> Thread(s) per core: 4
> Core(s) per socket: 2
> Socket(s): 2
> Frequency boost: enabled
> CPU(s) scaling MHz: 64%
> CPU max MHz: 3800.0000
> CPU min MHz: 2000.0000
> Caches (sum of all):
> L1d: 128 KiB (4 instances)
> L1i: 128 KiB (4 instances)
> NUMA:
> NUMA node(s): 2
> NUMA node0 CPU(s): 0-7
> NUMA node1 CPU(s): 8-15
>
>
>
> Tested-by: Cédric Le Goater <[email protected]>
Thanks for all your reviews and the tag Cedric !
- Aditya G
>
> Thanks,
>
> C.
>
