On 6/16/25 7:12 AM, Jonathan Cameron wrote:
On Fri, 13 Jun 2025 15:44:49 +0100
Shameer Kolothum <shameerali.kolothum.th...@huawei.com> wrote:
Now that arm,virt can have user-creatable smmuv3 devices, document it.
Signed-off-by: Shameer Kolothum <shameerali.kolothum.th...@huawei.com>
---
qemu-options.hx | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index 7eb8e02b4b..3edbde45bb 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -1226,6 +1226,12 @@ SRST
``aw-bits=val`` (val between 32 and 64, default depends on machine)
This decides the address width of the IOVA address space.
+``-device arm-smmuv3,primary-bus=id``
+ This is only supported by ``-machine virt`` (ARM).
+
+ ``primary-bus=id``
+ The PCIe Root Complex to be associated with.
Hmm. Root complex or host bridge?
I think an RC is allowed to have multiple heirarchy and hence multiple
host bridges. Figure 1.2 in the PCI spec. So my gut feeling is this
should be host bridge.
+1.
the key word-hint: 'complex' -- a RP (a Root *Port*) can only host a single
PCI(e) (sub-)tree,
but a RC can have multiple PCI domains, not to mention a bunch of
platform-level,
acpi-defined PCI(e) devices.
+
ERST
DEF("name", HAS_ARG, QEMU_OPTION_name,
