> -----Original Message-----
> From: Jonathan Cameron <jonathan.came...@huawei.com>
> Sent: Monday, June 16, 2025 12:13 PM
> To: Shameerali Kolothum Thodi
> <shameerali.kolothum.th...@huawei.com>; Linuxarm
> <linux...@huawei.com>
> Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org;
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> smost...@google.com; Wangzhou (B) <wangzh...@hisilicon.com>;
> jiangkunkun <jiangkun...@huawei.com>; Jonathan Cameron
> <jonathan.came...@huawei.com>; zhangfei....@linaro.org
> Subject: Re: [PATCH v4 7/7] qemu-options.hx: Document the arm-smmuv3
> device
> 
> On Fri, 13 Jun 2025 15:44:49 +0100
> Shameer Kolothum <shameerali.kolothum.th...@huawei.com> wrote:
> 
> > Now that arm,virt can have user-creatable smmuv3 devices, document it.
> >
> > Signed-off-by: Shameer Kolothum
> <shameerali.kolothum.th...@huawei.com>
> > ---
> >  qemu-options.hx | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/qemu-options.hx b/qemu-options.hx
> > index 7eb8e02b4b..3edbde45bb 100644
> > --- a/qemu-options.hx
> > +++ b/qemu-options.hx
> > @@ -1226,6 +1226,12 @@ SRST
> >      ``aw-bits=val`` (val between 32 and 64, default depends on machine)
> >          This decides the address width of the IOVA address space.
> >
> > +``-device arm-smmuv3,primary-bus=id``
> > +    This is only supported by ``-machine virt`` (ARM).
> > +
> > +    ``primary-bus=id``
> > +        The PCIe Root Complex to be associated with.
> 
> Hmm.  Root complex or host bridge?
> I think an RC is allowed to have multiple heirarchy and hence multiple
> host bridges. Figure 1.2 in the PCI spec. So my gut feeling is this
> should be host bridge.

Ok. I will change the documentation and other comments where it matters
in this series to host bridge.

Thanks,
Shameer

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